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Communication and Control for Quantum Circuits

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Communication and Control for Quantum Circuits Communication and Control for Quantum Circuits Yatish Patel Electrical Engineering and Computer Sciences University of California at Berkeley Technical Report No. UCB/EECS-2010-77 http://www.eecs.berkeley.edu/Pubs/TechRpts/2010/EECS-2010-77.html May 14, 2010 Copyright © 2010, by the author(s). All rights reserved. Permission to make digital or hard copies of all or part of this work for personal or classroom use is granted without fee provided that copies are not made or distributed for profit or commercial advantage and that copies bear this notice and the full citation on the first page. To copy otherwise, to republish, to post on servers or to redistribute to lists, requires prior specific permission. Communication and Control for Quantum Circuits by Yatish Patel A dissertation submitted in partial satisfaction of the requirements for the degree of Doctor of Philosophy in Computer Science in the Graduate Division of the University of California, Berkeley Committee in charge: Professor John Kubiatowicz, Chair Professor Krste Asanovic Professor John Flannery Spring 2010 Communication and Control for Quantum Circuits Copyright 2010 by Yatish Patel Abstract Communication and Control for Quantum Circuits by Yatish Patel Doctor of Philosophy in Computer Science University of California, Berkeley Professor John Kubiatowicz, Chair Quantum computers will potentially be able to solve certain classes of problems more effi- ciently than possible on a classical computer. Due to the fragility of quantum data, a large scale quantum computer will require a robust system to enable reliable communication within the datapath. We present a scalable architecture for a quantum computer which specifically addresses communication concerns. Our design minimizes communication er- ror by using a specialized interconnection network to perform long-distance movement. We developed a set of tools to construct and study quantum datapath designs based on ion trap quantum technology. Our tools automatically synthesize and insert the inter- connection network used for long-distance communication into the target datapath. We present a set of greedy heuristics to optimize the routing and scheduling of communica- tion within this network and show that our approach performs as well as an optimal case determined using integer linear programming. We study a number of different quantum circuits including randomly generated circuits, quantum adder circuits, and ultimately Shor’s factorization algorithm and show that designs using our optimizations significantly improve upon prior work in terms of a probabilistic area delay metric. 1 Contents List of Figures iv List of Tables xii 1 Introduction 1 2 Quantum Computing 5 2.1 QuantumStates................................. 5 2.2 QuantumCircuitModel ............................ 6 2.2.1 UniversalGates............................. 8 2.2.2 QuantumDecoherence . .. .. 8 2.2.3 Fidelity ................................. 8 2.3 ErrorCorrectingCodes. 9 2.4 Communication ................................. 10 2.4.1 Teleportation .............................. 10 2.5 Quantum Computing Technologies . .. 12 2.5.1 IonTrapandQubits .......................... 12 2.5.2 Movement ................................ 14 2.5.3 Measurement .............................. 16 2.5.4 GateOperations ............................ 16 2.5.5 Abstraction ............................... 17 2.5.6 ComparingtoClassicalCMOS. 18 3 Quantum CAD Flow 20 3.1 Application Circuit Specification . ...... 23 3.1.1 ApplicationDataflowGraph . 26 3.2 Error Correction Circuit Optimization . ...... 28 3.3 QuantumLogicSynthesis . 28 3.3.1 TechnologyDependentGates . 28 3.3.2 FaultTolerantGateConstructions . .. 29 3.4 DatapathMicroarchitectures . .... 29 3.4.1 ThreeMajorOrganizations . 29 3.4.2 NetworkSynthesis ........................... 30 3.5 IonTrapLayout................................. 30 i 3.5.1 LayoutGraphRepresentation . 31 3.5.2 ModularLayouts ............................ 32 3.5.3 LayoutMetrics ............................. 32 3.6 High-levelMapping............................... 33 3.7 Network Routing and Scheduling . .. 34 3.8 Low-levelScheduling . .. .. 34 3.9 FaultToleranceVerification . ... 34 3.10 BenchmarksandEvaluation . .. 36 3.10.1 Adder Circuits and Shor’s Algorithm . ... 36 3.10.2 RandomCircuitGeneration . 36 3.10.3 ADCR: An Aggregate Metric for Probabilistic Computation .............................. 37 4 Optimizing Short-distance Quantum Communication 39 4.1 IonTrapDatapath ............................... 39 4.2 DatapathControl................................ 41 4.2.1 MacroblockAbstraction . 43 4.2.2 MacroblockSequencing. 45 4.2.3 LasersandMeasurement . 47 4.2.4 InterfacetoHigh-levelControl . ... 47 4.2.5 Scheduling Communication . 47 4.3 ManualLayoutofQuantumCircuits . .. 48 4.4 AutomatedGrid-BasedLayout . 50 4.4.1 RegularTiledDatapaths . 50 4.4.2 OptimizingTitledDatapaths . 51 4.4.3 EvaluatingGrid-BasedDatapaths . .. 53 4.5 QalypsoComputeRegions . 55 4.5.1 AncillaGeneratorDatapaths. 56 4.5.2 ModelingCongestion . 57 4.6 Summary .................................... 60 5 Optimizing Long-distance Quantum Communication 61 5.1 CommunicationNetwork . 62 5.1.1 Structuring Global Communication . .. 63 5.1.2 Terminology............................... 64 5.1.3 Metrics ................................. 65 5.2 Network Communication Models . 66 5.2.1 BallisticTransportModel . 66 5.2.2 TeleportationTransportModel . 67 5.2.3 EPRPurificationModel . 67 5.2.4 Communication Model Analysis . 69 5.2.5 PurificationResources . 72 5.3 NetworkConnectionsandControl . ... 75 5.3.1 ChainTeleportation . .. .. 77 ii 5.3.2 PathReservation ............................ 79 5.3.3 LinkSetup................................ 79 5.3.4 EPRTeleportation . .. .. 80 5.3.5 DataTeleportation . .. .. 80 5.3.6 ConnectionBreakdown. 81 5.4 ComponentDesign ............................... 81 5.4.1 Purifier ................................. 81 5.4.2 RouterLinks .............................. 82 5.4.3 Routers ................................. 83 6 Routing 85 6.1 CircuitSchedule................................. 86 6.2 Routing ..................................... 88 6.2.1 DimensionOrder ............................ 88 6.2.2 Adaptive................................. 89 6.3 Optimal Routing and Scheduling . .. 90 6.3.1 MILPforQuantumRouting . 91 6.3.2 Results.................................. 94 6.4 Practical Scheduling and Routing . .... 94 6.4.1 OnDemandScheduling . 95 6.4.2 Heuristic Prescheduling . 96 6.4.3 SimulatedAnnealing . 97 6.5 RoutingAnalysis ................................ 98 6.5.1 NetworkAreaImpact. 99 6.5.2 SensitivitytoMapping . .101 6.5.3 Communication Patterns and Circuit Size . 104 6.6 Summary ....................................105 7 Large Quantum Circuits 106 7.1 QuantumAdditionCircuits . 107 7.1.1 Ripple-carryAdder . .107 7.1.2 CarryLook-aheadAdder. .109 7.2 Shor’sFactorizationAlgorithm . .109 7.2.1 ImplementationofShor’s. 109 7.2.2 PerformanceofShor’sAlgorithm . 111 7.3 FutureWork...................................111 7.3.1 AlternateTechnologies . 112 7.3.2 EarlyNetworkConnections . .112 7.3.3 Ballistic Move with Periodic Error Correction . ......112 7.4 Conclusion....................................113 Bibliography 114 iii List of Figures 1.1 QuantumComputerOverview . 2 1.2 QuantumCircuitDesignFlow . 3 2.1 Quantum Circuit Model. Small example circuit that operates on three qubits. The sequence of operations is read left to right. Quantum bits are represented by single lines and classical bits are represented by double lines. This circuit contains four single qubit gates, two double qubit gates, and a measure gate. In this example, the measure gate generates a classical bit which is used to control the X gate on qubit A. .. 6 2.2 A comparison between a classical XOR and its quantum analog: the con- trolled not or CNOT. The CNOT gate is reversible, thus the additional output. Figure b) outputs the XOR result to the bottom bit. Figure c) shows the same CNOT when the input is a quantum superposition. In this case the output is an entangled qubit state, not representable as indepen- dent qubit values for the two outputs. .. 7 2.3 Basic gates for quantum circuits which supports a universal quantum com- puting model. The Hadamard gate converts bit values to phase values and vice versa. The phase, T and Z gates rotate the phase of the “1” qubit value by different angles. The CNOT gate is the same as shown in Figure 2.2 and performs the XOR functionality. The measurement “gate” measures a quantum state, returning a 1 or 0 and collapses any superposition to that value as well. The X is a bit flip, Z a phase flip, and Y a combination of both. The X, Y, Z, and phase gates can be generated by the other gates shown here but we include them since they are often included as physical primitives..................................... 7 2.4 Example of a transversal and non-transversal gate. Bold lines represent logical qubits where are encoded by a number of physical qubits. In (a) the H gate is performed on an encoded qubit transversally with a single H gate per physical bit. In (b) the π/8 cannot be performed transversally. Instead we create an encoded π/8 ancilla and use X, S, and M gates to perform the encoded π/8. ........................... 10 iv 2.5 Teleporting data qubit D to the target location requires (1) a high-fidelity EPR pair (E1/E2), (2) local operations at the source, (3) transmission of classical bits, and (4) correction operations to recreate D from E2 at the target. .....................................
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