Introduction to Parallel Computing
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2.5 Classification of Parallel Computers
52 // Architectures 2.5 Classification of Parallel Computers 2.5 Classification of Parallel Computers 2.5.1 Granularity In parallel computing, granularity means the amount of computation in relation to communication or synchronisation Periods of computation are typically separated from periods of communication by synchronization events. • fine level (same operations with different data) ◦ vector processors ◦ instruction level parallelism ◦ fine-grain parallelism: – Relatively small amounts of computational work are done between communication events – Low computation to communication ratio – Facilitates load balancing 53 // Architectures 2.5 Classification of Parallel Computers – Implies high communication overhead and less opportunity for per- formance enhancement – If granularity is too fine it is possible that the overhead required for communications and synchronization between tasks takes longer than the computation. • operation level (different operations simultaneously) • problem level (independent subtasks) ◦ coarse-grain parallelism: – Relatively large amounts of computational work are done between communication/synchronization events – High computation to communication ratio – Implies more opportunity for performance increase – Harder to load balance efficiently 54 // Architectures 2.5 Classification of Parallel Computers 2.5.2 Hardware: Pipelining (was used in supercomputers, e.g. Cray-1) In N elements in pipeline and for 8 element L clock cycles =) for calculation it would take L + N cycles; without pipeline L ∗ N cycles Example of good code for pipelineing: §doi =1 ,k ¤ z ( i ) =x ( i ) +y ( i ) end do ¦ 55 // Architectures 2.5 Classification of Parallel Computers Vector processors, fast vector operations (operations on arrays). Previous example good also for vector processor (vector addition) , but, e.g. recursion – hard to optimise for vector processors Example: IntelMMX – simple vector processor. -
Su(3) Gluodynamics on Graphics Processing Units V
Proceedings of the International School-seminar \New Physics and Quantum Chromodynamics at External Conditions", pp. 29 { 33, 3-6 May 2011, Dnipropetrovsk, Ukraine SU(3) GLUODYNAMICS ON GRAPHICS PROCESSING UNITS V. I. Demchik Dnipropetrovsk National University, Dnipropetrovsk, Ukraine SU(3) gluodynamics is implemented on graphics processing units (GPU) with the open cross-platform compu- tational language OpenCL. The architecture of the first open computer cluster for high performance computing on graphics processing units (HGPU) with peak performance over 12 TFlops is described. 1 Introduction Most of the modern achievements in science and technology are closely related to the use of high performance computing. The ever-increasing performance requirements of computing systems cause high rates of their de- velopment. Every year the computing power, which completely covers the overall performance of all existing high-end systems reached before is introduced according to popular TOP-500 list of the most powerful (non- distributed) computer systems in the world [1]. Obvious desire to reduce the cost of acquisition and maintenance of computer systems simultaneously, along with the growing demands on their performance shift the supercom- puting architecture in the direction of heterogeneous systems. These kind of architecture also contains special computational accelerators in addition to traditional central processing units (CPU). One of such accelerators becomes graphics processing units (GPU), which are traditionally designed and used primarily for narrow tasks visualization of 2D and 3D scenes in games and applications. The peak performance of modern high-end GPUs (AMD Radeon HD 6970, AMD Radeon HD 5870, nVidia GeForce GTX 580) is about 20 times faster than the peak performance of comparable CPUs (see Fig. -
Introduction to High Performance Computing
Introduction to High Performance Computing Gregory G. Howes Department of Physics and Astronomy University of Iowa Iowa High Performance Computing Summer School University of Iowa Iowa City, Iowa 20-22 May 2013 Thank you Ben Rogers Information Technology Services Glenn Johnson Information Technology Services Mary Grabe Information Technology Services Amir Bozorgzadeh Information Technology Services Mike Jenn Information Technology Services Preston Smith Purdue University and National Science Foundation Rosen Center for Advanced Computing, Purdue University Great Lakes Consortium for Petascale Computing This presentation borrows heavily from information freely available on the web by Ian Foster and Blaise Barney (see references) Outline • Introduction • Thinking in Parallel • Parallel Computer Architectures • Parallel Programming Models • References Introduction Disclaimer: High Performance Computing (HPC) is valuable to a variety of applications over a very wide range of fields. Many of my examples will come from the world of physics, but I will try to present them in a general sense Why Use Parallel Computing? • Single processor speeds are reaching their ultimate limits • Multi-core processors and multiple processors are the most promising paths to performance improvements Definition of a parallel computer: A set of independent processors that can work cooperatively to solve a problem. Introduction The March towards Petascale Computing • Computing performance is defined in terms of FLoating-point OPerations per Second (FLOPS) GigaFLOP 1 GF = 109 FLOPS TeraFLOP 1 TF = 1012 FLOPS PetaFLOP 1 PF = 1015 FLOPS • Petascale computing also refers to extremely large data sets PetaByte 1 PB = 1015 Bytes Introduction Performance improves by factor of ~10 every 4 years! Outline • Introduction • Thinking in Parallel • Parallel Computer Architectures • Parallel Programming Models • References Thinking in Parallel DEFINITION Concurrency: The property of a parallel algorithm that a number of operations can be performed by separate processors at the same time. -
Improving Tasks Throughput on Accelerators Using Opencl Command Concurrency∗
Improving tasks throughput on accelerators using OpenCL command concurrency∗ A.J. L´azaro-Mu~noz1, J.M. Gonz´alez-Linares1, J. G´omez-Luna2, and N. Guil1 1 Dep. of Computer Architecture University of M´alaga,Spain [email protected] 2 Dep. of Computer Architecture and Electronics University of C´ordoba,Spain Abstract A heterogeneous architecture composed by a host and an accelerator must frequently deal with situations where several independent tasks are available to be offloaded onto the accelerator. These tasks can be generated by concurrent applications executing in the host or, in case the host is a node of a computer cluster, by applications running on other cluster nodes that are willing to offload tasks in the accelerator connected to the host. In this work we show that a runtime scheduler that selects the best execution order of a group of tasks on the accelerator can significantly reduce the total execution time of the tasks and, consequently, increase the accelerator use. Our solution is based on a temporal execution model that is able to predict with high accuracy the execution time of a set of concurrent tasks launched on the accelerator. The execution model has been validated in AMD, NVIDIA, and Xeon Phi devices using synthetic benchmarks. Moreover, employing the temporal execution model, a heuristic is proposed which is able to establish a near-optimal tasks execution ordering that signicantly reduces the total execution time, including data transfers. The heuristic has been evaluated with five different benchmarks composed of dominant kernel and dominant transfer real tasks. Experiments indicate the heuristic is able to find always an ordering with a better execution time than the average of every possible execution order and, most times, it achieves a near-optimal ordering (very close to the execution time of the best execution order) with a negligible overhead. -
1 Parallelism
Lecture 23: Parallelism • Administration – Take QUIZ 17 over P&H 7.1-5, before 11:59pm today – Project: Cache Simulator, Due April 29, 2010 • Last Time – On chip communication – How I/O works • Today – Where do architectures exploit parallelism? – What are the implications for programming models? – What are the implications for communication? – … for caching? UTCS 352, Lecture 23 1 Parallelism • What type of parallelism do applications have? • How can computer architectures exploit this parallelism? UTCS 352, Lecture 23 2 1 Granularity of Parallelism • Fine grain instruction level parallelism • Fine grain data parallelism • Coarse grain (data center) parallelism • Multicore parallelism UTCS 352, Lecture 23 3 Fine grain instruction level parallelism • Fine grain instruction level parallelism – Pipelining – Multi-issue (dynamic scheduling & issue) – VLIW (static issue) – Very Long Instruction Word • Each VLIW instruction includes up to N RISC-like operations • Compiler groups up to N independent operations • Architecture issues fixed size VLIW instructions UTCS 352, Lecture 23 4 2 VLIW Example Theory Let N = 4 Theoretically 4 ops/cycle • 8 VLIW = 32 operations in practice In practice, • Compiler cannot fill slots • Memory stalls - load stall - UTCS 352, Lecture 23 5 Multithreading • Performing multiple threads together – Replicate registers, PC, etc. – Fast switching between threads • Fine-grain multithreading – Switch threads after each cycle – Interleave instruction execution – If one thread stalls, others are executed • Medium-grain -
Embarrassingly Parallel
Algorithms PART I: Embarrassingly Parallel HPC Spring 2017 Prof. Robert van Engelen Overview n Ideal parallelism n Master-worker paradigm n Processor farms n Examples ¨ Geometrical transformations of images ¨ Mandelbrot set ¨ Monte Carlo methods n Load balancing of independent tasks n Further reading 3/30/17 HPC 2 Ideal Parallelism n An ideal parallel computation can be immediately divided into completely independent parts ¨ “Embarrassingly parallel” ¨ “Naturally parallel” n No special techniques or algorithms required input P0 P1 P2 P3 result 3/30/17 HPC 3 Ideal Parallelism and the Master-Worker Paradigm n Ideally there is no communication ¨ Maximum speedup n Practical embarrassingly parallel applications have initial communication and (sometimes) a final communication ¨ Master-worker paradigm where master submits jobs to workers ¨ No communications between workers Send initial data P0 P1 P2 P3 Master Collect results 3/30/17 HPC 4 Parallel Tradeoffs n Embarrassingly parallel with perfect load balancing: tcomp = ts / P assuming P workers and sequential execution time ts n Master-worker paradigm gives speedup only if workers have to perform a reasonable amount of work ¨ Sequential time > total communication time + one workers’ time ts > tp = tcomm + tcomp -1 ¨ Speedup SP = ts / tP = P tcomp / (tcomm + tcomp) = P / (r + 1) where r = tcomp / tcomm ¨ Thus SP ® P when r ® ¥ n However, communication tcomm can be expensive ¨ Typically ts < tcomm for small tasks, that is, the time to send/recv data to the workers is more expensive than doing all -
Embarrassingly Parallel Jobs Are Not Embarrassingly Easy to Schedule on the Grid
Embarrassingly Parallel Jobs Are Not Embarrassingly Easy to Schedule on the Grid Enis Afgan, Purushotham Bangalore Department of Computer and Information Sciences University of Alabama at Birmingham 1300 University Blvd., Birmingham AL 35294-1170 {afgane, puri}@cis.uab.edu Abstract range greatly from only a few instances to several hundred instances and each instance can execute from Embarrassingly parallel applications represent several seconds or minutes to many hours. The end an important workload in today's grid environments. result is speedup of application’s execution that is only Scheduling and execution of this class of applications limited by the number of resource available. is considered mostly a trivial and well-understood Meanwhile, grid computing has emerged as the process on homogeneous clusters. However, while upcoming distributed computational infrastructure that grid environments provide the necessary enables virtualization and aggregation of computational resources, associated resource geographically distributed compute resources into a heterogeneity represents a new challenge for efficient seamless compute platform [2]. Characterized by task execution for these types of applications across heterogeneous resources with a wide range of network multiple resources. This paper presents a set of speeds between participating sites, high network examples illustrating how execution characteristics of latency, site and resource instability and a sea of local individual tasks, and consequently a job, are affected management policies, it seems the grid presents as by the choice of task execution resources, task many problems as it solves. Nonetheless, from the invocation parameters, and task input data attributes. early days of the grid, EP class of applications has It is the aim of this work to highlight this relationship been categorized as the killer application for the grid between an application and an execution resource to [3]. -
State-Of-The-Art in Parallel Computing with R
Markus Schmidberger, Martin Morgan, Dirk Eddelbuettel, Hao Yu, Luke Tierney, Ulrich Mansmann State-of-the-art in Parallel Computing with R Technical Report Number 47, 2009 Department of Statistics University of Munich http://www.stat.uni-muenchen.de State-of-the-art in Parallel Computing with R Markus Schmidberger Martin Morgan Dirk Eddelbuettel Ludwig-Maximilians-Universit¨at Fred Hutchinson Cancer Debian Project, Munchen,¨ Germany Research Center, WA, USA Chicago, IL, USA Hao Yu Luke Tierney Ulrich Mansmann University of Western Ontario, University of Iowa, Ludwig-Maximilians-Universit¨at ON, Canada IA, USA Munchen,¨ Germany Abstract R is a mature open-source programming language for statistical computing and graphics. Many areas of statistical research are experiencing rapid growth in the size of data sets. Methodological advances drive increased use of simulations. A common approach is to use parallel computing. This paper presents an overview of techniques for parallel computing with R on com- puter clusters, on multi-core systems, and in grid computing. It reviews sixteen different packages, comparing them on their state of development, the parallel technology used, as well as on usability, acceptance, and performance. Two packages (snow, Rmpi) stand out as particularly useful for general use on com- puter clusters. Packages for grid computing are still in development, with only one package currently available to the end user. For multi-core systems four different packages exist, but a number of issues pose challenges to early adopters. The paper concludes with ideas for further developments in high performance computing with R. Example code is available in the appendix. Keywords: R, high performance computing, parallel computing, computer cluster, multi-core systems, grid computing, benchmark. -
Towards a Scalable File System on Computer Clusters Using Declustering
Journal of Computer Science 1 (3) : 363-368, 2005 ISSN 1549-3636 © Science Publications, 2005 Towards a Scalable File System on Computer Clusters Using Declustering Vu Anh Nguyen, Samuel Pierre and Dougoukolo Konaré Department of Computer Engineering, Ecole Polytechnique de Montreal C.P. 6079, succ. Centre-ville, Montreal, Quebec, H3C 3A7 Canada Abstract : This study addresses the scalability issues involving file systems as critical components of computer clusters, especially for commercial applications. Given that wide striping is an effective means of achieving scalability as it warrants good load balancing and allows node cooperation, we choose to implement a new data distribution scheme in order to achieve the scalability of computer clusters. We suggest combining both wide striping and replication techniques using a new data distribution technique based on “chained declustering”. Thus, we suggest a complete architecture, using a cluster of clusters, whose performance is not limited by the network and can be adjusted with one-node precision. In addition, update costs are limited as it is not necessary to redistribute data on the existing nodes every time the system is expanded. The simulations indicate that our data distribution technique and our read algorithm balance the load equally amongst all the nodes of the original cluster and the additional ones. Therefore, the scalability of the system is close to the ideal scenario: once the size of the original cluster is well defined, the total number of nodes in the system is no longer limited, and the performance increases linearly. Key words : Computer Cluster, Scalability, File System INTRODUCTION serve an increasing number of clients. -
Programmable Interconnect Control Adaptive to Communication Pattern of Applications
Title Programmable Interconnect Control Adaptive to Communication Pattern of Applications Author(s) 髙橋, 慧智 Citation Issue Date Text Version ETD URL https://doi.org/10.18910/72595 DOI 10.18910/72595 rights Note Osaka University Knowledge Archive : OUKA https://ir.library.osaka-u.ac.jp/ Osaka University Programmable Interconnect Control Adaptive to Communication Pattern of Applications Submitted to Graduate School of Information Science and Technology Osaka University January 2019 Keichi TAKAHASHI This work is dedicated to my parents and my wife List of Publications by the Author Journal [1] Keichi Takahashi, S. Date, D. Khureltulga, Y. Kido, H. Yamanaka, E. Kawai, and S. Shimojo, “UnisonFlow: A Software-Defined Coordination Mechanism for Message-Passing Communication and Computation”, IEEE Access, vol. 6, no. 1, pp. 23 372–23 382, 2018. : 10.1109/ACCESS.2018.2829532. [2] A. Misawa, S. Date, Keichi Takahashi, T. Yoshikawa, M. Takahashi, M. Kan, Y. Watashiba, Y. Kido, C. Lee, and S. Shimojo, “Dynamic Reconfiguration of Computer Platforms at the Hardware Device Level for High Performance Computing Infrastructure as a Service”, Cloud Computing and Service Science. CLOSER 2017. Communications in Computer and Information Science, vol. 864, pp. 177–199, 2018. : 10.1007/978-3-319-94959-8_10. [3] S. Date, H. Abe, D. Khureltulga, Keichi Takahashi, Y. Kido, Y. Watashiba, P. U- chupala, K. Ichikawa, H. Yamanaka, E. Kawai, and S. Shimojo, “SDN-accelerated HPC Infrastructure for Scientific Research”, International Journal of Information Technology, vol. 22, no. 1, pp. 789–796, 2016. International Conference (with review) [1] Y. Takigawa, Keichi Takahashi, S. Date, Y. Kido, and S. Shimojo, “A Traffic Sim- ulator with Intra-node Parallelism for Designing High-performance Interconnects”, in 2018 International Conference on High Performance Computing & Simula- tion (HPCS 2018), Jul. -
Parallel Computing Introduction Alessio Turchi
Parallel Computing Introduction Alessio Turchi Slides thanks to: Tim Mattson (Intel) Sverre Jarp (CERN) Vincenzo Innocente (CERN) 1 Outline • High Performance computing: A hardware system view • Parallel Computing: Basic Concepts • The Fundamental patterns of parallel Computing 5 The birth of Supercomputing • The CRAY-1A: – 12.5-nanosecond clock, – 64 vector registers, – 1 million 64-bit words of high- speed memory. – Speed: – 160 MFLOPS vector peak speed – 110 MFLOPS Linpack 1000 (best effort) • Cray software … by 1978 – Cray Operating System (COS), – the first automatically vectorizing Fortran compiler (CFT), On July 11, 1977, the CRAY-1A, serial . – Cray Assembler Language (CAL) number 3, was delivered to NCAR. The were introduced. system cost was $8.86 million ($7.9 million plus $1 million for the disks). http://www.cisl.ucar.edu/computers/gallery/cray/cray1.jsp Peak GFLOPS The Era of the Vector Supercomputer Vector the of Era The Supercomputers original The 10 20 30 40 50 60 0 • • • • Required modest changes to software (vectorization) software to changes modest Required configuration memory shared an in processors Multiple software and hardware specialized highly built, Custom data of vectors on operated that mainframes Large Cray 2 (4), 1985 Vector Vector Cray YMP (8), 1989 Cray C916 (16), 1991 Cray T932 (32), 1996 Supercomputer Center The Cray C916/512 the at Pittsburgh The attack of the killer micros • The Caltech Cosmic Cube developed by Charles Seitz and Geoffrey Fox in1981 • 64 Intel 8086/8087 processors • 128kB of memory per processor • 6-dimensional hypercube network The cosmic cube, Charles Seitz Launched the Communications of the ACM, Vol 28, number 1 January 1985, p. -
Parallelism / Concurrency 6.S080 Lec 15 10/28/2019 What Is the Objective
Parallelism / Concurrency 6.S080 Lec 15 10/28/2019 What is the objective: - Exploit multiple processors to perform computation faster by dividing it into subtasks - Do something else while you wait for a slow task to complete Overview: This lecture is mostly about the first, but we'll talk briefly about the 2nd too. Hardware perspective: What does a modern machine look like inside, how many processors, etc. Network architecture, bandwidth numbers, etc. Ping test Software perspective: Single machine: Multiple processes Multiple threads Python: multithreading vs processing Global interpreter lock lock Although multi-threaded programs technically share memory, it's almost always a good idea to coordinate their activity through some kind of shared data structure. Typically this takes the form of a queue, or a lock Example threading.py, threading_lock.py What is our objective Performance metric: speed up vs scale up Scale up = N times larger task, N times more processors goal: want runtime to remain the same Speed Up = same size task, N times more processors goal: want N times faster (show slide) Impediments to scaling: - Global interpreter lock -- switch to multiprocessing Show API slide - Fixed costs -- takes some time to set up / tear down - Task grain - tasks are too small, startup / coordination cost dominates - Lack of scalability - some tasks cannot be parallelized, e..g, due to contention or lack of a parallel algorithm - Skew - some processors have more work to do than others test_queue.py (show slide with walkthrough of approach, then show code) Show speedup slide Why isn't it as good as we would like? (Not enough processors!) Ok, so we can write parallel code like this ourselves, but these kinds of patterns are pretty common.