Attacking Intel® Trusted Execution Technology
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Attacking Intel® Trusted Execution Technology Rafal Wojtczuk Joanna Rutkowska [email protected] [email protected] ---===[ Invisible Things Lab ]===--- Abstract In this paper we present the results of our research into security of the Intel® Trusted Execution Technology, part of the vProTM brand. We describe a practical attack that is capable of bypassing the TXT's trusted boot process, a key building block for Intel's vision of Trusted Computing. As part of the attack we also discuss practical attacks on SMM memory in modern Intel systems. keywords: Trusted Computing, Trusted Execution Technology, System Management Mode, TXT, SMM, STM, BIOS, security, analysis, attacks. 1. Introduction and storing them in particular TPM registers. What is extraordinary here is that TXT doesn't make any Trusted Computing is becoming a part of our lives, assumptions about the state of the system before whether we want it or not. These days almost every loading the software, thus making it possible for a new laptop comes with an on-board Trusted user to ensure secure load of an OS or VMM, even Platform Module (TPM). Some of the Microsoft's in a potentially compromised machine. Palladium technologies made their way into Vista, and Microsoft BitLocker is, without doubt, the most In other words, our system can be full of boot successful, widely deployed product that is based sector viruses and BIOS rootkits, and god-knows- on the idea of Trusted Computing[8]. what-else, and still TXT should allow to load a clean VMM (or OS kernel) in a secure way, immune On the hardware side, besides the famed TPM, we to all those malware present in the system. This also have had the LaGrande technology. TXT-supported load process is called Late Launch, LaGrande, recently renamed Trusted Execution and is implemented via a special new CPU Technology (TXT)[4], is Intel's response to the instruction called SENTER. A good introduction to Trusted Computing trend. TXT is currently part of Intel TXT architecture can be found in the David the vPro™ brand[5], and for about a year now Grawrock's book[3]. For a detailed technical users can buy a vPro/TXT compatible hardware in specification one should consult the Intel TXT regular computer stores (the first one was the documentation[4]. DQ35J desktop board[7] that worked with certain Core 2 Duo processors1). We shall stress that TXT has not been designed to provide runtime protection, e.g. against a buffer TXT is not an alternative to a TPM, in fact TXT overflow in a hypervisor code. TXT is supposed to heavily relies on the TPM to provide basic services provide only the launch-time protection, i.e. ensure like e.g. secure storage of measurements done by that the code we load, at the moment of loading, is the TXT. Also, Palladium, or whatever it is called what we really intended to load. these days, is not a competition to TXT. Intel TXT can provide building blocks to e.g. Vista Bitlocker, It's worth mentioning AMD has its own version of a arguably making it more secure than it is now. late launch, implemented via an SKINIT instruction. We haven't looked at the AMD technology The sole purpose of Intel TXT technology is to thoroughly yet, so we will refrain from commenting provide a trusted way for loading and executing on this any further. system software, e.g. Operating System kernel or Virtualization Machine Monitor (VMM). This is The late launch is a pretty amazing technology, achieved by performing software measurements when we think about. It promises to effectively 1TXT requires support from both the CPU and the chipset 1 provide all the benefits of a computer restart TXT's late launch functionality. Tboot is also part of without actually restarting it. the mainstream opensource Xen hypervisor[12]. It is hard to overemphasize the potential impact Normally tboot should ensure that when a correct, that a technology such as TXT could have on i.e. unmodified, Xen hypervisor is loaded, and only computer security. One can immediately see it then, correct measurements will be loaded into could provide basic building blocks that could be TPM registers. In practice this means that only a later used to eliminate all the system-level chosen (trusted) version of the Xen hypervisor will persistent malware2 — in other words we should be get access to certain secrets sealed in the TPM, able to easily build systems (VMMs or even and/or will be able to positively authenticate itself to standard OSes) that would be immune to attacks some peer (e.g. system administrator's laptop) that try to compromise system binaries on disk, or using a special feature of a TPM called Remote attack the system right from the bootloader or Attestation. BIOS. Combining this with VT-x and VT-d technologies, system developers (for the first time, With our attack we show that by infecting an SMM at least as far as the "PC" platform is considered) handler, we can modify at will the just-loaded (and have gotten extremely strong tools into their hands just-measured) VMM. In other words the attacks that should allow them to create really secure completely bypass all the security functionality that VMMs and OSes… is supposed to be provided by the TXT for the purpose of trusted boot. This is a direct result of the Let us now describe how we have attacked this SMM code surviving the late launch process in an new exciting technology… unmodified form — whether compromised or not. 2. Attacking Intel TXT We describe the details of how to attack an SMM handler in the next chapter. TXT's key functionality, the late launch, is often "advertised" as a way to load and start a piece of Intel's remedy to malicious SMM handler is called trusted code (usually a VMM), no matter what is the STM, which stands for SMM Transfer Monitor. The state of the system, at the moment just before purpose of STM is to sandbox the existing SMM performing the launch. That is, however, not fully handler by virtualizing it using VT-x and VT-d correct. In fact there is one piece of system technologies. STM should be thought of as of a software that should be trusted… This system peer hypervisor to the VMM that is being loaded software is a so called System Management Mode, using late launch. STM is supposed to be which we discuss in more detail in the next chapter. measured during the late launch process. SMM, being the most privileged type of software Unfortunately STM is, as of today, not available. that ever executes on a CPU (see below), can We discuss this in more detail in the last chapter of bypass security protections imposed by the late this paper. launch process on a newly loaded VMM. Unfortunately, the assumption that SMM can be 3. SMM Attacks always trusted is incorrect, as we demonstrate here with this research. SMM aka "Ring -2" Indeed, one can imagine the following 2-stage System Management Mode is the most privileged attack on the Intel TXT's late launch functionality: execution mode on x86/x86_64 architectures, even more privileged than ring 0 mode and a hardware 1. Infecting the system's SMM handler, hypervisor (VT/AMD-v), often referred to as "ring -1". 2. Compromising the just-securely-loaded code (in our example the Xen hypervisor) from One reason for considering this code to be so within the infected SMM handler. privileged, is that an SMM code can access the whole system memory, including the kernel and We have implemented a proof-of-concept code that hypervisor memory. Standard OS memory demonstrates the above attack scheme against the protection mechanisms (Page Tables), as well as Xen hypervisor loaded using tboot[6], the Intel's hypervisor memory virtualization (Shadow Paging, open source implementation of trusted boot. Tboot Nested Paging/EPT, IOMMU/VT-d), do not work provides trusted boot for Linux and Xen using Intel against the SMM code. 2 By a system-level malware we mean malware which is resident because of replacing/infecting crucial,privileged, nonvolatile code (e.g. a kernel binary, dll/sys binary, or boot sector, or bios image) 2 Also, on Intel processors, an SMM code can Previous SMM-related research "preempt" even the VT-x hypervisor, whenever an SMI interrupt is signaled. There exists a way3 for Although there have been several publications, in the hypervisor to establish a special entity, called the recent years, concerning the SMM-related STM, that would be able to intercept those SMI security issues ([2], [10], [1]), they were all interrupts, and we will discuss it later in this paper. concerned about the security implications resulting from an attacker gaining access to the SMM Consequently, it will be not much of an memory, without however focusing on how to exaggeration to name SMM a "ring -2". bypass system SMM memory protection. That was mostly because until recent years, it was Difficulties with finding flaws in SMM straightforward to gain a read-write access to the SMM memory by only setting appropriate chipset A researcher willing to examine an SMM code for registers, so no special attack method was needed. potential security problems faces a non-trivial problem — the SMM memory is not accessible to Today most modern systems take special steps in anyone except… the SMM itself. Thus there is no order to protect the SMM memory from even a way for the attacker to get access to the actual read-only access from the OS, including the kernel image of the SMM code.