DOCSLIB.ORG

Advancing Compiler Optimizations for General-Purpose & Domain-Specific Parallel Architectures

Total Page：16

File Type：pdf, Size：1020Kb

Download full-text PDF Read full-text
Advancing Compiler Optimizations for General-Purpose & Domain-Specific Parallel Architectures ADVANCING COMPILER OPTIMIZATIONS FOR GENERAL-PURPOSE & DOMAIN-SPECIFIC PARALLEL ARCHITECTURES A Dissertation Presented to The Academic Faculty By Prasanth Chatarasi In Partial Fulfillment of the Requirements for the Degree Doctor of Philosophy in the School of Computer Science Georgia Institute of Technology December 2020 Copyright c Prasanth Chatarasi 2020 ADVANCING COMPILER OPTIMIZATIONS FOR GENERAL-PURPOSE & DOMAIN-SPECIFIC PARALLEL ARCHITECTURES Approved by: Dr. Vivek Sarkar, Advisor Dr. Tushar Krishna School of Computer Science School of Electrical and Computer Georgia Institute of Technology Engineering Georgia Institute of Technology Dr. Jun Shirako, Co-Advisor School of Computer Science Dr. Richard Vuduc Georgia Institute of Technology School of Computational Science and Engineering Dr. Santosh Pande Georgia Institute of Technology School of Computer Science Georgia Institute of Technology Date Approved: July 27, 2020 “Dream the impossible. Know that you are born in this world to do something wonderful and unique; don’t let this opportunity pass by. Give yourself the freedom to dream and think big.” — Sri Sri Ravi Shankar To universal consciousness, To my family, To my advisors, mentors, teachers, and friends. ACKNOWLEDGEMENTS Taittiriya Upanishad, Shikshavalli I.20 ma;a:ua;de;va;ea Ba;va ; a;pa:ua;de;va;ea Ba;va A;a;C+a.yRa;de;va;ea Ba;va A; a;ta; a;Ta;de;va;ea Ba;va m¯atrudevo bhava pitrudevo bhava ¯ach¯aryadevo bhava atithidevo bhava “Respects to Mother, Father, Guru, and Guest. They are all forms of God”. First and foremost, I would like to express my gratitude to my mother Ch. Anjanee Devi and my father Dr. C. V. Subbaiah for always being there for me, and loving me unconditionally throughout the situations of extreme happiness to sadness. Without the two of you, I don’t know where I would be. If I have learned anything while being away from you, it is that you are the most important people in my life, and I love you both more than anything. I want to express my sincere appreciation to my guru (advisor) Prof. Vivek Sarkar, who always had time for me when I needed him – no matter whether the reason was a technical discussion, an administrative problem, academic development, or the planning of my next steps. There are no words that can express my gratitude towards your efforts. Thank you for believing in me and supporting me. Without you, I would not be able to handle everything that the graduate program and life threw. Having you backing me up 100% allows me to be at peace and do research. You’re much more than an advisor, and thanks for helping me in my personal life too. Thanks for being my inspiration in the path of being a useful scientific researcher to this world. I am also very grateful to my co-advisor Dr. Jun Shirako, with whom I had many very fruitful discussions on various topics of this thesis. Thank you for always being supportive, even when I feel like I can’t do it. Thank you for being a humble teacher in explaining the answers to my questions – Arigatou Gozaimasu! The lunch sessions were great to discuss my ideas and build a relationship with you. I want to thank the rest of my committee Prof. Tushar Krishna, Prof. Santosh Pande, and Prof. Rich Vuduc for agreeing to be part of my thesis committee. I thank you all for your time, feedback, and suggestions in significantly improving the thesis. I always had a great time interacting with you at the school corridors, labs, and conferences. I am very fortunate to collaborate with Tushar Krishna’s group, and thanks, Tushar, for being an integral part of my Ph.D. journey, including the job search. I’m also very grateful to my collaborators, i.e., Albert Cohen from INRIA/Google AI, Tushar Krishna and Hyoukjun Kwon from Synergy Research Group, Angshuman Parashar and Micheal Pellauer from NVIDIA Architecture Research Group, Stephen Neuendorf- v fer, Samuel Bayliss, and Kees Vissers from Xilinx Research Labs, Karthik Murthy from Google AI, and John Mellor-Crummey from Rice University. Thanks for enriching my research experience in the Ph.D. journey, including asking the right questions, thinking critically, positioning the work, writing research papers, giving a broader perspective of the researcher, and so on. I also want to acknowledge the Habanero Extreme Scale Software Research Group, Synergy Research Group, and CRNCH Research Center (Jeffery Young and Jason Riedy) for the research interactions in my Ph.D. journey. In addition to the collaborators mentioned above, I also want to acknowledge and ap- preciate my mentors, especially Dr. Milind Chabbi, Dr. Shams Imam, Dr. Deepak Majeti, and Dr. Rishi Surendran for all the helpful advice in both research and personal life. I cannot thank you enough for everything you taught me during my Ph.D. journey. I greatly value your kindness and the expertise you imparted to me as my mentors. I want to acknowledge my professor Prof. Kesav Nori for piquing my curiosity about compilers during my undergraduate study at IIT Hyderabad. Without you, I would not be where I am today. Also, thanks are due to my bachelor thesis advisors Dr. Aditya Nori, Prof. M. V. Panduranga Rao and Prof. Bheemarjuna Reddy for giving me a research exposure in the undergraduate study. Thanks to all my professors who encouraged me to apply for graduate studies and quickly provide reference letters. Thanks are due to my friends for all the support and encouragement during my stay at Georgia Tech. There are too many of you to mention, but I would especially like to thank Prithayan Barua, Pramod Chunduri, Poulami Das, Anirudh Jain, Hyoukjun Kwon, Ankush Mandal, Girish Mururu, Mayank Parasar, Sriraj Paul, Christopher Porter, Gururaj Saileshwar, Anand Samajdar, Srisehan Srikanth, Kavitha Sthanam, Lechen Yu, and Jimmy Zhong. Thanks for always being up for a good laugh over the years. I would also like to thank the School of Computer Science department staff members for all the help I received during my stay at GaTech, including Ruthie Book and Wanda Purinton. Also, I want to acknowledge Sharon Riehl for being the coach in my leadership devel- opment as part of the Georgia Tech Leading Edge program and helping me to self-analyze and improve in many aspects, including establishing trust and taking and giving construc- tive feedback, and prioritization. Furthermore, an essential aspect of my Ph.D. journey is the association with the SKY meditation club at GaTech and also the Art of Living founda- tion. The association helped me much towards the spiritual path and also managing of my mental health – in that regards, I want to acknowledge many people, especially my teachers Sareena Nagpal, Rachana Gadhok, Kunwar Gadhok, Preeti Bhatt. The acknowledgments never end without mentioning siblings, i.e., my elder sister Sree Pavani and my elder brother Sreenivas. First and for most, life may not be that exciting vi without you. We may fight 50% of the time, but I love you a lot for being my best friends, toughening up during tough situations of my life, and celebrating with me during happy moments. As per a Vietnamese proverb, you both are as close as my hands and feet. Also, my life has been more beautiful with my two nieces, i.e., Venkata Tejaswini and Sai Sughandhini – I always felt content hearing the word “mamayya” from them. “Gratitude to the entire creation for showering a lot of love, grace, and blessings!”. vii TABLE OF CONTENTS List of Tables . xiv List of Figures . xvii Summary . xxii Chapter 1: Introduction . 1 1.1 Thesis Statement . 4 1.2 Contributions . 4 1.3 Organization . 8 Chapter 2: Background . 10 2.1 Parallel Architectures . 10 2.1.1 General-Purpose Parallel Architectures . 10 Multi-Core Architectures . 10 Vector Processing (SIMD) Architectures . 12 2.1.2 Domain-Specific Parallel Architectures . 13 Spatial DNN Accelerators . 13 Specialized Vector Processing Units . 14 Thread Migratory Architectures . 15 viii 2.2 High-Performance Applications . 17 2.2.1 Scientific Computing Applications . 17 2.2.2 Deep Learning . 17 2.2.3 Graph Analytics . 19 2.3 Summary . 19 Chapter 3: PoPP: Polyhedral Optimizations of Explicitly-Parallel Programs . 20 3.1 Abstract . 20 3.2 Introduction . 21 3.3 Background . 22 3.3.1 Polyhedral Model . 22 3.3.2 Explicit Parallelism . 23 Loop-level parallelism . 24 Task-level parallelism including dependences . 24 3.4 Motivating Examples . 24 3.4.1 2-D Jacobi . 25 3.4.2 Particle Filter . 26 3.5 Polyhedral optimizer for Parallel Programs (PoPP) . 26 3.5.1 Conservative analysis . 28 3.5.2 Extraction of happens-before relations . 30 Loop-level parallelism . 30 Task parallelism including dependences . 31 3.5.3 Reflection of happens-before relations . 33 ix 3.5.4 PolyAST: a loop optimizer integrating polyhedral and AST-based transformations . 34 3.6 Experimental Evaluation . 35 3.6.1 Experimental setup . 35 3.6.2 KASTORS Suite . 39 3.6.3 Rodinia Suite . 40 3.7 Limitations . 41 3.8 Related Work . 42 3.9 Summary . 43 Chapter 4: PolySIMD: A Unified Approach to Variable Renaming for Enhanced Vectorization . 45 4.1 Abstract . 45 4.2 Introduction . 46 4.3 Discussion on Variable Renaming Transformations . 48 4.3.1 Source Variable Renaming (SoVR) . 49 4.3.2 Sink Variable Renaming (SiVR) . 50 4.3.3 Synergy between SoVR and SiVR . 51 4.4 Motivating Example . 51 4.5 Our Unified Approach to Variable Renaming . 53 4.5.1 Dependence Cycles Finder . 53 4.5.2 Bipartite Graph Constructor . 55 4.5.3 Solver . 55 4.5.4 Transformer . 57 x 4.5.5 Bounding Additional Space .
Load more

Recommended publications
  • SOL: Effortless Device Support for AI Frameworks Without Source Code Changes
    SOL: Effortless Device Support for AI Frameworks without Source Code Changes Nicolas Weber and Felipe Huici NEC Laboratories Europe Abstract—Modern high performance computing clusters heav- State of the Art Proposed with SOL ily rely on accelerators to overcome the limited compute power API (Python, C/C++, …) API (Python, C/C++, …) of CPUs. These supercomputers run various applications from different domains such as simulations, numerical applications or Framework Core Framework Core artificial intelligence (AI). As a result, vendors need to be able to Device Backends SOL efficiently run a wide variety of workloads on their hardware. In the AI domain this is in particular exacerbated by the Fig. 1: Abstraction layers within AI frameworks. existance of a number of popular frameworks (e.g, PyTorch, TensorFlow, etc.) that have no common code base, and can vary lines of code to their scripts in order to enable SOL and its in functionality. The code of these frameworks evolves quickly, hardware support. making it expensive to keep up with all changes and potentially We explore two strategies to integrate new devices into AI forcing developers to go through constant rounds of upstreaming. frameworks using SOL as a middleware, to keep the original In this paper we explore how to provide hardware support in AI frameworks without changing the framework’s source code in AI framework unchanged and still add support to new device order to minimize maintenance overhead. We introduce SOL, an types. The first strategy hides the entire offloading procedure AI acceleration middleware that provides a hardware abstraction from the framework, and the second only injects the necessary layer that allows us to transparently support heterogenous hard- functionality into the framework to enable the execution, but ware.
    [Show full text]
  • Training Professionals and Researchers on Future Intelligent On-Board Embedded Heterogeneous Processing
    [email protected] Optimized Development Environment (ODE) for e20xx/e2xx Intelligent onboard processing Training Professionals and Researchers on Future Intelligent On-board Embedded Heterogeneous Processing Description The Optimized Development Environment (ODE) is a mini-ITX compatible rapid engineering platform for the e2000 and e2100 reliable hetereogeneous compute products. The ODE provides flexible software development based on the Deep Delphi™ software library. Deep Delphi™ include Lightweight Ubuntu 16.04 LTS (AMD64) with UNiLINK kernel driver for extended IO and health monitoring through FPGA. Open source Linux libraries provide support for amdgpu kernel driver, AMD IOMMU kernel driver, AMD DDR RAM memory Error Correction Code (ECC), OpenGL, Vulkan, OpenCL (patched Mesa/Clover), Robotic Operating System (ROS), Open Computer Vision (OpenCV), and optional machine learning libraries (e.g. Caffe, Theano, TensorFlow, PlaidML). Tailoring beyond the standard FPGA functionality, requires additional FPGA design services by Troxel Aerospace Industries, Inc. FreeRTOS support is optional and may change the demo software flow between AMD SOC and FPGA. Software developed on ODE is compatible with the Deep Delphi iX5 platform. SPECIFICATION HIGHLIGHTS Processing e20xx family Ethernet 2×1000Tbase LAN (AMD) products e21xx family 1×1000Tbase LAN (FPGA) Power input ATX 4 pin (12 V) USB 2×USB3.0 (AMD SOC) 802.3at Type 2, 30W, PoE (FPGA LAN port) 4×USB2.0 (AMD SOC) ATX 20 pin (12, 5, 3.3 V) (Internal only) Doc. reference: 1004002 PCIexpress® 1×4 lanes (v2) (Internal) Graphics HDMI & LCD/LVDS Serial Ports 2×RS232 (FPGA) Storage 2×SATA v3.0 (6 Gbps) (1 x 120 GB SSD incl.) 2×UART TTL (AMD) 1×MicroSD-Card/MMC Debug AMD SmartProbe (Internal only) Board size 170 × 170 mm2 (mini-ITX compatible) FPGA JTAG interface (Internal) FPGA ARM Cortex-M3 interface (internal) BIOS recovery UNIBAP™ Safe Boot + SPI headers for DediProg.
    [Show full text]
  • Plaidml Documentation
    PlaidML Documentation Vertex.AI Apr 11, 2018 Contents 1 Ubuntu Linux 3 2 Building and Testing PlaidML5 3 PlaidML Architecture Overview7 4 Tile Op Tutorial 9 5 PlaidML 13 6 Contributing to PlaidML 45 7 License 47 8 Reporting Issues 49 Python Module Index 51 i ii PlaidML Documentation A framework for making deep learning work everywhere. PlaidML is a multi-language acceleration framework that: • Enables practitioners to deploy high-performance neural nets on any device • Allows hardware developers to quickly integrate with high-level frameworks • Allows framework developers to easily add support for many kinds of hardware • Works on all major platforms - Linux, macOS, Windows For background and early benchmarks see our blog post announcing the release. PlaidML is under active development and should be thought of as alpha quality. Contents 1 PlaidML Documentation 2 Contents CHAPTER 1 Ubuntu Linux If necessary, install Python’s ‘pip’ tool. sudo add-apt-repository universe&& sudo apt update sudo apt install python-pip Make sure your system has OpenCL. sudo apt install clinfo clinfo If clinfo reports “Number of platforms” == 0, you must install a driver. If you have an NVIDIA graphics card: sudo add-apt-repository ppa:graphics-drivers/ppa&& sudo apt update sudo apt install nvidia-modprobe nvidia-384 nvidia-opencl-icd-384 libcuda1-384 If you have an AMD card, download the AMDGPU PRO driver and install according to AMD’s instructions. Best practices for python include judicious usage of Virtualenv, and we certainly recommend creating one just
    [Show full text]
  • Machine Learning Framework for Petrochemical Process Industry
    Aalto University School of Chemical Engineering Master's Programme in Chemical Engineering Toni Oleander Machine learning framework for petro- chemical process industry applications Master's Thesis Espoo, August 31, 2018 Supervisor: Professor Sirkka-Liisa J¨ams¨a-Jounela Instructors: Samuli Bergman, M.Sc. (Tech.) Tomi Lahti, M.Sc. (Tech.) Aalto University School of Chemical Engineering ABSTRACT OF Master's Programme in Chemical Engineering MASTER'S THESIS Author: Toni Oleander Title: Machine learning framework for petrochemical process industry applications Date: August 31, 2018 Pages: ix + 118 Professorship: Process control Code: Kem-90 Supervisor: Professor Sirkka-Liisa J¨ams¨a-Jounela Instructors: Samuli Bergman, M.Sc. (Tech.) Tomi Lahti, M.Sc. (Tech.) Machine learning has many potentially useful applications in process industry, for example in process monitoring and control. Continuously accumulating process data and the recent development in software and hardware that enable more ad- vanced machine learning, are fulfilling the prerequisites of developing and deploy- ing process automation integrated machine learning applications which improve existing functionalities or even implement artificial intelligence. In this master's thesis, a framework is designed and implemented on a proof-of- concept level, to enable easy acquisition of process data to be used with modern machine learning libraries, and to also enable scalable online deployment of the trained models. The literature part of the thesis concentrates on studying the current state and approaches for digital advisory systems for process operators, as a potential application to be developed on the machine learning framework. The literature study shows that the approaches for process operators' decision support tools have shifted from rule-based and knowledge-based methods to ma- chine learning.
    [Show full text]
  • Fast Geometric Learning with Symbolic Matrices
    Fast geometric learning with symbolic matrices Jean Feydy* Joan Alexis Glaunès* Imperial College London Université de Paris [email protected] [email protected] Benjamin Charlier* Michael M. Bronstein Université de Montpellier Imperial College London / Twitter [email protected] [email protected] Abstract Geometric methods rely on tensors that can be encoded using a symbolic formula and data arrays, such as kernel and distance matrices. We present an extension for standard machine learning frameworks that provides comprehensive support for this abstraction on CPUs and GPUs: our toolbox combines a versatile, transparent user interface with fast runtimes and low memory usage. Unlike general purpose acceleration frameworks such as XLA, our library turns generic Python code into binaries whose performances are competitive with state-of-the-art geometric libraries – such as FAISS for nearest neighbor search – with the added benefit of flexibility. We perform an extensive evaluation on a broad class of problems: Gaussian modelling, K-nearest neighbors search, geometric deep learning, non- Euclidean embeddings and optimal transport theory. In practice, for geometric problems that involve 103 to 106 samples in dimension 1 to 100, our library speeds up baseline GPU implementations by up to two orders of magnitude. 1 Introduction Fast numerical methods are the fuel of machine learning research. Over the last decade, the sustained development of the CUDA ecosystem has driven the progress in the field: though Python is the lingua franca of data science and machine learning, most frameworks rely on efficient C++ backends to leverage the computing power of GPUs [1, 86, 101].
    [Show full text]
  • Triton: an Intermediate Language and Compiler for Tiled Neural Network Computations
    Triton: An Intermediate Language and Compiler for Tiled Neural Network Computations Philippe Tillet H. T. Kung David Cox Harvard University Harvard University Harvard University, IBM USA USA USA Abstract 1 Introduction The validation and deployment of novel research ideas in The recent resurgence of Deep Neural Networks (DNNs) the field of Deep Learning is often limited by the availability was largely enabled [24] by the widespread availability of of efficient compute kernels for certain basic primitives. In programmable, parallel computing devices. In particular, con- particular, operations that cannot leverage existing vendor tinuous improvements in the performance of many-core libraries (e.g., cuBLAS, cuDNN) are at risk of facing poor architectures (e.g., GPUs) have played a fundamental role, device utilization unless custom implementations are written by enabling researchers and engineers to explore an ever- by experts – usually at the expense of portability. For this growing variety of increasingly large models, using more reason, the development of new programming abstractions and more data. This effort was supported by a collection for specifying custom Deep Learning workloads at a minimal of vendor libraries (cuBLAS, cuDNN) aimed at bringing the performance cost has become crucial. latest hardware innovations to practitioners as quickly as We present Triton, a language and compiler centered around possible. Unfortunately, these libraries only support a re- the concept of tile, i.e., statically shaped multi-dimensional stricted
    [Show full text]
  • Benchmarking Contemporary Deep Learning Hardware and Frameworks: a Survey of Qualitative Metrics Wei Dai, Daniel Berleant
    Benchmarking Contemporary Deep Learning Hardware and Frameworks: A Survey of Qualitative Metrics Wei Dai, Daniel Berleant To cite this version: Wei Dai, Daniel Berleant. Benchmarking Contemporary Deep Learning Hardware and Frameworks: A Survey of Qualitative Metrics. 2019 IEEE First International Conference on Cognitive Machine Intelli- gence (CogMI), Dec 2019, Los Angeles, United States. pp.148-155, 10.1109/CogMI48466.2019.00029. hal-02501736 HAL Id: hal-02501736 https://hal.archives-ouvertes.fr/hal-02501736 Submitted on 7 Mar 2020 HAL is a multi-disciplinary open access L’archive ouverte pluridisciplinaire HAL, est archive for the deposit and dissemination of sci- destinée au dépôt et à la diffusion de documents entific research documents, whether they are pub- scientifiques de niveau recherche, publiés ou non, lished or not. The documents may come from émanant des établissements d’enseignement et de teaching and research institutions in France or recherche français ou étrangers, des laboratoires abroad, or from public or private research centers. publics ou privés. Benchmarking Contemporary Deep Learning Hardware and Frameworks:A Survey of Qualitative Metrics Wei Dai Daniel Berleant Department of Computer Science Department of Information Science Southeast Missouri State University University of Arkansas at Little Rock Cape Girardeau, MO, USA Little Rock, AR, USA [email protected] [email protected] Abstract—This paper surveys benchmarking principles, machine learning devices including GPUs, FPGAs, and ASICs, and deep learning software frameworks. It also reviews these technologies with respect to benchmarking from the perspectives of a 6-metric approach to frameworks and an 11-metric approach to hardware platforms. Because MLPerf is a benchmark organization working with industry and academia, and offering deep learning benchmarks that evaluate training and inference on deep learning hardware devices, the survey also mentions MLPerf benchmark results, benchmark metrics, datasets, deep learning frameworks and algorithms.
    [Show full text]
  • Benchmarking Contemporary Deep Learning Hardware And
    Benchmarking Contemporary Deep Learning Hardware and Frameworks:A Survey of Qualitative Metrics Wei Dai Daniel Berleant Department of Computer Science Department of Information Science Southeast Missouri State University University of Arkansas at Little Rock Cape Girardeau, MO, USA Little Rock, AR, USA [email protected] [email protected] Abstract—This paper surveys benchmarking principles, machine learning devices including GPUs, FPGAs, and ASICs, and deep learning software frameworks. It also reviews these technologies with respect to benchmarking from the perspectives of a 6-metric approach to frameworks and an 11-metric approach to hardware platforms. Because MLPerf is a benchmark organization working with industry and academia, and offering deep learning benchmarks that evaluate training and inference on deep learning hardware devices, the survey also mentions MLPerf benchmark results, benchmark metrics, datasets, deep learning frameworks and algorithms. We summarize seven benchmarking principles, differential characteristics of mainstream AI devices, and qualitative comparison of deep learning hardware and frameworks. Fig. 1. Benchmarking Metrics and AI Architectures Keywords— Deep Learning benchmark, AI hardware and software, MLPerf, AI metrics benchmarking metrics for hardware devices and six metrics for software frameworks in deep learning, respectively. The I. INTRODUCTION paper also provides qualitative benchmark results for major After developing for about 75 years, deep learning deep learning devices, and compares 18 deep learning technologies are still maturing. In July 2018, Gartner, an IT frameworks. research and consultancy company, pointed out that deep According to [16],[17], and [18], there are seven vital learning technologies are in the Peak-of-Inflated- characteristics for benchmarks. These key properties are: Expectations (PoIE) stage on the Gartner Hype Cycle diagram [1] as shown in Figure 2, which means deep 1) Relevance: Benchmarks should measure important learning networks trigger many industry projects as well as features.
    [Show full text]
  • Stripe: Tensor Compilation Via the Nested Polyhedral Model
    Stripe: Tensor Compilation via the Nested Polyhedral Model Tim Zerrell1 and Jeremy Bruestle1 [email protected], [email protected] 1Intel March 18, 2019 Abstract 1.1 Kernel Libraries Algorithmic developments aimed at improving accu- Hardware architectures and machine learning (ML) racy, training or inference performance, regulariza- libraries evolve rapidly. Traditional compilers often tion, and more continue to progress rapidly [27, 35]. fail to generate high-performance code across the Nevertheless, these typically retain the same regu- spectrum of new hardware offerings. To mitigate, larities that make specialized ML architectures fea- engineers develop hand-tuned kernels for each ML li- sible, and could in principle be efficiently run on brary update and hardware upgrade. Unfortunately, ML accelerators. However, the traditional kernel li- this approach requires excessive engineering effort brary approach requires a kernel for each hardware- to scale or maintain with any degree of state-of-the- network architectural feature pair, creating a com- art performance. Here we present a Nested Poly- binatorial explosion of optimization work that is in- hedral Model for representing highly parallelizable feasible with the rapid growth of both hardware and computations with limited dependencies between it- algorithm designs. erations. This model provides an underlying frame- One way to achieve all these optimizations is to work for an intermediate representation (IR) called write an extensively customized kernel to account Stripe, amenable to standard compiler techniques for each supported machine learning operation and while naturally modeling key aspects of modern ML each materially different input and output shape on computing. Stripe represents parallelism, efficient each supported hardware platform.
    [Show full text]
  • Comparing the Costs of Abstraction for DL Frameworks
    Comparing the costs of abstraction for DL frameworks Maksim Levental∗ Elena Orlova [email protected] [email protected] University of Chicago University of Chicago ABSTRACT Trading off ergonomics for performance is manifestly reason- 2 High level abstractions for implementing, training, and testing Deep able , especially during the early phases of the DL engineering/re- Learning (DL) models abound. Such frameworks function primarily search process (i.e. during the hypothesis generation and experi- by abstracting away the implementation details of arbitrary neu- mentation phases). Ultimately one needs to put the DL model into ral architectures, thereby enabling researchers and engineers to production. It is at this phase of the DL engineering process that ev- focus on design. In principle, such frameworks could be “zero-cost ery percentage point of execution performance becomes critical. Al- abstractions”; in practice, they incur translation and indirection ternatively, there are many areas of academic DL where the research overheads. We study at which points exactly in the engineering community strives to incrementally improve performance [6–8]. life-cycle of a DL model the highest costs are paid and whether For example, in the area of super-resolution a high-priority goal is they can be mitigated. We train, test, and evaluate a representative to be able to “super-resolve” in real-time [9]. Similarly, in natural DL model using PyTorch, LibTorch, TorchScript, and cuDNN on language processing, where enormous language models are becom- representative datasets, comparing accuracy, execution time and ing the norm [10], memory efficiency of DL models is of the utmost memory efficiency. concern.
    [Show full text]
  • Towards Transparent Neural Network Acceleration
    Towards Transparent Neural Network Acceleration Anonymous Author(s) Affiliation Address email Abstract 1 Deep learning has found numerous applications thanks to its versatility and accu- 2 racy on pattern recognition problems such as visual object detection. Learning and 3 inference in deep neural networks, however, are memory and compute intensive 4 and so improving efficiency is one of the major challenges for frameworks such 5 as PyTorch, Tensorflow, and Caffe. While the efficiency problem can be partially 6 addressed with specialized hardware and its corresponding proprietary libraries, 7 we believe that neural network acceleration should be transparent to the user and 8 should support all hardware platforms and deep learning libraries. 9 To this end, we introduce a transparent middleware layer for neural network 10 acceleration. The system is built around a compiler for deep learning, allowing one 11 to combine device-specific libraries and custom optimizations while supporting 12 numerous hardware devices. In contrast to other projects, we explicitly target 13 the optimization of both prediction and training of neural networks. We present 14 the current development status and some preliminary but encouraging results: 15 on a standard x86 server, using CPUs our system achieves a 11.8x speed-up for 16 inference and a 8.0x for batched-prediction (128); on GPUs we achieve a 1.7x and 17 2.3x speed-up respectively. 18 1 Introduction 19 The limitations of today’s general purpose hardware and the extreme parallelism that neural network 20 processing can exploit has led to a large range of specialized hardware from manufacturers such as 21 NVIDIA [13], Google [7], ARM [1] and PowerVR [15], to name but a few.
    [Show full text]
  • Package 'Keras'
    Package ‘keras’ March 25, 2018 Type Package Title R Interface to 'Keras' Version 2.1.5 Description Interface to 'Keras' <https://keras.io>, a high-level neural networks 'API'. 'Keras' was developed with a focus on enabling fast experimentation, supports both convolution based networks and recurrent networks (as well as combinations of the two), and runs seamlessly on both 'CPU' and 'GPU' devices. Encoding UTF-8 License MIT + file LICENSE URL https://keras.rstudio.com BugReports https://github.com/rstudio/keras/issues Depends R (>= 3.2) Imports reticulate (>= 1.5), tensorflow (>= 1.5), tfruns (>= 1.0), magrittr, zeallot, methods, R6 Suggests ggplot2, testthat, knitr, rmarkdown SystemRequirements Keras >= 2.0 (https://keras.io) RoxygenNote 6.0.1 VignetteBuilder knitr NeedsCompilation no Author JJ Allaire [aut, cre], François Chollet [aut, cph], RStudio [ctb, cph, fnd], Google [ctb, cph, fnd], Yuan Tang [ctb, cph] (<https://orcid.org/0000-0001-5243-233X>), Daniel Falbel [ctb, cph], Wouter Van Der Bijl [ctb, cph], Martin Studer [ctb, cph] Maintainer JJ Allaire <[email protected]> Repository CRAN Date/Publication 2018-03-25 15:25:14 UTC 1 2 R topics documented: R topics documented: keras-package . .9 activation_relu . 10 application_densenet . 11 application_inception_resnet_v2 . 12 application_inception_v3 . 13 application_mobilenet . 14 application_nasnet . 16 application_resnet50 . 17 application_vgg . 19 application_xception . 20 backend . 21 bidirectional . 22 callback_csv_logger . 23 callback_early_stopping . 23 callback_lambda . 24 callback_learning_rate_scheduler . 25 callback_model_checkpoint . 25 callback_progbar_logger . 26 callback_reduce_lr_on_plateau . 27 callback_remote_monitor . 28 callback_tensorboard . 28 callback_terminate_on_naan . 29 clone_model . 30 compile . 30 constraints . 31 count_params . 33 create_layer . 33 dataset_boston_housing . 34 dataset_cifar10 . 35 dataset_cifar100 . 35 dataset_fashion_mnist . 36 dataset_imdb . 37 dataset_mnist . 38 dataset_reuters . 38 evaluate.keras.engine.training.Model .
    [Show full text]