CPP2_ADC_Chip
Top cell
Pinout Starting on LHS on top and moving counter clockwise Pin name Left side of Chip Pin name value Brief description Iref 5K pull up to Current reference for ADC and J2 Avdd (100uA) single stage ADC Vicm 2.5V Input K1 AVDD Analog - 5V K2 AVDD K3 AGND J4 AGND K4 Vina Analog input Positive input: ADC, single ADC, K5 Stage and comparator Vinb Analog input Positive input: ADC, single ADC, J5 Stage and comparator Spare DVDD Digital VDD K6 DGND Digital GND J6 Bottom of Chip left side Pin name value Brief description ClearB Digital input Clears Flip Flops in ADC K7 DFFclk1 Digital input Digital control signal for ADC J8 DFFclk2 Digital input Digital control signal for ADC K9 clkH1 Digital input Digital control signal for ADC J9 clkH1_mod Digital input Digital control signal for ADC K10 clkS1 Digital input Digital control signal for ADC H9 clkS1_mod Digital input Digital control signal for ADC J10 set_bar1 Digital input Digital control signal for ADC H10 set_bar2 Digital input Digital control signal for ADC G9 Dvalid_in Digital input Heartbeat G10 Dvalid Digital output Heartbeat F10 Dout<0:9> Digital output 10 bit output from ADC 0: F9 1: E10 2: E9 3: D10 4: D9 5: C10 6: C9 7: B10 8: B9 9: A10
Vref_p 2.5 + 1.5 = Vicm + Vref/2 B8 4V ADC range is +Vref to -Vref Vref_n 2.5-1.5 = 1V Vicm – Vref/2 A8
Bottom of Chip right side Pin name value Brief description XEN_CF_CALIB Digital in Enables output PSF calibration B3 comp_out_p Digital out Positive terminal output - comparator A3 comp_out_n Digital out negative terminal output - B4 comparator b<0> Digital out negative digital output - comparator A4 in single ADC stage b<1> Digital out Positive digital output - comparator B5 in single ADC stage Aout2 5K pull up to Negative analog output - single A5 7V or 8V ADC stage Aout1 5K pull up to B6 7V or 8V AGND Analog A6 ground AGND Analog B7 ground
Top chip (left to right) Pin name value Brief description Vicm F1 DAC_b<0:2> Digital inputs Digital codeword for 3 LSBs 0:E2 1:E1 2:D1
DAC_p<0:2> Digital inputs Digital codeword for 3 equally 0: D2 weighted MSBs 1: C1 2: B1 AVDD C2 AVDD A1 DAC_Iref 60 uA B2 DAC_Iout LSB should be 6uA A2
Xnew_clk_bar F2
+ Agnd J1