Citizenship: Hungarian. Visa Status: US Permanent Resident (Green Card, DV Category)

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Citizenship: Hungarian. Visa Status: US Permanent Resident (Green Card, DV Category)

Resume

Personal: Name: Istvan Nagy Citizenship: Hungarian. Visa status: US permanent resident (Green Card, DV category). Mailing address: 5770 Orchard Park Dr, San Jose CA 95123 E-mail: [email protected] Mobile phone: (408)-930-0277 Language: English, Hungarian (both languages fluent, oral and written)

Summary: I am a Hardware Design Engineer with a wide range of skills and very deep technical knowledge. I am specialized on very complex hardware design including X86 processors, large FPGAs and very high bandwidth networking chips (10GE/40GE), especially combining all in new large high-density designs. The quality of my initial designs, my understanding of cross-functional areas and my ability to communicate it with other teams is so high, that allows for less time (several months) and money (can be $100k/round of proto) spent on each project, or more/bigger projects done (usually 2x-4x) in a given number of years comparing to my peers. My employer can save hundreds of thousands of dollars in each year, and several months on time-to market, with putting me on their best projects. So far I have designed around 70 boards (including hobby), around 20 went into production. Every time I had to implement some completely new technology at the first time, I succeeded the first time, as the first person at the company. I can lead technology, not only follow; I have introduced several new technologies at all my employers. I am not one of those so many guys who "worked on some projects", but the guy who designed the most complex and challenging boards from scratch without help, and quickly succeeded every time. Often I mentor other (sometimes older) colleagues to teach them new techniques and technologies, or to resolve issues. Often I figure out what my non-HW co- workers need to know and what they should implement and how, so I can guide them into doing the work that correctly fits into my project. I am NOT a trial/error engineer, but I research, understand, plan and execute. I have started designing circuit boards (hardware) when I was 13 as hobby on my own, have read many related technical books, so when I graduated from university I had a huge head start and I was already a very experienced designer. I have been designing schematics, writing FPGA code, designing PCB layout, creating layout constraint, publishing open source IP projects and magazine articles. In the more distant past I used to write firmware, and make mechanical parts and assemblies myself too. Since I have direct hands-on experience from all of these fields, now I am able to more effectively work together with separate teams covering those areas than other HW engineers could. For these roles I have experience with BOTH doing these myself and also working with other teams doing it. Direct first-hand experience makes me more successful in a large-team environment, where I work now. I own and I initiate/assess/drive technical resolutions for all cross functional issues in my projects. Gathering the right data from other teams is often challenging, as most people need my guidance in understanding what would be relevant to the cooperation, how it affects the project and how to extract it. I always achieve 100% functionality on my 1st prototype on every project, as opposed to most of my peers who only achieve that on their 2-4th round of prototypes. Every extra round can cost $100k+ and 2-4 months, and can delay the software validation start date. Because of this, now my employer assigns the most challenging projects to me, as well as more number of projects per time period. Also note that new circuit developments are much more challenging than just design-reuse, so I do most new designs in our team, this way my colleagues can also deliver products reusing blocks from my boards. Education:  Master’s degree in Electrical Engineering (MSC) from the Budapest University of Technology and Economics, Faculty of Electrical Engineering and Informatics, in Budapest Hungary 2006 (This is the top engineering school in the country);  Mechatronics Technician Certificate from Banki Donat Technical Secondary School, in Nyiregyhaza Hungary 2000;  High school diploma from Banki Donat T.S.S. Nyiregyhaza, Hungary, 1999. I have participated in many science competitions; my best achievement was the 11th place on the national finals in physics.

Work Experience:  Fortinet Inc., Sunnyvale CA/USA, Principal Hardware Engineer (2012 - present). Started as senior engineer. I firstly designed-in (introduced) several high-end chips at the company like Altera Stratix-V (large FPGA), Intel Gladden x86 CPU, 10G-40G networking chips (like Broadcom Trident2 switch). Example projects: ATCA 40GE switch blade, security add-in card, pizza box appliance. I do the most challenging board designs in our team and with very good success. Role: design schematics and CPLD code, review layout, work with FPGA/FW/SW/Mech teams, PCB fabs, rework contractors and JDM vendors. I (the HW engineer) own my projects, and I initiate/assess technical resolutions for all cross functional issues. Coordinate the technical resolution of all aspects on my projects, guiding FPGA/FW/SW/Test teams and JDM (outsourced) vendors to make their technical output match the project requirements and timeline. www.fortinet.com  Bluechip Technology in the UK, Electronics Design engineer (2010 - 2012). My task was to introduce the latest technologies, as the one technology specialist. Example projects: fan-less PC motherboard design with AMD Athlon CPU, several ARM-based designs, FPGAs, industrial control circuits. Role: designing schematics, PCB layout and FPGA code myself, work with mechanical, firmware and systems engineer and in-house manufacturing. www.bluechiptechnology.co.uk  Concurrent Technologies in the UK, Hardware Design Engineer (2008 - 2010). I have been designing military/aerospace ruggedized computer boards. Example projects: 3U cPCI motherboard from scratch with Intel Core-i7, 6U Compact-PCI motherboard re-design with Intel Core2Duo CPU, SATA controller cPCI and VME cards, PCI-X/PCIe carrier cards. I introduced FPGAs for glue logic and peripheral functions into our products, as well as I helped colleagues to learn FPGA- logic development and PCB stackup design technology. Role: designing schematics and FPGA code myself, guide PCB layout team, and work with mechanical FW/SW engineer and in-house manufacturing. www.cct.co.uk  PEC Products NV, in Belgium Europe, Electronics Design Engineer (2006 - 2008). I have been designing industrial analog and digital circuit boards from scratch. I designed the first X86 motherboard and the first ARM board at PEC, also trained my older colleagues for PCB design. I was the main electronics designer. www.peccorp.com  Private and University Projects, in Hungary Europe, Circuit Board Hardware Designer (1993 - 2006). I was a very active and serious hobbyist. I have been designing PCB layout since 1993, schematics since 1997, microcontroller boards since 2002, and complex digital boards since 2005. I built my own boards in the first years at home (while in middle/high school), later at the University. By the time I graduated I have completed more than 40 design projects. http://www.ett.bme.hu

Technical Skills:  New technology introduction to my employer based on my Independent research/study efforts without any help or training required. Actually I provide the training/coaching/mentoring to my colleagues;  Complex Digital board-level hardware design: Very complex, high-density, high-speed digital and high performance computing and networking board hardware designs from scratch. Custom and standard form factors (ATCA, Compact-PCI, and VME), processor and peripheral boards. Industrial/military/aerospace ruggedized designs for harsh environments. My largest design was an ATCA switch blade with 7000 components, 420W power, 200x10G signals and I even designed it from scratch, and brought it up faster than my colleagues did their simpler designs.  Chip-level logic designs (FPGA/CPLD based): usually VHDL, but Verilog too, multi-IP-core FPGA projects. Implementing glue logic, power sequencing, interface logic design (PCI, PCIe, LPC, Aurora), with/without multi-gigabit transceivers. My 3 open-source IP-cores: http://opencores.org/acc,view,buenos  Analog circuit design: Mixed-signal, power-electronics, chip-down POL DC/DC converters, sensor and control circuits;  Prototype-testing , debug and board bring-up, DVT/QC supervising/support;  PCB Layout design, constraint generation and guidance: On some projects I designed the PCB layout myself while on others I worked with layout designers in-house or outsourced. Until now, up to 18 layers, 1600MHz parallel buses and 10Gbps-serial, multiple BGAs, 7000 components. CAD software used: Altium Designer (8 years of experience), Cadence Concept-HDL (2 years) and Orcad Capture (3 years) with Cadence Allegro PCB layout. Because of my hands-on layout design experience my layout review is a lot more effective;  Layer stackup design and impedance control. Material selection for loss/DK and spread glass.  New design-in experience with interfaces/standards: DDR3/2/1 SDRAM memories, (memory-down and SODIMM-based), QDR-II+, PCI, Compact-PCI, PCI-X, PCI-Express, Intel-DMI, AMD Hyper-Transport-3.0, USB2.0, 1/10/40Gig Ethernet (TX, KR, KR4, XAUI, XLAUI, XLPPI, SFP+, QSFP+), Interlaken, Bluetooth, video (VGA/DVI/LVDS/BT656), IDE, SATA-I/II/III, LPC-bus, custom peripheral buses, ACPI power management, IPMI, SPI, RS232/485...  New design-in experience with chips: X86 processors (Intel Core i7, Core2Duo, Gladden/Xeon-Ivy-Bridge, AMD Athlon II and AMD Geode), ARM/DSP processors (Freescale IMX6, TI’s OMAP3 & TMS320, AD’s Blackfin), Cavium Neuron Search Processor, PC chipsets (Intel Cave Creek, Ibex Peak, GS45, AMD RS785, AMD Geode), Networking chips (Broadcom 1Tbit Trident2/T2+ and smaller 56Gbit switch chips, QSFP+ PHYs, 1Gig MAC/NIC and PHYs), FPGAs (Altera Stratix-V, Xilinx Spartan-2/3/6, Actel ProASIC3), CPLDs (Xilinx Coolrunner-2, XC9500, Altera MAX II), high-speed memory (DDR3/2, QDRII+), bridge chips (PCIx-to-PCIx, custom FPGA-based) PCI-express switches (PLX, Pericom), SSD-chips...  Working together with other engineers/teams (firmware, software, layout, FPGA/ASIC, mechanical, test and manufacturing), purchasing and sales personnel, subcontractors (PCB fab, JDM/CM, assembly, component vendors). Bridging between HW/Layout/FW/FPGA teams using my interdisciplinary skills that I built while as I was doing projects on those fields myself. Many times I had to find problems and solutions in the other team’s work that should have been resolved completely by them. For example BIOS/driver settings, chipset soft strapping, FPGA clocking/IO constraints;  Signal/Power integrity analysis with Agilent ADS, Hyperlynx, Polar-Si8000, FEMM, Sonnet Lite. Researching theory and application. Static Timing-analysis for on-board and on-chip designs. Writing technical magazine articles about SI/PI. I have published 4 articles as single-author in the PCDandF magazine and in Electronics Specifier. Links to all my articles are on this webpage: http://www.buenos.extra.hu/mywritings.html  Firmware programming for uC/DSP/LabView/Matlab, C/Assembly, during my student years.

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