Predictive Direct DC-Link Current Control of IPMSM Drive System Using Electrolytic Capacitorless Inverter for Fine Harmonics Suppression

IEEJ Journal of Industry Applications Vol.8 No.3 pp.394–403 DOI: 10.1541/ieejjia.8.394

Paper

Predictive Direct DC-link Current Control of IPMSM Drive System Using Electrolytic Capacitorless Inverter for Fine Harmonics Suppression

∗ ∗∗ Yousuke Akama Non-member, Kodai Abe Member ∗ ∗ Yushi Araki Student Member, Kiyoshi Ohishi Fellow ∗ ∗∗∗ Yuki Yokokura Member, Koji Kobayashi Member ∗∗∗ Tatsuki Kashihara Member

(Manuscript received June 17, 2018, revised Nov. 13, 2018)

This paper proposes a method for direct predictive control of DC-link current using the interior permanent magnet synchronous motor (IPMSM) discrete equation for electrolytic capacitorless inverters. Electrolytic capacitorless inverters do not have any electrolytic capacitors or power factor correction circuits. Therefore, direct DC-link current control is proposed as a method for controlling the the DC-link current of the inverter to improve the input power factor. However, in the direct DC-link current-control method, an error occurs in the DC-link current due to the one-sample delay in the voltage output. Because of this error, a current harmonic is generated in the input current. The direct predictive DC-link current control proposed in this paper reduces this error, thus satisfying the input-current-harmonics regulation value of IEC 61000-3-2.

Keywords: IPMSM, electrolytic capacitorless inverter, source current harmonics

and even harmonics (10). The input current harmonics in this 1. Introduction system do not satisfy the IEC 61000 3-2 class A. In recent years, a variable-speed drive system for motors In addition, to improve the input current waveform, direct has been widely used to save energy (1)–(3). In general, single- DC-link current control (DDCCC) has been proposed (11)–(13). phase to three-phase inverters have been used for variable DDCCC controls the DC-link current toward electrolytic ca- speed operation of motors. To use a single-phase-to-three- pacitorless inverter by modifying the inverter output volt- phase inverter, a power factor correction (PFC) circuit and age directly, and then is not limited by motor-current-control a large electrolytic capacitor are required (4). However, large bandwidth. Especially, this method reduces the input current electrolytic capacitors increase the size and shorten the life harmonics effectively in high-speed region that the frequency of the inverter system of compressor motor. These problems of the spatial harmonics higher than the control bandwidth. also occur in a three-phase to three-phase inverter system, However, because the direct DC-link current control method and a method for controlling capacitor current by predictive controls the DC-link current in a feedforward manner, an er- control has been proposed (5)–(8). In a single-phase to three- ror occurs in the DC-link current due to the motor current phase inverter system, a motor drive system using a film that changes during the control period. When the modifica- capacitor instead of an electrolytic capacitor has been pro- tion amount of the voltage reference is large, the output volt- posed (9). In this system, because the DC-link part does not age vector is modified to the intersection between the DC- have a large energy buffer, the power ripple is absorbed by link current line and the voltage-limit. When the voltage ref- the kinetic energy accumulated in the moment of inertia of erence sharply changes, the motor current changes steeply. the motor. However the input current oscillates due to the res- The inverter includes one-sample delay in the voltage out- onance between the line impedance reactor on the grid side put. Therefore, when the fluctuation of the current in the and the DC-link capacitor, and harmonics are generated in sampling period is large, the control error of the DC-link the input current. Input current harmonics are regulated by current becomes large and causes a high-frequency harmon- IEC 61000-3-2 class A. IEC 61000-3-2 class A regulates odd ics (14). Therefore, this paper proposes a new predictive control based on the interior permanent magnet synchronous mo- ∗ Nagaoka University of Technology tor (IPMSM) discrete equation that reduce the error caused 1603-1, Kamitomioka-machi, Nagaoka, Niigata 940-2188, by delay in the DC-link current. Moreover, this paper con- Japan firms the effectiveness of the proposed method by experi- ∗∗ Tokyo Metropolitan College of Industrial Technology 1-10-40, Higashi-oi, Shinagawa-ku, Tokyo 140-0011, Japan ment. ∗∗∗ Sanden advanced Technology 20, Kotobuki-cho, Isesaki, Gunma 372-0052, Japan

c 2019 The Institute of Electrical Engineers of Japan. 394 Predictive Direct DC-link Current Control for Harmonics Suppression（Yousuke Akama et al.）

Fig. 1. System configuration of DDCCC ω | ∗ | = re τ∗ 1 ······························· 2. Direct DC-link Current Control iin in (4) P vin In the electrolytic capacitorless inverter system, the DC- dV i = C dc link electrolytic capacitor is replaced with a small-capacity c dc dt film capacitor, and the PFC circuit is omitted. As the cur- = ωinCdcVin cos θin · sgn(sin θin) ··············· (5) rent flowing into the capacitor decreases, the input power factor is improved by controlling the DC-link current in the Here, Cdc is the capacitance of the DC-link capacitor, ωin is electrolytic capacitorless inverter. However, the input-current the angular frequency of the grid, Vin is peak value of the distortion occurs due to a delay in the motor current control grid voltage, and θin is the grid phase in Fig. 1. By reforming v∗ system and the induced harmonics voltage of IPMSM. There- Eq. (2) for βn, the following equation is calculated. fore, DDCCC improves the power factor by directly control- 2I∗ ling the DC-link current of the electrolytic capacitorless in- v∗ = −iα v∗ + dc ···························· βn αn (6) verter. The block diagram of the IPMSM drive system to iβ iβ which DDCCC is applied is shown in Fig. 1. DDCCC is a ∗ ∗ id ∗ 2Idc method of directly controlling the DC-link current by modi- v = − v + ···························· (7) qn i dn i fying the output voltage of the inverter. DDCCC is applied q q when the motor speed is in the steady state. Equation (6) indicates that the DC-link current, which is In the inverter, the relationship between the rectified source ∗ equal to its reference Idc, is obtained by outputting the volt- current |iin|, the DC-link current Idc, and the DC-link capaci- age vector on the line. Equation (7) is obtained by converting tor current ic is as follows: Eq. (6) into the dq axis. In the control of electrolytic capacitorless inverters, Eq. (6) and similar equations are commonly |i | = I + i .··································· (1) in dc c used (11)–(13)(15)–(17). The DDCCC method controls the DC-link v v ,v The average DC-link current Idc is determined by the sum of current by correcting the output voltage reference o[ αn βn] the average values of each phase current as follows: of the current controller on the DC-link current line, as shown in Fig. 2. Figure 2(a) shows the state of DDCCC in which = 1 v∗ + 1 v∗ ···························· voltage limitation does not occur, and the voltage vector is Idc iα αn iβ βn (2) 2 2 modified to a point on the DC-link current line with the same ∗ ∗ v where vα and vβ are the normalized α and β axis voltage phase as o. The phase of the output voltage vectors is equal n n v references and iα and iβ are the α and β axis currents, respec- to the phase of o as follows: tively. The process of normalization involves dividing the v ∗ βn ∗ voltage reference value by the DC-link voltage Vdc and then v = v ···································· βn v αn (8) multiplying by 2. On the basis of Eq. (1), the DC-link current αn reference I∗ required to obtain a unity input power factor is dc The intersection point between Eq. (6) and Eq. (8) is calcu- calculated as follows: lated as follows: ∗ = | ∗ |− ···································· ∗ Idc iin ic (3) I v∗ = dc v ·······················(9) ∗ αn v + v / αn The rectified source current reference |iin| and the DC-link ( αniα βniβ) 2 capacitor current ic are obtained as follows:

395 IEEJ Journal IA, Vol.8, No.3, 2019 Predictive Direct DC-link Current Control for Harmonics Suppression（Yousuke Akama et al.）

Table 1. Motor parameters parameter value

Stator resistance Ra 1.034 Ω d-axis inductance Ld 14.15 mH q-axis inductance Lq 23.40 mH Linkage ﬂux φa 0.0869 V/(rad/s) Number of pole pairs P 3 pole

Table 2. Experimental conditions parameter value (a) within voltage limitation (b) without voltage limitation DC-link capacitance Cdc 11 μF Line inductance l 0.4 mH Line resistance r 0.5 Ω Poles of current control system ωcc 4000 rad/s Poles of speed control system ωsc 80 rad/s PWM carrier frequency fs 16 kHz Line frequency fin 50 Hz ADDCCC lower limit value 0.3 ADDCCC upper limit value 100

Fig. 4. FFT analysis of input current by conventional DDCCC method on condition of Rated speed 3000 rpm, full load and 16 kHz PWM Switching (a) Input Current Response

ADDCCC is equivalent to modifying the pole of the current control system. To operate the system sably, it is necessary to set the lower and upper limitof ADDCCC. The lower limit value is set so that the pole of the current controller does not become lower than the pole of the speed controller (13).The upper limit value is set to a large value so that the poles of the (b) dq-axis Current Response current controller are not limited by saturation of the modification amount. In the experimental results as shown in Fig. 3, the input current harmonics are generated when the voltage reference sharply changes. In the DDCCC, the input current harmonics occur depending on motor parameters and operating conditions. The fast Fourier transform (FFT) results of the input current is shown in Fig. 4, where the regulation (c) Output dq-axis normalized voltage vector value of IEC 61000-3-2 is not sometimes satisfied. Fig. 3. Experimental results of conventional DDCCC method on condition of Rated speed 3000 rpm, full load 3. Predictive Direct DC-link Current Control and 16 kHz PWM Switching based on IPMSM discrete equation 3.1 Predictive Direct DC-link Current Control within ∗ I the Voltage Limit In the proposed method, the motor v∗ = dc v ·······················(10) βn v + v / βn current is controlled on the αβ axis and is predicted on the dq ( αniα βniβ) 2 axis. DDCCC is based on Eq. (2), which is based on the in- In DDCCC, the voltage reference from the current con- stantaneous value of the motor current at the sampling point troller is modified as shown in Eq. (9) and Eq. (10). Figure 3 and includes the error between the DC-link current in Eq. (2) shows the experimental results of IPMSM control by DD- and accurate average DC-link current during control period CCC under the conditions as shown in Table 1 and Table 2. in Eq. (11). In Fig. 2, the results of (b) are shown on the condition of the i [k + 1] + i [k + 2] voltage-limit-inscribed circle, and (c) is shown in the con- I [k + 1] = d d v∗ [k] dc 4 dn dition of modified voltage ratio limitation, such as ADDCCC, iq[k + 1] + iq[k + 2] which has a lower-limit value of 0.3 and upper-limit value of + v∗ [k] ······· (11) 4 qn 100. ADDCCC is a gain for modifying the voltage reference value which is the current controller output. Modification by Equation (11) is a relative equation of the motor current and

396 IEEJ Journal IA, Vol.8, No.3, 2019 Predictive Direct DC-link Current Control for Harmonics Suppression（Yousuke Akama et al.）

∗ v∗ Idc[k] into Eq. (11) and solving for qn[k], the equation of the DC-link current line considering the motor current that varies with one sample delay and the output voltage is obtained as follows: √ n ± n v∗ = 1 2 ····························· qn[k] (16) 2a3 n = −a − a V∗ [k] 1 2 5 dn = + v∗ 2 n2 a1 a5 dn[k] − v∗ + v∗ 2 − ∗ 4a3(a2 dn[k] a4 dn[k] Idc[k]) 1 a1 = (iˆq[k + 1] + A21iˆd[k + 1] + A22iˆq[k + 1] 2 + b22 −ωreφ fa ) ························· (17) 1 a2 = (iˆd[k + 1] + A11iˆd[k + 1] + A12iˆq[k + 1] 2 + b −ωreφ fa ) ························· (18) Fig. 5. DC-link current response by conventional DDCCC 22 b22 V [k + 1] a = dc ···························· (19) the average value of DC-link current. This paper defines the 3 2 2 [k] point as the current time point and defines the voltage ref- b + ∗ ∗ 11 Vdc[k 1] erence calculated at [k] as v [k]andv [k]. In general, the a4 = ···························· (20) dn qn 2 2 voltage reference calculated at time point [k] is output from ⎛ ⎞ ⎜b b ⎟ + + ⎜ 21 12⎟ Vdc[k 1] the inverter at time point [k 1]. Therefore, as shown in Fig. 5 a5 = ⎝ + ⎠ ···················· (21) DDCCC has a control error of the DC-link current due to a 2 2 2 one-sample delay because the output voltage is not taken into As shown in Table 2, because the poles of the speed con- consideration in Eq. (2). Therefore, in order to control the troller and the line frequency are at least 100 times lower than DC-link current more strictly, the DC-link current line should the carrier frequency, the sampling value at time point [k] is be calculated from Eq. (11). The future values of the motor used for Vdc[k + 1] and ωre[k + 1] in Eq. (15). In addition, + + currents id[k 1] and iq[k 1] are calculated from the discrete because the voltage reference calculated at time point [k] is IPMSM equations given by Eq. (12) and Eq. (13). Because output from the inverter at time point [k + 1], the DC-link ω ∗ the motor speed is steady state, re is a constant value. current reference I [k] calculated at time point [k] is used as ∗ dc V [k] the I [k + 1] at time point [k+1]. Equation (15) defines an iˆ [k + 1] = A i [k] + A i [k] + b dc v∗ [k − 1] dc d 11 d 12 q 11 2 dn ellipse passing through the vicinity of the conventional DC- V [k] link current line as shown in Fig. 6. This equation is called the + b dc v∗ [k−1]−b ω φ ····· (12) 12 2 qn 12 re a predictive DC-link current curve. The proposed method pre- dictively controls the DC-link current by using Eq. (15). The Vdc[k] ∗ iˆq[k + 1] = A21id[k] + A22iq[k] + b21 v [k − 1] predictive DC-link current curve is used in the same manner 2 dn as the DDCCC, as shown in Fig. 6. In Fig. 6, similarly (b) is Vdc[k] ∗ + b22 v [k−1]−b22ωreφa ····· (13) shown on the condition of voltage limitation on the hexago- 2 qn nal voltage aria, and (c) is shown in the condition of modified The coefficients A and b used for Eq. (12) and Eq. (13) are de- voltage-ratio limitation, such as the ADDCCC lower limit value scribed in the Appendix. The right side elements in Eq. (12) of 0.3 and upper limit value of 100. By using the predictive and Eq. (13) all have been known values at the time point [k], DC-link current curve, the error caused by delay in the DC- ˆ + ˆ + and id[k 1] and iq[k 1] are obtained at the time point [k]. link current is reduced as shown in Fig. 7. Similarly, the future value of the motor current at the time In the predictive control of the DC-link current using the + point [k 2] is calculated as follows: predictive DC-link current curve, the DC-link current is con-

iˆd[k + 2] = A11iˆd[k + 1] + A12iˆq[k + 1] trolled by modifying the voltage reference from the current + controller. When the voltage is not saturated, the amplitude Vdc[k 1] ∗ + b11 v [k] of the voltage reference v from the current controller is mod- 2 dn o iﬁed to be the voltage reference of the predictive DC-link cur- Vdc[k+1] ∗ + b12 v [k]−b12ωreφa ····· (14) rent curve. Assuming that the voltage reference calculated 2 qn from the current controller and the decoupling controller are iˆ k + = A iˆ k + + A iˆ k + q[ 2] 21 d[ 1] 22 q[ 1] v [v [k],v [k]], the line with the same phase as the output + o dn qn + Vdc[k 1]v∗ voltage is as follows: b21 dn[k] 2 v ∗ qn[k] ∗ ∗ Vdc[k+1] ∗ v = v = v ·················· + v − ω φ ····· qn[k] [k] a [k] (22) b22 qn[k] b22 re a (15) v dn dn 2 dn[k] By substituting Eq. (12), Eq. (13), Eq. (14), Eq. (15), and The intersection of Eq. (21) and the predictive DC-link

397 IEEJ Journal IA, Vol.8, No.3, 2019 Predictive Direct DC-link Current Control for Harmonics Suppression（Yousuke Akama et al.） ⎛ ⎞ √ ⎜ π⎟ v∗ =−v∗ ⎜θ + ⎟+ 2 ···· qn[k] dn[k]tan ⎝ re n ⎠ ⎛ ⎞ (24) 3 ⎜ π⎟ cos ⎝⎜θ +n ⎠⎟ re 3 = v∗ + ···························· c dn[k] d (25) The intersection of the Eq. (25) and the predictive DC-link current curve is shown in Eq. (15). √ m3 ± m4 v∗ [k] = ···························· (26) dn d (a) within voltage limitation (b) withinout voltage limitation 1 2 2 2 m3 = 2d c a4 − c a2 − da5 − a1 = 2 ∗ + 2 2 + m4 4c a4Idc[k] c a2 4cda1a4 − − 2 + 2 2 2cda5a4 4d a3a4 d a5 + ∗ + + 4cIdc[k]a5 2ca1a2 2da1a5 − + ∗ + 2 4da3a2 4a3Idc[k] a1 v∗ The value of qn[k] at the intersection is obtained by substi- v∗ v∗ tuting dn[k] calculated from Eq. (26) for dn[k] in Eq. (25). Equation (26) is calculated for each of the six equations, and (c) modified voltage ratio limitation the closest intersection point that has a solution inside each Fig. 6. Output voltage modification by proposed predic- vertex of the voltage-limitation hexagon is taken as the inter- tive DC-link current curve section point. 4. Performance Analysis between DDCCC and Proposed Predictive DDCCC In DDCCC, the voltage vector is manipulated in a feedforward manner so as to obtain the desired DC-link current based on the sampling value of the continuously changing Fig. 7. DC-link current response by predictive DC-link motor current. In Fig. 5, because the output voltage is de- current control layed by one sample period, an error occurs in the DC-link current. Moreover, because the motor current changes during current curve is as follows: the control period depending on the output voltage, the error √ of the DC-link current increases. Therefore, DDCCC using m ± m v∗ = 1 2 ···························· the DC-link current line always has an error in the DC-link dn[k] (23) d1 current, and the error amount varies depending on the voltage m1 = −aa2 − a1 output from the inverter. = ∗ 2 + 2 2 + ∗ The error caused by delay in the DC-link current due to m2 4Idc[k]a a4 a a2 4Idc[k]aa5 + + ∗ + 2 DDCCC is obtained by calculating Idc[k] using Eq. (11). The 2aa1a2 4a3Idc[k] a1 ∗ error rate between Idc[k]andIdc[k]isasfollows: = 2 + + d1 2 a a4 aa5 a3 I∗ [k] − I [k] = dc dc ······················· v∗ IdcError ∗ (27) The value of qn[k] at the intersection is obtained by substi- I [k] v∗ dc tuting dn[k] from Eq. (22) into Eq. (21). When the voltage vector obtained from Eq. (22) is out of the voltage limitation, The error rate IdcError distribution in the hexagonal voltage the prediction control method of the voltage saturation region limit under the conditions shown in Table 1 and Table 3 is is used. When the ratio of the amplitude of the voltage vector showninFig.8.Moreover,Fig.8alsoshowstheerrorIdcError modified by Eq. (22) exceeds the conditions in Table 2, the at the point on the DC-link current line at phase θ∗.InFig.8, prediction-control method of the voltage saturation region is the difference between DC-link current line and predictive used. DC-link current curve is large. In the proposed method, when 3.2 Predictive Direct DC-link Current Control in the the motor does not cause parameter variation and the output Voltage Saturation Region DDCCC modifies the out- voltage vector is within the voltage limit, the error rate IdcError put voltage vector to be that on the intersection of the voltage is 0%. limit and the DC-link current line. The proposed predictive When the harmonics of the magnetic flux density distribu- control of the DC-link current also modifies this output volt- tion of the rotor is large, the harmonics of the motor current age vector to be that on voltage limit and the predictive DC- increases. In this condition, the change in motor current dur- link current curve. In this paper, the voltage limit is defined as ing the sample period increases and the error caused by delay voltage-limitation hexagon. The voltage-limitation hexagon increases. Such an error arises as long as a method of modi- is expressed using six straight lines and is generalized as a fying the voltage vector based on the sampled current is used. straight-line equation, as shown by Eq. (25). The error rate IdcError distribution under the conditions shown

398 IEEJ Journal IA, Vol.8, No.3, 2019 Predictive Direct DC-link Current Control for Harmonics Suppression（Yousuke Akama et al.）

Table 3. Calculation parameters (Condition 1) parameter value

d-axis current id[k] −2.02 [A] q-axis current iq[k]2.03[A] ∗ DC-link current reference Idc 0.962 [A] Electrical angle θre 4.24 [rad] Electrical angular velocity ωe 472 [rad/s] DC-link voltage 266V Grid phase θin 70.12 [deg.]

Fig. 9. Distribution of error rate IdcError (Condition 2)

(a) Input Current Response

Fig. 8. Distribution of error rate IdcError (Condition 1)

Table 4. Calculation parameters (Condition 2) parameter value

d-axis current id[k] −4.17 [A] q-axis current iq[k]1.53[A] ∗ (b) dq-axis Current Response DC-link current reference Idc 1.2 [A] Electrical angle θre 4.85 [rad] Electrical angular velocity ωe 472 [rad/s] DC-link voltage 96.8 V Grid phase θin 20.01 [deg.] in Table 1 and Table 4 is shown in Fig. 9. In Fig. 9, the dif- (c) Output dq-axis normalized voltage vector ference between DC-link current line and predictive DC-link Fig. 10. Experimental results of proposed method on current curve is small. Under the conditions shown in Ta- condition of Rated speed 3000 rpm, full load and 16 kHz ble 4, the conventional method has the error of 10% or more PWM Switching within the voltage limit. 5. Experimental Results operation rated speed (3000 rpm) and full load is shown in Tables 1 and 2 show the motor parameters and inverter Figs. 10–14. In Table 2, the lower limit of ADDCCC is 0.3 and circuit constants used for the experiment. In JIS C61000- the upper limit value is 100, based on the experimental re- 3-2, an inductor of 0.46 mH ± 0.0369 mH and a resistance of sults. In the experimental results with the proposed method 0.38 Ω ± 0.0304 Ω are speciﬁed as parasitic components (18). shown in Fig. 10, because the error caused by delay is sup- In the experiment, a 0.4 mH inductor and a 0.5 Ω resistor are pressed by the proposed method, the harmonics of the input connected to the system as parasitic components. A power current are reduced. Figure 11 shows the FFT results of the analyzer (WT 1800 made by Yokogawa Electric Co., Ltd.) is input current. By applying the proposed method, the har- used for measuring the input power factor. Also, dead time is monics of the input current are reduced, and the number of set at 3.5 μs and dead time compensation is applied (19).The harmonics is kept below the regulation value. experimental results at the carrier frequency of 16 kHz, the The experimental results at 2000 rpm operating speed and

399 IEEJ Journal IA, Vol.8, No.3, 2019 Predictive Direct DC-link Current Control for Harmonics Suppression（Yousuke Akama et al.）

Fig. 14. FFT analysis of input current at Rated speed Fig. 11. FFT analysis of input current at Rated speed 2000 rpm, 60% load and 16 kHz PWM Switching 3000 rpm, full load and 16 kHz PWM Switching

(a) Input Current Response

(b) dq-axis Current Response

(c) Output dq-axis normalized voltage vector Fig. 15. Experimental results of conventional DDCCC (c) Output dq-axis normalized voltage vector method on condition of Rated speed 3000 rpm, full load Fig. 12. Experimental results of conventional DDCCC and 10 kHz PWM Switching method on condition of Rated speed 2000 rpm, 60% load and 16 kHz PWM Switching 60% load are shown in Fig. 12 and Fig. 13. In the case of the condition of low speed and light load, in the conventional method, the harmonics of the input current often remains when the voltage reference is steeply operated. In contrast, in the proposed method, the harmonics of the input current are suppressed well. Fig. 14 shows the FFT results of the input current with low speed and low load. By applying the

(a) Input Current Response proposed method at low speed and light load, the harmonics of the input current are reduced well. The experimental results set the carrier frequency to 10 kHz are shown from Fig. 15 to Fig. 17. According to the experimental results at operating rated speed and full load, as shown in Fig. 15, the harmonics of the input current often remains when the voltage vector is steeply operated, as is (b) dq-axis Current Response also shown in the results of Fig. 3. In addition, as the control period is extended, the motor current diﬀerence between id[k]andid[k + 1] increases. In this case, the harmonics of the input current due to the motor current harmonics becomes large. Even when the control period is extended, by applying the proposed method, the harmonics of the input current are reduced. Tables 5 and 6 show the harmonic-reduction ratios (c) Output dq-axis normalized voltage vector and power factor for each experiment. In each condition, the Fig. 13. Experimental results of proposed method on condition of Rated speed 2000 rpm, 60% load and 16 kHz input current harmonics and power factor are improved by PWM Switching the proposed method. Figures 18–20 shows the experimental results with 20%

400 IEEJ Journal IA, Vol.8, No.3, 2019 Predictive Direct DC-link Current Control for Harmonics Suppression（Yousuke Akama et al.）

(a) Input Current Response (a) Input Current Response

(b) dq-axis Current Response (b) dq-axis Current Response

(c) Output dq-axis normalized voltage vector (c) Output dq-axis normalized voltage vector Fig. 16. Experimental results of proposed method on Fig. 18. Experimental results of proposed method on condition of Rated speed 3000 rpm, full load and 10 kHz condition of Rated speed 3000 rpm, full load and 16 kHz , − PWM Switching PWM Switching (Ld Lq 20%)

(a) Input Current Response Fig. 17. FFT analysis of input current at Rated speed 3000 rpm, full load and 10 kHz PWM Switching

Table 5. Harmonics reduction ratio by the proposed method Decrease amount of Decrease amount of Operating speed 2-40 th order harmonics 41-60 th order harmonics (b) dq-axis Current Response 2000 rpm(16 kHz) 2.62% 44.51% 3000 rpm(16 kHz) 20.77% 45.42% 3000 rpm(10 kHz) 19.03% 32.68%

Table 6. Input power factor of input current Operating speed Conventional method Proposed method 2000 rpm(16 kHz) 98.57% 99.07% 3000 rpm(16 kHz) 99.31% 99.35% (c) Output dq-axis normalized voltage vector 3000 rpm(10 kHz) 96.95% 98.81% Fig. 19. Experimental results of proposed method on condition of Rated speed 3000 rpm, full load and 16 kHz PWM Switching (Ld, Lq + 20%) parameter variation in inductance. The eﬀectiveness of the proposed method is maintained even when the parameter varies by about 20%. 6. Conclusion This paper proposes a new predictive control method for DC-link current using the IPMSM discrete equations. The conventional DDCCC often has input-current harmonics by the voltage output delay. The harmonics of the input current are reduced because the error caused by delay is reduced by the proposed method. In the experiments, by using the pro- Fig. 20. FFT analysis of input current (parameter variation) posed method, the harmonics of the input current is reduced

401 IEEJ Journal IA, Vol.8, No.3, 2019 Predictive Direct DC-link Current Control for Harmonics Suppression（Yousuke Akama et al.） under the regulations of IEC 61000-3-2. In addition, the har- equation. The discrete equation of IPMSM used here is ob- monics of the input current is reduced even when the param- tained by discretizing the IPMSM state equation by the zero- eter variation of inductance becomes by 20%. Consequently, order hold of the sampling time Ts. The state equation of effectiveness of the proposed method is confirmed. IPMSM is as follows: ⎡ ⎤ L ⎡ ⎤ ⎢ − Ra ω q ⎥ ⎢ 1 ⎥ d id ⎢ re ⎥ id ⎢ 0 ⎥ vd = ⎢ Ld Ld ⎥ + ⎣⎢ Ld ⎦⎥ ⎣ Ld Ra ⎦ 1 References iq −ω − iq 0 vq dt re L L Lq ⎡ q ⎤ q ⎢ 1 0 ⎥ ( 1 ) S. Shao, E. Abdi, and R. McMahon: “Low-Cost Variable Speed Drive Based ⎢ Ld ⎥ 0 + ⎣ 1 ⎦ on a Brushless Doubly-Fed Motor and a Fractional Unidirectional Con- 0 −ω φ Lq re a verter”, IEEE Trans. Ind. Electron., Vol.59, No.1, pp.317–325 (2012) ( 2 ) J. Kolb, F. Kammerer, M. Gommeringer, and M. Braun: “Cascaded Con- d x(t) = Ac x(t) + bcu(t) + bc d ················ (A1) trol System of the Modular Multilevel Converter for Feeding Variable-Speed dt Drives”, IEEE Trans. Power Electron., Vol.30, No.1, pp.349–357 (2015) ( 3 ) H.K. Samitha Ransara and U.K. Madawala: “A Torque Ripple Compensa- The equation obtained by discretizing (A1) by the zero-order tion Technique for a Low-Cost Brushless DC Motor Drive”, IEEE Trans. hold of the sampling time Ts is given below: Ind. Electron., Vol.62, No.10, pp.6171–6182 (2015) ( 4 ) M.K.H. Cheung, M.H.L. Chow, and C.K. Tse: “Design and Performance x[k + 1] = Ax[k] + bu[k] + bd·················(A2) Considerations of PFC Switching Regulators Based on Noncascading Struc- tures”, IEEE Trans. Ind. Electron., Vol.57, No.11, pp.3730–3745 (2010) The coefficient matrix A in Eq. (A2) is as follows: ( 5 ) J.S. Kim and S.K. Sul: “New control scheme for AC-DC-AC converter without DC link electrolytic capacitor”, Power Electronics Specialists Confer- A A − − = 11 12 = AcTs = 1 − 1 ······· ence, 1993. PESC ’93 Record., 24th Annual IEEE, Seattle, WA, pp.300–306 A e Ł (sI Ac) (A3) A21 A22 (1993) ( 6 ) N. Hur, J. Jung, and K. Nam: “A fast dynamic DC-link power-balancing Each element of matrix A of the IPMSM discrete equation is scheme for a PWM converter-inverter system”, IEEE Transactions on Indus- trial Electronics, Vol.48, No.4, pp.794–803 (2001) calculated from Eq. (A3) as follows: ( 7 ) B.-G. Gu and K. Nam: “A DC-link capacitor minimization method through − = C1Ts + ········· direct capacitor current control”, IEEE Transactions on Industry Applica- A11 e (C11 sin C2Ts cos C2Ts) (A4) tions, Vol.42, No.2, pp.573–581 (2006) −C1Ts A12 = C12e sin C2Ts ·······················(A5) ( 8 ) W.-J. Lee and S.-K. Sul: “DC-link voltage stabilization for reduced dc- −C1Ts link capacitor inverter”, IEEE Transactions on Industry Applications, Vol.50, A21 = C21e sin C2Ts ·······················(A6) − No.1, pp.404–414 (2014) A = e C1Ts (C sin C T + cos C T ) ··········(A7) ( 9 ) K. Inazuma, K. Ohishi, and H. Haga: “High-Power-Factor Control for In- 22 22 2 s 2 s verter Output Power of IPM Motor Driven by Inverter System without Elec- trolytic Capacitor”, IEEE Int. Symp. Ind. Electron. (ISIE2011), pp.619–624 Similarly, each element of matrix b is calculated from (2011) Eq. (A3) as follows: (10) IEC 61000-3-2 Edition 5.0 2018-01 Ts (11) K. Abe, K. Ohishi, H. Haga, and Y. Yokokura: “Harmonic Current Reduc- b b τ = 11 12 = Ac τ · ·············· tion Control of IPMSM Drive Inverter Without Inductor or Electrolytic Ca- b e d bc (A8) b21 b22 0 pacitor”, The 42th Annual Conf. IEEE Ind. Electron. Society (IECON2016), pp.2821–2826 (2016) 1 1 − b = C C 1 − e C1Ts cos C T (12) K. Abe, K. Ohishi, H. Haga, and Y. Yokokura: “Instantaneous Voltage Vector 11 L 2 + 2 11 2 2 s Control and d-axis Current Reference Calculation to Improve Source Current q C1 C2 Waveform for an Electrolytic Capacitor-less Single-phase to Three-phase In- −C1Ts −C1Ts − C11C1e sin C2Ts + C2e sin C2Ts verter”, The 19th International Conference on Electrical Machines and Sys- −C1Ts tems (ICEMS2016), pp.1–6 (2016) + C1 1 − e cos C2Ts ··············(A9) (13) K. Abe, K. Ohishi, H. Haga, and Y. Yokokura: “Direct DC-link Current Control Considering Voltage Saturation for Realization of Sinusoidal Source 1 1 −C1Ts b12 = C12C2 1 − e cos C2Ts Current Waveform without Passive Components for IPMSM Drives”, IEEE L C2 + C2 Transactions on Industrial Electronics, Vol.65, No.5, pp.3805–3814 (2018) q 1 2 (14) Y. Akama, K. Abe, K. Ohishi, and Y. Yokokura: “Investigation of Resonance −C1Ts − C12C1e sin C2Ts ··············· (A10) Current Caused by Input Circuit of Electrolytic Capacitor-less Inverter”, IEEJ Technical Meeting on Semiconductor power converter and motor drive, MD- 1 1 − 17-060, HCA-17-011 (2017) (in Japanese) b = C C 1 − e C1Ts cos C T 21 L 2 + 2 21 2 2 s (15) Y. Son and J.I. Ha: “Direct Power Control of a Three-Phase Inverter for d C1 C2 Grid Input Current Shaping of a Single-Phase Diode Rectifier With a Small −C1Ts DC-Link Capacitor”, IEEE Transactions on Power Electronics, Vol.30, No.7 − C21C1e sin C2Ts ··············· (A11) (2015) 1 1 − (16) W.J. Lee, Y. Son, and J.I. Ha: “Single-phase Active Power Filtering Method b = C C 1 − e C1Ts cos C T Using Diode-rectifier-fed Motor Drive”, IEEE Trans. Ind. Appl., Vol.51, 22 2 2 11 2 2 s Lq C + C No.3, pp.2227–2236 (2015) 1 2 − − − C1Ts + C1Ts (17) N. Zhao, G. Wang, and D. Xu: “An Active Damping Control Method for Re- C11C1e sin C2Ts C2e sin C2Ts duced DC-Link Capacitance IPMSM Drives”, IEEE Trans. Power Electron., − + − C1Ts ············· Vol.65, No.3, pp.2057–2068 (2018) C1 1 e cos C2Ts (A12) (18) JIS C61000-3-2:2011 (19) H. Sugimoto, M. Koyama, and S. Tamai: “Actual theory and design of AC The variables used in these equations are given below. servo system: From foundation to software servo”, Integrated electronic pub- Ra + Ra lishing company (Japanese) L L C = d q ································ (A13) 1 2 Appendix 2 2 Ra Ra 4ωre − + The predictive control of DC-link current using predic- Ld Lq C = ·················· (A14) tive DC-link current curves is based on the IPMSM discrete 2 2

402 IEEJ Journal IA, Vol.8, No.3, 2019 Predictive Direct DC-link Current Control for Harmonics Suppression（Yousuke Akama et al.）

Ra − C Kiyoshi Ohishi (Fellow) received the B.E., M.E., and Ph.D. degrees Lq 1 C11 = ······························ (A15) in electrical engineering from Keio University, Yoko- C2 hama, Japan, in 1981, 1983, and 1986, respectively. Lq Since 1993, he has been with Nagaoka University of ωre Ld Technology, Niigata, Japan. He became a Professor C12 = ································ (A16) C2 in 2003. His research interests include motion con- Ld trol, mechatronics, robotics and power electronics. ωre Lq He received twice ”IEEJ Distinguished Paper Award” C21 = − ······························· (A17) C2 from IEEJ in 2002 and 2009, respectively. He is also Ra an IEEE Fellow member. From 2004, he has been an − C1 = Ld ······························ AdCom Member of IEEE Industrial Electronic Society (IES). He received C22 (A18) the Outstanding Paper Awards at IECON’85 from IEEE IES. Moreover, he C2 received the Best Paper Awards at IECON2002 and IECON2004 from IEEE IES, respectively. He was a General chair of IEEE IECON2015 and IEEE AMC2010, AMC2016 and AMC2018.

Yuki Yokokura (Member) received the B.E. and M.E. degrees in electrical engineering from Nagaoka University of Tech- Yousuke Akama (Non-member) received the B.S. degree in Electri- nology, Niigata, Japan, in 2007 and 2009, respec- cal, Electronics and Information Engineering from tively. In 2011, he received Ph.D. degree in integrated Nagaoka University of Technology, Nagaoka, Japan. design engineering from Keio University, Yokohama, in 2016. Now he is a candidate of the M.S. degree in Japan. From 2010 to 2011, he was a Japan Society Electrical, Electronics and Information Engineering for the Promotion of Science (JSPS) Research Fel- from Nagaoka University of Technology, Nagaoka, low. He was a Visiting Fellow at Keio University, and Japan. His research interests include power electron- a Postdoctoral Fellow at Nagaoka University of Tech- ics. He is a student member of the Institute of Elec- nology in 2011. Since 2012, he has been an Assistant trical Engineers of Japan (IEEJ). Professor with Nagaoka University of Technology. His research interests include motion control, motor drive, powerelectronics, and real-world haptics.

Kodai Abe (Member) received the B.E. degree in Production Sys- Koji Kobayashi (Member) received the B.S. degree in material tems Engineering from the Akita National College science from Toyohashi University of Technology, of Technology, Akita, Japan, in 2013. He received Aichi, Japan in 1988. He is currently with Sanden the M.E. and Ph.D. degrees in energy and environ- Advanced Technology Corporation, Gunma, Japan. mental science from the Nagaoka University of Tech- His research interests include motor drive and power nology, Niigata, Japan, in 2015 and 2018. Since electronics. 2018, he has been an Assistant Professor with the Tokyo Metropolitan College of Industrial Technol- ogy, Tokyo, Japan. His research interests include power electronics.

Yushi Araki (Student Member) received the B.S. degree in Produc- Tatsuki Kashihara (Member) recieved the B.E. and M.E. degrees in tion Systems Engineering from the National Institute information engineering from Maebashi Institute of of Technology, Akita College, Akita, Japan in 2017. Technology, Gunma, Japan, in 2005 and 2007. He is Now he is a candidate of the M.S. degree in Elec- currently with Sanden Advanced Technology Corpo- trical, Electronics and Information Engineering from ration, Gunma, Japan. His research interests include Nagaoka University of Technology, Nagaoka, Japan. motor drive and power electronics. His research interests include power electronics.

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