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MP Further Protections up Protection Kernel Control Path Accessing the DS CCChahahaptptpteeerrr 555 KKKeeerrrnnneeelll SSSyyynnnccchhhrrrooonnniiizzzaaatttionionion Hsung-Pin Chang Department of Computer Science National Chung Hsing University PDF created with FinePrint pdfFactory Pro trial version www.pdffactory.com Outline • Kernel Control Paths • When Synchronization Is Not Necessary • Synchronization Primitives • Synchronizing Accesses to Kernel Data Structure • Examples of Race Condition Prevention PDF created with FinePrint pdfFactory Pro trial version www.pdffactory.com Kernel Control Paths • Kernel control path – A sequence of instructions executed by the kernel to handle kernel requests of different kinds – Each kernel request is handled by a different kernel control path PDF created with FinePrint pdfFactory Pro trial version www.pdffactory.com Kernel Control Paths (Cont.) • Kernel requests may be issued in several possible ways – A process executing in User Mode causes an exception-for instance, by executing at int0x80 instruction – An external devices sends a signal to a Programmable Interrupt Controller PDF created with FinePrint pdfFactory Pro trial version www.pdffactory.com Kernel Control Paths (Cont.) – A process executing in Kernel Mode causes a Page Fault exception – A process running in a MP system and executing in Kernel Mode raises an interprocessorinterrupt PDF created with FinePrint pdfFactory Pro trial version www.pdffactory.com Kernel Control Paths (Cont.) • Kernel control path is quite similar to the process, except – Does not have a process descriptor – Not scheduled through scheduler • By inserting sequence of instructions into the kernel code PDF created with FinePrint pdfFactory Pro trial version www.pdffactory.com Kernel Control Paths (Cont.) • In some cases, the CPU interleaves kernel control paths when one of the following event occurs – A process switch occurs, i.e., when the schedule() function is invoked – An interrupt occurs while the CPU is running a kernel control path with interrupt enabled – A deferrable function is executed PDF created with FinePrint pdfFactory Pro trial version www.pdffactory.com Kernel Control Paths (Cont.) • Thus, some kernel data structures must be protected to prevent race condition – The code to modify these data structures must be in a critical section PDF created with FinePrint pdfFactory Pro trial version www.pdffactory.com When Synchronization Is Not Necessary • Linux kernel is not preemptive – A running process cannot be preempted while it remains in Kernel Mode • As a result, in Linux – No process running in Kernel Mode may be replaced by another process, except when the former voluntarily relinquishes control of CPU PDF created with FinePrint pdfFactory Pro trial version www.pdffactory.com When Synchronization Is Not Necessary (Cont.) – Interrupt, exception or softirqhandling can interrupt a process running in Kernel Mode, for example, system calls • However, when the handler terminates, kernel control path of the process is resumed – A process control path performing interrupt handling cannot be interrupted by a kernel control path executing a deferrable function or a system call service routine PDF created with FinePrint pdfFactory Pro trial version www.pdffactory.com When Synchronization Is Not Necessary (Cont.) • Thus, on uniprocessor – Kernel data structures that are not updated by interrupt, exception, or softirq handlers can be safely accessed • However, on MP, things are much more complicated • The rest describes what to do when synchronization is necessary PDF created with FinePrint pdfFactory Pro trial version www.pdffactory.com Synchronization Primitives • Atomic operations • Memory Barriers • Spin Locks • Read/Write Spin Locks • The Big Reader Lock • Semaphore • Read/Write Semaphores • Completions • Local Interrupt Disabling • Global Interrupt Disabling • Disabling Deferrable Functions PDF created with FinePrint pdfFactory Pro trial version www.pdffactory.com Synchronization Primitives (Cont.) Atomic operation Atomic read-modify-write ALL CPUs instruction to a counter Memory barrier Avoid instruction re-ordering Local CPU Spin lock Lock with busy wait ALL CPUs Semaphore Lock with blocking wait (sleep) ALL CPUs Local interrupt Forbid interrupt handling on a Local CPU disabling single CPU Local softirq Forbid deferrable function Local CPU disabling handling on a single CPU Global interrupt Forbid interrupt and softirq ALL CPUs disabling handling on all CPUs PDF created with FinePrint pdfFactory Pro trial version www.pdffactory.com Atomic Operations • Some instructions are of type “read- modify-write” • If two such instructions are non-atomic that issued by two CPUs to access the same location – Memory arbiter may assign memory to the second one while the first one has not yet been completed – Race condition PDF created with FinePrint pdfFactory Pro trial version www.pdffactory.com Atomic Operations (Cont.) • To prevent race conditions – Provide operations that are atomic at chip level – Thus, cannot be interrupted in the middle and avoid access to the same memory location by other CPUs • Atomic operations acts as base of other, more flexible mechanisms to create critical sections PDF created with FinePrint pdfFactory Pro trial version www.pdffactory.com Atomic Operations (Cont.) • 80x86 instructions that are atomic – Instructions that make zero or one aligned memory access – Read-modify-write, e.g., inc or dec, are atomic if no other processor has taken the memory bus in the middle • In a uniprocessor, no memory bus stealing PDF created with FinePrint pdfFactory Pro trial version www.pdffactory.com Atomic Operations (Cont.) – Read-modify-write instruction whose opcodeis prefixed by the lock byte (0xf0) are atomic even on MP • Control unit (CU) lock the memory bus until the instruction is completed – Instructions whose opcodeis prefixed by a rep (0xf2) byte is not atomic • Rep: CU repeat the same instructions several times • CU check pending interrupts before a new iteration PDF created with FinePrint pdfFactory Pro trial version www.pdffactory.com Atomic Operations (Cont.) • We don’t know whether the compiler will use a single, atomic instruction for an operation, e.g., a++; • Linux thus provides – Atomic_t data type • 24-bit atomically accessible counter – atmoicoperations • Table 5-2 and 5-3 PDF created with FinePrint pdfFactory Pro trial version www.pdffactory.com Table 5-2. Atomic Operations in Lunux Function Description atomic_read(v) Return *v atomic_set(v, i) Set *v to i atomic_add(i, v) Add i to *v atomic_sub(i, v) Subtract i from *v atomic_sub_and_test(i, v) Subtract i from *v and return 1 if the result is zero, 0 otherwise atomic_inc(v) Add 1 to *v atomic_dec(v) Subtract 1 from *v atomic_dec_and_test(v) Subtract 1 from *v and return 1if the result is zero, 0 otherwise PDF created with FinePrint pdfFactory Pro trial version www.pdffactory.com Memory Barriers • Compiler may optimizing the code – Reorder the execution of instructions • However, for synchronization – Instructions reordering must be avoided – In fact, all synchronization primitives act as memory barriers PDF created with FinePrint pdfFactory Pro trial version www.pdffactory.com Memory Barriers (Cont.) • A memory barriers primitives ensures that – The operations placed before the primitives are finished before starting the operations placed after the primitives – Like a firewall that cannot be passed by any outside instructions PDF created with FinePrint pdfFactory Pro trial version www.pdffactory.com Memory Barriers (Cont.) • The following 80x86’s instructions are “serializing” because they act as memory barriers – Instructions operate on I/O ports – Instructions perfixedby the lock type – Instructions that writes to control registers, system registers, or debug registers – A few special instructions, e.g., iret PDF created with FinePrint pdfFactory Pro trial version www.pdffactory.com Memory Barriers in Linux • Linux uses six memory barrier primitives – See the next slides • Memory barriers are useful both in MP and in uniprocessorsystems PDF created with FinePrint pdfFactory Pro trial version www.pdffactory.com Memory Barriers in Linux Macro Description mb() Memory barrier for MP and UP rmb() Read memory barrier for MP or UP wmb() Write memory barrier for MP and UP smp_mb() Memory barrier for MP only, do nothing for UP smp_rmb() Read memory barrier for MP only, do nothing for UP smp_wmb() Write memory barrier for MP only, do nothing for UP PDF created with FinePrint pdfFactory Pro trial version www.pdffactory.com Linux Implementation of Memory Barrier • Depends on system architecture • On the Intel platform – rmb() expands to • asmvolatile(“lock; addl$0,0(%%esp)”:::”memory”) – asm: tell the compiler to insert some assembly languages – volatile: forbid the compiler to reorder the asm instruction with other instructions – lock prefix makes the instruction a memory barrier PDF created with FinePrint pdfFactory Pro trial version www.pdffactory.com Spin Locks • Spin locks are a special kind of lock designed to work in a MP system – If the lock is closed, spin around, i.e., repeatedly executing a tight loop, until the lock is released – Useless in a UP system • The waiting kernel control path would keep running, and the holding kernel control path have no chance to release the lock PDF created with FinePrint pdfFactory Pro trial version www.pdffactory.com Spin Locks (Cont.) • Spin locks are useful since many kernel resources are locked for a fraction of milliseconds only – Thus, it would be far more time- consuming to release the CPU and reacquire
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