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IAR J-Link and IAR J-Trace User Guide

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IAR J-Link and IAR J-Trace User Guide IAR J-Link and IAR J-Trace User Guide for JTAG Emulators for ARM Cores J-Link/J-TraceARM-1 COPYRIGHT NOTICE © Copyright 2006 IAR Systems. All rights reserved. No part of this document may be reproduced without the prior written consent of IAR Systems. The software described in this document is furnished under a license and may only be used or copied in accordance with the terms of such a license. DISCLAIMER The information in this document is subject to change without notice and does not represent a commitment on any part of IAR Systems. While the information contained herein is assumed to be accurate, IAR Systems assumes no responsibility for any errors or omissions. In no event shall IAR Systems, its employees, its contractors, or the authors of this document be liable for special, direct, indirect, or consequential damage, losses, costs, charges, claims, demands, claim for lost profits, fees, or expenses of any nature or kind. TRADEMARKS IAR Systems, From Idea to Target, IAR Embedded Workbench, visualSTATE, IAR MakeApp and C-SPY are trademarks owned by IAR Systems AB. ARM and Thumb are registered trademarks of Advanced RISC Machines Ltd. Microsoft and Windows are registered trademarks of Microsoft Corporation. Intel and Pentium are registered trademarks and XScale a trademark of Intel Corporation. All other product names are trademarks or registered trademarks of their respective owners. EDITION NOTICE First edition: June 2006 Part number: J-Link/J-TraceARM-1 J-Link/J-TraceARM-1 Contents Contents Contents ................................................................................................................. 3 Introduction .......................................................................................................... 7 About this document .............................................................................. 7 Typographic conventions ..................................................................... 7 Literature and references ..................................................................... 7 J-Link overview .......................................................................................... 7 Features of J-Link ................................................................................ 7 J-Trace overview ....................................................................................... 8 Features of J-Trace ............................................................................... 8 Test environment ................................................................................. 8 Specifications .............................................................................................. 9 Specifications for J-Link ...................................................................... 9 Specifications for J-Trace .................................................................... 9 Download speed ................................................................................. 10 Requirements ........................................................................................... 10 Setup ....................................................................................................................... 11 Installing the J-Link USB driver ........................................................ 11 Verifying correct driver installation .................................................. 12 Uninstalling the J-Link USB driver .................................................. 13 Connecting the target system .......................................................... 15 Power-on Sequence ............................................................................ 15 Verifying target device connection .................................................... 15 Problems ............................................................................................ 16 Scan chain configuration ..................................................................... 16 Sample configuration dialog boxes .................................................... 16 Determining values for scan chain configuration .............................. 17 JTAG Speed .............................................................................................. 18 Fixed JTAG speed ............................................................................. 18 Automatic JTAG speed ...................................................................... 18 Adaptive clocking .............................................................................. 19 J-Link and J-Trace related software ......................................................... 21 Summary of available software packages .................................... 21 Free software (www.segger.com) ................................................... 21 JLinkARM.dll (J-Link / J-Trace use with third-party programs) ...... 21 JLink.exe (Command line tool) ......................................................... 23 J-Link TCP/IP Server (Remote J-Link / J-Trace use) ........................ 24 J-Mem Memory Viewer ..................................................................... 24 Additional software (Requires license) ......................................... 24 J-Flash ARM (Program flash memory via JTAG) ............................. 25 RDI Support ....................................................................................... 25 Additional software packages ........................................................... 26 J-Link Software Developer Kit (SDK) .............................................. 27 J-Link Flash Software Developer Kit (SDK) .................................... 27 JTAGLoad (Command line tool) ....................................................... 27 J-Link/J-TraceARM-1 3 Working with J-Link and J-Trace .............................................................. 29 Supported ARM Cores ......................................................................... 29 Reset strategies ....................................................................................... 29 Reset strategies in detail .................................................................... 29 Cache handling ........................................................................................ 30 Cache coherency ................................................................................ 30 Cache clean area ................................................................................ 30 Cache handling of ARM7 cores ........................................................ 30 Cache handling of ARM9 cores ........................................................ 30 Connecting multiple J-Links / J-Traces to your PC .................. 31 How does it work? ............................................................................. 31 Configuring multiple J-Links / J-Traces ............................................ 31 Connecting to a J-Link / J-Trace with non default USB-Address ..... 33 Multi-core debugging ............................................................................ 33 How multi-core debugging works ..................................................... 33 Using multi-core debugging in detail ................................................ 34 Things you should be aware of .......................................................... 36 Multiple devices in the scan chain ................................................... 36 Configuration ..................................................................................... 36 Hardware ............................................................................................................. 37 JTAG Connector ..................................................................................... 37 Pinout ................................................................................................. 37 Target board design for JTAG ........................................................... 38 JTAG+Trace connector ....................................................................... 38 Connecting the target board ............................................................... 39 Pinout ................................................................................................. 39 Trace signals ...................................................................................... 40 RESET, nTRST ........................................................................................ 41 Adapters ..................................................................................................... 42 JTAG 14 pin adapter .......................................................................... 42 5 Volt adapter .................................................................................... 42 J-Link hardware versions ..................................................................... 43 How to determine the hardware version ............................................ 43 Differences between different versions ............................................. 44 Background information ............................................................................... 47 JTAG ............................................................................................................ 47 Test access port (TAP) ....................................................................... 47 Data registers ..................................................................................... 47 Instruction register ............................................................................
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