A WIRELESS ENERGY HARVESTING SYSTEM WITH BEAMFORMING CAPABILITIES
by Daniel Schemmel A thesis submitted to the Faculty and the Board of Trustees of the Colorado School of
Mines in partial fulfillment of the requirements for the degree of Master of Science (Electrical
Engineering).
Golden, Colorado
Date:
Signed: Daniel Schemmel
Signed: Dr. Payam Nayeri Thesis Advisor
Golden, Colorado
Date:
Signed: Dr. Atef Z. Elsherbeni Professor and Head Department of Electrical Engineering
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ABSTRACT
The development of the Internet of Things (IoT) using wireless motes has perpetuated the demand for self-sufficient electronics. Recently, this demand is being fulfilled with the development of wireless energy harvesters, which eliminates the need for power cords and the manual recharging or replacement of batteries. This work proposes an energy harvesting system for 5.8 GHz operation that utilizes an eight-element patch antenna array with a 20 dB Taylor taper that could be modified for beam scanning and focusing. The use of this array increases the receiver gain, and thus the rectifier efficiency, compared to harvesters with a single antenna. The major subsystems of the energy harvester, such as the antenna array, corresponding feed network, and multi-stage Dickson multiplier, are designed and simulated in software. The outlined design procedure for each of these subsystems is intended to serve as a guide and starting point for future wireless energy harvesting designs.
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TABLE OF CONTENTS
ABSTRACT ...... iii LIST OF FIGURES ...... v LIST OF TABLES ...... ix ACKNOWLEDGMENTS ...... x CHAPTER 1 INTRODUCTION ...... 1 CHAPTER 2 RECTIFIER DESIGN ...... 3 2.1 Background and Previous Work ...... 3 2.2 Rectifier Theory ...... 9 2.3 Matching Network Theory ...... 12 2.4 Rectifier Design and Simulation ...... 17 2.5 Testing and Design ...... 23 CHAPTER 3 PATCH ANTENNA ARRAY DESIGN ...... 32 3.1 Patch Antenna Design ...... 32 3.2 Antenna Array Design ...... 44 3.3 Array Scanning ...... 49 CHAPTER 4 FEED NETWORK DESIGN ...... 53 4.1 Design Specification ...... 53 4.2 Feed Network Theory ...... 54 4.3 Feed Network Design and Simulation ...... 55 4.4 Optimization ...... 62 CHAPTER 5 CONCLUSION AND FUTURE WORK ...... 65 5.1 Conclusion ...... 65 5.2 Smart Energy Harvesting System ...... 65 REFERENCES ...... 67
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LIST OF FIGURES
Fig 2.1 (Figure Caption) Half-wave rectifier ...... 4
Fig 2.2 (Figure Caption) Typical rectenna with single diode topology ...... 5
Fig 2.3 (Figure Caption) Greinacher voltage doubler ...... 6
Fig 2.4 (Figure Caption) Two-stage Villard multiplier [19] ...... 7
Fig 2.5 (Figure Caption) Original Dickson charge pump [20] ...... 8
Fig 2.6 (Figure Caption) Two-stage Dickson multiplier [19] ...... 8
Fig 2.7 (Figure Caption) Equivalent circuit model of Schottky diode [1] ...... 12
Fig 2.8 (Figure Caption) L-network for [33] ...... 14
Fig 2.9 (Figure Caption) Example Pi-network � < [32] ...... 14
Fig 2.10 (Figure Caption) Chosen L-network topology [32] ...... 16
Fig 2.11 (Figure Caption) Output DC voltage as a function of input power for multiple Dickson multipliers ...... 18
Fig 2.12 (Figure Caption) Magnitude of S11 for two, four, and seven-stage multipliers without a matching network ...... 19
Fig 2.13 (Figure Caption) Magnitude of S11 for the matched two-stage multiplier ...... 19
Fig 2.14 (Figure Caption) Efficiency of two, four, seven-stage and matched two-stage rectifiers ...... 21
Fig 2.15 (Figure Caption) Efficiency using a parametric sweep over load resistance for multiple L-matching networks ...... 22
Fig 2.16 (Figure Caption) ADS schematic of the optimized two-stage Dickson multiplier with L-matching network ...... 22
Fig 2.17 (Figure Caption) Four-stage Dickson charge pump constructed on a breadboard .....23
Fig 2.18 (Figure Caption) Equipment setup for the four-stage Dickson multiplier voltage measurements ...... 24
Fig 2.19 (Figure Caption) Measured and simulated results for the four-stage Dickson multiplier ...... 25
Fig 2.20 (Figure Caption) Wireless power experimental setup for the four-stage Dickson multiplier ...... 26
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Fig 2.21 (Figure Caption) Rectified voltage as a function of separation distance from transmitter for the four-stage Dickson multiplier ...... 26
Fig 2.22 (Figure Caption) Fabricated seven-stage Dickson multiplier ...... 27
Fig 2.23 (Figure Caption) Simulated and measured rectified voltage for seven-stage Dickson multiplier ...... 28
Fig 2.24 (Figure Caption) Rectified voltage as a function of separation distance from transmitter for the seven-stage Dickson multiplier ...... 28
Fig 2.25 (Figure Caption) Fabricated two-stage Dickson multiplier ...... 29
Fig 2.26 (Figure Caption) Measured and simulated results for the two-stage Dickson multiplier ...... 30
Fig 2.27 (Figure Caption) Measured rectified voltages for all fabricated rectifiers ...... 31
Fig 2.28 (Figure Caption) Fabricated two-stage Dickson multiplier with L-matching network ...... 31
Fig 3.1 (Figure Caption) Dimetric view of the designed patch in HFSS...... 36
Fig 3.2 (Figure Caption) Side view of the designed patch in HFSS ...... 36
Fig 3.3 (Figure Caption) Project variables in HFSS used to define the geometry of the patch ...... 36
Fig 3.4 (Figure Caption) Excitation of the patch located at the end of the coaxial connector ...... 37
Fig 3.5 (Figure Caption) Close up of the excitation of the patch showing the integration line ...... 38
Fig 3.6 (Figure Caption) Magnitude of S11 for the first parametric study for the patch design in HFSS ...... 39
Fig 3.7 (Figure Caption) Magnitude of S11 for the second parametric study for the patch design in HFSS ...... 39
Fig 3.8 (Figure Caption) Magnitude of S11 for the final parametric study for the patch design in HFSS ...... 40
Fig 3.9 (Figure Caption) Magnitude of S11 for the final patch design ...... 41
Fig 3.10 (Figure Caption) Total realized gain of the final patch design as a function of frequency ...... 41
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Fig 3.11 (Figure Caption) 3D radiation plot of the designed patch showing the total realized gain ...... 42
Fig 3.12 (Figure Caption) 2D radiation plot showing the total realized gain patterns for the designed patch in the x-z (Phi = 0o) and y-z (Phi = 90o) planes ...... 42
Fig 3.13 (Figure Caption) Magnitude of the electric field on the designed patch (top view) ...... 43
Fig 3.14 (Figure Caption) Magnitude of the electric field on the designed patch (side view) ...... 43
Fig 3.15 (Figure Caption) Magnitude of the electric surface current density on the designed patch (top view) ...... 44
Fig 3.16 (Figure Caption) Model of the rectangular patch array in HFSS ...... 45
Fig 3.17 (Figure Caption) Magnitude of the reflection coefficients for each port of the array ...... 45
Fig 3.18 (Figure Caption) 2D realized gain patterns for the uniform taper patch array in the x-z (Phi = 0o) and y-z (Phi = 90o) planes ...... 47
Fig 3.19 (Figure Caption) 2D realized gain patterns for the 20 dB Taylor taper patch array in the x-z (Phi = 0o) and y-z (Phi = 90o) planes ...... 48
Fig 3.20 (Figure Caption) 3D radiation plot of the 20 dB Taylor taper patch array showing the total realized gain pattern ...... 48
Fig 3.21 (Figure Caption) Magnitude of the electric surface current density for the uniform taper patch array ...... 49
Fig 3.22 (Figure Caption) Magnitude of the electric surface current density for the Taylor taper patch array ...... 49
Fig 3.23 (Figure Caption) Array factor for linear eight-element array for uniform and 20 dB Taylor tapers ...... 50
Fig 3.24 (Figure Caption) 2D radiation plot showing the total realized gain pattern for the 20 dB Taylor taper patch array in the x-z (Phi = 0o) and y-z (Phi = 90o) planes scanned to 30o ...... 51
Fig 3.25 (Figure Caption) 3D radiation plot of the 20 dB Taylor taper patch array showing the total realized gain pattern scanned to 30o...... 51
Fig 3.26 (Figure Caption) Magnitude of the electric surface current density for the 20 dB Taylor taper patch array scanned to 30o ...... 52
Fig 4.1 (Figure Caption) Diagram of single output and eight-input feed network ...... 54 vii
Fig 4.2 (Figure Caption) First stage of power divider ...... 57
Fig 4.3 (Figure Caption) Second stage of power divider ...... 58
Fig 4.4 (Figure Caption) Third stage (3.a) of power divider connected to port 2 of stage 3 ...... 60
Fig 4.5 (Figure Caption) Third stage (3.b) of power divider connected to port 3 of stage 3 ...... 60
Fig 4.6 (Figure Caption) Complete feed network with 20 dB Taylor power distribution ...... 62
Fig 4.7 (Figure Caption) Magnitude of the electric surface current density for the optimized feed network ...... 64
Fig 5.1 (Figure Caption) Proposed smart energy harvesting system ...... 66
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LIST OF TABLES
Table 3.1 (Title Caption) 20 dB Taylor voltage weights used for eight-element array ...... 47
Table 4.1 (Title Caption) Stage 1 forward transmission coefficients at 5.8 GHz ...... 57
Table 4.2 (Title Caption) Stage 2 forward transmission coefficients at 5.8 GHz ...... 59
Table 4.3 (Title Caption) Stage 3.a forward transmission coefficients at 5.8 GHz ...... 60
Table 4.4 (Title Caption) Stage 3.b forward transmission coefficients at 5.8 GHz ...... 61
Table 4.5 (Title Caption) Reflection coefficients for each stage at 5.8 GHz ...... 61
Table 4.6 (Title Caption) Transmission coefficients of feed network at 5.8 GHz ...... 62
Table 4.7 (Title Caption) Transmission coefficients of optimized feed network at 5.8 GHz ....64
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ACKNOWLEDGMENTS I would like to thank my committee members including Dr. Tim Ohno, Dr. Randy Haupt, and Dr. Payam Nayeri for their support and help with completing this thesis. I would also like to give a special thanks to Dr. Nayeri for all of his technical help as well as always being a source of encouragement and positivity. Dr. Nayeri is an exceptional professor and I am very grateful to have had him as my advisor and mentor.
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To my mom.
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CHAPTER 1 INTRODUCTION
Wireless transmission of energy has no bounds. In wireless power transfer, a transmitter connected to a power source beams the energy to one or more receivers wirelessly, where it is converted back to an electrical current and then used. With the birth of the Internet of Things (IoT) and the growing popularity and applications of largescale, sensor-based wireless networks, the need to adopt inexpensive, green communications strategies is of paramount importance. Most of these devices need to operate without batteries, and as such require an energy harvesting circuit that captures the wireless power.
An energy harvesting system can be decomposed into three main subsystems. The first subsystem is responsible for energy capture. For a wireless energy harvester, energy capture is usually accomplished using coils for inductive coupling or antennas for far-field power transfer.
The captured energy is typically not useable in its harvested form. Thus, the second main subsystem of an energy harvester is responsible for conditioning the received power into power that is usable. Since most devices require a DC power supply, the received AC signal is typically converted to DC using a rectifier. Once the rectified energy is available it must be properly stored for later use. The energy storage of a wireless energy harvester is the final subsystem and it is especially important due to the low input powers that are usually available.
To improve the efficiency and maximize harvested power, each of these three subsystems can be optimized. When considering the propagation of the energy to the harvester, efficient power transfer is achieved by selecting an appropriate scheme which is dependent on the distance between the receiver (Rx) and transmitter (Tx). In the reactive near-field zone, power is transferred via magneto-inductive coupling. At further distances, typically antennas are used to transmit the power into the far-field. For each of these regions of operation, the system efficiency can be improved by
1 using an antenna array that is capable of scanning and beam focusing. The other subsystems, such as the rectifier and energy storage, can be further improved by selecting the appropriate rectifying element and topology as well using an energy storage device suited for the application.
This work focuses on the design and simulation of the receiver and rectifying subsystems of an energy harvester operating at 5.8 GHz with the goal of improving the efficiency of current harvesting topologies. Since the heart of almost all wireless energy harvesters is the rectifier, this subsystem is discussed first with an emphasis on current rectifier technology and theory. The discussion of the rectifier is followed by the design of the receiver, which will be implemented with an eight-element rectangular patch antenna array with a 20 dB Taylor taper. Thus, the design of an eight-input single output microstrip feed network is included as an additional subsystem that interfaces the rectifier to the antenna array. The paper concludes by purposing a smart energy harvester design that utilizes the presented subsystems.
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CHAPTER 2
RECTIFIER DESIGN
2.1 Background and Previous Work
A central function of any RF energy harvester is the ability to convert an RF signal into useable DC power. This ability is motivated by the trend of most devices, especially hand-held electronics and wireless motes, being powered by a battery for enhanced portability. The subsystem responsible for AC to DC conversion in an energy harvesting device is known as a rectifier. In the literature, many different types of rectifiers are employed for energy conversion with each offering their own advantages and tradeoffs for a particular application. The choice of rectifier is usually dependent on factors such as available input power, efficiency constraints, load requirements, device size, and design complexity. For an energy harvesting system, available input power and efficiency are usually the predominant design considerations. Each of the most common rectifier topologies will be introduced along with example applications. The theory of the chosen rectifier topology will then be explained in detail. This is followed by an explanation of the theory for the corresponding matching network and the modeling and design of the overall rectifying system. The chapter concludes with a presentation and analysis of the measured results.
The most fundamental rectifier topology is the half-wave rectifier. As shown in Fig. 2.1, the half-wave rectifier consists of a series diode followed by a shunt capacitor. The load of the rectifier is placed in parallel with the capacitor. The operation of the circuit is centered on the nonlinear properties of the diode. When applying an AC voltage on the anode of the diode, the diode will conduct during the positive portion of the cycle. If an ideal diode is assumed with an infinite breakdown voltage and constant threshold voltage , the capacitor will charge to a peak voltage of , where is the peak voltage of the input AC signal. When the voltage drop