www.epitools.com DUP#ᇚ⇚ⵣ␂#MWDJ#⮎Ⅺ᷆ⴲ㛮#)#≂ሮ#DUP#ᇚ⇚ⵣ␂#MMWDJ#⮎Ⅺ᷆ⴲ㛮#)#≂ሮ# EPI Development Environments for ARM
Any GDB/Linux Microsoft Microcross GNU and IAR Systems ARM & 3rd Party ARM & 3rd Party Tool Kits Platform Builder Visual X-Tools RDI-compliant Tools RDI-compliant Tools Compilation Tools
Any Microsoft® ARM & ARM & GDB/Linux Platform 3rd Party 3rd Party Software Builder GNU and RDI- Compiler Tool Kits 3.0 to 4.x Visual X-Tools Embedded compliant Tools Workbench Software GDB eXDI GDB COFF for ARM Tools Remote API Remote ECOFF Protocol EPI eXDI Driver Protocol EPI DWARF & Plug-in MDIserver MDIserver ARM ARM STABS EPI EPI EPI RDI RDI MDI MDI MDI API API EPI EDB API API API Debugger MDI Lib MDI Lib MDI Lib RDI Lib RDI Lib 10/100 10/100 10/100 10/100 10/100 10/100 BaseT BaseT BaseT BaseT BaseT BaseT
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EPI Development Environments for MIPS
Any GDB/Linux Microsoft Microcross GNU and 3rd Party 3rd Party Tool Kits Platform Builder Visual X-Tools MDI-compliant Tools Compilation Tools
Any Microsoft® 3rd Party 3rd Party GDB/Linux Platform MIPS MIPS Software Builder GNU and MDI- Compiler Tool Kits 3.0 to 4.x Visual X-Tools compliant Tools Software GDB eXDI GDB COFF Tools Remote API Remote ECOFF Protocol EPI eXDI Driver Protocol EPI DWARF & Plug-in MDIserver MDIserver EPI STABS EPI EPI EPI MDI MDI MDI MDI API EPI EDB API API API Debugger MDI Lib MDI Lib MDI Lib MDI Lib 10/100 10/100 10/100 10/100 10/100 Bas eT Bas eT Bas eT Bas eT Bas eT
EDB, EPI, MAJIC and Virtual.One.Stop are trademarks or registered trademarks of Embedded P erformance, Inc. *Other names/brands may be claimed as the property of others. TM Embedded Performance, Inc. Virtual.One.Stop Development Environments www.epitools.com [Vfdoh#MWDJ#⮎Ⅺ᷆ⴲ㛮#)#Lqwho#VGW#㒲㣊ⴺᶪ[Vfdoh#MWDJ#⮎Ⅺ᷆ⴲ㛮#)#Lqwho#VGW#㒲㣊ⴺᶪ
EPI Development Environments for XScale
Any GDB/Linux Microsoft Intel C++ Software ARM & 3rd Party ARM & 3rd Party Tool Kits Platform Builder Development Tool Suite RDI-compliant Tools Compilation Tools
Any Microsoft® Intel® C++ ARM & ARM & GDB/Linux rd rd Platform Software 3 Party 3 Party Software Builder Compiler Development RDI- Tool Kits 3.0 to 4.x compliant Tools Tool Suite Software GDB eXDI COFF Tools Remote API XDB ECOFF Protocol EPI eXDI Drive Debugger DWARF & Plug-in MDIserver Interface ARM STABS EPI EPI RDI MDI MDI API EPI EPI EDB API API Debugger MDI Lib MDI Lib XDB-MAJIC RDI Lib 10/100 10/100 10/100 10/100 10/100 Bas eT Bas eT Bas eT Bas eT Bas eT
EDB, EPI,MAJIC and Virtual.One.Stop are trademarks or registered trademarks of Embedded Performance, Inc. *Other names/brands may be claimed as the property of others. TM Embedded Performance, Inc. Virtual.One.Stop Development Environments ARM / Xscale / Mips ࿋Ή⭔⇳GJTAG ⥿Ὓ᮷⬣㓟 OtVVhytⵯ⩿GP
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MAJIC III™ JTAG Emulator : · Non-intrusive, uses no target resources · Supports specific on- chip debug interfaces · Supports specific CPU core (s ) · Supports on-chip hardware breakpoints · Unlimited software breakpoints · Programmable JTAG clock · Ethernet, USB and serial I/O ports for fast, flexible host interface · High speed download of application code Network compatibility allows shared and remote operation · < MODEL : MAJIC III > · Internal RISC processor provides intelligent target control MDI Meta Debugger Interface (for MIPS, Internal Flash memory for easy firmware update · ARM and XScale tools) Sleep-mode support (Except for Intel ® XScale™ CPU cores) · RDI Remote Debugger Interface (ARM) · LEDs display operation status eXDI for Platform Builder ARM/Xscale/Mips · MDIserver translates GDB remote to MDI · Manufacture : EPI Inc (USA) debug service requests to MAJIC III™
Major features of the MAJIC III ™ include:
Ethernet Interface Choice of Configuration Kits S pecifications: The 10Base-T/100Base-T E thernet interface You may configure the MAJICIII™ to support MAJ IC III™ provides many advantages over serial or one or more of the supported combinations parallel interfaces to the host. Download of of C P U core and on-chip debug interface. JTAG clock(TCK): 0to10MHz, your application code is over ten times faster E ach configuration kit includes the firmware, programmable than with serial interface. This will user license and interconnections necessary Download speed: >100k bytes/sec significantly reduce the amount of time spent to s upport the C P U that you have chos en. (typical) waiting for code changes to download to your P lease refer to the C onfiguration Kit data Target voltage: 3.3V target board. sheet for detailed specifications on the CPUs Serialinterface: R S 232C Network connection allows remote operation and on-chip interfaces currently supported. 1900-115.2k baud of the MAJICIII™. Now you can access the Programmable JTAG Clock E thernet interface: 10/100base-T, lab setup directly from your desktop. This The MAJICIII™ features a programmable TCP/IP allows multiple engineers to share a common TC K with a 0 to 10 MHz range. This allows USB: USB 2.0 (Ethernet-to-USB test bench. you to tailor the J TAG operation to match the Adapter – R efer to Application Note) Flash Memory performance of your target. It also means Indicator LE Ds: Power, status, Ethernet The MAJICIII™ firmware is easily upgraded that you can use the MAJICIII™ with low Size: 2.0 H x 7.4 W x 6.5 L without the need to replace R O Ms . speed ASIC emulators, with FPGA (inches) implementation of your S oC design, or with Weight: 1.5 lbs Install new configuration kits easily and devices that feature sleep mode operation. Input power: 9 VDC +/- 5%, 2.0 A quickly to add support for multiple C P U types P ower connector: 1.7 mm coaxial, with a simple firmware upgrade. Convenient Reset Switch A convenient reset button on the MAJICIII™ center positive, male Use the simple program provided to is protected against accidental activation, yet Temperature: Operating automatically program the updated firmware is easily accessible by the user when a 0 - 40 degrees C into the on-board flash memory. complete system reset is desired. Humidity: Operating Flash memory also makes it easy to program 15% - 95% R H an IP address into the MAJICIII™ for point- International Power S upply External AC Adapter to-point E thernet connection to a P C or The MAJICIII™ operates from a standard 5V workstation. power source. It comes with an external Output: 9 VDC, 2.0 A Internal RISC Processor UL/CE approved AC adapter whose AC input Input voltage: 90 - 264 VAC The use of a high performance internal R IS C range is compatible with all international AC Input frequency: 47 - 63 Hz processor allows fast response to debugger voltage and frequency ranges. A standard Input power: 0.6 A operations such as single-stepping and three-wire power connector is compatible Size: 1.1/8 Hx1.7/8 Wx4.25 L downloading of application code to the target. with readily available power cords through (inches) Status LEDs the world. Weight: 6 oz The MAJICIII™ provides two LEDs, which C ompliance: UL, CUL, CE, s how the operational s tatus of the emulator. TUV AC connector: E N 60320/13 DC connector: 1.7 mm coaxial, center positive, female
E mbedded Performance, Inc. E mbedded P erformance, Inc. MAJIC™ Multi-processor Advanced JTAG Interface Controller
MAJIC Development System Features: • Ideal for SoC based applications • Non-intrusive, uses no target resources • Supports a wide choice of on-chip debug interfaces • Supports a wide variety of CPU cores • Supports on-chip hardware breakpoints • Unlimited software breakpoints • Programmable JTAG Clock (TCK=0to40MHz) • Programmable trigger-in and trigger-out connections • Ethernet and Serial I/O Ports for fast, flexible host interface • High speed download (>200k bytes per second) of application code MAJIC • Network compatibility allows shared and remote operation • Sleep-mode support • Internal RISC Processor assures fast operation • LED’s display operation status • Flash Memory for easy firmware updates to support for additional CPU cores or on-chip debug interfaces. • Open API for debugger interface • • External AC adapter compatible with all international power sources EDB integrated debugger • Support Risc : Xscale / ARM / MIPS
Major features of the MAJIC include: Ethernet Interface Choice of Configuration Kits Specifications: The 10base-T/100base-T Ethernet You may configure the MAJIC to support interface provides many advantages over one or more of the supported combinations MAJIC serial or parallel interfaces to the host. of CPU core and on-chip debug interface. JTAG clock(TCK): 0 to 40 MHz Download of your application code is over Each configuration kit includes the Programmable ten times faster than with serial interface. firmware, user license and interconnections Trace clock(DCK): 0 to 100MHz (MAJICPLUS) This will significantly reduce the amount of necessary to support the CPU that you Download Speed: >200k bytes/sec time spent waiting for code changes to have chosen. Please refer to the (Typical) download to your target board. Configuration Kit data sheet for detailed Target voltage: 1.8∼5.0V Network connection allows remote specifications on the CPUs and on-chip Serial interface: RS232C operation of the MAJIC. Now you can interfaces currently supported. 1900-115.2k baud access the lab setup directly from your Programmable JTAG Clock Ethernet interface: 10/100Base-T, desktop. This allows multiple engineers to The MAJIC features a programmable TCK TCP/IP share a common test bench. witha0to40MHzrange. This allows you to Triggers: Trigger input Trigger output Flash Memory tailor the JTAG operation to match the performance of your target. It also means Trigger Control The MAJIC firmware is easily upgraded Trigger In: Off, Run sync, Break without the need to replace ROMs. that you can use the MAJIC with low speed ASIC emulators or with devices that feature Trigger Out: Off, Run sync, Memory Install new configuration kits easily and sleep mode operation. access, Memory test quickly using the simple program provided. error You can add support for multiple CPU Convenient Reset Switch Trigger Levels: TTL types to the MAJIC with a simple firmware A convenient reset button on the MAJIC is Indicator LEDs: Power, Status, Run, upgrade. protected against accidental activation, yet Connect. Ethernet is easily accessible by the user when a New firmware updates will be available on Size: 2.0Hx7.4Wx6.5L complete system reset is desired. the our FTP site. Use the simple program (inches) Weight: 2.25 lbs provided to automatically program the Programmable Trigger Control Input power: 5 VDC +/- 5%, 4.0 A updated firmware into the on-board flash The MAJIC provides the user control over Power connector: 2.1 mm coaxial, memory. both the trigger-in and trigger-out signals. center positive, male The trigger-in signal may be used to create Flash memory makes it easy to program an Temperature: Operating a breakpoint or synchronize execution. A IP address into the MAJIC for point-to-point 0 - 40 degrees C trigger output may be set to define ethernet connection to a PC or workstation. Humidity: Operating execution status, indicate memory 15% - 95% RH Internal RISC Processor accesses, or indicate a memory test failure. The use of a high performance internal Safety/EMC CE International Power Supply RISC processor allows fast response to External AC Adapter debugger operations such as single The MAJIC operates from a standard 5V stepping, reading and writing memory, power source. It comes with an external Output: 5 VDC, 4.0 A reading and writing registers, and UL/CE approved AC adapter whose AC Input voltage: 90 - 264 VAC downloading of application code to the input range is compatible with all Input frequency: 47 - 63 Hz target. international AC voltage and frequency Input power: 0.8 A ranges. A standard three-wire power PLUS Size: 1.6Hx2.8Wx4.8L MAJIC Version Includes Trace connector is compatible with readily (inches) For a version that includes execution available power cords through the world. PLUS Weight: 10.3 oz tracing, see the MAJIC data sheet. Compliance: UL, CUL, CE, Status LEDs TUV The MAJIC provides five LEDs which show AC connector: EN 60320/13 the operational status of the emulator. DC connector 2.1 mm coaxial, These LEDs also indicate the results of the center positive, built-in self test that is automatically female performed upon startup.
E mbedded Performance, Inc. E mbedded P erformance, Inc. MAJICMX™ Multi-processor Advanced JTAG Interface Controller
® MAJICMX for Intel XScaleTM MicroArchitecture :
• Ideal for Intel XScale based applications • Supports the Intel PXA210/250 applications processors, IOP310/321 I/O processors, and IXP425/2400/2800 and IXP1100 Network processors, Bulverde • 10/100Base-T Ethernet and serial I/O ports for fast, flexible host interface • Supports the Intel XScale on-chip trace • Programmable JTAG clock (TCK = 2kHz to 40MHz) • Programmable trigger-in and trigger-out connections • Ethernet and serial I/O ports for fast, flexible host interface • High-speed download of application code • Network compatibility allows shared and remote operation • Works with EDB, or third party RDI 1.5.1 compliant debuggers MAJICMX • Wind River Tornado BackEnd Support • Non-intrusive, uses no target resources • Proven to work with Intel DBPXA250, IQ80310, IQ80321, • ADI 80200EVB, BRH Development Platform...etc. LEDs display operational status • Supports on-chip hardware breakpoints • Unlimited software breakpoints
EDB Source-level Debugger
Key Features of EDB: Extensive Set of GUI Debugger Window Types Compatible with a wide selection of compilers including: EPI, ARM, GNU-gcc, Mentor, Metaware, MontaVista-gcc, Wind River gcc and Diab. Sophisticated Breakpoint Control Features Supports the Most Extensive List of ARM, MIPS, and Intel XScale Cores in the Industry Customizable RTOS Support Extensible Debugger Command Language Multiple Context Support Integrated GUI Support for MAJIC Series Intelligent JTAG Debug Probes Integrated Execution Tracing Window with Source Code Annotation Application Access to Host I/O System via EPI-OS facility Flash Programming Utilities & Sample Files EDB features Integrated Trace Display Embedded Performance, Inc. Product Selection Guide
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MAJIC III MAJIC II MAJIC II MX MAJIC II PLUS
•Non- intrusive, needs no target resources •Idealfor SoC based applications •Supports on-chip hardware breakpoints Common •Unlimited software breakpoints Fe atures •ROMless booting •Ethernet & Serial I/O Ports • High speed download of application code •Shared and remote operation •Easy firmware updates via flash •LEDs display operation status
•All ARM cores, Qualcomm, OMAP •Broadcom 1100, 3310, 3310b, 3345, 3350, 3352, 3360, 6352, 7100 •IDT 32332, 32364, 32334, 32355 Cores •Intel Xscale PXA250, PXA210, i80200, IOP310, IOP321, Supported IXP425/2400/2800/2850, IXC1100, Bulverde •Philips PR1900, PR1910, PR3940 •Lexra 4180, 4189, 4280, 4380, 5180, 5280, 8000 •LSI Logic 4102, 4103 •MTI4kc,4km,4kp,5kc •Etc.
MX •10/ 100 base -T Ethernet / USB •10/ 100 base -T Ethernet / serial •Allthe MAJIC II • All the MAJIC II •Supports ARM synthesizable •Supports ARM synthesizable features, plus: cores features, plus: cores •Supports on-chip • ARM ETM/ Real Time •Programmable JTAG clock •Programmable JTAG clock trace buffers Debug Trace Support Other (2kHz to 10 M Hz) (2kHz to 40 M Hz) 2 •MDS technology • EJTAG/PC Trace Diffe re ntiating •Supports sleep-mode •Supports sleep-mode •Supports ARM RT c lock •Supports multi-cores support Fe atures •Supports ARM RT c lock debug •Multi-TAP JTAG support • External trace trigger •Multi-TAP JTAG support •Built-in memory test •Supports multiple architecture debug • External trace enable •Built-in memory test •Concurrent debug mode • Concurrent debug mode •Non-intrusive connect mode •Non-intrusive connect mode •(most CPUs) (most CPUs) Logic Analyzer connections (Trigger in/out)
•Microsoft eXDI for Platform Builder in Windows CE Debug Interface •ARM RDI Protocol •Intel UDI for XDB-JTAG •EPI MDI(includes GNU/GDB)
•ARM SDT, ADS, ADW, AXD, Real-View •EPI CADB, CADB25 •EP I EDB Compatible •EPI XDB-JTAG Debugger •GNU GDB •Green Hills MULTI Software •Intel XDB-JTAG •Mentor Graphics XRAY •Metaware SeeCode •Microsoft Platform Builder •Wind River Tornado(opt 83mvx) EPI's Debug Environment
Dockable Session Command line for EDB or MON allows for Execution standard window scripted testing, disable, display, enable, enter, Program Input/ window can windows displays find, fill, help, read or writing data in me mory Output Window display source, toolbars history or registers, reset, and verify commands assembly or interleaved Memory window displays multiple instruction formats. Data can formats be edited in window Point and click to set break points PC Trace Execution at gray circles reconstructs cycle-by-cycle flow basedonCPUstatus Arrowshows on each cycle execution point with disassembly of Eye represents instructions executed view point
Many right click Right click to options - edit conditions/ Hype rlinking scripts, automatically enable/disable aligns windows or ente r/delete at source lines break points EDB displays raw, data, instruction Single step buttons Watch window Call stack Register windowshows or mixed modes (into, out of, over) automatically summary GP & CoProc register values depending on CPU permit independent updates any Right click Can edit in window implementation Assembly and Source level C construct displays local Color changes when viewing and stepping variables variables value changes
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EDB EPI’s debug interface libraries support hardware breakpoints for debugging BSP/driver code in ROM/Flash, and Flash memory programming utilities & sample Files.
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Mobile OS(RTOS): QNX GNU Tools Neutrino “du jour” Palm OS, GDB GDB Symbian OS, Nucleus OS and Wind River Tornado OS RTOS GDB OS-independent Systems Remote Compilers EPI GCC & 3rd Party Protocol Compilers Compilers / Debug MDIserver EPI ADS, AXD, Realview EPI EDB MDI MDILib GCC, GDB API Debugger Intel, XDB ATI, UDB MAJIC 10/100 Ethernet / USB IAR Systems acket protocol Allant Aspex Green Hills MULTI EPI Mentor XRAY Products Targets Metaware SeeCode ARM or MIPS VLSI JumpStart
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MAJIC Supported Processors
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ᯥᄁॵऽᜅ▽Ʊᮂᦩԕ Ʊᮂŝᱶ ᵝԕᬊ ʑ┡✚ᱥ G㢳ᰋⓧⓋGG T⬇GᄛⰟV⬣㤣G TG⬀⩘₣ᢋG⚓♤ G࿋Ή⬿Gჿ⫐GႫ⯄G O⪃GX㨻G\⬫ླP TGᇟῇG~jlUuGvVzGჿ⫐G Tჿ⫐㩳G⚓♤₣ᢋGⵌ⯄ ~jlUul{GvVzGᇟῇG ⫏ᱻG TGᇟῇG⬳⁏ᣃᢋGᵛᖴ♓GvVzGჿ⫐GG Tჿ⫐G◇ᱻⵌG⯋Ⴄ ᶓ⪃G[ⲫG\⬫GႫ⯄G Tᣃῃ⬣♓GkGⓓၳGιG⚓♤ livv{G⚓♤G₣ᢋOwhY\P⯋ႤG hytG㢳ᰋⓧⓋGჿ⫐G Thyt⬇GᄛⰟV⬣㤣G ThytG⬀⩘₣ᢋG⚓♤ hytG࿋Ή⬿Gჿ⫐GႫ⯄G T࿋Ή㨇ၬGᄛㅄSGjw|Gi Tჿ⫐㩳G⚓♤₣ᢋGⵌ⯄ ᶓ⪃GZⲫG[⬫GႫ⯄G O⪃GX㨻G[⬫ླP i~TZzj[[iWG₣ᢋGợ⑰G⯋ႤG ⫏ᱻG ToV~SG㜻⪗⥣GⓓၳGႫ⯄G Tჿ⫐G◇ᱻⵌG⯋Ⴄ T┻♓ᬫ⬧Gᣃ″ᇴGῘ⁄G⚓♤ thqpjG⥿Ὓ᮷⬣㓟GợᱻGჿ⫐G OhytGVGGVGtpwzP h}yGVG_W\XG㢳ᰋⓧⓋGG Th}y⬇GᄛⰟV⬣㤣G Th}yG⬀⩘₣ᢋG⚓♤ ᶓ⪃GXGⲫG㕏⩃⬫G O⪃GX㨻GZ⬫ླP Th}yG㢳ᰋᆧᭇᾼGᇟ⁄ Tჿ⫐㩳G⚓♤₣ᢋG㚿ᶓ VG⓺㚴GVG㢻ᭇ⚋Gᚓ⩣ᰋᣘGG ⫏ᱻG Th}yG࿋Ή㨇ၬGᄛㅄGιG⚓♤ Tჿ⫐G◇ᱻⵌG⯋Ⴄ TlG⩿ၘ⯋⥣G⬀⩘GιG⚓♤G h}yV_W\XG࿋Ή⬿Gჿ⫐GႫ⯄G ᶓ⪃GYⲫGY⬫GႫ⯄G iGჿ⫐GGG T⇃Თ㗛♓G㤇ᢋ⪗⥣GᄛⰟ T⇃Თ㙧◇G㑯၎₣ᢋG⚓♤ OℳᇟGX㨻GY⬫ླP T㢳ᰋ㕏㌋♓㒌SG㢳ᰋ㚻⬫G⬣㤣 Tჿ⫐㩳G⚓♤₣ᢋGⵌ⯄ iG࿋Ή⬿Gჿ⫐GႫ⯄G ⫏ᱻG T⬧ⵌ⮷GιG⣷㓻ᑇGჿ⫐ Tჿ⫐G◇ᱻⵌG⯋Ⴄ ℳᇟGY⬫GႫ⯄G T⚓⯋⯋㠷G⚓♤GႫ⯄G₀㤸G iiGYlhGợ⑰G⯋ႤG hytGVG TྰG⯋㠷G⭔⇳G⩣⩘ιG⩘⁄ T㈣ᚓᰋᆧG⯋ႤG ྕഭʑᚁƱᮂᦩԕ h}yGVG_W\XGGG T⬳⁏ᣃᢋG⚋♓㔋G⭔⇳G┻࿋G Tჿ⭛G⯋Ⴄ O⪃GX㨻G[⚋ླP ʑᚁḡᬱᱶᅕƱ⪹᮹ᰆᗭ ợᱻG
⫐⬫⯄⫯G⑰㨘⥿GᣟᬫGᚓ┻Gၬ៏◇G⬷♤ᙷᚓUGG⬿ⓧ㤋Gჿ⫐Gᑣ⩘⫯GUUUGⰟU Ӹ◂ӹᚎⴲᔢᬊ│ Micro Vision ᇟ●Gⵯ⩿GVG⯄ᇟGჿ⫐UUUG
ᇟ●ⵯ⩿GGᇟ●ⵯ⩿GG pUGGGthqpjG⥿Ὓ᮷⬣㓟G⯄ᇟGợᱻGჿ⫐G ppUGGoV~G⓺㚴SG㢻ᭇ⚋Gᚓ⩣ᰋᣘGⵯ⩿GGG pppUGiGᇟ●ⵯ⩿GVG࿋ΉG⩘⦜Gᚯ㤸 ჿ⫐G㢳ᰋᆧ᭗GGGჿ⫐G㢳ᰋᆧ᭗GGG pUGGGợᱻGᇟ●Gჿ⫐GႫ⯄GOthqpjGq{hnGlPG G ჿ⫐ᚯ⑰G ჿ⫐Ṙ⮰G ჿ⫐ᑣ⩘ ჿ⫐ჿ⭛G ࿄G G G TGlwpGGthqpjG⩘⬿GG GTGhytG࿋Ή⬿ᢓ⬇G࿋ΉG㨇ၬGᄛㅄG⚋ླG⮷⤬GιG㤇ᢋ⪗⥣G TGGlwpGthqpjGⓓ㈇GιG⩘⁄G TGGoGGGthqpjG TGGOⲫPtG{zG TGᄛᶓG㬛ᶌ⬿G GGGGᣃ″ᇴ⥿GႯ㤋G⬣㤣⧯G⚓♤ TGGoGkGιGmV~GkG GGGO㤋ᆯḃᘣ⥫PG GGGO{GzPG㚯 G GTGjw|SGtltvyGιGⲫGpVvG⭔㈇G㓻♓㙧 TGGlkiGιGtG⩘⁄ TGGoGkGGhytG GGGG TGGᶓ⪃G࿄⬇GOX⬫ླP GTGq{hnG⥿Ὓ᮷⬣㓟ᴫG⬣⩘㤋G㤇ᢋ⪗⥣Gᣃ″ᇴGῘ⁄ TGGmG GGGG GTGhytG࿋Ή⬿ᢓ⬇G࿋Ή㨇ၬGᄛㅄႫ⯄GιG㨇ၬ⥿Gᚯ㤋G⬿ᱻG⯋Ⴄ ppUGGGG࿋Ή⬿Gჿ⫐Ⴋ⯄GO\⬫GႫ⯄P
X⬫ Y⬫ Z⬫ [⬫ \⬫ XUGჿ⫐Ⴋ⯄GaGzGVG~jlUu YUGჿ⫐ᚯ⑰Ga XWaWWG¥XXaWW ~GjlUul{ lGz ⬇G࿋⩃㜻⪗⥣GⓓၳSGGwG⇳ჿ |ziG࿋⩃SG|ziG{ ~jlUul{G|zi GGGGTzVhytGjw|GႯᯗGoV~SGzV~G࿋Ή⬿ mGMGh zGh GkGℳⓌG GGGGT~jlUuGႯᯗG࿋Ή⬿ XXaWWG¥XYaWW wGiG⩘⁄ ⁃⩘Gjw|GιGjw|GႯᯗ Gp jSGiSGpS ⬀⩘G㢳ᰋᆧ᭗G⚓♤ GGGGTlivv{ιG㞛㚴⥿GႯ⚛⬣G⬷ᙃG࿋Ή⬿ iGw⬇G⬣㤣G whY\GℳⓌGιG⚓㦇⬣㤣 GpG{⬣㤣 ZUGჿ⫐㙨ⶄGaGX⬧GXwj⬇G⚓♤ჿ⫐ ⮿G⚛ [UGჿ⫐⬧⩿GaGX\Ḵ \UGჿ⫐⇳⩘GaG⫏ᱻG wGiG⚓♤ ⯋㠷GⓓၳG㑯၎G⯋㠷 GG~jlUul{GᄛⰟGℳⓌGι |ziGj⬇G┻࿋S GphyGhytG㊣㚻⬫ᮛ XZaWWG¥X[aWW ᣃ⬿⬧Gႏᯓ㤜 G࿋ΉGῘ⁄G⚓♤ GpSGᄛⰟG GᄛⰟGⓓḴ ]UG⯋Ⴄ㤜a GGGT⚓♤⩘GhG₣ᢋG⯋ႤG kG~GjlUul{ ⇃ᰌᝳGⓓḴ G~jlUul{G⥿Ⓥ⬇Glivv{ ࿋Ή₣ᢋGzGⓓḴ ㊣㚻⬫ᮛ⥿Ⓥ⬇G GGGGGOwhY\dzPG X[aWWG¥X\aWW kGGSGqp{Gk 㨻ᰋᝳG⭀ⓠ ᄛⰟGℳⓌGιG࿋ΉGῘ⁄G♤ᢌ jGᑣℯGᄛⰟG ⚋⭀G㢳ᰋᆧ᭗GⓓḴ GGGTq{hnGkG㗣Gჿ⫐◇ᱻ㩳Gợᱻ⯋Ⴄ ḃṗᵛGᶤGⓓ⯄G GGGTlivv{SGizwSGtG㢳ᰋᆧ᭗Gι ࿋Ή㗣G⩘GῘ⁄GιG⚓㦇 lSGGkGⓓḴ ṗᙷ㓟G㢳ᰋᆧ᭗G㞛㚴 X\aWWG¥X]aWW GGGGG⩘⬿G㢳ᰋᆧ᭗G⦷⯋ q{hnGℳⓌGιG⚓㦇 Qᇟ㑯G⬿ⓧ㤋Gᑣ⩘⬣ᑇGủ⬇ᙃG⦟ᬬῃᬻ kG⚓♤ GG~jlUul{G[UY⥿ⓋGizw GthqpjGG⩘⁄GιGⓓḴ GG◇⯄GιG⚓♤GιGⓓḴ lG○ⓋG q{hnGᣃ″ဟᰋGႯᯗ X]aWWG¥X^aWW wGℳⓌG G㢳ᰋᆧ᭗G⚓♤G
pppUGGGhytG࿋Ή⬿Gჿ⫐Ⴋ⯄GO[⬫GႫ⯄P XUGჿ⫐Ⴋ⯄GaGhyt^ X⬫ Y⬫ Z⬫ [⬫ YUGჿ⫐ᚯ⑰Ga XWaWWG¥ XXaWW l ohyk~hyl GGGGGGGGohyk~hyl GGGThytGjw|ႯᯗGoV~SGzV~G࿋Ή⬿S z ࿋⩃ ࿋GΉG࿋G⩃ Vzvm{~hyl ࿋Ή⮷ ₣ᢋ z ⓓḴ GGGThytGjw|ႯᯗGuTvzG⬇G hytGj GGGG⚋♓㔋⫳G࿋Ή㤇ᯓႏG㤇ᙃGᬻ XXaWWG¥ XYaWW j ⬣㤣V㨋⩘ q{hn࿋⩃ h ZUGჿ⫐㙨ⶄGaGX⬧GXwj⬇G⚓♤ჿ⫐ ⮿G⚛ [UGჿ⫐⬧⩿GaGX\Ḵ \UGჿ⫐⇳⩘GaG⫏ᱻG hytGjG⬀⩘pV ltilkklk thnpjG┻࿋Gι XZaWWG¥ X[aWW ]UG⯋Ⴄ㤜a [[WGjw| ┻࿋ j⥧⥣G⬴ủG jw|Gᑣ⭔ ᇟᙔ ⩘⁄G⚋⦟ GGGT⚓♤⩘GG₣ᢋG⯋ႤGG ┻㢳㙧⪗⥣ 㓻♓㙧p G₣ᢋ⩘⁄G ₣ᢋ ivv{svhk ⚓♤ GGGGGOi~TzZj[[ivdhyt^{ktpPS X[aWWG¥ X\aWW ⓓḴ q{hn kli|nnly GGGTq{hnGkG㗣Gჿ⫐◇ᱻ㩳Gợᱻ⯋ႤG ⩘⚓♤ GGGTivSG┻♓㢳ᰋᆧ᭗Gjk ₣ᢋG⬿⩿ႯᵛG GGGT㊯⬣⇃SG⣳ᚤ㑯 X\aWWG¥ X]aWW ࿋Ή㨇ၬᄛㅄG jw|Gᑣ⭔GᇟᙔG pyxVtltvyGႯᵛ ┻㢳㙧⪗⥣ GGGTGჿ⭛GaG࿄G⮯⭀ 㓻♓㙧pp ⚓♤ GGGTGlGaGtGkG ₣ᢋGᇟ₧G⩘⁄G mshzo t jwskGM sjkGrp{ X]aWWG¥ X^aWW GGGTGphy䋮GhytG㊣㚻⬫ᮛ ႯᵛῘ⁄ ⩘⬴ủ GGGGGGzV~GZW GG⯋Ⴄ Qᇟ㑯G⬿ⓧ㤋Gᑣ⩘⬣ᑇGủ⬇ᙃG⦟ᬬῃᬻ Qჿ⫐⬫⯄⫯G⑰㨘⥿GᣟᬫGᚓ┻Gၬ៏◇G⬷♤ᙷᚓUGG⬿ⓧ㤋Gჿ⫐Gᑣ⩘⫯GUUUGⰟU
Micro Vision Ӹ◂ӹᚎⴲᔢᬊ│ ợᱻGჿ⫐G࿄ⰻ thqpjGq{hnGlG
GṘG⮰G GG₧Gჿ⫐Ⴋ⯄⫯GzVhytG࿋Ή⬿ᢓ⬇G࿋ΉG㨇ၬGᄛㅄG⚋ླG⮷⤬GιG㤇ᢋ⪗⥣Gᣃ″ᇴ⥿GႯ㤋G⬣㤣⧯ GG⚓♤⫳G㕤㤋Gᇟ₧Gᇟ●⫳G⬤㬷ᇟG⪳㤋GႫ⯄⬴ᙷᚓU GG㤇ᢋ⪗⥣G⦃ⵯᙷ⥣ᢓ⬣G₣ᢋྯGぇ⫻Gᑇ⧓ḣGjw|SGtltvyGιGⲫGpVvG⭔㈇ᢓ⬇G㓻♓㙧ྯG㣳◇⮰⬴ᙷᚓU GGq{hnG⥿Ὓ᮷⬣㓟ᴫG⬣⩘㤇⦛G㤇ᢋ⪗⥣Gᣃ″ᇴGῘ⁄⫳Gჿ⫐㤘ᙷᚓU GGᦿ㤋SGhytG࿋Ή⬿ᢓ⬇G࿋Ή㨇ၬGᄛㅄႫ⯄⥿Gᚯ㤋G⮳ῇ⮰⬧G࿋Ή㨇ၬ⥿Gᚯ㤋G⬿ᱻᴫG⯋Ⴄ㤘ᙷᚓU GGG Gჿ⫐ᚯ⑰GG TGlwpGthqpjG⩘⬿GG TGᄛᶓG㬛ᶌ⬿GG GGG Gჿ⫐G⬫⯄GOGᶓ⪃G࿄⬇GPG TGGᑏGⶋGaGᶓ⪃G㕏⩃⬫GX⬫ླG TGG⚋GླGaGXWaWWG¥G GGGG G࿄G TGGOⲫPtG{zGO{GzPG㚯GG GGGGႏ⬿ᱻGOჿ⫐⚋Gჿ⭛ᙃG⯋ႤះⵯG⣹♤ᙷᚓUPGG TGGoGGGthqpjGO㤋ᆯḃᘣ⥫PG TGGoGkGGGzGVGhytG G G࿄⬇ᑣ⩘G TGGlwpGthqpjGⓓ㈇GιG⩘⁄G TGGoGkGιGmV~GkG TGGlkiGιGtG⩘⁄ TGGmG GGG G⯀◇Ῐ⁄G TGჿ⫐G⚏ぜGῘ⁄GaGG GGGthqpjGჿ⫐G⚏ぜⓋG⭀ⓠ㩳G⬣ḃ⬫G═ℯG TGⓏ○GXZḴGᵷ྿GG GGGlTᰋGủ⬇G㤇⚋ᇟGῃᬼᙷᚓU TGჿ⫐⚏ぜGιG⬫⯄GႯᯗGủ⬇GaGⓋ⦰GᚯᵛGG GGG{lsGaGWYPZY_ZTWXWXGmhGaGWYPZY_ZTWX]WG GGG|ysGaUUUGG GGGlTagUUG GGGQGჿ⫐⫳G㬛ᶌ㤇⚋ᙃGℳ⫯Gჿ⫐GྯG⚏ぜⓋᴫG⬣ḃ⬫ᰋᵻG⚏ぜ㤇⦛Gⲫ⚋ᇟGῃᬼᙷᚓUG G Gჿ⫐G⦟ᇟGιG㆗┻GG TGჿ⫐G⦟ᇟGιG㆗┻ᙃGῇᢋ⚋Gჿ⫐G⚋⭀GZ⬫⮳ᇻⵯG⦟ᬬGⲫ⚋ᇟGῃᬼᙷᚓUGG GGGᦿ㤋SGჿ⫐⯄⑰Gჿ⫐⬣G⦟ᇟះဟᑇG㆗┻ះᙃGၬ⩟⦃G⮳G㕤₣㤣ᢋᵬᙷᚓUGG GGGG Gჿ⫐G⭔┻GG TGჿ⫐⭔┻GιG⪳㈇GaGᵷ⬣㐛ᰋ⇳⯫Gჿ⫐⭔ IAR Embedded Workbench™ for ARM ͤ͡沂͑磏儆 The IAR Embedded Workbench is a set of highly sophisticated and easy- 塶微埪殺嵢姢͑ to-use development tools for pro- gramming embedded applications. It integrates the IAR C/EC++ compiler, assembler, linker, librarian, text editor, project manager and C-SPY debug- ger in one integrated development environment (IDE). With its built-in chip-specific optimizer, the IAR Embedded Workbench for ARM generates very efficient and reliable FLASH/PROMable code for the ARM7™, ARM9™, ARM9E™, ¥ Multiple levels of optimizations for code size and ARM10™ and Intel® XScale™ families. C-SPY—IAR execution speed Systems’ state-of-the-art high-level language ¥ Extended ARM-specific keywords ¥ Built-in advanced ARM-specific optimizer debugger—supports the ARM Multi-ICE JTAG interface ¥ Reentrant code and other RDI-based JTAG interfaces, Macraigor’s ¥ Support for VFP9-S (see highlights) ¥ Extended support for EC++ including templates, Raven and Wiggler JTAG interfaces as well as ARM namespaces, mutable specifier, static cast, reinterpret Angel. It also includes a CMX-RTX RTOS plug-in cast and const cast ¥ Easy and fast interrupt handling directly in C/EC++ module. In addition to solid technology, IAR also ¥ Mixed C/EC++ and assembler listings provides professional world-wide technical support. ¥ Multibyte character support
IAR C-SPY DEBUGGER HIGHLIGHTS ¥ Complex code and data breakpoints ¥ New project manager with text-based project files ¥ C/EC++ call stack with parameters ¥ Sample projects included ¥ Complete support for stack unwinding even at high ¥ Support for the VFP9-S floating-point co-processor optimization levels ¥ C-SPY RTOS plug-in module for Express Logic’s ¥ I/O and interrupt simulation ThreadX included ¥ Versatile monitoring of registers, structures, call chain, ¥ C-SPY support for Macraigor’s mpDemon locals, global variables and peripheral registers ¥ EPI JEENI driver now supports Ethernet connectivity ¥ Fine-grain single stepping ¥ Profiling and code coverage INTEGRATED DEVELOPMENT ENVIRONMENT ¥ Target access to host file system via file I/O (IDE) WITH NEW PROJECT MANAGER ¥ Continuous tracing and logging of arbitrary C-SPY ¥ A modular and extensible IDE running under Windows expressions such as variables and register values 98/ME/NT4/2000/XP ¥ I/O register definition files for different ARM chips ¥ Support for ARM7ª, ARM9ª, ARM9Eª, ARM10ª, ¥ ARM Angel debug monitor support and Intel¨ XScaleª. For detailed information about the ¥ CMX-RTX RTOS plug-in module included supported cores, see www.iar.com ¥ ThreadX RTOS plug-in module included ¥ A modular and extensible IDE running under Windows ¥ Compatibility with µC/OS-II RTOS; plug-in module 98/ME/NT4/2000/XP available from Micrium ¥ Create projects, edit files, compile, assemble, link and debug your applications within the seamlessly IAR C-SPY JTAG INTERFACE integrated environment ¥ Real-time execution ¥ Tool options configurable on global, group of source ¥ ARM Multi-ICE JTAG interface and other RDI-based files, or individual source files level JTAG interfaces ¥ Multiple projects in the same workspace ¥ Verified with EPI MAJIC, MAJIX-MX, MAJIC-PLUS, ¥ Hierarchical project representation shows all different Abatron BDI1000/BDI2000, Aiji OPENice32-A900, source and output files and gives an overview of their Ashling OPELLA and Signum JTAGjet-ARM settings ¥ Macraigor mpDemon, Raven and Wiggler JTAG ¥ XML-based project files interfaces ¥ Easy to integrate external tools in the build process ¥ EPI Jeeni JTAG interface ¥ Multi-byte editor ASSEMBLER COMPILER ¥ A powerful relocating macro assembler with a versatile From Idea To Target ¥ ISO/ANSI standard C and Embedded C++ Compiler set of directives and operators ¥ Each function can be compiled in ARM or Thumb ¥ Built-in C language preprocessor, accepting all C macro www.iar.com mode definitions