9/2/2018
Indian Institute of Technology Jodhpur, Year 2018
Analog Electronics (Course Code: EE314) Lecture 11‐12: BJT Amplifiers
Course Instructor: Shree Prakash Tiwari Email: [email protected]
Webpage: http://home.iitj.ac.in/~sptiwari/ Course related documents will be uploaded on http://home.iitj.ac.in/~sptiwari/EE314/
Note: The information provided in the slides are taken form text books for microelectronics (including Sedra & Smith, B. Razavi), and various other resources from internet, for teaching/academic use only 1
Common‐Emitter (CE) Topology
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Small Signal of CE Amplifier
vout Av vin
Limitation on CE Voltage Gain
• Since gm = IC/VT, the CE voltage gain can be written as a function of VRC , where VRC = VCC ‐ VCE. • VCE should be larger than VBE for the BJT to be operating in active mode.
IC RC VRC Av VT VT
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Voltage‐Gain / Headroom Tradeoff
I/O Impedances of CE Stage
• When measuring output impedance, the input port
has to be grounded so that vin = 0.
vX vX Rin r Rout RC iX iX
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CE Stage Design Trade‐offs
Inclusion of the Early Effect
• The Early effect results in reduced voltage gain of the CE amplifier.
Av gm(RC ||rO )
Rout RC ||rO
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Intrinsic Gain
• As RC goes to infinity, the voltage gain approaches its maximum possible value, gm × rO, which is referred to as the intrinsic gain. • The intrinsic gain is independent of the bias current:
Av g m rO
V A Av VT
Current Gain, AI • The current gain is defined as the ratio of current delivered to the load to current flowing into the input. • For a CE stage, it is equal to .
iout AI iin
AI CE
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Emitter Degeneration • By inserting a resistor in series with the emitter, we “degenerate” the CE stage. • This topology will decrease the gain of the amplifier but improve other aspects, such as linearity, and input impedance.
Small‐Signal Analysis
• The gain of a degenerated CE stage = the total load
resistance seen at the collector divided by 1/gm plus the total resistance pldlaced in series with the emitter. g R R A m C C v 1 1 g m RE RE g m
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Small‐Signal Analysis
• The gain of a degenerated CE stage = the total load
resistance seen at the collector divided by 1/gm plus the total resistance pldlaced in series with the emitter. g R R A m C C v 1 1 g m RE RE g m
Emitter Degeneration Example 1
Note that the input impedance of Q2 is in parallel with RE. R A C v 1 RE ||r2 gm1
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Emitter Degeneration Example 2
Note that the input impedance of Q2 is in parallel with RC. R || r A C 2 v 1 RE g m1
Input Impedance of Degenerated CE Stage
• With emitter degeneration, the input impedance is
increased from r to r + (+1)RE ― a desirable effect.
(VA )
vx rix RE (1 )ix
vx Rin r ( 1)RE ix
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Output Impedance of Degenerated CE Stage
• Emitter degeneration does not alter the output impedance, if the Early effect is negligible.
(VA ) v vin 0 v gmv RE v 0 r
vx Rout RC ix
Degenerated CE Stage as a “Black Box”
(VA )
vin iout gm 1 1 (r gm )RE i g G out m m • If gmRE >> 1, Gm is more linear. vin 1 gm RE
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Degenerated CE Stage with Base Resistance
(VA ) v v v out A . out vin vin v A v R out C vin r ( 1)RE RB
RC Av 1 RB RE g m 1
Degenerated CE Stage: Input/Output Impedances
• Rin1 is more important in practice, because RB is often the output impedance of the previous stage.
(VA )
Rin1 r ( 1)RE
Rin2 RB r ( 1)RE
Rout RC
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Emitter Degeneration Example
Emitter Degeneration Example
(RC || R1) Av 1 RB R2 gm 1
Rin r ( 1)R2
Rout RC || R1
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Output Impedance of Degenerated CE Stage
with VA<∞ • Emitter degeneration boosts the output impedance. – This improves the gain of the amplifier and makes the circuit a better current source.
Output Impedance of Degenerated CE Stage
with VA<∞ • Emitter degeneration boosts the output impedance. – This improves the gain of the amplifier and makes the circuit a better current source.
R out 1 g m ( R E || r )rO R E || r
R out rO ( g m rO 1)( R E || r )
R out rO 1 g m ( R E || r )
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Two Special Cases
Stage with explicit depiction of ro:
1) RE r : Rout rO (1 gmr ) rO
2) RE r : Rout (1 gm RE )rO
Analysis by Inspection • This seemingly complicated circuit can be greatly simplified by first recognizing that the capacitor creates an AC short to gg,round, and gygradually transforming the circuit to a known topology.
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Analysis by Inspection • This seemingly complicated circuit can be greatly simplified by first recognizing that the capacitor creates an AC short to gg,round, and gygradually transforming the circuit to a known topology.
Rout R1 || Rout1 Rout1 1 g m (R2 || r )rO Rout 1 g m (R2 || r )rO || R1
Example: Degeneration by Another BJT
Rout 1 gm1(rO2 || r1)rO1
• Called a “cascode”, this circuit offers many advantages that we will study later...
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Bad Input Connection
• Since the microphone has a very low resistance
(connecting the base of Q1 to ground), it attenuates the base voltage and renders Q1 with a very small bias current.
Use of Coupling Capacitor
• A capacitor is used to isolate the DC bias network from the microphone , and to short (or “couple”) the microphone to the ampllfifier at hhhigher frequencies.
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DC and AC Analysis • The coupling capacitor is replaced with an open circuit for DC analysis, and then replaced with a short circuit for AC analysis.
Av gm (RC || rO )
Rin r || RB
Rout RC || rO
Bad Output Connection • Since the speaker has an inductor with very low DC resistance, connecting it directly to the amplifier would ~short the collector to ground, causing the BJT to go into deep saturation mode.
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Use of Coupling Capacitor at Output
• The AC coupling indeed allows for correct biasing. However, due to the speaker’s small input impedance, the overall gain drops considerably.
CE Stage with Voltage‐Divider Biasing
Av gm (RC || rO )
Rin r || R1 || R2
Rout RC || rO
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CE Stage with Robust Biasing
VA
R A C v 1 RE gm
Rin r ( 1)RE || R1 || R2
Rout RC
Elimination of Emitter Degeneration for AC Signals
• The capacitor C2 shorts out RE at higher frequencies to eliminate the emitter degeneration.
(VA )
Av g m R C
R in r || R1 || R 2
R out R C
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Complete CE Stage
R || R R || R A C L 1 2 v 1 R || R || R s 1 2 R1 || R2 Rs RE gm 1
Summary of CE Concepts
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