Chapter 8
UEEP2613 Microelectronic Fabrication
Metallization
Prepared by Dr. Lim Soo King 29 Jul 2012
Chapter 8 ...... 193 Metallization ...... 193 8.0 Introduction ...... 193 8.1 Metal Selection ...... 195 8.2 Aluminum Metallization ...... 196 8.3 Copper Metallization ...... 198 8.4 Tantalum Deposition ...... 198 8.5 Characteristics of Metal Thin Film ...... 199 8.5.1 Thickness of Metal Film ...... 199 8.5.2 Uniformity of Metal Film ...... 202 8.5.3 Stress of Metal Film ...... 203 8.5.4 Reflectivity of Metal Film ...... 203 8.5.5 Sheet Resistance and Capacitance of Metal Film ...... 204 Exercises ...... 210 Bibliography ...... 212
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Figure 8.1: Cross sectional view of a CMOS integrated circuit showing tungsten via and aluminum/copper interconnection ...... 194 Figure 8.2: Cross sectional view of a CMOS integrated circuit showing copper interconnection ...... 195 Figure 8.3: Illustration of junction spiking caused by aluminum diffusion ...... 197 Figure 8.4: Illustration of electromigration ...... 197 Figure 8.5: (a) Schematic of stylus profilometer and (b) the profile of thickness ...... 200 Figure 8.6: (a) Schematic of acoustic method for thin film measurement and (b) the change of reflectivity with time ...... 202 Figure 8.7: The mapping pattern of wafer with (a) point measurement, (b) 9-point measurement, and (c) 49-point measurement ...... 202 Figure 8.8: Hillock and crack caused by high stress ...... 203 Figure 8.9: Metal film line...... 205 Figure 8.10: Four point probe ...... 205 Figure 8.11: Correcton factor versus t/s plot ...... 207 Figure 8.12: Interconnect metallic structure for RC analysis ...... 209
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Chapter 8
Metallization ______
8.0 Introduction
A number of conductors such as copper, aluminum, tungsten etc, are used for fabrication of semiconductor devices. Metal with high conductivity is widely used for interconnection forming microelectronic circuit. Metallization is a process of adding a layer of metal on the surface of wafer.
Metal such as copper and aluminum are good conductors and they are widely used to make conducting lines to transport electrical power and signal. Miniature metal lines connect million of transistors made on the surface of semiconductor substrate.
Metallization must have low resistivity for low power consumption and high integrated circuit speed, smooth surface for high resolution patterning process, high resistance to electro-migration to achieve high device reliability, and low film stress for good adhesion to underlying substrate. Other characteristics are stable mechanical and electrical properties during subsequent processing, good corrosion resistance, and relative receptivity to deposit and etch.
It is important to reduce the resistance of the interconnection lines since integrated circuit device speed is closely related with RC constant time, which is proportional to the resistivity of the conductor used to form the metal line.
Although copper has lower resistivity than aluminum but technical difficulties such as adhesion, diffusion problem, and difficulties with dry etching etc have hampered copper application in microelectronics for long time. Aluminum has dominated metallization application since beginning of the semiconductor industry, In 1960s and 1970s, pure aluminum or aluminum- silicon alloy were used as metal interconnection materials. By 1980s, when device dimension shrank, one layer of metal interconnect was no longer enough to route all the transistors and multi-layer interconnection became widely used. To increase the pack density, there must be near-vertical contact and via holes, which are too narrow for physical vapor deposition PVD of aluminum alloy to fill the via without voids. Thus, tungsten become a widely used material to fill
- 193 - 08 Metallization contact and via holes and serves as the plug to connect different metal layers. Titanium and titanium nitride barrier/adhesion layers are deposited prior to tungsten deposition to prevent tungsten diffusion and peeling. Fig. 8.1 illustrates a cross sectional view of a CMOS integrated circuit with aluminum interconnection and tungsten via plug. Borophosphosilicate glass BPSG is used as the insulating material separating the plugs.
Figure 8.1: Cross sectional view of a CMOS integrated circuit showing tungsten via and aluminum/copper interconnection
In 1990s, the development of chemical mechanical polishing CMP has open the avenue to use copper for interconnection with damascene or dual damascene process, which gets around the demand of metal etching. Tantalum is used as the barrier layer to prevent copper from diffusion through silicon dioxide. Silicon niride is also used as an etch stop layer for dual damascene dielectric etching process. Fig. 8.2 illustrates a cross sectional view of a CMOS device with copper interconnection.
Since most of thin film depositions such as titanium, titanium nitride, tungsten, silicidation have been discussed in previous chapter, we shall not repeat them here. We shall concentrate to provide lecture on aluminum, copper, and tantalum metal depositions. Besides these lectures, we will also be discussing about the characteristics of metal film in terms of its thickness, uniformity, stress, reflectivity, and sheet resistance. Note that FSG is fluorosilicate glass, PSG is phosphorosilicate glass, and USG is undoped silicate glass.
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Figure 8.2: Cross sectional view of a CMOS integrated circuit showing copper interconnection
8.1 Metal Selection
The importance of interconnection metallization has been briefly dicussed in the earlier introductory section, which is controlling the propagation delay by virtue of the resistance of interconnection line. The RC time constant of the line varies with silicon dioxide as the dielectric material follows equation (8.1).
L2 RC Line Line ox (8.1) dLine dox where Line is the resistivity of the line material, dLine is the thickness of line, LLine is the length of the line, dox is the thickness of oxide, and ox is the permittivity of oxide.
The desired properties of the metallization for integrated circuit are as follows.
Low resistivity. Easy to form. Easy to etch for pattern generation. Should be stable in oxidizing ambient; oxidizable.
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Mechanical stability; good adhersion and low stress. Surface smoothness. Stability throughout processing, including high temperature sinter, dry and wet oxidation, gettering, phosphorous glass (or other material), passiviation, metallization. No reaction with final metal, aluminum. Should not contaminate device, wafer, or working equipment. Good device characteristics and lifetime. For window contact – low contact resistance, minimal junction penetration, low electromigration.
8.2 Aluminum Metallization
Aluminum is the most widely used metal in microelectronic industry particular for interconnection and wire bonding. Aluminum is the forth most conductive element with resistivity of 2.65-cm, after silver of resistivity 1.6-cm, copper of resistivity of 1.7-cm, and gold of resistivity of 2.2-cm. Aluminum can be easily dry etched than the other three elements to form tiny metal interconnection lines.
Both CVD and PVD processes can be used to to deposit aluminum. PVD aluminum has higher quality and lower resistivity. PVD is a more popular method in microelectronic industry. Thermal evaporation, electron beam evaporation, and plasma sputtering can be used for aluminum PVD. Magnetron sputtering deposition is the most commonly used PVD process for aluminum alloy deposition in advanced fabrication.
Aluminum CVD normally is a thermal CVD process wth an aluminum organic compound such as dimethylaluminum hydride DMAH Al((CH3)2H) with aluminum as the precursor.
Aluminum interdiffuses into silicon to form aluminum spikes. Aluminum spikes can punctual through the doped drain/source junction causing shorting to substrate silicon. The effect is called junction spiking as illustrated in Fig. 8.3. This problem can be solved by adding 1% of silicon to aluminum to form alloy instead of pure aluminum. Thermal annealing at 4000C forms Si-Al alloy at the silicon-aluminum interface that helps to prevent aluminum silicon inter- diffusion causing junction spike.
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Figure 8.3: Illustration of junction spiking caused by aluminum diffusion
Metallic aluminum is a polycrystalline material, which consists of many small monocrystalline grains. When electric current flows through an aluminum line, a stream of electrons constantly bombards the grains. Some smaller grains start to move down just like the rock at the bottom of stream moving down during flood season. This effect is called electromigration. The illustration is shown in Fig. 8.4.
Figure 8.4: Illustration of electromigration
Electromigration can cause serious problem fro aluminum lines. When some grains begin to move due to elecron bombardment, they damage the metal line. At some points, they cause higher current density at these points. This aggravates the electron bombardment and causes more aluminum grain - 197 - 08 Metallization migration. High current and high resistance would generate heat and eventually cause breaking of aluminum line. Thus, electromigration can affect the reliability of microelectronic devices.
Adding a small percentage of copper 0.5% wt to aluminum can significantly improve the resistance of aluminum migration. This is because the copper atom is large and it can hold aluminum grains preventing migration due to electron bombardment.
8.3 Copper Metallization
Instead of depending on chemical reaction to produce reacting species to form thin film like case of chemical vapor deposition, physical vapor deposition can be used to deposit the film. PVD technique is generally more versatile than CVD method because it allows deposition of almost any material.
Copper has lower resistivity (1.7µΩ-cm) than alumunum copper alloy (2.9 to 3.3 µΩ-cm). It also has higher electron migration resistance because copper atoms are much heavier than aluminum and it has better reliability. Copper has always been an attractive and recommended choice for the metal interconnection in IC’s industry because it can reduce power comsmption and increase the speed of the IC’s.
Copper does have problem of adhesion with silicon dioxide and high diffusion rate in silicon and silicon dioxide. Copper difussion into silicon can cause heavy metal contamination and lead to malfunction of the IC’s. Thus, a barrier metal such as tantalum needs to be deposited before depositing copper. Copper is very hard to dry etch because copper-halogen compound has very low volatility. Copper also has issue of ansiotropicity due to lack of an effective dry etch method. This is a hinderance for the use of copper as common interconnect material for IC’s fabrication.
8.4 Tantalum Deposition
Tantalum and tantalum nitride can be used to prevent copper from diffusing into silicon substrate and causing device damage. Tantalum barrier layer is about a few hundred angstroms thick as the copper barrier. It is a better barrier material for copper than other known barrier materials such as titanium and titanium nitride. It is normally deposited with sputtering process.
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8.5 Characteristics of Metal Thin Film
Conducting film usually has polycrystalline structure. The conductivity and reflectivity of a metal are related to the grain size. Normally larger grain size has higher conductivity and lower reflectivity. For higher temperature deposition, normally it has higher mobility to deposit atoms on the substrate surface and formed large grain in the deposited film.
In the sub-section, we shall discuss some characteristics of metal film that cover the thickness of the film, the uniformity, the stress, the reflectivity, and the RC constant of the film.
8.5.1 Thickness of Metal Film
The thickness measurement for metal thin film is quite different from that of dielectric thin film. It is difficult to directly and precisely measure the thickness of an opaque thin film such as aluminum, titanium, titanium nitride, and copper, which usually needs to be performed on test wafer in a destructive way until the introduction of the acoustic measurement method. The metal film needs to be removed and its thickness either measured by scanning electron microscope SEM or by measuring the step height with profilometer.
Energetic electron beam scans across the metal film creates secondary electron emission from the metal sample. By measuring the intensity of the secondary electron emission, the thickness can be known from the image of secondary electron emission. It is also known that the different metal will have different rate of emission of secondary electron. SEM method can also detect void in the metal film.
Profilometer measurement can provide information pertaining the thickness o and uniformity for film thicker than 1,000 A . A pattern of metal is required to be deposited before it is being measured by stylus probe of profilometer as shown in Fig. 8.5.
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(a)
(b) Figure 8.5: (a) Schematic of stylus profilometer and (b) the profile of thickness
The metal pattern is done by depositing a layer of metal on silicon substrate. It is then followed lithography process with a metal pattern mask to form a metal pattern on the photoresist. After development and etch processes, the metallic pattern is remained on silicon substrate. This metallic pattern is then measured with profilometer to determine its thickness.
o Ultrathin titanium nitride from 50 to 100 A is almost transparent. Its thickness can be measured with reflectospectrometer. The four-point probe is also commonly used to indirectly monitor the metal film thickness by assuming the resistivity of the metal film is constant throughout the wafer.
Acoustic method is a new technique used to measure the thickness of opaque metal thin film with direct contact with the film. Thus, it is a useful technique to measure the thickness of film and its uniformity. The basic principle of acoustic measurement method is shown in Fig. 8.6. It consists of a laser beam and a detector. A very short laser pulse of approximately 0.1ps is shot to the surface of the thin film at a focus spot, which is about 10m by 10m, for 10 to 13s. This will heat up the spot by 5 to 100C. The thermal expansion of the film will cause a sound wave to propagate in the film at the speed of sound of that material. When the acoustic wave reaches the interface of - 200 - 08 Metallization different material, part of the wave will be reflected, while another part will continue to propagate in the underneath material. The reflected wave sound wave or echo can cause reflectivity changes when it reaches the thin film surface. The reflected wave echoes back and forth in the film until it is damped off. The time difference t between the peaks of reflectivity indicates the time sound wave traveled back and forth in the thin film. If the speed of sound Vs in the material is known, the film thickness can be calculated by equation (8.2).
d VSt / 2 (8.2)
The decay rate of the echo is related to the film density. This method can be used to measure the thickness of each film in multi-layer device structure.
The result shown in Fig. 8.6(b) is the acoustic wave form for the thickness of titanium nitride TiN film deposited on tetraethyl orthosilicate Si(OC2H5)4 TEOS silicon dioxide. Note that it is a process of forming silicon dioxide when TEOS reacts with water. The time between two peaks of reflectivity is t = 25.8ps. The speed Vs of sound in TiN film is equal to 9,500m/s. Thus, the thickness d of film is 122.5nm.
(a)
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(b) Figure 8.6: (a) Schematic of acoustic method for thin film measurement and (b) the change of reflectivity with time
8.5.2 Uniformity of Metal Film
The non-uniformity of the metal film can be measured by measuring the sheet resistance and reflectivity at multiply locations on the wafer in the pattern illustrated in Fig. 8.7.
(a) (b) (c) Figure 8.7: The mapping pattern of wafer with (a) point measurement, (b) 9-point measurement, and (c) 49-point measurement
The more measurement points are taken, the more precision can be achieved. In the industry, 5-point and 9-point measurements are commonly used to save cost and time. The 49-point and three sigma 3 standard deviations is the most common defined criteria for qualification process of semiconductor industry. - 202 - 08 Metallization
8.5.3 Stress of Metal Film
Stress is caused by material mismatch between the film and the substrate. There are two type stresses namely compressive and tensile types. If stress is too high irrespective of the types, it can cause serious problem such as hillock and crack as shown in Fig. 8.8.
(i) Hillock caused by compressive force (ii) Crack caused by tensile Figure 8.8: Hillock and crack caused by high stress
There are two type stresses, which are intrinsic stress and thermal stress. Intrinsic stress is caused by film density. It is determined by ion bombardment in the plasma sputtering deposition process. When the atoms on the wafer surface are bombarded by the energetic ions from the plasma with much force, they are squeezed densely together while forming the film. This type of film would expand but it is being compressed by the substrate and this type of stress is the compressive type. Higher deposition temperature increases the mobility of the atoms, which in turn increases the film density and causes less tensile stress. Intrinsic stress is also related with wafer temperature change and different thermal expansion coefficient of the thin film and substrate. The thermal expansion coefficient of aluminum is 23.6x10-6k-1 and thermal expansion coefficient of silicon is 2.6x10-6k-1. When an aluminum film is deposited at high temperature of 2500C on silicon substrate at high temperature, upon cooling down aluminum shrinks more than silicon. This would result tensile stress on aluminum thin film by the silicon substrate.
Stress can be measured from the change in curvature of wafer before and after thin film process. The normal procedure for metal thin film stress measurement is: first measurement of curvature of wafer, deposition of metal thin film with known thickness, and second curvature measurement.
8.5.4 Reflectivity of Metal Film
Reflectivity is an important property of metal thin film. For stable metallization process, the reflectivity of the deposited film should be constant. The change of reflectivity is an indication of process drift. Reflectivity is a function of the film
- 203 - 08 Metallization grain size and surface smoothness. Normally the larger grain size means lower reflectivity. The smoother the metal surface, the higher will be the reflectivity.
Reflectivity is important to photolithography process because it can cause a standing wave effect due to interference between incoming light and reflected light causing wavy grooved on the sidewall of the photoresist stack from periodic overexposure and underexposure. Anti-reflectant is normally coated to prevent this effect during pattern process especially the aluminum patterning that has very high reflectivity (180 to 200% relative to silicon). You may recall what has been discussed pertaining to this issue in lithography class.
8.5.5 Sheet Resistance and Capacitance of Metal Film
Sheet resistance s is one of the most important characteristics of the conducting material especially the conducting film. It is commonly used to monitor the process of metal film deposition. For film with known conductivity, the sheet resistance measurement is widely used to determine the thickness of the film.
The metal line resistance as shown in Fig. 8.9 is defined by equation (8.3).
L R (8.3) Wt where is the interconnect resistivity. L, W, and t are the interconnect length, width, and height respectively. Resistivity is related with the film material, grain size, and structure. For metal film with larger grain size, the lower will be the resistivity.
The sheet resistance s is then defined as
(8.4) s t
Thus, from equation (8.3), the resistance R of metal line is equal to
L R (8.5) s W where L is the number of square. For a known fabrication technology, the W thickness H of metal line is fixed. This, the resistance R of the metal line is
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simply equal to the sheet resistance s of the metal material multiplied by the number square of the metal line.
Figure 8.9: Metal film line
A four point probe as shown in Fig. 8.10 is the most common tool used to measure the resistivity and sheet resistance of the metal film. A current I is forced between two pin P1 and P4. The voltage V between pin P2 and P3 is measured.
Figure 8.10: Four point probe
The metal tip of probe is usually made from tungsten. It is assumed to be infinitesimal and the metal film is semi-infinite in lateral dimension. For the sample that has thickness t >> S then the spherical protrusion of current emanating from the outer probe tips has the differential resistance shown in equation (8.6).
x R (8.6) 2x 2
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The resistance between probe 1 and probe 2 is the integration of equation (8.6) for limit X1 to X2, which is s. It yields equation (8.7).
X2 dx R = (8.7) 2x 2 4s X1
Owing to superposition of current at the outer two probes, the resistance R is equation V/2I. Thus, the resistivity is equal to
V 2s (8.8) I
After adding thickness correction factor a, equation (8.8) is equal to
V 2as (8.9) I
Based on the correction factor a versus t/s plot shown in Fig. 8.11, the thickness correction factor a is expressed as follows.
t a 0.721 (8.10) s
1 for t/s < 0.5 and it is equal to a for t/s > 0.5. Substitute equation 0.52632 1 (t /s)1.9 (8.10) into equation (8.9), the resistivity is equal to
t V V 2x0.721s = 2x0.721t (8.11) s I I
Indeed 0.721 is equal 1 . Thus, equation (8.11) is equal to 2ln 2
V t (8.12) ln 2 I
The sheet resistance s is , which is s t
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V s (8.13) ln 2 I
Figure 8.11: Correcton factor versus t/s plot
For a thin film whereby the thickness much smaller than S (t< X2 dx S2 dx R ln 2 (8.14) 2xt 2xt 2t X1 S1 The sheet resistance s is equal to 2R 2 V V s (8.15) ln 2 ln 2 2I ln 2 I This equation is also same as equation (8.13). It is true for semi-infinite thin film whereby the the size of the sample is large compared to the probe spacing so that edge effects could be ignored. However, if the sheet resistance s - 207 - 08 Metallization measurement will to be made on a test area on the wafer where the test area with typical dimensions 2.9mm by 5.8mm not larger than the probe spacing of 0.63mm, in order to get accurate measurement, one needs to correct for the edge effects. A metallic line structure shown in Fig. 8.12, the RC time delay of a signal propagating along this structure is first order obtained by treating it as a distributed, un-terminated transmission line. For such a system, the time delay tL is approximately equal to 0.89RC. R is the line resistance and C is the total capacitances associated with the line. A more accurate analysis would include such elements as the load capacitance, driver resistance, and line inductance. The total capacitance associated with the line is WL tL C Kox0 Kox0 (8.16) dox LS where dox and Kox are the oxide thickness and its dielectric constant respectively, and 0 is the permittivity in free space. The first term of equation (8.16) is the line to substrate capacitance and the second term is the coupling capacitance Cl between adjacent lines. This is true only if all lines are surrounded by oxide. The total RC delay associated with the metal interconnecting line is 1 1 2 tL 0.89KlKox0L (8.17) tdox WLS where Kl is added empirically to account for fringing electric fields and other interconnecting line above or below multi-layer system. Kl is often taken as approximately equal to 2. - 208 - 08 Metallization Figure 8.12: Interconnect metallic structure for RC analysis As the technology progresses, the minimum feature size Fmin of the device is getting smaller. The values of Ls and W may be larger than the minimum feature size for some interconnect levels. Both dox and t also shrink as Fmin shrinks. Ideally the aspect ratio of t/W should be kept constant. In the earlier analysis by Saraswat and Mohammadi, it was assumed that dox and t equal to 0.35Fmin and 0.25Fmin respectively. However, these thicknesses have not decreased as quickly as in recent years especially the global interconnects. To keep the analysis simple, one assumes that dox, t, Ls, and W are all equal to minimum feature size Fmin. Equation (8.16) becomes equation (8.18) after taking the value of the coupling capacitance Cl between adjacent lines equal to 2. Thus, the RC delay tL is equal to L2 t L 3.56Kox0 2 (8.18) Fmin For local interconnection, L is usually shrinks as Fmin shrinks. Therefore, the net result is that the RC time delay for local interconnection stays approximately constant according to scaling scheme. However, for global interconnection, the length usually increases rather than shrinking. This is because integrated circuit area of each new technology usually keeps increasing forcing the global interconnection to increase in length. The average length of the longest global interconnection in a circuit can be approximated by equation (8.19). - 209 - 08 Metallization A L (8.159) max 2 where A is the area of integrated circuit. Replacing inductance L of equation (8.19) with equation (8.4) will yield equation (8.20). A t L 3.56Kox0 2 (8.20) Fmin Exercises 8.1. State the reason why void in a contact via is not acceptable. 8.2. Calculate the time constant for a l.0cm long doped polysilicon interconnection line on 1.0m thick silicon dioxide. The polysilicon has a o thickness of 5,000 A and resistivity of 1,000-cm. 8.3. State a method to reduce aluminum diffusion into silicon substrate. 8.4. State a method to reduce electro-migration of aluminum. 8.5. Calculate the interconnect delay time for aluminum with resistivity 3.0x10-6cm, silicon dioxide dielectric constant 3.9, IC area 100mm2, and aluminum feature size of 0.35m. 8.6. State the reason why the photograph of scanning electron microscope SEM is always black and white in color. 8.7. The change of reflectivity versus time of the copper metallic film measured with acoustic method is shown below. Calculate the average thickness of the copper film if the speed of sound in copper is 4,710ms-1. - 210 - 08 Metallization 8.8. Three metal conducting lines of the integrated circuit are deposited with same type of metal film with the length and wide illustrated in figure below. Calculate the resistance of metal 1 and the resistance of metal 2 and 3 in terms of the resistance of metal 1. 8.9. Why silicon oxide film has compression stress at room temperature? 8.10. A four point probe used to measure the sheet resistance n-type silicon has forcing current of 0.4mA and measured voltage of 10mV. Find the sheet resistance of n-type silicon. - 211 - 08 Metallization Bibliography 1. JD Pummer, MD Del, and Peter Griffin, “Silicon VLSI Technology” Fundamentals, Practices, and Modeling”, Prentice Hall, 2000. 2. Hong Xiao, “Introduction to Semiconductor Manufacturing Technology”, Pearson Prentice Hall, 2001. 3. Debaprasad Das, “VLSI Design”, Oxford University Press, 2011. - 212 - Index Mohammadi...... 209 A P Acoustic method ...... 200 Aluminum ...... 193, 194, 196, 197, 203 Phosphorosilicate glass ...... 194 Photoresist ...... 200 B Physical vapor deposition ...... 193, 198 Borophosphosilicate glass ...... 194 Profilometer ...... 199 PSG ...... See Phosphorosilicate glass C R Chemical mechanical polishing ...... 194 Copper ...... 193, 198 RC time constant ...... 208 Coupling capacitance ...... 208, 209 Reflectivity ...... 201, 202, 203, 204 Reflectospectrometer ...... 200 D Resistivity ...... 196, 204, 206 Dimethylaluminum hydride ...... 196 S E Saraswat ...... 209 Electromigration ...... 193, 197 Scanning electron microscope ...... 199 SEM ...... See Scanning electron microscope F Sheet resistance ...... 194, 202, 204, 205, 207 Fluorosilicate glass ...... 194 Silicon dioxide ...... 201 Four point probe ...... 205 T FSG ...... See Fluoroslicate glass Tantalum ...... 198 H Tantalum nitride ...... 198 Hillock ...... 203 TEOS ...... See Tetraethyl othosilicate Tetraethyl orthosilicate ...... 201 I Thermal expansion coefficient ...... 203 Inductance ...... 208 Thermal stress ...... 203 Intrinsic stress ...... 203 Thickness correction factor ...... 206 Time constant ...... 195 J Titanium nitride ...... 194, 200, 201 Junction spiking ...... 196 Tungsten ...... 194, 205 L U Lithography ...... 200, 204 Undoped silicate glass...... 194 M USG ...... See Undoped silicate glass Metallization ...... 193 - 213 -