California State University, Northridge a Fully

CALIFORNIA STATE UNIVERSITY, NORTHRIDGE

A FULLY ANALYTICAL BACK-GATE BIAS MODEL FOR n-CHANNEL SILICON CARBIDE MESFETs WITH BACK CHANNEL IMPLANT.

A graduate project submitted in partial fulfillment of requirements For the degree of Master of Science in Electrical Engineering.

By Sushma Malku

May 2017 The graduate project of Sushma Malku is approved:

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Prof. Benjamin F. Mallard Date

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Dr. Banmali Rawat Date

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Dr. Somnath Chattopadhyay, Chair Date

California State University, Northridge

Acknowledgement

I successfully completed this project with generous support of prof. Dr. Somnath Chattopadhyay. Therefore, I wish to extend my sincere gratitude to him. He guided me in every step and provided me with more information regarding the project.

This project would not be complete if it was not for their kind co-operation of my committee members Dr. Benjamin F. Mallard and Dr. Banmali Rawat for being as my committee and for providing valuable suggestions. I want to thank them for their co- operation and supervision.

I would like to offer my special thanks to my family and god for their blessings, prayers and relentless support upon me and helping me in everything I do.

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Table of Contents

Signature page ii

Acknowledgement iii

List of Figures vi

List of Tables viii

Abstract ix

CHAPTER 1. INTRODUCTION 1

1.1 Different SiC polytypes 3

1.2 SiC MESFET performance 4

1.3 Characteristics of Reverse Recovery time of SiC MESFET 5

CHAPTER 2. SILICON CARBIDE (SiC) 7

2.1 Material information 7

2.2 Production of Silicon Carbide 7

2.3 Manufacturing of Silicon Carbide 9

2.3.1 Acheson process 9

2.4 SiC crystal structure 12

2.5 Properties of Silicon Carbide 14

2.6 Ion Implantation technology 14

2.6.1 Mathematical model of Ion Implantation 16

2.7 Schottky Barrier Diode 17

CHAPTER 3. PHYSICS OF MESFET 19

3.1 Introduction 19

3.2 Types of MESFET 19

3.3 Structure and characteristics of MESFET 21

3.4 Operation of MESFET 22

3.5 SiC MESFET structure and characteristics 23

3.6 Applications of MESFET 25

3.7 Advantages and Disadvantages of MESFET 26

CHAPTER 4. NUMERICAL CALCULATIONS 27

CHAPTER 5. RESULTS AND DISCUSSION 34

CHAPTER 6. CONCLUSION 39

REFERENCES 40

List of Figures

Figure 1.1: Reverse Recovery waveform for ‘SiC’ SBD and Si FRD 5

Figure 1.2: Reverse Recovery waveform in forward current Dependency for SiC-SBD 6

Figure 2.1: Single Crystal Moissanite 7

Figure 2.2: 3 mm Diameter of SiC Crystals 8

Figure 2.3: Lely SiC Crystals 8

Figure 2.4: Simple design of Acheson furnace 9

Figure 2.5: Schematic diagram of Acheson process resistive furnace 10

Figure 2.6: Resistor furnace after cooling 11

Figure 2.7: The development of GUI in Acheson process 12

Figure 2.8: 3C-SiC cubic crystal structure 13

Figure 2.9: 4H-SiC crystal structure 13

Figure 2.10: 6H-SiC crystal structure 14

Figure 2.11: Schematic diagram of Ion implanter 15

Figure 2.12: Plot for implanted ion distribution before annealing 17

Figure 2.13: Schottky barrier formation between a metal and n-type

Semiconductor 18

Figure 3.1: Transfer characteristics of MESFET 20

Figure 3.2: Basic MESFET structure 21

Figure 3.3: Operating region of MESFET at (a) Linear (b) cutoff and

Figure 3.4: Schematic Diagram of MESFET 23

Figure 3.5: Simple design of Silicon carbide MESFET 24

Figure 3.6: Schematic diagram of 4H-SiC MESFET 24

Figure 5.1: Electrostatic potential versus channel length 34

Figure 5.2: Threshold voltage versus Back-Gate Voltage 35

Figure 5.3: Threshold voltage versus Back- Gate voltage 36

Figure 5.4: Electrical field in channel versus drain-to-source voltage 37

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List of Tables

Table 1: Different properties of SiC polytypes 3

Table 2: Differentiation between different properties of materials 25

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Abstract A FULLY ANALYTICAL BACK-GATE BIAS MODEL FOR n-CHANNEL SILICON CARBIDE MESFETs WITH BACK CHANNEL IMPLANT. By Sushma Malku Masters of Science in Electrical Engineering.

The main goal of this grad thesis is to develop an analytical model for n-channel MESFET device and understanding the device parameters incorporating the back-gate biasing effect.

The device has been structured by n-channel using front and back doping processes. The physics based analytical model of SiC MESFET gave the clear picture of electrostatic potential distribution at any position of channel. The electric field distribution underneath the gate under drain source biasing shows an important properties of electric field distribution. The threshold voltage variations with back gate biasing for different substrate concentration and ion dose have been discussed to study the device properties for switching and frequency performance. The grad thesis incorporate the introduction of the thesis in chapter 1, silicon carbide material in chapter 2, MESFET physics in chapter 3, numerical calculations in chapter 4 and results and discussion in chapter 5.

CHAPTER 1 INTRODUCTION

Silicon carbide is the chemical element with carbon and silicon, having the chemical formula ‘SiC’. Originally, it was generated by an electro-chemical reaction at high temperatures. The reaction takes place between carbon and sand. SiC is extremely rough and has been made into grinding wheels and other byproducts for more than ten decades.

SiC semiconductors have been known for many years, but its semiconducting properties have been sufficiently applied over the past twenty years. SiC is expeditiously becoming the semiconductor hand-picked for improved applications, where enhanced high temperature, an acrid environment, higher voltage, and huge power density execution is expected [1].

The properties of silicon semiconductor materials restrict workability of electronic devices to a confined range of applications. Power electronics dependent on Si transistor techniques have reached the limits of design on mass, diameter, and efficiency. A few of their properties are:  Low denseness  High stability  Less thermal expansion coefficient  Higher conductivity and hardness  Higher radiation resistance. The huge thermal conductivity combines with thermal expansion, which gives strength to the material and provides better thermal shock resisting qualities. SiC is doped with n-type elements such as phosphorus and nitrogen, and with p- type elements such as aluminum and boron [1]. Heavy doping with boron, aluminum or nitrogen gives the metallic conductivity. Superconductivity can be detected at the same temperature of 1.5K in all the dopings of 3C-SiC with aluminum, 3C-SiC with boron, and 6H-SiC with boron.

Silicon carbide’s most dependable property is its wide bandgap (>2.3eV). Due to the requirement of energy being more for electrons to reach the conduction band which creates it, it is largely used for higher voltages and higher temperatures. Silicon material has an electric field breakdown of about 300kV/cm, and needs to be 10 times the size to hold the same voltage as silicon carbide, with its electric field breakdown at about 4MV/cm. This fact makes it more efficient and able to be used in high-speed devices, at much higher operational voltages [2]. This property has enabled silicon carbide devices to be used in switches for power grids, which improves the speed of switching, reducing power loss, and improving reliability. The various aspects including reliability and cooling are very important for the enhancement in power density that affects the performance of the power grid.

Silicon carbide has various material properties that makes it a substantial material for use in various power applications. To name a few of those properties, they are:

 a higher electric field: 4 x 106 volts/cm

 a higher drift velocity: 2 x 107 cm/sec

 a higher thermal conductivity : 4.9 watts/cm-oK

In contrast to silicon, SiC has higher thermal conductivity, bandgap and dielectric breakdown strength. Semiconductor materials, where both n and p-type regions are important for designing the device structures, can be processed in SiC. The most promising properties of SiC make the material popular, and so it is used to design power circuits which exceed the performance capability of silicon. SiC materials have high breakdown voltage, low resistivity and can perform at high temperatures. SiC ceramics maintain their strength to very high temperatures with insufficient or no gain boundary condition impurities, up to approximately 1600°C. There is no loss of strength in this process. This material is used as wafer trays, due to the properties it possesses, namely, purity in chemicals, retention strength at higher temperatures, and resistivity to chemical reactions at different temperatures.

The properties of SiC make the metal-semiconductor field-effect transistors (MESFET) the most effective of the SiC device family. The exceptional thermal properties of SiC

2 makes it more popular for certain devices, because it gives more power compared to gallium arsenide, at any frequency level. The growth of SiC devices has been restrained because of the unknown scope of larger and higher quality SiC substrates. The improved substance and quality of the epitaxial film, better thermal management, and enhanced fabrication process have led to the remarkable performance of devices [2]. Due to these properties of SiC, devices made from it are used at high power and high temperature applications in the design of power amplifiers.

Silicon dioxide (SiO2) has high dielectric stability of insulators and is the main product in building metal oxide semiconductor field effect transistors (abbreviated as MOSFET). It has an original oxide of SiC. It can grow thermally in oxygen, in dry conditions. Most of the other semiconductor devices, like gallium nitride, do not have this advantage.

1.1 DIFFERENT SiC POLYTYPES:

In addition to all its useful properties, SiC performs polytypism. Polytypes, which are present in all device materials, are the same in two-dimensional closely-packed planes but different in the stack sequence, which is perpendicular to the plane. There are more SiC polytypes present with different sequences of stacking [2]. The polytypes bonding lengths are the same but its crystal symmetry is derived by stacking periodicity, which causes the difference in properties of both optical and electrical polytypes. 3C-SiC, 4H-SiC and 6H- SiC are a few polytypes. Because of the large mismatch in lattice in polytypes, huge quantities of 3C-SiC are currently not obtainable on the market. Only 4H-SiC and 6H-SiC polytypes are present in huge quantities in wafer form. 4H-SiC is more widely selected, because of the isotropic nature of its properties, compared to all other polytypes [3]. Table 1 illustrates the different properties of different SiC polytypes.

Property Si 3C-SiC 4H-SiC 6H-SiC Bandgap energy in eV. 1.12 2.39 3.23 3.0 Electric field in mv/cm. 0.25 2.12 2.20 2.5 Conductivity in w/cm oK. 1.5 5 4.90 5.0 Saturated velocity in 1.0 2.5 2.0 2.0 x107cm/sec.

Mobility of electrons in 1500 750 1000 370 cm2/Volts-Sec. Mobility of holes in 600 40 115 90 cm2/Volts-Sec.

Table 1: Different properties of SiC polytypes

1.2 SiC MESFET PERFORMANCE:

Microwave amplifier MESFETs are fabricated for a wide range of bandgap semiconductors. A recent study of an SiC MESFET with an oscillation frequency of 60 GHz, 110 W in the pulsed operation at 2.5GHz and cutoff frequency of 26 GHz, produces an output of 81.1 W/mm.

SiC devices have higher thermal conductivity, which makes them suitable for handling the capacity of higher power. A study on 4H-SiC with a voltage of a gate of -5V, a frequency of threshold at 2.2 GHz, and a power gain of 21.7dBm. It takes the voltage of drain as 20V and provides the device with 35.6% power, adding efficiency at 2.5 GHz [4].

Similarly a 4H-SiC MESFET is fabricated by ion implantation to observe the DC and RF properties of the main device. The MESFET which was fabricated shows the properties of best DC and RF with an oscillation frequency of 30 GHz and a cutoff frequency of 6 GHz. The power gain is 12.1dB and power output is 2.4W for a gate length of 1mm in diameter for devices at 3.0 GHz. Normally MESFET has the characteristics of a small signal, with cutoff frequency of 25 GHz and a higher oscillation frequency of 55 GHz.

In 2006, a study was performed by 2 CREE (U.S), whereby MESFETs were fabricated by using a substrate of SiC, which produced an output power of 8.2 W/mm. The p-type substrate was used for doping, with a buffer at 6x1015cm-3 giving 0.54µm in thickness. The n-type region substrate was used for channel doping at 3x1016cm-3 and 2.6x1018 cm-3 with 0.44µm and 0.43µm in thickness [2]. The power density was noted as 8.8 W/mm at a frequency of 3.5 GHz over a wafer of 340µm gate boundary for the SiC MESFET.

1.3 CHARACTERISTICS OF REVERSE RECOVERY TIME OF SiC MESFET:

Silicon works with fast recovery diodes (FRDs) such as p-n junction diodes. When the voltage in the junction changes from a forward direction to a reverse direction, it uses a high current, which causes a loss in switching. When voltage is employed in conduction, the switching loss takes place because of minority carriers in the drift layer. When the forward current is high, then there will be a long recovery time and recovery current [5].

SiC used in SBDs (Schottky Barrier Diodes) uses majority carrier devices for conduction. The minority carriers of the device are not employed because there are no minority carriers. The junction capacitance gets discharged in SiC SBDs by the recovery current in a reverse direction. Because of this, SiC SBDs have less switching loss in comparison with Si FRDs [6]. SiC SBDs have fast and stable recovery because the transient current does not depend on forward currents and temperatures. This is a very good advantage of SiC SBDs compared to Si FRDs, which produce very low noise from the recovery current. Figure 1.1 shows the characteristics of reverse recovery time in temperature dependency.

Figure 1.1: Reverse recovery waveform for SiC SBD and Si FRD [6]

Figure 1.2 shows the reverse recovery characteristics waveform in forward current dependency.

Figure 1.2: Reverse recovery waveform in forward current dependency for SiC-SBD [6].

CHAPTER 2

SILICON CARBIDE

2.1 MATERIAL INFORMATION:

In particular varieties of meteorite and corundum deposits, naturally occurring moissanite is found in very low quantities, and most of the SiC in moissanite jewels is synthetic. Dr. Henri Moissan was the first to discover naturally occurring moissanite in Arizona, after who it is named as moissanite [1]. A single crystal of moissanite of 1mm size is shown in Figure 2.1. Moissan’s discovery was disputed, as it was believed that the sample might be contaminated by SiC saw blades.

Figure 2.1: Single crystal moissanite [1]

Silicon carbide is relatively common in space, whereas it is very rare on Earth. The carbon-rich stars are surrounded by stardust, and samples of it are a common form of SiC found in natural conditions in basic meteorites [1]. SiC present in space and meteorites is the exclusive form of the beta-polymorph. Analyzing the SiC grains obtained from chondritic carbonaceous meteorites has resulted in unusual silicon and carbon isotopic ratios, which depict formations from the start of our universe.

2.2 PRODUCTION OF SILICON CARBIDE:

As natural moissanite is so rare, most SiC is synthetic. It can be utilized as the best quality semiconductor and as diamond. The combination of silica and carbon materials is heated in a furnace in temperatures between 1600oC to 2500oC. This results in a chemical

7 reaction and gives an α-SiC formation. Figure 2.2 shows a sample of SiC crystals 3mm in diameter.

Figure 2.2: 3mm-diameter SiC crystals [1]

The graphite core in the furnace is connected with electrodes on both sides to produce the heat, which gives energy to the whole reaction. The SiC layers are formed around the graphite core. SiC forms in different colors, depending on the purity of the raw materials. Crystals which form in light yellow or green have high purity. Sometimes they form with a blue color, which shows that the crystal is not so pure [8].

Compared to the conventional Lely process, an enhanced Lely process involving heating graphite gives large single crystals. This is a chemical vapor deposition process (CVD). The process is most expensive and it forms cubic SiC. Employing both gas and liquid phase approaches, both homo and hetero epitaxial SiC crystals are grown. Figure 2.3 shows sample SiC crystals which have been prepared by the Lely process [9].

Figure 2.3: Lely SiC crystals [5]

2.3 MANUFACTURING OF SILICON CARBIDE:

2.3.1 ACHESON PROCESS: SiC is also known as carborundum. This term gave Edward G. Acheson the idea of making diamond crystals. Soon Acheson created a process called the Acheson process, which makes the SiC crystals. After inventing this process, he designed an electric furnace, and most SiC manufacture today is based on this design. Acheson’s electric furnace has a graphite core with two electrodes. Figure 2.4 shows the simple design of the Acheson furnace.

Figure 2.4: Simple design of Acheson furnace [3]

An electric current is passed through the graphite core in the furnace. The core is surrounded by carbon, sand and salt. The current heats the graphite and all materials, allows them to respond, and, as a result, SiC is formed around the graphite core. Carbon monoxide is also formed in this process [8]. Four chemical reactions will takes place in this process which produces SiC. They are:

1. SiO2 + C → CO + SiO

2. SiO2 + CO → CO2 + SiO

3. CO2 + C→ 2CO 4. SiO + 2C → CO + SiC

Using SiC, the first LEDs were developed by the Acheson furnace. Based on the Acheson process, the development of the Lely process depends on the abundant use of SiC as a semiconductor LED, but also allows control over the SiC crystals’ purity. Figure 2.5 shows a schematic diagram of the Acheson process resistive furnace.

Figure 2.5: Schematic diagram of Acheson process resistive furnace [5]

Using the Acheson process, the first commercial plant was built in New York by Acheson. The necessary power for the process of this energy intensive system was inexpensively produced by hydroelectric plants. One million pounds of “carborundum” was being produced by the Carborundum Company by 1896. Even today, many silicon carbide plants use the Acheson plant as their first basic design. In the first step of the plant, in order to control the purity, salt and sawdust was added to sand. But later, in the 1960s, adding salt to the sand was stopped, since the purity was greater, causing the corrosion of steel structures. To reduce the emissions in some plants, the adding of sawdust to the sand was stopped as well.

The Acheson process has to run for approximately 20 hours, with 200 A of current, using 40,000–50,000 volts for manufacturing synthetic graphite. After the Acheson process, graphite will achieve purity of 99.5% [9].

The raw materials which are mainly used are SiO2 and C. These materials are made in such a way that they should respond at high temperatures. When sawdust is added, it burns and create pores, which allows the generated gases to escape at very high temperatures. For almost 40 hours, firing is done, and the side walls are removed after it cools.

Figure 2.6 shows the resistive furnace after cooling, which shows SiC isolated by different sizes of particle. The complete reaction process is very complex and is low in productivity.

Figure 2.6: Resistor furnace after cooling [5]

A robust one-dimensional mathematical model takes conduction, convection and radiation as transfer modes. To solve the balance equations, the Finite Volume technique is executed. An experimental method is developed in a laboratory to validate the technical model. Both the experimental information and the model show the same results. Now vigorous attempts are being made to make a 2-D mathematical model. A GUI (Graphical User Interface) has been developed. Figure 2.7 show the plot of the graphical user interface development for the Acheson process.

Figure 2.7: The development of a GUI in the Acheson process [5]

2.4 SiC CRYSTAL STRUCTURE:

SiC structure occurs in many crystalline forms, which are different from each other. Those are specifically called polytypes. The polytypes are characterized as the same crystal structures of a huge family. About 170 SiC polytypes are available. Out of all of them, only a few are widely grown and used as electronic semiconductors.

All SiC polytypes are composed of the same number of carbon atoms and silicon atoms, which are bonded covalently. The most popular SiC polytypes which are being developed for the use of electronics have a structure of 3C-SiC, 4H-SiC and 6H-SiC [10]. These polytypes are determined by bi-atomic layers of an SiC structure by the stacking sequence.

To determine the planes and directions of the crystal for cubic structure, the three miller indices rule is used. This is represented by integers having the identical ratio as a reciprocal of the intercepts of the x-axis, the y-axis and the z-axis respectively.

For a hexagonal structure, four axes are used to represent the structure. Only three axes are used to indicate direction, whereas the fourth axis is perpendicular to the plane which is determined by the other three axes.

3C-SiC, with the cubic crystalline structure of SiC, is the only form. Every bilayer of SiC can be created in only three positions in order in the lattice. Those three positions of layers are represented as A, B and C. The sequence of the stack can be represented as ABCABC, and the structure of this sequenced crystal is cubic. This arrangement is also referred to as 훽-SiC. The number 3 in the 3C-SiC represents the number of layers used for periodicity [10]. Figure 2.8 shows the 3C-SiC cubic crystal structure.

Figure 2.8: 3C-SiC cubic crystal structure [10]

The bilayer, which has the stacking sequence of ABAB, is named 2H-SiC. It has hexagonal symmetry and is also called wurtzite. The SiC polytypes which have a non-cubic crystal structure are also referred to as α-SiC.

The combination of a wurtzite bond and zinc-blende bond makes all other SiC polytypes. The hexagonal 4H-SiC has the sequence ABCB. 4H-SiC has the same number of hexagonal bonds and cubic bonds. Figure 2.9 shows the crystal structure of 4H-SiC.

Figure 2.9: 4H-SiC crystal structure [10]

Two parts of cubic bonding and one part of hexagonal bonding make the crystal structure of 6H-SiC. It has the stacking sequence of ABCACB. Even though bonds between the polytypes are cubic, it has a hexagonal structure in its total symmetry. Figure 2.10 represents the basic crystal structure of 6H-SiC.

Figure 2.10: 6H-SiC crystal structure [10]

2.5 PROPERTIES OF SILICON CARBIDE:

SiC is most widely used as a good semiconductor because of its best properties [7]. Some of them are:

 Definite strength  Clearly defined stiffness  Less weight  Good resistance  Availability in many complex shapes  Young’s modulus property of temperature.

2.6 ION IMPLANTATION TECHNOLOGY:

Ion implantation is the process which produces ions of particles. Those ions are accelerated into an electric field. The impurity species are very low in diffusivity. The diffusion coefficient of an impurity atom in SiC cannot meet the particular value by the doping process using the diffusion process. Thus, the diffusion process is replaced by ion implantation, and after ion implantation, annealing takes place at high temperatures. The

14 applications of SiC MESFET become more attractive when the dimensions of the device and the usage of power supply voltages are decreased [11].

An ion implanter is a high voltage accelerator which produces the impurity ions with a high-velocity beam. The impurity ions penetrate through the surface of the silicon targeting wafers. Figure 2.11 shows the different parts of the system.

Figure 2.11: Schematic diagram of ion implanter [11]

1. Ion source: The ion source produces the plasma, which contains impurities and some gases. The gases arsine, phosphine and diborane are used in the source. This source operates at a high voltage of 25kV and provides flexibility in a wide range.

2. Mass separator: An analyzing magnet bends the beam of ions at a right angle to choose a particular ion. The selected impurity ion passes through an aperture, which goes into an accelerator.

3. Voltage accelerator: A high voltage accelerator column builds up energy of 5mev to an ion beam and accelerates the ions to reach the destined velocity. The ion source and accelerator are operated in a shield to protect them from the high velocity and the x-ray emissions.

4. Scanning system: To scan the beam across the wafer, x-axis and y-axis scan plates are used. Uniform implantation and dose are produced by this process. To prevent the particles hitting the target, the beam is bent slightly.

5. Target chamber: The wafer acts as target for ion beam. The targeted areas are maintained under vacuum conditions for safety.

2.6.1 ION IMPLANTATION MATHEMATICAL MODEL:

An ion collides with the atoms in the lattice as it enters the surface of the wafer and interacts with the electrons in the crystal. Every time the ion interacts with an electron, it looses its energy and finally goes into a rest position with the target. The process of interaction with an electron in the crystal is a statistical process. The impurity ion profile which is implanted is executed by the Gaussian distribution function [11]. The mathematical expression for the Gaussian distribution function is given as:

2 푥 − 푅푃 푁(푥) = 푁푃 exp [− ( 2 ) ] (1) 2∆ 푅푃 where, RP is the implanted range and is equal to the average distance travelled by an ion before it stops.

NP is the peak doping concentration, which can be mathematically expressed as:

Q 푁푃 = (2) √2π ∆푅푃 where, Q is the implanted dose area covered under the impurity distribution curve.

A few ions will penetrate beyond the implanted range and a few ions will not be able to make it to RP [11]. This process of distribution is given by the standard deviation∆푅푃, which is also called the straggle parameter.

The junction depth can be expressed mathematically as:

푁푃 푥푗 = 푅푃 ± ∆푅푃√2 ln ( ) (3) 푁퐵

16 where NB is the background concentration.

An ion implantation distribution curve before annealing can be shown in Figure 2.12.

Figure 2.12: Plot for implanted ion distribution before annealing [11]

2.7 SCHOTTKY BARRIER DIODE:

The metal is made to contact with an averagely doped N-type semiconductor, and the complete contact system is combined to create a Schottky diode. A Schottky barrier diode is an extended version of the point contact diode, which was most widely used for older semiconductor devices. A Schottky barrier diode is a unipolar device, since both sides of the junction are occupied with the electrons, which act as majority carriers [12]. This is also the reason that there will be no formation of a depletion layer near the junction. In reverse bias, there is no current flow from the metal to the semiconductor. Since the contact area between the metal and the semiconductor is large, the noise and the resistance are low. Figure 2.13 shows the formation of a Schottky barrier before contact and after contact between an n-type semiconductor and a metal.

Figure 2.13: Schottky barrier formation between a metal and an n-type semiconductor [12]

A Schottky barrier is created between the metal and the semiconductor by forming a metal-semiconductor junction. Metals such as platinum, aluminum and tungsten, which act as an anode, and a semiconductor such as n-type silicon, which acts as a cathode, are used for the formation of a Schottky barrier. Fast-switching technology and less voltage drop is the result of the Schottky barrier. The voltage of the Schottky diode discovers the combination of the metal and the semiconductor. A Schottky barrier can be created with an n-type semiconductor as well as a p-type semiconductor [13]. The p-type semiconductor is used much less because of its lower forward voltage. The MESFET uses a reverse bias Schottky barrier. The conduction channel which is present inside the semiconductor is pinched off by the depletion region provided by the Schottky barrier, whereas in a JFET, the depletion region is provided by the p-n junction diode.

CHAPTER 3

PHYSICS OF MESFET

3.1 INTRODUCTION:

MESFET is abbreviated as metal-semiconductor field-effect transistor. An MESFET is most widely used in microwave circuits, since it uses high-frequency amplifiers. It is otherwise known as a high-performing field-effect transistor, ‘FET’. While inventing the first BJT (bipolar junction transistor), the field-effect transistor principle was developed as well. The semiconductor technology for BJTs was first introduced in 1949. The first semiconductor technology is the MESFET technology, with the components of electronics.

The MESFET semiconductor technology became most popular for developing the practical form of the FET in 1953. When semiconductor technologies were developed, it meant less cost and easier ways to produce pure forms of semiconductors in huge quantities [14]. This technology also helped to produce layers of the oxide with good quality.

In 1960, electronic semiconductor technology, along with its developments, introduced the first MOSFETs and some devices like GaN FETs and GaAs FETs, with the capability of high frequency and less noise. In 1966, the first MESFET was introduced, with high frequency and good microwave operations.

3.2 TYPES OF MESFET:

There are two different types of MESFETs, as follows:

1. Enhancement mode MESFET

2. Depletion mode MESFET.

The depletion region in the enhancement mode is wide, which is used to cut off the channel by not applying the voltage. Thus, MESFET in enhancement-mode is naturally off. The channel gets conductive and the shrinking in the depletion region takes place when there is a positive voltage between the source and the gate. This positive gate-to-source voltage also runs the Schottky diode in forward bias, which gives a large flow of current.

Enhancement mode MESFETs have a difficult time making digital circuits for the same reason, and also because of fabrication problems.

The depletion in n-channel MESFET is the depletion mode MESFET. The depletion mode MESFET turns ‘ON’ when there is no voltage between the gate and source and it gets turned ‘OFF’ when there is negative voltage from gate to source. This negative voltage increases the depletion region’s width, thus the channel gets pinched off. The depletion mode MESFET also faces problems making the digital circuit, since the circuit requires the two different supply voltages.

The enhancement mode MESFET is naturally ‘OFF’ and it has a positive threshold voltage, whereas the depletion mode MESFET is naturally ‘ON’ and it has a negative threshold voltage. The channel thickness and the implanted impurity doping concentrations are used to determine the threshold voltage. The large negative threshold voltage can be determined when there is high doping concentration and large channel thickness, whereas the large positive threshold voltage is determined with the reduced thickness of the channel and the decreased density concentration for an enhancement mode MESFET [15]. Figure 3.1 shows the transfer characteristics of MESFET in enhancement mode and depletion mode.

Figure 3.1: Transfer characteristics of MESFET in enhancement and depletion modes [13]

The MESFET has maximum of 0.7V to 0.8V of gate-to-source voltage, which is operated by the Schottky diode. The operation of MESFETs is totally based on the principle of the interface of the metal and the semiconductor.

3.3 STRUCTURE AND CHARACTERISTICS OF MESFET:

The basic MESFET has a very simple structure. The n-type thin active region in a MESFET is used to combine the two different ohmic contacts. The doped drain and source are separated by a Schottky barrier metal gate, which overcomes the carrier flow between them [16]. The width of the depletion layer is changed under metal contact in order to control the channel, which again modifies the conduction channel thickness and the current. Figure 3.2 shows the basic MESFET structure.

Figure 3.2: Basic MESFET structure [15]

The changes in the field are obtained by changing the applied potential. These changes give rise to three different regions, which are:

(a) linear region

(b) cutoff region

Figure 3.3 shows the operating region of a MESFET at (a) linear, (b) cutoff and (c) saturation regions.

Figure 3.3: Operating region of MESFET at (a) linear, (b) cutoff and (c) saturation regions [14]

3.4 MESFET OPERATION:

A MESFET has more advantages in comparison with MOSFETs and FETs. Due to the effect of low scattering, a MESFET has much less noise. Thus it is also referred to as a majority carrier substrate. The mobility of electrons in the MESFET device has a vital role in having very high frequency and current. When there is a narrow gate carrier channel there will be a better chance of frequency handling capabilities. Both MESFET analog

22 circuits and digital devices work most significantly when the designs are confined to particular limits. The gate metal extension over the switched region is the most crucial part of the device design. Figure 3.4 shows the basic schematic structure of a MESFET.

Figure 3.4: Basic schematic structure of MESFET [15]

A p-type surface epitaxial layer, which has a low doping concentration compared to the channel layer, is placed between the gate and the drain. The built-in potential between the p-type layer and the n-type layer in the p-n junction decreases the peak electric field of the gate, which has the effect of a uniform distribution of the electric field [15]. Most of the depletion region stays in the p-type region in the p-n junction because the p-type epitaxial layer has low doping density. Because of this drawback, the p-type layer had bad performance with current density.

3.5 SIC MESFET STRUCTURE AND CHARACTERSITICS:

The MESFET construction is very much the same as that of a JFET (junction gate field effect transistor). The p-n junction is used as a gate in a JFET, whereas the Schottky barrier diode is used in a MESFET. An SiC MESFET is used in the manufacturing of devices which are used to work in different conditions such as high power and high voltage [16]. MESFETs are usually executed at 45GHz of frequency. One of the disadvantages is that SiC MESFETs are the more expensive devices, compared to JFETs and MOSFETs. Figure 3.5 shows the simple design of an SiC MESFET.

Figure 3.5: Simple design of a silicon carbide MESFET [16]

The breakdown voltage is an important parameter for an SiC MESFET. It enables the device to attain particular density and power conversions. Many research technologies were executed for the improvement of breakdown voltage. New technologies such as reduced bulk field and 3D reduced surface field have been developed to improve the surface electric field and breakdown voltage. The new SiC power MESFET has been obtained to improve the conditions of breakdown voltage, specifically resistance, frequency and transconductance. Figure 3.6 shows a schematic diagram of an 4H-SiC MESFET.

Figure 3.6: Schematic diagram of an 4H-SiC MESFET [16]

The benefits of an SiC MESFET are:

 Wide energy bandgap device  High breakdown electric device  High electrical and thermal conductivity  High saturated electron velocity  High melting point  Chemically inert.

Table 2 shows the comparison between different properties of materials.

Properties Si 3C-SiC 4H-SiC Diamond Bandgap (eV) 1.12 2.36 3.23 5.46-5.6 Dielectric constant 11.7 9.72 9.7 5.7 Linear-thermal 2.6 2.77 4.2-4.7 0.8 expansion(x10-6/oC) Thermal 1.3 3.6 3.7 6-20 conductivity(W/cmo C) Carrier mobility of 1400 380 800 2200 electron(cm2/V-s) Carrier mobility of 450 15-21 115 1800 holes(cm2/V-s)

Table-2: Comparison between different properties of materials.

3.6 MESFET APPLICATIONS:

 RF amplifiers  Microwave circuits  Power amplifiers  Mixers and oscillators  Low-noise amplifiers  RF amplifiers of higher frequency and lower noise.

3.7 ADVANTAGES AND DISADVANTAGES OF MESFET:

 MESFET technology is most widely used for high electron mobility.  A MESFET enables amplifiers to be executed at a high frequency of 100GHz.  It has a negative temperature co-efficient, which solves the thermal problems created by transistors.  It doesn’t have oxide trap related problems.  The length of the channel is good.  The electron velocity and thermal conductivity are high.  The devices are very sensitive and are static; it will be destroyed if handled roughly.  The gate junction gets destroyed easily when there is current flow.

CHAPTER 4

NUMERICAL CALCULATIONS

The Analytical modeling of the SiC MESFET device with the implanted back channel has been computed using the Poisson’s equation to calculate an electrostatic potential electric field and the threshold voltage. The Poisson’s equation can be defined as

휕2∅ 푞 2 = − 푁퐷 For 0 < 푥 < 푥푖 (1) 휕푥 휖푠푖푐

Where

ND = Effective doping density

휖푠푖푐 = Permittivity of the silicon carbide material q = Electron charge x = Any position in the channel

∅ = Potential of the channel

푥푖 is the channel junction depth, which can be expressed as

푁푃 푥푖 = 푅푝 ± ∆푅푝√2푙푛 (2) 푁퐵

Where

Rp = Implant range parameter

∆ Rp = Straggle parameter

NP = Peak concentration

NB = Background concentration

The values for the implant range parameter and the straggle parameter can be calculated by using the tool SRIM.

The Electric field in the channel can be considered as zero, which gives the changed equation for the Electrostatic potential in the region. Hence, the equation for the electrostatic potential can be written as

푞 2 ∅(푥) = 푁퐷(푥 − 푥푐) + ∅(푥푐) (3) 2휖푠푖푐

Where

∅(푥푐) = The electrostatic potential in the channel q = Electron charge

휖푠푖푐 = Permittivity of silicon carbide

ND = Effective doping density

푥 = any position of channel

푥푐= channel length

In the region (푥푑 < 푥퐴).The Poisson’s equation can be written as

휕2∅ 푞 2 = 푁퐴 푥푖 < 푥 < 푥푑 (4) 휕푥 휖푠푖푐

Where

NA = Effective doping density

푥푑 = The location of the depletion edge below the channel

In the depletion region, the electric field can be taken as zero, hence now, the electrostatic potential can be written as

푞 2 ∅(푥) = 푁퐴(푥 − 푥푑) + ∅(푥푑) (5) 2휖푠푖푐

Using the equations (3) and (5), the equation for the channel location can be written as

2 푁퐴푁푦 1 푁퐴푁퐷 2 2휖푠푖푐 푞 2 푥푐 = 2 푥푖 − √( ) 푥푖 + 푁퐴 [∅(0) − ∅(푥푑) − 푁푦푥푖 ] (6) 푁퐷 푁퐷 푁퐷 푞 2휖푠푖푐

Where

푁퐷 푁푦 = 푁퐷 ( + 1) (7) 푁퐴

∅(0) = the electrostatic potential at the silicon carbide surface, which can be represented in equation form as

퐸푔 푁퐶 ∅(0) = 휒 + + Vt ln − 휙푛 + 푉푔 (8) 2푞 푁푉

Where

푘푇 Vt = Threshold voltage, i.e., Vt = 2푞

휒 = The electron affinity of silicon carbide

Eg = Energy band gap

휙푛 = The work function

Vg =Gate voltage

K = Boltzmann constant

T = Temperature

NC = Effective density of the states in conduction band at 300K

NV= Effective density of the states in valence band at 300K

The Electrostatic potential at channel length can be written as

푞 2 ∅(푥푐) = 푁퐷푥푐 + ∅(0) (9) 2휖푠푖푐

When the channel potential reaches the fermi potential in n-channel in opposite direction,−휑푓푛. The threshold voltage can be defined as

푉푇 = 푉푔[∅(푥푐) = −휑푓푛] (10)

Substituting the equations (8) and (9) in equation (10), which gives the following equation,

푞 2 퐸푔 푁퐶 푉푇 = −휑푓푛 − 푁퐷푥푐 − (휒 + + Vt ln − 휙푛) (11) 2휖푠푖푐 2푞 푁푉

Where

Vt = threshold voltage

휙푛=work function of the Schottky contact.

The equation for the channel location can be rewritten as

−1 2휖푠푖푐 푁퐷 푥푐 = 푥푖 − √ (1 + ) (−휑푓푛 − 푉퐵 + 휑푓푝) (12) 푞푁퐷 푁퐴

Where

푥푖 = Channel Junction depth

푁퐷 휑푓푛 = fermi level in n-channel, that is 휑푓푛= Vt ln ( ) 푛푖

푁푉 휑푓푝 = fermi level in p-channel, that is 휑푓푝 = 푉푡ln ( ) 푁퐴

푉퐵 = Back gate bias voltage.

In the region (푥푑 > 푥퐴), the Poisson’s equation can be written as

휕2∅ 푞 2 = 푁퐴 푥푖 < 푥 < 푥퐴 (13) 휕푥 휖푠푖푐

휕2∅ 푞 2 = 푁푠 푥퐴 < 푥 < 푥푑 (14) 휕푥 휖푠푖푐

Where

NA = Effective doping density

Ns = Substrate doping concentration, which can be defined by the formula as

푥 − 푅 퐷푠 푑 푝 2 푁푠 = exp [−( ) ] (15) 휎√2휋 ∆푅푝√2

푥퐴= back channel implanted region.

By considering regions 푥푖 < 푥 < 푥퐴 and 푥퐴 < 푥 < 푥푑. The above equations can be written as

∂∅ 푞 = 푁퐴푥 + 퐴21 푥푖 < 푥 < 푥퐴 (16) 휕푥 휖푠푖푐

∂∅ 푞 = 푁푠푥 + 퐴31 푥퐴 < 푥 < 푥푑 (17) 휕푥 휖푠푖푐

The electric field can be considered as zero at the region (푥 = 푥푑).Hence, the equation (17) can be solved, which gives us the value of the constant A31.

Which can be defined as

퐴31 = − 푞⁄휖푠푖푐Ns푥푑 (18)

When at (x = xB) and the equations (16) and (17) should be considered as equal. As a result, we get the value of A21 as

퐴21 = 푞⁄휖푠푖푐푁푠(푥퐴 − 푥푑) − 푞⁄휖푠푖푐푁퐴푥퐴 (19)

Where

푥퐴= back channel implanted region

An electrostatic potential equations can be derived by integrating the above equations (16) and (17), which gives

푞 2 푞 ∅(푥) = 푁퐴(푥 − 푥퐴) + 푁푠푢푏(푥A − 푥푑) + 퐴22 푥푖 < 푥 < 푥퐴 (20) 2휖푠푖푐 휖푠푖푐

푞 2 ∅(푥) = 푁푠(푥 − 푥푑) + 퐴32 푥퐴 < 푥 < 푥푑 (21) 2휖푠푖푐

At x =xd, An electrostatic potential is ∅(푥푑) = VB - 휑푓푠푢푏.Which gives the constant value of A32.

That is given as 퐴32= ∅(푥푑).

Where

푁푐 휑푓푠푢푏 = fermi level in substrate region, that is 푉푓푠푢푏 = 푉푡ln ( ). 푁푠

At x =xA, the electrostatic potentials, which are derived from the above equations (20) and

(21) should be equal. Which gives the value of a constant variable, A22.

2 퐴22=(푞⁄2휖푠푖푐)푁푠(푥퐴 − 푥푑) + ∅(푥푑) − 푞⁄휖푠푖푐푁푠 (푥퐴 − 푥푑). 푥퐴 (22)

The equation for the electrostatic potential can be written as

푞 2 푞 푞 2 ∅(푥) = 푁퐴(푥 − 푥퐴) − 푁푠(푥d − 푥퐴)(푥 − 푥퐴) + 푁푠(푥d − 푥퐴) + ∅(푥푑) 2휖푠푖푐 휖푠푖푐 2휖푠푖푐

At 푥푖 < 푥 < 푥퐴 (23) xd is the depletion width in drain, which is given as

2휖푠푖푐 푥푑 = √ (푉푏푖 + 푉퐷푆 − 푉퐺푆 − ∆) (24) 푞푁퐷

Where

푉푏푖= built in voltage of the P-N junction, which can be expressed as

푁푎푥푁푑 푉푏푖 = 푉푡 ln ( 2 ) (25) 푛푖

푉퐷푆 =Drain-to-source voltage

푉퐺푆= gate-to-source voltage

The delta is the depth of fermi level, which can be defined as

퐾푇 푁 ∆= ln ( 퐶) (26) 푞 푁퐷

Where

3 15 -3 NC =3.25x10 x 푇2 (cm ) for SiC

15 3/2 -3 NV = 4.8x10 x T (cm ) for SiC

T= temperature

The channel location and the channel potential can be derived from the equations (3) and (23) are

2 푥푖 − 푥푐 = −퐿1+√퐿1 − 퐿2 (27)

Where

푁푠 푁퐴 퐿1 = [푥푖 − ( − 1) (푥A − 푥푖)] (28) 푁퐷 푁푠

푁푠 푁퐴 2 2 2휖푠푖푐 퐿2 = 2 [( − 1) × (푥A − 푥푖) − 푁퐷푥푖 − [∅(0) − ∅(푥푑)]] (29) 푁퐷 푁푠 푞

푞 2 ∅(푥푐) = 푁퐷푥푐 + ∅(0) (30) 2휖푠푖푐

The threshold voltage can be derived from the equations (11) (27) and (30) is

푞 2 퐸푔 푁퐶 푉푇 = −휙푓푛 − 푁퐷푥푐 − (휒 + + Vt ln − 휙푛) (31) 2휖푠푖푐 2푞 푁푣

Where

VT = threshold voltage

휙푛 = work function

1 2 푥푐 = 푥푖 − (−퐾2 + √퐾2 − 4퐾1퐾3) (32) 2퐾1

푞 푁퐷 퐾1 = 푁퐷 ( + 1) (33) 2휖푠푖푐 푁푠

푞 푁퐴 퐾2 = − 푁퐷 ( − 1) (푥A − 푥푖) (34) 휖푠푖푐 푁푠

푞 푁퐴 2 퐾3 = 푁퐴 ( − 1) (푥A − 푥푖) + 휙푓푛 + 푉퐵 − 휙푓푠푢푏 (35) 2휖푠푖푐 푁푠

CHAPTER 5

RESULTS AND DISCUSSION

The Electrostatic potential distribution in the n-channel, threshold voltage, electric field in the channel has been developed for an analytical model of a SiC MESFET. By using MATLAB, the analytical model has been simulated to study the properties of electrostatic potential distribution in n-channel versus back channel implanted region. Figure 5.1 shows the plot for Electrostatic potential distribution in n-channel versus channel length.

Figure 5.1 Electrostatic Potential versus Channel Length. Figure (5.1) shows the plot of the electrostatic potential distribution in n-channel versus gate length for different values of back biasing in back channel implant in the order of Vb

= -5V,-3V, and 0V with substrate doping of (Na) of 3x1017cm-3 and ion dose (Ds) of 12 -2 -4 3.5x10 cm . The fabrication parameters shows the junction depth (xi) of 0.152x10 cm -4 considering the implant range parameter (RP) of 0.069x10 cm and straggle parameter of 0.0313x10-4cm. The threshold voltage exponentially decreases with increase of channel length from 0 to 0.35x10-4cm because of channel charge reduced due to the gate length shortening. The plot has been evaluated by using the equation (6).

Below Figure 5.2 shows the plot for Threshold voltage versus back gate biasing (V) for different substrate doping concentrations.

Figure 5.2 Threshold Voltage in volts versus Back-Gate Voltage. Figure (5.2) shows the plot of back gate voltage (V) versus threshold voltage (V) for 15 -3 15 -3 different substrate doping concentration (Nsub) of 0.5x10 cm , 1.5x10 cm and

15 -3 12 -2 3.5x10 cm with ion dose Ds = 3.5x10 cm and back channel effective doping 15 -3 -4 concentration (Na) = 1.5x10 cm . The junction depth was found in order of 0.152x10 -4 - cm using ion range parameter RP of 0.069x10 cm and straggle parameter of 0.0313x10 4cm. the threshold voltage linearly decreases to the value of -2.62V for zero back-gate biasing. The substrate doping concentration of 3.5x1015cm-3 offers small substrate space charge with compared other substrate dopings. Therefore lower threshold voltage of -1.1V will trigger the device ‘ON’ state. The plot has been generated by using the equation (30). Below figure 5.3 shows plot for Threshold voltage versus back gate voltage (V) for different back channel implant doses.

Figure 5.3 Threshold voltage in volts versus back gate voltage (V). Figure (5.3) shows the plot of back gate biasing (V) versus threshold voltage (V) for 13 -2 13 -2 13 -2 different back channel implant doses (Ds) of 2x10 cm , 3x10 cm and 4x10 cm with

15 -3 back channel implanted effective doping concentration (Na) of 4x10 cm , the edge of the -4 -3 back channel implanted region (xb) of 0.352x10 cm and the channel junction depth(xj) of -4 -4 0.152x10 cm calculated from SRIM data (implant range parameter(Rp) of 0.069x10 cm and straggle parameter of 0.0313x10-4cm). The threshold voltage almost linearly increase with increase of back-gate biasing range from -5V to 0V.

Below figure 5.4 shows the plot for Electric field in channel versus drain-to-source voltage.

Figure 5.4 Electrical field in channel (V/m) versus drain-to-source voltage (V). Figure (5.4) shows a plot of vertical electric filed versus the drain-source voltage for different channel length of 0.35µm, 0.45µm and 0.55µm for the device with channel doping 17 -3 16 -3 (Nd) of 5.2x10 cm and substrate doping of 2.2x10 cm . The electric field linearly decreases with increase of drain source voltage varying from 0V to 40V. However, the

37 maximum electric field is obtained for the channel length of 0.35µm. In this case, the electric field is dominated by the channel length rather than drain biasing because the vertical electric field is dominated by the channel length. Thus, the plot has been generated by using the equation (15).

CHAPTER 6

CONCLUSION

An analytical model for n-channel MESFET device has been developed to study the device electrical parameters in the influence of the back-gate biasing effect. The device has been structured by introducing n-channel doping using front and back doping processes. The physics based analytical model of SiC MESFET showed the clear picture of electrostatic potential decrease with increase of channel length for different back gate biasing varying from -5V to 0V. The electric field intensity (underneath the gate) decrease with increase of drain source biasing. However, the maximum electric field for the channel length of 0.55x

10-4 cm varies from 8.9x104V/cm to 6.2x104V/cm for the drain-source voltage swing of

10V to 40V. The threshold voltage variations with back gate biasing from -5V to 0V for different substrate concentration has been evaluated. The device behaves as depletion device, but it is an interesting observation that high substrate concentration may offer the device to behave as enhancement mode. However, no significant effect on threshold voltage was found under certain range of back gate biasing. It has been found also that the threshold voltage increase with same transition of back gate biasing for different ion dose.

This research work is important to obtain any desired value of threshold voltage for normally-ON and normally-OFF MESFET by varying the substrate concentration and ion dose of the channel implant. The enhancement mode SiC MESFET is extremely difficult to fabricate. Therefore, this research work shows an indigenous potentiality for future research scope.

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