A8440 User’s Manual
A8440 User’s Manual
QS030522-06
Celestica 9 Northeastern Boulevard Salem, NH 03079
This User’s Manual is believed to contain accurate material at the time of printing. Celestica assumes no responsibility or liabilities for any use of the information contained in the manual.
Celestica retains the right to make changes to any information included in this manual, without the need to notify other parties, or to make changes in the product or manuals already distributed.
Celestica August 2003 All rights reserved.
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Table of Contents
Chapter 1 - INTRODUCTION 1.1 Overview 1-1 1.2 Feature Identification 1-3 1.3 Server Architecture 1-9 1.3.1 Motherboard 1-9 1.3.2 Personality Board 1-9 1.3.3 SCSI Backplane Board 1-10 1.3.4 Power Supplies 1-10 1.3.5 Interface Board 1-10 1.3.6 PCI Hot-Plug Board 1-10 1.4 External Connectivity 1-11 1.4.1 SCSI Connector 1-11 1.4.2 PS2 Keyboard/Mouse Connectors 1-11 1.4.3 Serial Port 1-11 1.4.4 Ethernet Port 1-11 1.4.5 USB Port 1-11 1.5 Contacting Celestica 1-12
Chapter 2 - INSTALLATION 2.1 Unpacking the System 2-1 2.2 Before Powering On the System 2-2 2.2.1 Inspect the Server 2-2 2.2.2 Install Additional Hardware 2-2 2.2.3 Remove the Handles 2-2 2.2.4 Install Slide Rails 2-2 2.3 Front Bezel Installation 2-5
Chapter 3 - SYSTEM INTERFACES 3.1 Switches/Buttons 3-1 3.2 Control Panel LEDs 3-1 3.3 Power Supply LEDs 3-2 3.4 PCI Hot-Plug LEDs and Switches 3-3
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Chapter 4 - SAFETY 4.1 Electrical Precautions 4-1 4.2 General Precautions 4-2 4.3 ESD Precautions 4-3 4.4 Operating Precautions 4-3
Chapter 5 – MOTHERBOARD SETUP 5.1 Adding Processors and Heatsinks 5-1 5.1.1 Processor and Heatsink Assembly 5-1 5.1.2 Processor Removal 5-5 5.2 Adding/Changing Memory 5-6 5.3 Understanding Interleave Options 5-7 5.4 SCSI Bus Order 5-9 5.5 Setting Up a Raid Array 5-10 5.6 Support for > 4 GB Memory 5-11
Chapter 6 – CHASSIS SETUP 6.1 Hot Swapping Devices 6-2 6.1.1 Power Supply Hot Swapping 6-2 6.1.2 SCSI Drive Hot Swapping 6-4 6.1.3 PCI-X Card Hot Swapping 6-4 2.2 Adding Devices 6-5 2.3 Fans 6-6
Chapter 7 - BIOS 7.1 Upgrading the BIOS 7-1 7.2 Electrically Clearing CMOS 7-3 7.3 Understanding Autoboot Options 7-4 7.4 Using Console Redirection 7-5 7.5 BIOS Setup Screen Snapshots 7-6
Appendix A - TECHNICAL SPECIFICATIONS FCC Compliance Statement 1 Environmental Requirements 1 Operational Environment 1 Non-operational Environment 2
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Appendix B - CONNECTOR ASSIGNMENTS External Connectors 3 VHDCI SCSI Connector 3 PS2 Keyboard and Mouse Connector 5 Serial Port Connector 6 USB Connector 7 Internal Connectors 8 68-Pin SCSI Connector 8 SCSI SCA Connector 10 EIDE 100 Port 11 Wake On LAN 12 64-Bit PCI Connectors 13 32-Bit PCI Connectors 16 Floppy Disk Drive Connector 19 Slim Floppy Connector 20
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vi USER’S MANUAL Chapter 1
1 Introduction
Overview and Features
his document provides guidance for setting up, configuring, and using the A8440 server. This document also supplies general system operation T information.
1.1 Overview
The A8440 server is equipped with many advanced features.
Electrical Features:
• Powered by up to four AMD Opteron™ Processors
• Support for up to 64 Gigabytes of PC3200, 128 Bit, Buffered, DDR DRAM
• DRAM Controllers support ECC and Bank and Node interleaving
• Ultra fast HyperTransport™ interface buses, between all primary devices
• Two PCI-X Hot Plug, 64 Bit, 3.3V, 133MHz slots
• Three PCI-X 64 Bit, 3.3V, 66MHz slots
• One PCI, 32 Bit, 5.0V, 33MHz, Small Form Factor slot (front side video)
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Chassis Features:
• Front mounted PS/2 Keyboard, PS/2 Mouse, and USB ports
• Front mounted System Power and Reset buttons
• Front mounted Power, Drive Activity, Ethernet Activity, and Fault LEDs
• Two 1000/100/10Base-T Ethernet ports
• One 100/10Base-T Ethernet port
• Two Ultra 320 SCSI buses (one internal, one external VHDCI)
• One UDMA EIDE/ATAPI bus
• One Legacy RS-232 Serial port
• One low profile CD/DVD-ROM Drive
• One low profile Floppy Disk Drive
• Support for up to three 540 Watt, Hot Swap Power Supplies
• Chassis support for up to four Ultra 320 SCSI Drives
• GEM capable SCSI Back plane supports Drive Hot Swap in RAID configurations
• IPMI based Server Management Controller, with dedicated 10Base-T Ethernet port
• Three chamber airflow design, for optimal internal cooling
• Individual fan fault LEDs
• Field replaceable CPUs, CPU VRMs, Memory VRMs, and fans
• Modular chassis design
• 4U Chassis conforms to standard 19” rack-mount definition
• Convenient detachable carrying handles
• Detachable Bezel Assembly
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1.2 Feature Identification
This section provides a series of drawings to familiarize the user with the many features of the Server.
FAULT LED SCSI DRIVE/BAY 3 NIC 2 ACT LED SCSI DRIVE/BAY 2 NIC 1 ACT LED SCSI DRIVE/BAY 1 DRIVE ACT LED SCSI DRIVE/BAY 0 POWER LED DV D-ROM DRIVE RESET BUTTON FLOPPY DRIVE POWER BUTTON USB PORT
KEYBOARD PORT MOUSE PORT
VIDEO PORT
Figure 1 - Front View without Bezel - External Features
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POWER SUPPLY 3
IPMI MGMT 10BASE-T
RS-232 SERIAL
ULTRA 320 SCSI PORT POWER SUPPLY 1
PCI-X SLOT 1, HOTPLUG, 133MHz
PCI-X SLOT 2, HOTPLUG, 133MHz
PCI-X SLOT 3, 66MHz
PCI-X SLOT 4, 66MHz
PCI-X SLOT 5, 66MHz
POWER SUPPLY 2 NIC 1, 10/100/1000BASE-T NIC 2, 10/100/1000BASE-T
NIC 3, 10/100BASE-T (L7)
Figure 2 - Rear View - External Features
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COVER LOCK DOWN SCREWS
CARRYING HANDLE
COVER LATCH TABS
CHASSIS SLIDE RAIL
Figure 3 - Side View - No Bezel - Carry Handle and Slide Rail
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7 5 3 1
8 6 4 2
10 9
SAFETY COVER LOCK DOWN
Figure 4 - Top View - No Top Covers - Fan Numbers and Positions
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CPU 3 CPU 2
CPU 1 CPU 0
PCI-X HOTPLUG MRLs VRM CPU 2 VRM CPU 1 DIMM SLOTS CPU 2 DIMM SLOTS CPU 1 VRM MEM CPU 2 VRM MEM CPU 1 VRM MEM CPU 0 DIMM SLOTS CPU 3 DIMM SLOTS CPU 0 VRM MEM CPU 3 VRM CPU 0 INT U320 SCSI CONNECTOR SCSI BACKPLANE CONNECTOR VRM CPU 3 PCI HOTPLUG ATTN SWITCHES and LEDs
Figure 5 - Top View - Interior Features - No Covers or Fans
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CPU 3 CPU 2 C C C C P P P P U U U U
1 1 1 1
D D D D C C C C I I I I P P P P M M M M U U U U M M M M
3 3 3 3 3 2 1 0
D D D D I I I I M M M M C C C C M M M M P P P P 3 2 1 0 U U U U
2 2 2 2
D D D D I I I I M M M M M M M M 0 1 3 2
CPU 1 CPU 0 C C C C P P P P U U U U
0 0 0 0
D D D D I I I I M M M M M M M M 0 1 2 3
CMOS CLEAR JUMPER, BATTERY
AND BIOS FLASH ROM SOCKET
Figure 6 - Motherboard – Top View - DIMM Slot Numbers and Positions
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1.3 Server Architecture The server’s major component is the motherboard. The motherboard supports the AMD Opteron™ processors, memory, the AMD-8111™ HyperTransport™ I/O hub, and the AMD-8131™ HyperTransport PCI-X tunnels. There is a personality board that is an extension of the motherboard. Since the A8440 supports an internal as well as external SCSI bus, there is also a SCSI backplane board that includes circuitry for SAF-TE support. The power distribution board connects power supplies to the rest of the unit.
1.3.1 Motherboard The server motherboard supports all four AMD Opteron processors and 16 DIMMs of memory. The dual HyperTransport™ and PCI bridges (AMD-8131 HyperTransport PCI-X tunnels) are on the board, along with the AMD-8111 HyperTransport I/O hub and the BIOS ROM. The power sequencer CPLD that controls the various power supplies (VLDT, CPU, MEM, etc.) is on this board as well. The motherboard also supports the dual Ultra320 SCSI controller and the dual gigabit Ethernet controller.
1.3.2 Personality Board The personality board supports functions related to the motherboard. However, most of these functions are optional. The personality board is easily modifiable so that OEMs can add their own unique features to the product. The personality board is the optimal place to make these changes, while not affecting the design of the motherboard as a whole. This board contains the Winbond Super I/O chip and the keyboard and mouse ports. The super I/O also controls the floppy disk drive. USB from the AMD-8111 HyperTransport I/O hub is also routed to this board and to a connector exposed on the front of the chassis. A 32-bit PCI bus, also from I/O hub, is routed to the board and PCI connectors. The intended use of this bus is to support low-profile video cards, especially those from ATI. This supplies the video option needed for Windows.
The personality board also houses the Baseboard Management Controller (BMC). The BMC provides server management functionality. The A8440 supports remote power up/down, remote reset, server locate, and the ability to reprogram the Flash memory of the BMC. The personality board also monitors all of the A8440 fans. The A8440 enclosure houses ten fans. The personality board has a dedicated BMC to monitor the fan tachometers of all ten fans. Each fan is monitored with a dedicated circuit that determines whether a fan has failed or not. If a fan has failed, this circuitry will flash an LED on the front of the personality board and also on the broken fan itself. At the same time, the circuitry will indicate to the BMC which fan has failed.
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1.3.3 SCSI Backplane Board Four standard SCA80 SCSI connectors on the SCSI backplane board support the four disk drives. The SCSI backplane board is designed to support Ultra 320 SCSI bus speeds. The SCSI backplane board also includes a SAF-TE controller, which appears on the SCSI bus as SCSI device ID 8. The SAF-TE controller can communicate with and enable third party RAID controllers. These RAID devices can be plugged into available PCI slots in the server.
1.3.4 Power Supplies The server gets its power from three 500-W 1U power supplies. These supplies are in a 2 + 1 redundant configuration. The power distribution system consists of the power distribution board that routes power to the server motherboard. Heavy current is routed to the power connectors. Sideband signals are routed to a simple flat ribbon connector.
1.3.5 Interface Board The interface board provides remote mounting of the hot-swap PCI switches and LEDs on A8440. There is one interface board for each one of the two hot-plug slots on A8440, and each board is mounted onto the PCI dividers that sit in the chassis. This board contains the ATTN button and the ATTN and PWR LEDs associated with basic hot-plug functionality. Each of the two interface boards is connected by a single Y-cable into a 20-pin header on A8440.
The green PWR LED and amber ATTN LED have identical functionality as the LEDs mounted on the motherboard. These are duplicated to be more visible and accessible to a user who is performing hot-plug operations. These LEDs are turned on and off by the hot-plug controllers that sit on the motherboard. The ATTN button on the interface board indicates user activity to the system and is also duplicated on the motherboard.
Each interface board is also attached to a cable assembly that hooks into a switch assembly mounted on the back of the chassis in the PCI area. The switch indicates if a PCI card is properly populated in one of the hot-plug slots.
1.3.6 PCI Hot-Plug Board The PCI Hot-Plug board provides remote mounting of the hot-swap PCI switches and LEDs.
There is one PCI Hot-Plug board for each one of the two hot-plug slots, and each board is mounted onto the PCI dividers that sit in the chassis. This board contains the ATTN button and the ATTN and PWR LEDs associated with basic hot-plug functionality. Each of the two PCI Hot-Plug boards is connected by a single Y-cable into a 20-pin header.
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1.4 External Connectivity External connections are provided through the I/O panel in the back of the chassis, as well as through a small bulkhead provided in the front of the server. These connectors include external SCSI, PS/2 keyboard and mouse connectors, serial port, gigabit Ethernet, USB port, and video. The connectors are explained in the following sections.
1.4.1 SCSI Connector The external SCSI connector is the Molex vertical VHDCI 68-pin SCSI connector, 70491 or equivalent.
1.4.2 PS/2 Keyboard and Mouse Connectors When the operating system is notified that there is data from the keyboard, a number of things can happen. The operating system checks to see if the keyboard data is a system level command. If not, it passes the data on to the current application. The current application understands the keyboard data as an application-level command and either is able to accept the data as content for the application or the current application does not accept the data and therefore ignores the information. Once the keyboard data is identified as either system-specific or application-specific, it is processed accordingly.
The data is sent from the mouse to the computer serially on the data line, with the clock line pulsing to tell the computer where each bit starts and stops. Eleven bits are sent for each byte (one start bit, eight data bits, one parity bit, and one stop bit). The PS/2 mouse sends on the order of 1,200 bps. That allows it to report mouse position to the computer at a maximum rate of about 40 reports per second.
1.4.3 Serial Port There is a single 9-pin Subminiature D serial port (COM 1) on the back panel. This port is designed to allow for wake-up commands from an external source such as a modem.
1.4.4 Ethernet Port There are two RJ45 ports on the rear of the chassis specifically to support 10/100/1000 (gigabit) copper Ethernet. A separate RJ45 is a dedicated 10/100 Ethernet port. A fourth 10Base-T Ethernet port is dedicated to the BMC.
1.4.5 USB Port There is one OHCI-based USB 1.1 controller supporting one port from the AMD- 8111 HyperTransport I/O hub. This controller and its implementation on the server meet the USB 1.1 specification design guidelines.
One single-stack USB port is mounted in the front of the chassis.
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1.5 Contacting Celestica
Global VSP Order Desk and Service Center
• E-Mail: [email protected]
• Phone 1-866-258-8475
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2 Installation
Unpacking and Set-Up
he Server is delivered in packaging designed to protect the it from the stress of shipping. It is recommended that this packaging be saved and T reused should the server need to be transported to another location.
2.1 Unpacking the System
Upon opening the shipping carton, the user encounters the server accessories kit - a cardboard box with folding handles. Using the folding handles, remove the Accessories Kit and inspect its contents. The accessories kit contains the following items:
• AC Power Cords (Quantity = 1) • Front Bezel Assembly (Quantity = 1) • Recovery and Drivers CD (Quantity = 1) • Chassis Slide Rails, and mounting hardware (Quantity = 2) • Manual
The server is encased in a multi-piece foam carrier. To remove the server, first remove the two upper foam inserts. Using the handles on each side of the server, lift the server out of its foam carrier (two people are required for this step). Once free of the shipping carton, place the Server on a sturdy work surface. The server may be fitted with the following equipment:
• AMD Opteron 800 Series Processors (Quantity = 2 or 4) • Registered ECC DDR SDRAM DIMMs PC2100/2700/3200, CL 2.5 (Quantity = 2-16) • Power Supply (Quantity = 1)
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• 1.44MB Floppy Disk Drive (Quantity = 1) • DVD-ROM Drive, IDE (Quantity = 1)
2.2 Before Powering On the System Prior to applying power to the server for the first time, please perform the following procedures.
2.2.1 Inspect the Server Open the chassis and perform a visual inspection. Remove the cover lock down screws located on the top front of the chassis. There is one lock down screw for each cover. Once the screws are removed each cover easily slides back by simultaneously pressing down on its two latch tabs and applying gentle pressure toward the back of the unit. Then lift the cover from the chassis. Beneath the larger cover there is a safety cover that surrounds the fan modules. This cover must also be removed by removing the center lock down screw and lifting it out of the chassis. With the covers removed, verify that all cables, CPU VRMs, Memory VRMs, CPUs, I/O cards, and fans are properly seated and fully engaged. Then replace the covers or add additional hardware.
2.2.2 Install Additional Hardware The A8440 server is shipped with a minimal configuration. To add processors and memory to the server please refer to the instructions in Chapter 5. To add hard disk drives, power supplies, and I/O cards, please refer to the instructions in Chapter 6.
2.2.3 Remove the Handles The A8440 server carrying handles must be removed from the chassis if the server is to be rack-mounted. Remove the two retaining screw from each handle.
2.2.4 Install Slide Rails The server is shipped without the chassis slide rails installed. The chassis slide rails are included in the accessory kit and include all mounting hardware required. See Figure 7 to identify the slides and mounting kit. The mounting kit contents are shown in Figure 8.
Figure 7 – Complete Slides with Mounting Kit
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Rear Brackets Front Brackets
Brackets Screws Bar Nuts Slide Screws Locator Pins
Figure 8 – Mounting Kit Contents
1. To mount a rail, the rail must first be disassembled. Each rail consists of three telescoping beams. Separate the smallest beam, shown in Figure 9, from the other two by extending the beams and releasing the retainer latch while pulling the beams apart. The smallest beam slides free of the main assembly (note the orientation of the beams and keep the slide chassis members with the original outer members).
2. Line up the mounting holes on the beam with the corresponding holes on the side of the chassis and secure the beam with the four screws. The beam must be oriented such that the mount holes lie flat against the chassis (“U” groove facing away from the chassis) and the slide compression stop tab (closes off the groove on one end) is toward the front of the unit. See Figure 10.
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Stop Tabs Retainer Latch
Smallest Beams Mounting Screws (4 each)
Figure 9 – Smallest Beam Features
Screw Holes for Securing Beam
Figure 10 – Screw Holes
3. Attach the front bracket to the outer member slide beams, and place into the desired rack position. Fully extend the beams against the rack vertical rails.
4. Attach the slide to the rack vertical with the supplied screws and bar nuts. Do not fully tighten screws until the final adjustment is made. The removable locator can be used to assist in the bracket locations.
5. Establish the distance from front cabinet rail to rear cabinet rail and attach the rear brackets to slide. Do not fully tighten rear bracket mounting screws until final adjustment is made.
6. Reassemble the rail and chassis by sliding the outer two beams over the smaller beam starting from the rear of the server and duplicating the original
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factory orientation. It may be necessary to release the retainer latch during this process. Repeat the process for the other rail.
7. Adjust the slide position until movement is smooth. Tighten all screws and complete installation.
To remove the chassis from the rack, depress the release lever on each slide.
2.3 Front Bezel Installation The front bezel is shipped in the accessory kit. Follow these instructions to install the bezel.
1. Separate the bezel door from the main portion of the bezel by opening the door and lifting it in an upward direction off its hinge.
2. Slide the main portion of the bezel onto the metal tabs on the right front of the system enclosure.
3. Secure the bezel to the system enclosure using the three spring retained screws included on the bezel. - 1 spring retained screw to the right of the graphics card - 1 spring retained screw under the graphics card - 1 spring retained screw to the left of the hard drive cage
Note: You may need to slightly adjust the bezel placement to properly align the spring retained screws with the front of the system enclosure.
4. Install the bezel hard drive cage door by lowering it onto the bezel hinge in the open position.
5. Close the bezel hard drive cage door.
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Release Notes
Below are a series of release notes, hints, tricks, and other tidbits, relevant to the operation of the server.
First boot after removing battery
If the user removes the CMOS data retention battery (see Figure 6), the contents of the CMOS memory will be erased, and the system may auto-boot for a few seconds, before shutting down again. This is normal.
Do not use undocumented slots
Unless specifically asked to do so by a qualified technician, please do not attempt to install any devices into the slots marked J3 and J22, on the personality board.
800 Series Opteron processors only
The server will only operate correctly with processors which are marked for multiprocessor operation. Installing non-mp parts can cause damage to the system and void the warrantee.
Windows 2000 server logon and password
Unless otherwise stated in the documentation that was shipped with the server, the windows logon is “administrator”. There is no password.
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3 System Interfaces
Switches, LEDs, and more . . .
his chapter provides details on the switches, buttons, and LEDs that a user T needs to know for proper operation of the server.
3.1 Switches/Buttons There are two switches on the front panel – the Reset and Power buttons. Table 1 describes the function of each switch.
Table 1. Button Descriptions
Function Description Power Button When in the off state, a press powers up the system. In the booted state, a press shuts the system down. Reset Button Pressing reset at any time during the full on state generates a system wide reset.
3.2 Control Panel LEDs The personality board has five LEDs that are visible through the front panel bezel, as listed in Table 2.
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Table 2. LED Definitions
LED Name Functional Description Power Indicates the full on state when lit. When off, the system is “off” but may still be plugged into an ac outlet. HD Act Hard disk activity LED. When blinking or on, indicates the disk drive is being accessed. NIC 1 On or blinks when LAN activity is present on NIC 1. NIC 2 On or blinks when LAN activity is present on NIC 2. FAULT Indicates a fan fault or a Baseboard Management Controller (BMC) system fault. The BMC blinks this light to indicate a fault.
The Fault LED is used to provide a visual indication of warning or critical events identified by the BMC. Any fan fault condition will blink this LED through built-in hardware circuitry. For other fault conditions detected by the BMC, and regardless of whether or not there is a fan fault, the BMC overrides this LED and holds it in the lighted condition. When the BMC-detected fault is removed, the BMC relinquishes control of this LED to the fan tachometer fault circuitry, which is the default owner of this LED.
Remote server locating is implemented through an OEM IPMI command. The Remote Server Locate command is designed to provide a visual cue to the location of a single server in a large server farm. Upon receipt of this command, the BMC overrides the Power LED state and implements a software timer to blink the LED. The blink rate is 1 Hertz with a 50% duty cycle.
The personality board contains several green LEDs coming from the card edge. Of these, the BMC has the ability to control the “power” and “fault” LEDs. Normally, these LEDs are controlled strictly by system hardware with no input from the BMC. However, the BMC can override the system hardware’s control of these LEDs. This is a two-step process. The BMC must activate the LED override for the LED it wishes to control. The LED override is implemented as one GPIO per LED. After the BMC has control of the LED, it may control it using a second GPIO.
FANS - If the RPMs are not above a number that is controlled by the detection circuit, then the monitoring circuits blink a fan tachometer fault indicator located at the affected fan. In addition, a fault indicator on the A8440 front panel lights “solid on” if any presence-detected fan has a tachometer fault. 3.3 Power Supply LEDs There are two LEDs visible from the outside of the power supply - green and yellow. The green LED indicates both the presence of ac voltage and the operating mode the power supply is currently in, as listed in Table 3. The yellow LED indicates a fault condition, as listed in Table 4.
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Table 3. Green LED Behavior
Power Supply Condition Green LED Behavior Not plugged in Off Plugged in, power supply in standby Blink Plugged in, power supply on On
Table 4. Yellow LED Behavior
Power Supply Condition Yellow LED Behavior No Fault Off AC out of range Blink Fan, thermal, output fault On
3.4 PCI Hot-Plug LEDs and Switches The PCI Hot-Plug board has one switch and two LEDs.
The ATTN switch indicates user activity to the system. Press this switch before removing the card to start the card’s shutdown sequences, and press this switch after installing a card to begin its power up sequence.
The green PWR LED and amber ATTN LED are turned on and off by the hot-plug controllers that sit on the motherboard. Table 5 lists the functions of the LEDs.
Table 5. PCI Hot-Plug LED Behavior
LED Condition Behavior ATTN Off Card can be removed Blink Card is in process of shutting down or powering on On Card is powered on and ready for use PWR Off No power is applied to card On Power is applied to card
Each PCI Hot-Plug board is also attached to a cable assembly that hooks into a switch assembly mounted on the back of the chassis in the PCI area. The switch indicates if a PCI card is properly populated in one of the hot-plug slots.
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3-4 USER’S MANUAL Chapter 4
4 Safety
Overview and Features
lease note the following essential safety information before installing the server and while using it. P
Caution
This equipment must be serviced only by qualified personnel.
4.1 Electrical Precautions Follow basic electrical safety precautions to protect persons from harm and the server from damage.
• Lithium Battery Danger of Explosion if battery is incorrectly replaced o Replace only with the same 20mm Panasonic CR2032 or equivalent o Dispose of batteries according to the manufacturers instructions
• Multiple Power Sources CAUTION: These servers have more than one power supply cord. Disconnect up to three power supply cords before servicing to avoid electric shock.
• Fan Replacement
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CAUTION: Beware of rotating fans if removing fans while the equipment is still powered on.
• Be aware of the locations of the power on/off switch on the chassis as well as the site's emergency power-off switch, disconnection switch, or electrical outlet. • Always disconnect power from the system when removing or installing main system components, such as the motherboard, memory modules, and the CD-ROM and floppy drives. When disconnecting power, first power down the system with the operating system and then unplug the power cords of all the power supply units in the system. • When working around exposed electrical circuits, another person familiar with the power-off controls should be nearby to switch off the power if necessary. • Use only one hand when working with powered-on electrical equipment to avoid making a complete circuit which will cause electrical shock. • Metal tools can easily damage any electrical components or circuit boards they come into contact with. • Do not use mats designed to decrease electrostatic discharge as protection from electrical shock. Instead, use rubber mats that have been specifically designed as electrical insulators. • The power supply power cord must include a grounding plug and must be plugged into grounded electrical outlets.
4.2 General Precautions Follow these rules to ensure general safety:
• Rack mounting CAUTION: The weight of the server is greater than 80 lbs. Use two people to lift. • Keep the area around the server clean and free of clutter. • Place the chassis top/side cover and any system components that have been removed away from the system or on a table so that they won't accidentally be stepped on. • Do not wear loose clothing while working on the system, such as neckties and unbuttoned shirt sleeves, which can come into contact with electrical circuits or be pulled into a cooling fan. • Remove any jewelry or metal objects from your body, which are excellent metal conductors and can create short circuits or harm you if they come into contact with printed circuit boards or areas where power is present.
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• Close the system and (if rack-mounted) secure it to the rack unit with the retention screws after ensuring that all connections have been made.
4.3 ESD Precautions The following measures generally protect the equipment from ESD:
• Always use a grounded wrist strap designed to prevent static discharge. • Keep all components and printed circuit boards (PCBs) in their antistatic bags until ready for use. • Touch a grounded metal object before removing the board from the antistatic bag. • Do not let components or PCBs come into contact with clothing, which may retain a charge even if you are wearing a wrist strap, since permanent damage to the system can occur. • Handle a board by its edges only; do not touch its components, peripheral chips, memory modules, or contacts. • When handling chips or modules, avoid touching their pins. • Put the motherboard and peripherals back into their antistatic bags when not in use.
4.4 Operating Precautions To ensure proper cooling, all chassis covers must be in place when the server is operating. Permanent damage to the server can occur if this practice is not strictly followed.
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4-4 USER’S MANUAL Chapter 5
5 Motherboard Set-up
Upgrades and Customization
his section describes options that can be changed to improve performance T in particular applications.
5.1 Adding Processors and Heatsinks Before installing the processor and heatsink, adhere to the following warning: WARNING! The processor will overheat without the heatsink and/or fan, resulting in permanent irreparable damage. Never force the processor into the socket. Apply thermal grease between the processor and heatsink.
5.1.1 Processor and Heatsink Assembly The AMD Opteron processor requires the use of a heatsink for cooling purposes. The heatsink comes in two main parts: a backer plate attached to the back side of the motherboard and the heatsink assembly that attaches to the two threaded standoffs on the backing plate. The two screws included with the heatsink assembly attach the top piece to the standoffs from the backer plate, load the spring clip, and hold the assembly together.
Follow these instructions to install the processor and heatsinks:
1. Remove the adhesive release liner from the backer plate as shown in Figure 11 (left) and place it on a flat work surface. While holding the motherboard above the backer plate, align the motherboard mounting holes with the standoffs of the backer plate as shown in Figure 11 (right). The standoffs can be fairly easily sighted through the mounting holes.
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Figure 11 - Release Liner Removal (left) and Alignment of Standoffs with Motherboard (right)
2. Lower the motherboard onto the backer plate and press firmly as shown in Figure 12, taking care not to damage any of the motherboard components.
Figure 12 - Pressing the Motherboard onto the Backer Plate
3. Once the backer plate is installed, insert the processor into the socket. Check the processor pins to see that none are bent. Move the socket lever to the unlocked position (90° to the plane of the motherboard) prior to inserting the processor. The A1 pin location is designated on the processor by a copper triangle that matches up to a triangle on the socket as shown in 4. Figure 13. Align the processor to the socket and gently lower it into place. Do not force the processor into the socket.
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Figure 13 - A1 pin location on the Socket and Processor
5. Move the socket lever to the locked position while holding pressure on the center of the processor as shown in Figure 14.
Figure 14 Installing Processor and Moving Socket Lever to the Locked Position
6. When the processor is installed in the socket, apply thermal grease to the processor (as shown in Figure 15) prior to installing the heatsink. AMD recommends using a high thermal conductivity grease (such as Shin-Etsu types G751 or G749, or an equivalent product) for the thermal interface material rather than a phase change material. Phase change materials develop strong adhesive forces between the heatsink and processor. Removing the heatsink under such conditions can cause the processor to be removed from the socket without moving the socket lever to the unlocked position, therefore damaging the processor pins or socket contacts.
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Figure 15 - Application of Thermal Grease to the Processor
7. Once the thermal grease has been applied to the processor, attach the heatsink to the processor. The heatsink ships as an assembly containing the heatsink, spring clip, plastic support frame, and the two screws that are retained in the support frame. A Phillips screwdriver is required for installation. An electric screwdriver is recommended if multiple installations are going to be performed. Align the heatsink assembly with the support frame mating with the backer plate standoffs as shown in Figure 16. (Figure 16 shows a fan as part of the heatsink – the A8440 configuration does not require the fan.)
Figure 16 - Alignment of Heatsink Assembly with Standoffs
8. Place the heatsink on the processor and fully drive each screw as shown in Figure 17. (Figure 17 shows a fan as part of the heatsink – the A8440 configuration does not require the fan.)
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9. The heatsink is symmetric about its centerline and can be oriented in either direction.
Figure 17 Installing the Heatsink Screws
5.1.2 Processor Removal Removal of an AMD processor requires removal of the heatsink first. To remove the heatsink, unscrew both screws. Gently lift the heatsink while slightly twisting back and forth until the heatsink lifts away from the processor. Failure to twist the heatsink back and forth during removal may result in the processor being removed from the socket with the socket lever locked. This can cause processor or socket damage.
Move the socket lever to the unlocked position (at least 90º) and remove the processor by pulling straight up from the socket.
When replacing the heatsink, remove the old thermal grease and apply new thermal grease to the processor surface.
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5.2 Adding/Changing Memory
Modifying the memory configuration on a server is fairly simple provided the user understands and follows a few basic rules. Some definitions are required:
Bank – one or more DIMMs, logically arranged to form a given memory bus access width (64 or 128 bit).
Node – a single processor, its memory controller, and all of its associated memory DIMMs and DIMM sockets. Therefore “Node” represents a given processor’s memory array, as viewed from the HyperTransport™ link.
In general, always install DIMM slots in groups of two with identical DIMMs (see Figure 6). The processor’s memory interface is 128 bits wide. 184 pin DIMM modules are 64 bits wide.
Note
Node 0 must be loaded with some amount of memory. For example, in single DIMM configurations, the DIMM must be installed on the boot node (CPU 0).
• If a given node is to receive a single DIMM, it should be stuffed in either slot DIMM0 or DIMM2. Note that this creates a 64-bit wide bank, which forces the memory controller to do two accesses to form a 128-bit element.
• If two DIMMs are installed into adjacent slots, they are assumed to be identical. In other words, a DIMM placed in slot DIMM1 is assumed to be identical to the DIMM placed in slot DIMM0. A DIMM placed in slot DIMM3 is assumed to be identical to the DIMM placed in slot DIMM2. The memory controller will create 128-bit wide banks from these adjacent pairs.
• If a given node is to receive two DIMMs, which are not identical, then they should be installed in DIMM0 and DIMM2. Note that this creates two 64- bit wide banks, which cannot be formed into a single 128-bit bank.
• It is illegal to install only three DIMM slots on a given node. Memory controllers can be in either 128 or 64-bit mode, not both.
• Bank Interleave is only enabled for nodes that contain two identical 128-bit banks (four identical DIMMs). There is no Bank Interleave support for 64- bit wide banks.
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• Memory controllers adjust the memory clock frequency to match the slowest DIMM placed in slots DIMM0 and DIMM2. One slow DIMM will slow down the rest.
• It is recommended that non-identical DIMMs be placed on separate nodes. For example, if the user has two PC2100 DIMMs, and two PC2700 DIMMs, the user may wish to place the two PC2100 DIMMs on a less used node, and place the two PC2700 DIMMs on a more heavily used node. This allows the system to optimize the timing for each type of DIMM, rather than reduce the memory interface speed to the lowest common denominator, which would be the case if the DIMMs were installed on the same node.
Node interleave is only enabled for an even numbers of nodes (2 or 4) which have memory arrays of the same size. Memory performance characteristics can be different between the various nodes. Put differently, node interleave is only enabled two cases. A four-processor configuration with all four nodes installed with the same amount of memory, or a two-processor configuration with both nodes installed with the same amount of memory.
5.3 Understanding Interleave Options Two forms of memory interleaving are available on the A8440 Server:
Bank Interleave – This form of interleaving causes the memory controller to group two 128-bit DIMM banks into one large array. Every other 128-bit word is stored in a given DIMM bank. Even word addresses are stored in the bank composed of slots DIMM0, DIMM1. Odd word addresses are stored in the bank composed of slots DIMM2, DIMM3. If enabled in BIOS Setup, each node with four identical DIMMs is set up to use Bank Interleave.
DIMM NUMBER 64-BIT WIDTH 128-BIT WIDTH BANK INTERLEAVE
DIMM #0 BANK #0 BANK #0, LOW 64 BANK #0, L64, EVEN
DIMM #1 NOT USED BANK #0, HIGH 64 BANK #0, H64, EVEN
DIMM #2 BANK #1 BANK #1, LOW 64 BANK #0, L64, ODD
DIMM #3 NOT USED BANK #1, HIGH 64 BANK #0, H64, ODD
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Node Interleave – Node based interleaving causes the system to group even numbers of nodes into one large array. In the case of two-way node interleaving (two processors present), every other 128-bit word is stored on a given node. Four- way node interleaving (four processors present) results in every fourth 128-bit word being stored on a given node. Node Interleave is not compatible with Microsoft’s .NET SRAT Table definition. If enabled in BIOS Setup and if all loaded nodes have the same amount of memory, the system is set up to use node interleave.
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5.4 SCSI Bus Order The server comes standard with an embedded LSI 53C1030 Ultra 320 SCSI bus controller. This controller provides support for two Ultra 320 SCSI buses. Bus A is routed to the external VHDCI connector, on the back of the server. This bus may be used to attach external drive systems, RAID arrays, etc. Bus B is used to support the internal SCSI backplane. Out of the box, the server first attempts to boot from bus B. If no boot image is found, the system then attempts to boot from bus A. It is possible to alter the boot search order within BIOS such that the system first searches bus A, then bus B.
1. During boot, watch for the LSI Logic Corp. MPT BIOS message, displayed after the BIOS memory test completes. When this message appears, press
2. Once the main screen of the LSI Setup Utility is displayed, press
3. Highlight Boot Adapter List and press
4. Bus A is identified as Adapter LSI1030, PCI Bus E, Dev/Func 8. Bus B is identified as Adapter LSI1030, PCI Bus E, Dev/Func 9. Busses are scanned based on their “Boot Order” designation. The bus with Boot Order = 0 will be checked first. Using the arrow keys, highlight a bus’s “Boot Order” field. Use the +/- keys to change the designator to the desired value. (Note the Boot Order field will remain constant. The Dev/Func field will change.) Repeat this process for the other bus, if necessary.
5. Once all changes have been made, press
6. Select Save changes then exit this menu and press
7. Press
8. Select Exit the Configuration Utility and press
9. Press
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5.5 Setting Up a Raid Array The A8440 server can be configured for internal RAID operation, with the addition of a third party RAID controller card. To do this, follow the steps outlined below.
1. With the system fully shutdown, and the covers removed, install the third party RAID card (this step may be done via hot plug, as well, but removal of the SCSI backplane cable MUST be performed with the system shutdown).
2. Locate and disconnect the internal SCSI cable from the SCSI. Bend the internal SCSI cable out of the way.
3. Using the internal SCSI cable supplied with the RAID controller, attach the SCSI backplane to the RAID controller (route the cable over Fans 9 and 10). The SCSI backplane handles termination on the drive side. The RAID controller should be set up to provide its own termination.
4. Install any SCSI drives, which will be used to create the RAID array.
5. Replace the covers and boot the machine.
6. Follow the third party vendor’s instructions for installing the RAID controller’s driver and configuring the RAID array.
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5.6 Enabling Support for Greater Than 4 Gigabytes of Memory on Win2k Advanced Server and Datacenter Without any configuration changes, Microsoft Windows 2000 Advanced Server and Datacenter supports up to 4 Gigabytes of memory. By enabling “Physical Addressing Extensions” (PAE), the user can use up to 8 Gigabytes of memory under Win2K Advanced Server and up to 32 Gigabytes under Datacenter. To enable PAE follow the steps outlined below:
1. Boot the OS, and log on with administrator privileges.
2. Click on Start Menu, and then click on Run.
3. Type X:\boot.ini where X is the drive letter that contains the boot files Ntldr, Boot.ini, and others.
4. Modify the line that corresponds to the operating system by appending the switch /PAE. For example: multi(0)disk(0)rdisk(0)partition(1)\WINNT="Microsof t Windows 2000 Advanced Server" /fastdetect /PAE
5. Save the file and then restart the computer.
6. See the following link for more information: http://support.microsoft.com/default.aspx?scid=kb;en-us;Q268363
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6 Chassis Set-up
Changing Configurations
his section describes the server chassis configurations, including the default settings as well as options that can be changed to improve performance in T particular applications.
Figure 18 – A8440 Server
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6.1 Hot Swapping Devices The server provides the capability of adding/removing certain devices, while the system is running. This is commonly referred to as “hot swapping.” For each category of devices, some discussion is in order:
6.1.1 Power Supply Hot Swapping In general, there are no restrictions regarding hot swapping of the power supplies. They may be swapped at any time with or without the ac cord attached. A typically loaded server should always have at least two power supplies installed at any given time. It is recommended that the user install a third supply before removing one for repair. Safety should always be a concern when dealing with electronic equipment. It is recommended that the user never handle a power supply outside of the chassis with the ac power cord attached.
Perform the following steps to remove a power supply from a running system:
1. Insert a replacement supply if a power supply slot is free (see below).
2. Disconnect the ac power cord from the supply to be removed. Wait for the fans to stop and the LEDs to turn off.
3. Unscrew the power supply retaining screw from the chassis.
4. While pulling gently on the power supply removal handle, move the power supply retainer clip toward the ac cord socket. The supply slides free from the system.
Perform the following steps to insert a power supply into a running system:
1. Carefully insert the new power supply into an available power supply slot. The supply should be oriented such that the ac cord socket is toward the rear and the power supply retaining screw is above the ac cord socket. Gentle downward pressure on the rear of the supply may be required to fully engage the supply with the system. The power supply retainer clip engages the chassis if the supply is inserted correctly.
2. Tighten the power supply retaining screw.
3. Connect the ac power cord to the new supply. Verify that the new supply is operating correctly by checking the state reported on the power supply’s status LEDs.
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Figure 19 - Power Supply Removal
There are internal guides that align the supplies with the internal power backplane, as shown in Figure 20. These internal guides also act as structural members that tie the upper 3U section to the lower 1U section.
Figure 20 - Power Supply Guides and Lower Chassis Support
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6.1.2 SCSI Drive Hot Swapping The A8440 server supports hot swapping of SCSI drives on its internal SCSI backplane. This functionality is only available in a RAID configuration, using a third party RAID controller card. Please refer to the documentation that came with the RAID controller card.
6.1.3 PCI-X Card Hot Swapping To add or service a PCI card, first remove the smaller of the two top covers. Once the PCI cards are exposed, simply detach the card and remove it. In the case of the two hot-swappable PCI-X cards, press the attention button prior to removal.
Note
PCI-X hot swap must not be attempted if the system is booting or shutting down, if the hot plug drivers are not installed, or if you are running a non-hot-plug-aware operating system.
The A8440 server supports PCI-X I/O card hot swap on two of its expansion slots. You must follow the prescribed procedure to remove a card from a running system:
1. Remove the smaller of the main chassis covers.
2. Press the hot plug ATTN button for the card to be removed. The ATTN LED begins to blink.
3. Once the ATTN LED stops blinking, open the Manual Retention Latch (MRL) for the card to be removed by lifting on the level and moving the latch away from the rear of the chassis (refer to Figure 5 for the location of the MRL):.
4. Carefully remove the card from the slot.
5. Replace the chassis cover.
You must follow the prescribed procedure to insert a card on a running system (refer to Figure 5 for the location of the MRL):
1. Remove the smaller of the main chassis covers.
2. Open the MRL for the slot to be used.
3. Carefully install the card into the slot.
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4. Close the MRL for the installed card.
5. Press the hot plug ATTN button for the installed card. The ATTN LED begins to blink.
6. Once the ATTN LED goes from blinking to fully on, the card is ready to be used. Replace the chassis cover.
6.2 Adding Devices The hard disk drives (HDD), shown in Figure 21, are mounted to a replaceable carrier. This carrier is accessible by removing the front cosmetic bezel. The HDD carrier has a lever-cam-assisted mechanism that helps control the insertion and removal of the drive.
Figure 21. Hot-Swap HDD and Carriers
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6.3 Fans Removing either of the top covers provides access to the cooling fans, as shown in Figure 22.
Figure 22. Hot-Swap Cooling Fans
The system has ten cooling fans. Each fan is contained in a removable, hot-plugable carrier. To remove a fan, simply pull straight up on the small finger grips and lift. To insert a fan, note its proper orientation, and simply insert it.
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7 BIOS
Upgrades, Clearing, and Screens
his section describes the BIOS configurations, the default settings, and options that can be changed to improve performance in particular T applications. 7.1 Upgrading the BIOS The BIOS can be upgraded in the field by either running a DOS application or by replacing the Flash device on the motherboard.
To upgrade the BIOS using the DOS application, follow the steps outlined below:
1. Boot the server from a DOS boot disk that does not use memory above 640K, or press
2. Remove the boot floppy disk and replace it with a disk that contains the desired BIOS Flash Image and the PHLASH16.EXE application.
3. At the DOS prompt, type phlash16 /c xxxxxxxx.fla, where xxxxxxxx.fla is the name of the BIOS Flash Image to program. Then press
4. Once phlash16 reports that is has completed reprogramming the Flash, power down the system.
5. Follow the instructions for electrically clearing CMOS (below).
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To upgrade the BIOS by replacing the Flash device, follow the steps outlined below:
1. Power down the server and remove the smaller of the two top covers.
2. Remove Fan Modules 9 and 10.
3. Using a screwdriver, remove the screw securing the fan carrier to the chassis. This screw resides above the two retainer tabs, formed into the chassis, just forward of the left side carrying handle (relative to the front of the server).
4. Carefully lift the fan carrier up and away from the retainer tabs which help secure it to the chassis. This is accomplished by taking advantage of the clear area under the top center beam and rotating the carrier slightly. Once complete, this step should expose the PLCC Flash socket.
5. Using a PLCC extractor, remove the old Flash device. Be careful not to apply too much force thereby damaging the PLCC socket, or bending the Flash pins.
6. Insert the new preprogrammed Flash device into the socket. Make sure that all of the pins are lined up and that the Flash is fully seated in the socket. Make sure that the Flash device’s orientation is correct. The pin 1 marker on the device (small dimple) should be toward the left side of the server (relative to the front of the server).
7. Locate the three-pin header, labeled “CMOS1.” This jumper will be within two inches of the Flash socket next to the Lithium battery. Pin 1 on the jumper is toward the left side of the chassis (toward the Flash socket). Under normal operating conditions, there should be a jumper across pins 1 and 2. Please remove this jumper and place it across pins 2 and 3.
8. Wait 10 seconds and then remove the jumper and place it back across pins 1 and 2.
9. Reinstall the fan carrier, its retaining screw, fans, and the cover.
10. Power up the system and press
11. Press
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7.2 Electrically Clearing CMOS It may occasionally become necessary to clear the BIOS’s CMOS memory. This can be the case if the BIOS has been recently upgraded or if you need to restore the BIOS factory defaults.
Perform the following steps to electrically clear the CMOS:
1. Power down the server and remove the smaller of the two top covers.
2. Remove fan modules 9 and 10.
3. Using a screwdriver, remove the screw securing the fan carrier to the chassis. This screw resides above the two retainer tabs, formed into the chassis, just forward of the left side carrying handle (relative to the front of the server).
4. Carefully lift the fan carrier up and away from the retainer tabs, which help secure it to the chassis. This can be accomplished by taking advantage of the clear area under the top center beam, and rotating the carrier slightly. Once complete, this step should expose the CMOS clear header.
5. Locate the three-pin header, labeled “cmos1.” This jumper will be within two inches of the flash socket, next to the lithium battery. Pin 1, on the jumper, is toward the left side of the chassis (toward the Flash socket). Under normal operating conditions, there should be a jumper across pins 1 and 2. Please remove this jumper and place it across pins 2 and 3.
6. Wait 10 seconds and then remove the jumper and place it back across pins 1 and 2.
7. Reinstall the fan carrier, its retaining screw, fans, and the cover.
8. Power up the system and press
9. Press
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7.3 Understanding the Autoboot Options The A8440 server includes features to control system operation when ac power is applied to the system. Please refer to the “power” sub-menu of the BIOS setup utility (see BIOS setup screen snapshots). The setting “after power failure” has three options:
STAY OFF – this option instructs the power control logic to always hold the server in standby when power is detected. The system will remain in this state until the power button on the front of the chassis is pressed, or the system management controller receives a power up command. This option is useful in situations where the user prefers to boot each server separately after a power fail event.
POWER ON – this option instructs the power control logic to always boot the server when power is detected. This option is useful in situations where the user wishes the server to return to operation as soon as possible after a power fail event.
Warning
This option causes a server that was in standby to auto-boot after a power failure event.
LAST STATE – this option instructs the power control logic to follow the last known state of the system. If the server was running prior to a power fail event, the power control logic will force the system to boot once power is restored. If the server was in standby prior to a power fail event, the power logic will hold the system in standby.
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7.4 Using Console Redirection The A8440 BIOS supports console redirection. Refer to the BIOS setup screen snapshot on page 7-8 .
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7.5 BIOS Setup Screen Snapshots
Below are a series of snapshots that are representative of the major screens taken from the A8440 BIOS.
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7-14 USER’S MANUAL Appendix A
Technical Specifications
Electrical Rating: 7Amps @ 110Vac; 3.5Amps @ 220Vac Weight: 80 lbs Dimensions: Height: 7 inches; Width: 17.5 inches; Depth: 25.4 inches Safety Certifications: CSA 22.2 #950-95; EN60950
FCC Compliance Statement This equipment has been tested and found to comply with the limits for a Class A digital device, pursuant to part 15 of the FCC Rules. These limits are designed to provide reasonable protection against harmful interference when the equipment is operated in a commercial environment. This equipment generates, uses, and can radiate radio frequency energy and, if not installed and used in accordance with the instruction manual, may cause harmful interference to radio communications. Operation of this equipment in a residential area is likely to cause harmful interference, in which case the user will be required to correct the interference at his own expense.
Environmental Requirements
Operational Environment
Measurement Range Ambient Temperature 10° to 35°C (50° to 95°F) Relative Humidity 20% to 80% (non-condensing) Shock 5 G, 10ms duration, X,Y, & Z axis orientations Vibration 0.5 G, < 400 Hz Altitude 0 – 9500 ft (102 – 71 kPa)
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Non-operational Environment
Measurement Range Ambient temperature –30° to 60°C (–4° to 140°F) Relative humidity 5% to 95% (non condensing) Maximum wet-bulb temperature 38.7°C Shock 15 G, 10ms duration, X, Y, & Z axis orientations Vibration 0.75 G 5 – 100 Hz, 1.5 G 100 – 500 Hz Altitude 0 – 30000 ft (102 – 30.3 kPa)
Appendix-2
Appendix B
Connector Assignments
This appendix defines the different connectors and pin assignments used externally and internally to the A8440 server. External Connectors
VHDCI SCSI Connector
The external SCSI connector is the Molex VHDCI SCSI connector, 71430 or equivalent, as shown in Figure 23. The pin assignments for this connector are listed in Table 6.
Figure 23. VHDCI SCSI Connector
Table 6. VHDCI SCSI Connector Pin Assignments
Pin Name Description Pin Name Description 1 D12_H Data 12 + 35 D12_L Data 12 - 2 D13_H Data 13 + 36 D13_L Data 13 - 3 D14_H Data 14 + 37 D14_L Data 14 - 4 D15_H Data 15 + 38 D15_L Data 15 - 5 P1_H Parity 1 + 39 P1_L Parity 1 - 6 D0_H Data 0 + 40 D0_L Data 0 -
Appendix - 3
Pin Name Description Pin Name Description 7 D1_H Data 1 + 41 D1_L Data 1 - 8 D2_H Data 2 + 42 D2_L Data 2 - 9 D3_H Data 3 + 43 D3_L Data 3 - 10 D4_H Data 4 + 44 D4_L Data 4 - 11 D5_H Data 5 + 45 D5_L Data 5 - 12 D6_H Data 6 + 46 D6_L Data 6 - 13 D7_H Data 7 + 47 D7_L Data 7 - 14 P0_H Parity 0 + 48 P0_L Parity 0 - 15 GND Ground 49 GND Ground 16 Diffsens Differential sense 50 GND Ground 17 Term_pwr Termination power 51 Term_pwr Termination power 18 Term_pwr Termination power 52 Term_pwr Termination power 19 N/C No Connect 53 N/C No Connect 20 GND Ground 54 GND Ground 21 ATN_H Attn + 55 ATN_L Attn - 22 GND Ground 56 GND Ground 23 BSY_H Busy + 57 BSY_L Busy - 24 ACK_H Acknowledge + 58 ACK_L Acknowledge - 25 RST_H Reset + 59 RST_L Reset - 26 MSG_H Message + 60 MSG_L Message - 27 SEL_H Select + 61 SEL_L Select - 28 CD_H CD + 62 CD_L CD - 29 REQ_H Request + 63 REQ_L Request - 30 I/O_H I/O + 64 I/O_L I/O - 31 D8_H Data 8 + 65 D8_L Data 8 - 32 D9_H Data 9 + 66 D9_L Data 9 - 33 D10_H Data 10 + 67 D10_L Data 10 - 34 D11_H Data 11 + 68 D11_L Data 11 -
Appendix - 4
PS/2 Keyboard and Mouse Connector
The PS/2 keyboard and mouse uses a right-angle, dual-stack, and mini-DIN connector with PC 99 standard coloring (violet for keyboard and light green for mouse) AMP 440173-3, as shown in Figure 24. The pin assignments for the dual PS/2 connector are listed in Table 7.
Figure 24. Dual PS/2 Connector
Table 7. Dual PS/2 Connector Pin Assignments
Pin Name Description 1 KDATA Keyboard Data 2 N/C Not Connected 3 GND System Ground 4 VDD Power, +5 VDC 5 KCLK Keyboard Clock 6 N/C Not Connected 7 MDATA Mouse Data 8 N/C Not Connected 9 GND System Ground 10 VDD Power, +5 VDC 11 MCLK Mouse Clock 12 N/C Not Connected 13 CGND Chassis Ground 14 CGND Chassis Ground
Appendix - 5
Serial Port Connector
The serial connector is a 9-pin right-angle Subminiature D male Connector, AMP 748879-1 or equivalent, as illustrated in Figure 25. The pin assignments for this connector are listed in Table 8.
Figure 25. Serial Connector
Table 8. Serial Connector Pin Assignments
Pin Name Description 1 CD Carrier Detect 2 RXD Receive Data 3 TXD Transmit Data 4 DTR Data Terminal Ready 5 GND System Ground 6 DSR Data Set Ready 7 RTS Request To Send 8 CTS Clear To Send 9 RI Ring Indicator
Appendix - 6
USB Connector
There is one USB connector used on the A8440 server platform, the Molex 87531, shown in Figure 26. The pin assignments for the USB connector are listed in Table 9.
Figure 26. USB Connector
Table 9. USB Connector Pin Assignments
Pin Name Description 1 VCC Power 2 DATA- USB data - 3 DATA+ USB data + 4 GND Ground
Appendix - 7
Internal Connectors
The following connectors are internal connectors. 68-Pin SCSI Connector
The SCSI connector used in the A8440 platform is the 68-pin Molex 15-87-0307, or equivalent, as shown in Figure 27. The pin assignments are listed in Table 10.
Figure 27. 68-Pin SCSI Connector
Table 10. 68-Pin SCSI Connector Pin Assignments
Pin Name Description Pin Name Description 1 D12_H Data 12 + 35 D12_L Data 12 - 2 D13_H Data 13 + 36 D13_L Data 13 - 3 D14_H Data 14 + 37 D14_L Data 14 - 4 D15_H Data 15 + 38 D15_L Data 15 - 5 P1_H Parity 1 + 39 P1_L Parity 1 - 6 D0_H Data 0 + 40 D0_L Data 0 - 7 D1_H Data 1 + 41 D1_L Data 1 - 8 D2_H Data 2 + 42 D2_L Data 2 - 9 D3_H Data 3 + 43 D3_L Data 3 - 10 D4_H Data 4 + 44 D4_L Data 4 - 11 D5_H Data 5 + 45 D5_L Data 5 - 12 D6_H Data 6 + 46 D6_L Data 6 - 13 D7_H Data 7 + 47 D7_L Data 7 - 14 P0_H Parity 0 + 48 P0_L Parity 0 - 15 GND Ground 49 GND Ground 16 Diffsens Differential sense 50 GND Ground 17 Term_pwr Termination power 51 Term_pwr Termination power 18 Term_pwr Termination power 52 Term_pwr Termination power 19 N/C No Connect 53 N/C No Connect
Appendix - 8
Pin Name Description Pin Name Description 20 GND Ground 54 GND Ground 21 ATN_H Attn + 55 ATN_L Attn - 22 GND Ground 56 GND Ground 23 BSY_H Busy + 57 BSY_L Busy - 24 ACK_H Acknowledge + 58 ACK_L Acknowledge - 25 RST_H Reset + 59 RST_L Reset - 26 MSG_H Message + 60 MSG_L Message - 27 SEL_H Select + 61 SEL_L Select - 28 CD_H CD + 62 CD_L CD - 29 REQ_H Request + 63 REQ_L Request - 30 I/O_H I/O + 64 I/O_L I/O - 31 D8_H Data 8 + 65 D8_L Data 8 - 32 D9_H Data 9 + 66 D9_L Data 9 - 33 D10_H Data 10 + 67 D10_L Data 10 - 34 D11_H Data 11 + 68 D11_L Data 11 -
Appendix - 9
SCSI SCA Connector
Figure 28 shows the connector used to connect the SCSI drive to the SCSI backplane. It is Molex 73829 or equivalent. The pin assignments for this connector are listed in Table 11.
Figure 28. SCSI SCA Connector
Table 11. SCSI SCA Connector Pin Assignments
Pin Name Description Pin Name Description 1 +12V +12V power 41 GND Ground 2 +12V +12V power 42 GND Ground 3 +12V +12V power 43 GND Ground 4 +12V +12V power 44 Mated Drive mated 5 +3.3V +3.3V power 45 +3.3V +3.3V power 6 +3.3V +3.3V power 46 Diffsens Differential Sense 7 D11_L Data 11 - 47 D11_H Data 11 + 8 D10_L Data 10 - 48 D10_H Data 10 + 9 D9_L Data 9 - 49 D9_H Data 9 + 10 D8_L Data 8 - 50 D8_H Data 8 + 11 I/O_L I/O - 51 I/O_H I/O + 12 REQ_L Request - 52 REQ_H Request + 13 CD_L CD - 53 CD_H CD + 14 SEL_L Select - 54 SEL_H Select + 15 MSG_L Message - 55 MSG_H Message + 16 RST_L Reset - 56 RST_H Reset + 17 ACK_L Acknowledge - 57 ACK_H Acknowledge + 18 BSY_L Busy - 58 BSY_H Busy + 19 ATN_L Attn - 59 ATN_H Attn + 20 P0_L Parity 0 - 60 P0_H Parity 0 + 21 D7_L Data 7 - 61 D7_H Data 7 + 22 D6_L Data 6 - 62 D6_H Data 6 +
Appendix - 10
Pin Name Description Pin Name Description 23 D5_L Data 5 - 63 D5_H Data 5 + 24 D4_L Data 4 - 64 D4_H Data 4 + 25 D3_L Data 3 - 65 D3_H Data 3 + 26 D2_L Data 2 - 66 D2_H Data 2 + 27 D1_L Data 1 - 67 D1_H Data 1 + 28 D0_L Data 0 - 68 D0_H Data 0 + 29 P1_L Parity 1 - 69 P1_H Parity 1 + 30 D15_L Data 15 - 70 D15_H Data 15 + 31 D14_L Data 14 - 71 D14_H Data 14 + 32 D13_L Data 13 - 72 D13_H Data 13 + 33 D12_L Data 12 - 73 D12_H Data 12 + 34 +5V +5V power 74 Mated Drive mated 35 +5V +5V power 75 GND Ground 36 +5V +5V power 76 GND Ground 37 N/C No connect 77 LED Drive activity LED 38 N/C No connect 78 GND Ground 39 ID0 SCSI ID0 79 ID1 SCSI ID1 40 ID2 SCSI ID2 80 ID3 SCSI ID3
EIDE 100 Port
The EIDE 100 port uses a 2x20 pin 0.1 in shrouded header, AMP 103308-8. the EIDE Header is shown in Figure 29, and the pin assignments for are listed in Table 12.
Figure 29. EIDE Header
Table 12. EIDE Header Pin Assignments
Pin Name Description Pin Name Description 1 /RESET Reset 2 GND Ground 3 DD7 Data 7 4 DD8 Data 8 5 DD6 Data 6 6 DD9 Data 9 7 DD5 Data 5 8 DD10 Data 10
Appendix - 11
Pin Name Description Pin Name Description 9 DD4 Data 4 10 DD11 Data 11 11 DD3 Data 3 12 DD12 Data 12 13 DD2 Data 2 14 DD13 Data 13 15 DD1 Data 1 16 DD14 Data 14 17 DD0 Data 0 18 DD15 Data 15 19 GND Ground 20 (KEY) Key (pin missing) 21 DMARQ DMA Request 22 GND Ground 23 /DIOW Write Strobe 24 GND Ground 25 /DIOR Read Strobe 26 GND Ground 27 IORDY I/O Ready 28 SPSYNC:CSEL Spindle Sync or Cable Select 29 /DMACK DMA Acknowledge 30 GND Ground 31 INTRQ Interrupt Request 32 /IOCS16 I/O Chip Select 16 33 DA1 Address 1 34 PDIAG Passed Diagnostics 35 DA0 Address 0 36 DA2 Address 2 37 /IDE_CS0 (1F0-1F7) 38 /IDE_CS1 (3F6–3F7) 39 /ACTIVE Led driver 40 GND Ground
Wake On LAN
The Wake On LAN connector uses a 1x3 pin 0.1 inch header, AMP 103239-3. Figure 30 illustrates the Wake On LAN Header, and the pin assignments are listed in Table 13.
Figure 30. Wake On LAN Header
Table 13. Wake On LAN Header Pin Assignments
Pin Name Description 1 +5V +5V Standby 2 GND Ground 3 PME Power Management Event
Appendix - 12
64-Bit PCI Connectors
The Peripheral Component Interconnect (PCI) 64-bit connector is a 23-pin 3.3 V-style card edge connector. 3.3V indicates PCI signaling levels. The connector is illustrated in Figure 31, with pin assignments listed in Table 14.
A1 A14 A62 A63 A94
B1 B11 B14 B62 B63 B94
Figure 31. 64-Bit PCI Connector
Table 14. 64-Bit PCI Connector Pin Assignments
Pin Name Description Pin Name Description B1 –12V –12 VDC A1 TRST_L Test Logic Reset B2 TCK Test Clock A2 +12V +12 VDC B3 GND Ground A3 TMS Test Mode Select B4 TDO Test Data Output A4 TDI Test Data Input B5 +5V +5 VDC A5 +5V +5 VDC B6 +5V +5 VDC A6 INTA_L Interrupt A B7 INTB_L Interrupt B A7 INTC_L Interrupt C B8 INTD_L Interrupt D A8 +5V +5 VDC B9 PRSNT1_L Reserved A9 RESV Reserved VDC B10 RESV Reserved VDC A10 +5V +V I/O (+5 V) B11 PRSNT2_L Reserved A11 RESV Reserved VDC B12 KEY Key A12 KEY Key B13 KEY Key A13 KEY Key B14 RESV Reserved VDC A14 RESV 3.3Vaux B15 GND Ground A15 RESET_L Reset B16 CLK Clock A16 +3.3V +V I/O (+3.3 V) B17 GND Ground A17 GNT_L Grant PCI use B18 REQ_L Request A18 GND Ground B19 +3.3V +V I/O (+3.3 V) A19 PME_L Power Management Event
Appendix - 13
Pin Name Description Pin Name Description B20 AD31 Address/Data 31 A20 AD30 Address/Data 30 B21 AD29 Address/Data 29 A21 +3.3V +3.3 VDC B22 GND Ground A22 AD28 Address/Data 28 B23 AD27 Address/Data 27 A23 AD26 Address/Data 26 B24 AD25 Address/Data 25 A24 GND Ground B25 +3.3V +3.3VDC A25 AD24 Address/Data 24 B26 C/BE3_L Command, Byte Enable 3 A26 IDSEL Initialization Device Select B27 AD23 Address/Data 23 A27 +3.3V +3.3 VDC B28 GND Ground A28 AD22 Address/Data 22 B29 AD21 Address/Data 21 A29 AD20 Address/Data 20 B30 AD19 Address/Data 19 A30 GND Ground B31 +3.3V +3.3 VDC A31 AD18 Address/Data 18 B32 AD17 Address/Data 17 A32 AD16 Address/Data 16 B33 C/BE2_L Command, Byte Enable 2 A33 +3.3V +3.3 VDC B34 GND13 Ground A34 FRAME_L Address or Data phase B35 IRDY_L Initiator Ready A35 GND Ground B36 +3.3V +3.3 VDC A36 TRDY_L Target Ready B37 DEVSEL_L Device Select A37 GND Ground B38 GND Ground A38 STOP_L Stop Transfer Cycle B39 LOCK_L Lock bus A39 +3.3V +3.3 VDC B40 PERR_L Parity Error A40 SMBCLK B41 +3.3V +3.3 VDC A41 SMBDAT B42 SERR_L System Error A42 GND Ground B43 +3.3V +3.3 VDC A43 PAR Parity B44 C/BE1_L Command, Byte Enable 1 A44 AD15 Address/Data 15 B45 AD14 Address/Data 14 A45 +3.3V +3.3 VDC B46 GND Ground A46 AD13 Address/Data 13 B47 AD12 Address/Data 12 A47 AD11 Address/Data 11 B48 AD10 Address/Data 10 A48 GND Ground B49 M66EN 66 MHz En A49 AD9 Address/Data 9 B50 GND Ground A50 GND Ground B51 GND Ground A51 GND Ground B52 AD8 Address/Data 8 A52 C/BE0_L Command, Byte Enable 0 B53 AD7 Address/Data 7 A53 +3.3V +3.3 VDC B54 +3.3V +3.3 VDC A54 AD6 Address/Data 6 B55 AD5 Address/Data 5 A55 AD4 Address/Data 4
Appendix - 14
Pin Name Description Pin Name Description B56 AD3 Address/Data 3 A56 GND Ground B57 GND Ground A57 AD2 Address/Data 2 B58 AD1 Address/Data 1 A58 AD0 Address/Data 0 B59 +3.3V +V I/O (+3.3 V) A59 +3.3V +V I/O (+3.3 V) B60 ACK64 Acknowledge 64 bit A60 REQ64 Request 64 bit B61 VDD +5 VDC A61 VDD +5 VDC B62 VDD +5 VDC A62 VDD +5 VDC KEY Key KEY Key KEY Key KEY Key B63 RESV Reserved A63 GND Ground B64 GND Ground A64 C/BE7_L Command, Byte Enable 7 B65 C/BE6_L Command, Byte Enable 6 A65 C/BE5_L Command, Byte Enable 5 B66 C/BE4_L Command, Byte Enable 4 A66 +3.3V +V I/O (+3.3 V) B67 GND Ground A67 PAR64 Parity_64 B68 AD63 Address/Data 63 A68 AD62 Address/Data 62 B69 AD61 Address/Data 61 A69 GND Ground B70 +3.3V +V I/O (+3.3 V) A70 AD60 Address/Data 60 B71 AD59 Address/Data 59 A71 AD58 Address/Data 58 B72 AD57 Address/Data 57 A72 GND Ground B73 GND Ground A73 AD56 Address/Data 56 B74 AD55 Address/Data 55 A74 AD54 Address/Data 54 B75 AD53 Address/Data 53 A75 +3.3V +V I/O (+3.3 V) B76 GND Ground A76 AD52 Address/Data 52 B77 AD51 Address/Data 51 A77 AD50 Address/Data 50 B78 AD49 Address/Data 49 A78 GND Ground B79 +3.3V +V I/O (+3.3 V) A79 AD48 Address/Data 48 B80 AD47 Address/Data 47 A80 AD46 Address/Data 46 B81 AD45 Address/Data 45 A81 GND Ground B82 GND Ground A82 AD44 Address/Data 44 B83 AD43 Address/Data 43 A83 AD42 Address/Data 42 B84 AD41 Address/Data 41 A84 +3.3V +V I/O (+3.3 V) B85 GND Ground A85 AD40 Address/Data 40 B86 AD39 Address/Data 39 A86 AD38 Address/Data 38 B87 AD37 Address/Data 37 A87 GND Ground B88 +3.3V +V I/O (+3.3 V) A88 AD36 Address/Data 36 B89 AD35 Address/Data 35 A89 AD34 Address/Data 34
Appendix - 15
Pin Name Description Pin Name Description B90 AD33 Address/Data 33 A90 GND Ground B91 GND Ground A91 AD32 Address/Data 32 B92 RSVD Reserved A92 RSVD Reserved B93 RSVD Reserved A93 GND Ground B94 GND Ground A94 RSVD Reserved
32-Bit PCI Connectors
The PCI universal 32-bit connector is a 124-pin card edge connector, AMP 145154-4, as illustrated in Figure 32. The pin assignments are listed in Table 15.
Figure 32. 32-Bit PCI Connector
Table 15. 32-Bit PCI Connector Pin Assignments
Pin Name Description Pin Name Description B1 –12V –12 VDC A1 TRST_L Test Logic Reset B2 TCK Test Clock A2 +12V +12 VDC B3 GND Ground A3 TMS Test Mode Select B4 TDO Test Data Output A4 TDI Test Data Input B5 +5V +5 VDC A5 +5V +5 VDC B6 +5V +5 VDC A6 INTA_L Interrupt A B7 INTB_L Interrupt B A7 INTC_L Interrupt C B8 INTD_L Interrupt D A8 +5V +5 VDC B9 PRSNT1_L Reserved A9 RESV Reserved VDC B10 RESV Reserved VDC A10 +5V +V I/O (+5 V) B11 PRSNT2_L Reserved A11 RESV Reserved VDC B12 GND Ground A12 GND Ground B13 GND Ground A13 GND Ground B14 RESV Reserved VDC A14 RESV Reserved VDC
Appendix - 16
Pin Name Description Pin Name Description B15 GND Ground A15 RESET_L Reset B16 CLK Clock A16 +5V +V I/O (+5 V) B17 GND Ground A17 GNT_L Grant PCI use B18 REQ_L Request A18 GND Ground B19 +5V +V I/O (+5 V) A19 PME_L Power management event B20 AD31 Address/Data 31 A20 AD30 Address/Data 30 B21 AD29 Address/Data 29 A21 +3.3V +3.3 VDC B22 GND Ground A22 AD28 Address/Data 28 B23 AD27 Address/Data 27 A23 AD26 Address/Data 26 B24 AD25 Address/Data 25 A24 GND Ground B25 +3.3V +3.3VDC A25 AD24 Address/Data 24 B26 C/BE3_L Command, Byte Enable 3 A26 IDSEL Initialization Device Select B27 AD23 Address/Data 23 A27 +3.3V +3.3 VDC B28 GND Ground A28 AD22 Address/Data 22 B29 AD21 Address/Data 21 A29 AD20 Address/Data 20 B30 AD19 Address/Data 19 A30 GND Ground B31 +3.3V +3.3 VDC A31 AD18 Address/Data 18 B32 AD17 Address/Data 17 A32 AD16 Address/Data 16 B33 C/BE2_L Command, Byte Enable 2 A33 +3.3V +3.3 VDC B34 GND13 Ground A34 FRAME_L Address or Data phase B35 IRDY_L Initiator Ready A35 GND Ground B36 +3.3V +3.3 VDC A36 TRDY_L Target Ready B37 DEVSEL_L Device Select A37 GND Ground B38 GND Ground A38 STOP_L Stop Transfer Cycle B39 LOCK_L Lock bus A39 +3.3V +3.3 VDC B40 PERR_L Parity Error A40 SMBCLK B41 +3.3V +3.3 VDC A41 SMBDAT B42 SERR_L System Error A42 GND Ground B43 +3.3V +3.3 VDC A43 PAR Parity B44 C/BE1_L Command, Byte Enable 1 A44 AD15 Address/Data 15 B45 AD14 Address/Data 14 A45 +3.3V +3.3 VDC B46 GND Ground A46 AD13 Address/Data 13 B47 AD12 Address/Data 12 A47 AD11 Address/Data 11 B48 AD10 Address/Data 10 A48 GND Ground B49 GND Ground A49 AD9 Address/Data 9 B50 (KEY) A50 (KEY)
Appendix - 17
Pin Name Description Pin Name Description B51 (KEY) A51 (KEY) B52 AD8 Address/Data 8 A52 C/BE0_L Command, Byte Enable 0 B53 AD7 Address/Data 7 A53 +3.3V +3.3 VDC B54 +3.3V +3.3 VDC A54 AD6 Address/Data 6 B55 AD5 Address/Data 5 A55 AD4 Address/Data 4 B56 AD3 Address/Data 3 A56 GND Ground B57 GND Ground A57 AD2 Address/Data 2 B58 AD1 Address/Data 1 A58 AD0 Address/Data 0 B59 VDD +5 VDC A59 +5V +V I/O (+5 V) B60 ACK64 Acknowledge 64 bit A60 REQ64 Request 64 bit B61 VDD +5 VDC A61 VDD +5 VDC B62 VDD +5 VDC A62 VDD +5 VDC
Appendix - 18
Floppy Disk Drive Connector
The floppy disk drive connector uses a 2x17 pin 0.1 inch shrouded header AMP 103308-7 as shown in Figure 33. The pin assignments are listed in Table 16.
Figure 33. Regular Floppy Connector
Table 16. Floppy Connector Pin Assignments
Pin Name Description Pin Name Description 1 GND Ground 2 /REDWC Density Select 3 GND Ground 4 N/C Reserved 5 GND Ground 6 N/C Reserved 7 GND Ground 8 /INDEX Index 9 GND Ground 10 /MOTEA Motor Enable A 11 GND Ground 12 /DRVSB Drive Select B 13 GND Ground 14 /DRVSA Drive Select A 15 GND Ground 16 /MOTEB Motor Enable B 17 GND Ground 18 /DIR Direction 19 GND Ground 20 /STEP Step 21 GND Ground 22 /WDATA Write Data 23 GND Ground 24 /WGATE Floppy Write Enable 25 GND Ground 26 /TRK00 Track 0 27 GND Ground 28 /WPT Write Protect 29 GND Ground 30 /RDATA Read Data 31 GND Ground 32 /SIDE1 Head Select 33 GND Ground 34 /DSKCHG Disk Change
Appendix - 19
Slim Floppy Connector
The connector illustrated in Figure 34 supports the slim floppy used in the A8440 system. The pin assignments for this connector are listed in Table 17.
126
Figure 34. Slim Floppy Connector
Table 17. Slim Floppy Connector Pin Assignments
Pin Name Description Pin Name Description 1 +5V Power 2 /INDEX Index 3 +5V Power 4 /DS0_L Drive Select A 5 +5V Power 6 /DSKCHG Disk Change 7 N/C No Connect 8 FDD_RDY Floppy Ready 9 FDD_LDOUT Floppy_ld 10 /MOTEA Motor Enable A 11 N/C No Connect 12 /Dir Direction 13 DRVDEN Density Select 14 /Step Step 15 GND Ground 16 /WDATA Write Data 17 GND Ground 18 /WGATE Floppy write enable 19 GND Ground 20 /TRK0 Track 0 21 GND Ground 22 /WPT Write protect 23 GND Ground 24 /RDATA Read Data 25 GND Ground 26 /SIDE1 Head Select
Appendix - 20