6.012 - Electronic Devices and Circuits Lecture 18 - Single Stages - Outline • Announcements Handouts - Lecture Outline and Summary Notes on Single Transistor Exam 2 - Wednesday night, November 5, Room 10-250 Closed book; formula sheet provided; one crib sheet permitted • Review - Biasing and amplifier metrics Current mirrors in emitter and source circuits Performance metrics: gains (voltage, current, power); input and output resistances; power dissipation; bandwidth • Mid-band analysis Biasing capacitors: short circuits above wLO Device capacitors: open circuits below wHI Midband: wLO < w < wHI • Building-block stages Common emitter/source /gate Emitter/source follower (also called /drain) Series feedback (more commonly: emitter/source degeneration) Shunt feedback Clif Fonstad, 11/03 Lecture 18 - Slide 1 • Linear amplifier performance metrics: The characteristics of linear amplifiers that we use to compare different amplifier designs, and to judge their performance and suitability for a given application are given below: iin iout + Linear + Rest vin vout of - Amplifier - circuit

Voltage gain, Av = vout/vin Current gain, Ai = iout/iin Power gain, Apower = Pout/Pin = voutiout /viniin = AvAi Input resistance, rin = vin/iin itest Linear + vtest Amplifier -

Output resistance, rout = vtest/itest with vin = 0

DC Power dissipation, PDC = (V+ - V-)(SIBIAS's) Clif Fonstad, 11/03 Lecture 18 - Slide 2 • Linear equivalent circuits: a pn diodes: gd = q|ID|/kT gd Cd Cd = gdtd + Cdpl(VAB)

b

BJTs: (in FAR) gm = q|IC|/kT Cm b c gp = gm/bF + go = |IC/VA| [or l |IC|] gp v p gmv p go Cp = gmtb + Cdpl,be(VBE) Cp [t = w 2/2D ] - b B e e e Cm = Cdpl,bc(VBC) MOSFETs: (in saturation) Cgd 1/2 g d gm = K(VGS - VT) = (2K|ID|) + + gmb = hgm 1/2 * v gs v ds [h = {eSiqNA/2(|2fp| - VBS)} /Cox ] gmv gs gmbv bs go Cgs go = |ID/VA| [or l |ID|] - - * s - s Cgs = (2/3) WL Cox C : G-D fringing and overlap v gd bs Cdb capacitance, all parasitic Csb Cgb + b Csb, Cgb, Cdb: depletion capacitances Clif Fonstad, 11/03 Lecture 18 - Slide 3 • BJTs and MOSFETs biased for linear amplifier applications

+V +V +V +V

IBIAS IBIAS

IBIAS IBIAS

-V -V -V -V

npn pnp n-MOS p-MOS

Clif Fonstad, 11/03 Lecture 18 - Slide 4 • Examples of current mirror biased BJT circuits: V+ V+

+V

IC IC RREF RREF Q1 Q1

IBIAS

-V Q2 Q3 Q2 Q3 Above: Concept

Right: Implementations V- V- BJT Mirror MOSFET Mirror

IC ≈ (AQ3/AQ2) IREF IC ≈ (KQ3/KQ2) IREF

Clif Fonstad, 11/03 Lecture 18 - Slide 5 • Looking at a complicated circuit: Lesson I Find the biasing circuitry and represent it symbolically Consider the following example:

+ 1.5 V

Q2 Q3 Q4 Q5 Q1 A Q8 A Q10 Q11 Q23

Q9IBIAS5

Q16 Q6 Q7 R2 R3 R1 + + Q12 Q13 vIN1 vIN2 Q14 Q15 + - - vOUT Q17 - B B B B Q19 B Q20 B Q21 Q22 Q24

Q18 IBIAS1 IBIAS2 IBIAS3 IBIAS4 IBIAS6

Circuitry - 1.5 V providing the VREF's 8 of the 24 are "only" used for biasing the other 16 transistors! If we get them out of the picture for awhile, the circuit looks simpler:

Clif Fonstad, 11/03 Lecture 18 - Slide 6 • Looking at a complicated circuit: Lesson I, cont. segregating out the biasing circuitry Indicating the current sources symbolically lets you focus on the action:

+ 1.5 V

Q2 Q3 Q4 Q5 IBIAS5 Q8 Q10 Q11

Q9

Q16 Q6 Q7 R2 R3 + + Q12 Q13 vIN1 vIN2 Q14 Q15 + - - vOUT Q17 -

I IBIAS2 I BIAS1 IBIAS3 BIAS4 IBIAS6 - 1.5 V 16 transistors left. In Lessons II and III we reduce the number to 5! Stay tuned… Clif Fonstad, 11/03 Lecture 18 - Slide 7 • Three BJT single-transistor amplifiers

V+ V+ V+

+ CO C CO vin O - + + + vout vout vout + - IBIAS - vin - CI - + V- IBIAS I vIN EMITT""""ER FOLLOWER C BIAS E - V- V- COMMON BASE Input: base Input: emitter Output: collector Output: collector Common: emitter Common: base + + + + vin + + vout vin vout vout vin ------• Three MOSFET single-transistor amplifiers V+ V+ V+

+ C C CO vin O O - + + + vout vout vout + - IBIAS - vin - CI - + V- IBIAS I vIN C BIAS SOURCE FOLLOWER E - V- V- Input: gate Input: source; Output: drain Output: drain Common: gate; Substrate: to ground Common: source + Substrate: to source + + + + vin + vout vin vout vout vin ------• Single-transistor amplifiers with feedback V+ V+

RF CO CO + + vout vout + + - vin - vin - - RF IBIAS IBIAS CE CE

V- V- Series feedback Shunt feedback also termed "emitter degeneration" RF + + + vout + vout vin vin RF - - - - Clif Fonstad, 11/03 Lecture 18 - Slide 10 • The "mid-band"concept: frequency range of constant gain and phase V+ Common emitter example: The linear equivalent circuit for the common emitter amplifier stage on the left is drawn CO + below with all of the elements included: vout + Cm CO vin - - + + + rt IBIAS gp v in v p gmv p go CE + Cp g v t - v out next - gLOAD V- r IBIAS CE - -

The capacitors are one of two types: Biasing capacitors: typically very large (in µF range) (CO, CE, etc.) effectively shorts above some wLO Device capacitors: typically very small (in pF range) (Cp, Cm, etc.) effectively open until some wHI Clif Fonstad, 11/03 Lecture 18 - Slide 11 • The "mid-band"concept, cont.:

At frequencies above some value (≡ wLO) The biasing capacitors look like shorts: Cm CO + + + rt gp v in v p gmv p go + Cp g v t - v out next - gLOAD r IBIAS CE - -

At frequencies below some other value (≡ wHI) The parasitic capacitors look like open circuits: Cm CO + + + rt gp v in v p gmv p go + Cp g v t - v out next - gLOAD r IBIAS CE - - Clif Fonstad, 11/03 Lecture 18 - Slide 12 • The "mid-band"concept, cont.:

If wLO < wHI, then there is a range where all of the capacitors are either short circuits (the biasing capacitors) or open circuits (the parasitics). Cm CO + + + rt gp v in v p gmv p go + Cp g v t - v out next - gLOAD r IBIAS CE - -

We call the frequency range between wLO and wHI the "mid- band" range; for frequencies in this range our model is simply: + + + + rt g gp gmv p l v t v in v p go v out - (= gLOAD - - - + gnext )

Valid for wLO < w< wHI, i.e. in the "mid-band" range. [where all bias capacitors are shorts and Clif Fonstad, 11/03 all parasitic capacitors are open] Lecture 18 - Slide 13 • Common emitter/source amplifiers

Common + + + V+ + rt emitter gp gmv p v t v in v p go v out gl - - - - Mid-band LEC for common emitter CO g : conductance of "LOAD" and l anything connected at "v " + out v + out BJT MOSFET vin - - Av: -gm/(go + gl) -gm/(go + gl) I BIAS -gm(Ro||rl) -gm(Ro||rl) CE Ai: -b gl/(go + gl) ∞ V- @ -b

Rin: rp ∞

Rout: 1/go = ro 1/go = ro

A good workhorse gain stage Clif Fonstad, 11/03 Lecture 18 - Slide 14 go • Common base/gate amplifiers rt V+ Common + + + (gm + gmb)vsg gate v in v t v out gl - = v sg CO - - + Mid-band LEC for common gate v gl : conductance of "LOAD" and anything out connected at "vout" CI - The conductance of IBIAS can be neglected. + BJT MOSFET I vIN BIAS Av: (gm+go)/(gl+go) (gm+gmb+go)/(gl+go) - @ gm(rl||ro) @ (gm+gmb)(rl||ro) V- Ai: (gm+go)/(gm+go+gp+gpgo/gl) 1 @ 1 -1 -1 Rin: [gm+gp+go(gl-gm)/(gl+go)] [gm+gmb+go(gl-gm-gmb)/(gl+go)] @ 1/(gm+gp) = rp/(b+1) @ 1/(gm+gmb) Rout: ro[1 + (gm+go)/(gp+gt)] ro[1 + (gm+gmb+go)/gt] @ (b+1)ro • A very low Rin, large Rout stage often used to complement other stages Clif Fonstad, 11/03 Lecture 18 - Slide 15 • Emitter/source followers + + rt gp v in v p gmv p go + V+ v t - - Emitter + Follower gl v out

+ CO - - vin - Mid-band LEC for emitter follower + gl : conductance of "IBIAS" and vout anything connected at "vout" IBIAS - BJT MOSFET V- Av: 1/[1 + (go+gl)/(gm+gp)] 1/[1 + (go+gl)/gm] @ 1 @ 1

Ai: b gl/(go+gl) ∞

• A great output Rin: 1/gp + (b+1)/(go+gl) buffer stage with = rp + (b+1) ro||rl ∞ small Rout, big Rin -1 -1 Rout: [go+gl+(gm+gp)/(1 + gprt)] [go+gl+gm] @ (rt + rp)/(b+1) @ 1/gm Clif Fonstad, 11/03 Lecture 18 - Slide 16 • Series Feedback: emitter/source degeneration + + rt + Emitter gp v in v gmv p g V+ p o degeneration + v t - gl - v out

RF - - CO Mid-band LEC emitter degeneration + gl : conductance of "LOAD" and v anything connected at "vout" + out vin - BJT MOSFET - A : @ -r /R @ -r /R RF v l F l F IBIAS Ai: @ b ∞ CE Rin: @ rp + (b+1)RF ∞

V- Rout: @ 1/go @ 1/go Useful in discrete device circuit design; we use to understand common-mode gain suppression in differential amplifiers Clif Fonstad, 11/03 Lecture 18 - Slide 17 • Feedback: shunt feedback element rt RF Shunt feedback + + + V+ + gp gmv p v t v in v p go v out gl - - - - Mid-band LEC for a shunted common-emitter RF gl : conductance of "LOAD" and CO anything connected at "vout" + BJT MOSFET vout + Av: -(gm-GF)/(go+GF) -(gm-GF)/(go+GF) vin - - @ -gmRF @ -gmRF IBIAS Ai: @ - gl/GF @ - gl/GF CE Rin: 1/[gp +GF(1-Av)] RF/(1-Av) V- @ rp||RF/(1-Av)

Rout: @ (ro||RF) @ (ro||RF) Used to stabilize high gain circuits and in transimpedance amplifiers; the same topology leads to the Miller effect (Lec." 24).

Clif Fonstad, 11/03 Lecture 18 - Slide 18 • Summary of the stages (bipolar)

Voltage Current Input Output

gain, Av gain, Ai resistance, R i resistance, R o Ê ˆ gm b gl 1 Common emitter - (= -gm rl ') - rp ro Á = ˜ [go + gl ] [go + gl ] Ë go ¯

gm rp Common base (= gm rl ') ª1 ª ª [b +1]ro [go + gl ] [b +1]

[gm + gp ] gl rt + rp Emitter follower ª1 b ª b rp + [b +1]rl ' ª [gm + gp + go + gl ] [go + gl ] [b +1]

Emitter degeneration rl ª - ª b ª rp + [b +1]RF ª ro (series feedback) RF Ê ˆ [gm - GF ] gl 1 1 Shunt feedback - ª -gm RF - ro RF Á = ˜ [go + GF ] GF gp + GF [1- Av ] Ë [go + GF ]¯

Clif Fonstad, 11/03 Lecture 18 - Slide 19 6.012 - Electronic Devices and Circuits Lecture 18 - Single Transistor Amplifier Stages - Summary

• Mid-band analysis Biasing capacitors: typically in mF range should/can be avoided completely in modern IC design (wLO = 0) Device capacitors: typically in pF range; goal is to make as small as possible Midband: no capacitors in incremental analysis; gain and phase constant

want as wide as possible (we won't find wLO and wHI until Lec. 22) • Building-block stages Common emitter/source: good voltage and current gain large Rin and Rout good gain stage

Common base/gate: very small Rin; very large Rout unity current gain; good voltage gain will find paired with other stages to form ""

Emitter/source follower: very small Rout; very large Rin unity voltage gain; good current gain an excellent output stage or buffer Series feedback: moderate voltage gain dependant on ratio of resistors

Shunt feedback: used in transimpedance amplifiers Clif Fonstad, 11/03 Lecture 18 - Slide 20