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Aguilera, Ricardo P., Quevedo, Daniel E., Summers, Terry J., & Lezana, Pablo (2008) Predictive control algorithm robustness for achieving fault tolerance in mul- ticell converters. In Proceedings of the 34th Annual Conference of the IEEE Industrial Elec- tronics Society:IECON 2008. IEEE Computer Society, pp. 3302-3308.

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Ricardo P. Aguilera, Daniel E. Quevedo, Terry J. Summers Pablo Lezana School of Electrical Engineering Computer Science Departamento de Electricidad, The University of Newcastle Universidad Técnica Federico Santa María, NSW 2308, Australia Valparaíso, Chile e-mails: [email protected], e-mail: [email protected] [email protected], [email protected]

Abstract— Multilevel Converters (MCs) have emerged as a few sample times. However, the reconfiguration proposed did promising alternative to traditional two level converters. MCs not produce the same output voltage characteristics as would use an arrangement of several semiconductors to synthesize high be produced under normal operating conditions. quality output voltage levels. Unfortunately, as a consequence of using more switching elements, MCs are, in general, more likely Recently, predictive control strategies have been applied to to be affected by faults, than their two level counterparts. In power converters and multilevel converters in particular, see this paper, we propose a finite set constrained predictive control e.g. [5]–[10]. Advantages of using predictive control, when method for MCs, which is aimed at achieving robustness to compared to traditional PWM methods, derive from the fact failures in the semiconductors. We focus on three-phase multicell that changing operating conditions are explicitly accounted for. flying capacitor converters and show that, by carefully designing switching sequences, faults can be isolated from measurements In addition, predictive control strategies allow one to not only provided by a single voltage sensor per phase. When faults occur, control output currents, but also other aspects such as internal the proposed controller reconfigures the converter to provide capacitor voltages and the switching frequency, amongst others to the load voltages which are similar to those obtained under [8], [10]. normal, i.e., fault free, operating conditions. This paper presents a novel fault detection strategy for flying capacitor multilevel converters. It is based on predictive I.INTRODUCTION control and incorporates restrictions in switch selection in Multilevel converters (MCs) have emerged as an important order to allow the controller to detect internal short circuits technology in many industrial applications. The main reason and to determine with certainty which cell has failed. A for this is that MCs are able to operate at far higher power reconfiguration method is then demonstrated which allows the levels and also provide output voltage and currents with lower converter to produce an output voltage characteristic identical distortion than their two level counterparts [1]. However, a to that obtained under normal operation of the converter. major disadvantage of MCs is the increased probability of II.FLYING CAPACITOR CONVERTER failure due to the larger number of devices utilized [2], [3]. In particular, flying capacitor converters (FCCs) have at- In this section we describe the flying capacitor topology in tracted significant attention [4]. As depicted in Fig. 1, FCCs more detail and develop a model for the system. are composed of multiple interconnected cells. When a short A. Converter Model circuit occurs, fault currents decay quickly [2], since the as- In the present work, we will focus on an electrical system sociated capacitors seek voltage balance. These characteristics consisting of a 3 cell FCC connected to a coupled inductive open the possibility to reconfigure the converter and continue load, as depicted in Fig. 2. As mentioned in the way in which operation, albeit, in general, at reduced performance levels, as seen by the loads connected. To achieve robustness to failures, faults need to be isolated correctly and appropriate Cell 3 Cell 2 Cell 1 S S S remedial actions be taken quickly. Otherwise, additional faults a3 a2 a1 will be triggered, leading to damages in the entire converter ia2 ia1 v v v ia and, possibly, the load. Vdc a3 Ca3 a2 Ca2 a1 Ca1 a In [2], a fault detection strategy for multicell FCCs was proposed. This strategy was based on the analysis of the o Sa3 Sa2 Sa1 switching frequency of the converters output voltage, when a Pulse Width Modulation (PWM) strategy is used to control the converter. The method was able to detect the failed cell in a Fig. 1. Three-cell FC converter (a-phase). Inverter v v Load NormalOperation OperationunderFault ao an S a3:Fault a ia Z CC CC a3 a2 a3 a2 vbo vbn V v v 2 V V v v V dc a3 a2 = 3 dc dc a3 a2 = dc b ib o Z n S :OFF® ON vco vcn a) a3

c ic S Z a2:Fault

CC CC a2 a1 a2 a1 FC 2 V v v 1 V 1 V v v 1 V =R+ 3 dc a2 a1 3 dc 2 dc a2 a1 2 dc n Cell Z sL = = = =

Fig. 2. Three phase FCC and load connection. S ® b) a2:OFF ON

S a1:Fault the cells are connected, together with the capacitor voltages of C C each cell, determines the waveform output voltage synthesized. a1 aa1 a 1 V v v Figure 1 shows a schematic of a single phase leg of a 3 dc = a1 0 = a1 three-cell flying capacitor converter. Each cell consists of a complementary pair of switching elements and a capacitor. c) Sa :OFF® ON (The term complementary applied to this topology means that 1 both switches in the same cell cannot have the same state under normal operating conditions.) Fig. 3. Short Circuit in a FCC. a) Fault in Cell 3; b) Fault in Cell 2; c) Fault To characterize the output voltages of the three phase in Cell 1. converter, we first note that, for phase a, we have:

vao(t) = va1(t)Sa1(t) + (va2(t) − va1(t))Sa2(t) have: Z t + (Vdc − va2(t))Sa3(t), (1) 1 va1(t) = ia1(τ) dτ (5) Ca1 The associated capacitor currents are Z−∞ 1 t ia1(t) = ia(t)(Sa2(t) − Sa1(t)) and (2) va2(t) = ia2(τ) dτ (6) Ca2 −∞ ia2(t) = ia(t)(Sa3(t) − Sa2(t)). (3) dia(t) L + Ria(t) = van(t), (7) Table I shows the output voltages and currents for phase a, dt as a function of switch states. 2 1 1 van(t) = vao(t) − vbo(t) − vco(t). (8) The load voltages of the three phase converter are, thus, 3 3 3 described via Similar equations are obtained for phases b and c.       v (t) 2/3 −1/3 −1/3 v (t) an ao III.FAULT ANALYSIS IN FLYING CAPACITOR  v (t)  =  −1/3 2/3 −1/3   v (t)  (4) bn bo CONVERTERS vcn(t) −1/3 −1/3 2/3 vco(t) There are several kinds of failures that can occur in a FCC A simple dynamic model of the system can be developed and many reasons why these failures may occur. Further, due by noting this for one phase (in this case, the a-phase) we to the large number of semiconductors which make up the converter and the stresses to which they are exposed, switching TABLE I failures in these converters are more likely than in their two SWITCHING STATE AND OUTPUT VOLTAGES OF A FC INVERTER level counterparts. The most common switch used in power converters is Sa(Sa3,Sa2,Sa1) vao(t) ia1(t) ia2(t) the Isolated Gate Bipolar Transistor IGBT. Although, these Sa(0, 0, 0) = 0 0 0 0 elements can fail either short-circuit or open-circuit, it can be Sa(0, 0, 1) = 1 va1(t) −ia 0 avoided open-circuit fails using an appropriated IGBT gate Sa(0, 1, 0) = 2 va2(t) − va1(t) ia −ia(t) drive [2], [11]. Therefore, in the sequel we will concentrate Sa(0, 1, 1) = 3 va2(t) 0 −ia(t) on short-circuit failures. Sa(1, 0, 0) = 4 Vdc − va2(t) 0 ia(t) Sa(1, 0, 1) = 5 Vdc − va2(t) + va1(t) −ia(t) ia(t) A. Effects of a switch fault in a Flying Capacitor Sa(1, 1, 0) = 6 Vdc − va1(t) ia(t) 0 In a FCC, a short circuited IGBT does not produce an Sa(0, 0, 0) = 7 Vdc 0 0 abnormal output by itself. The fault only manifests itself once TABLE II OUTPUT VOLTAGES OF A FCCUNDERA FAULT CONDITION

Sa=(Sa3,Sa2,Sa1) vao(t) in a Failed Cell vao(t) in a Normal Condition Fault Condition

Sa = (0, 0, 0) = 0 0 Cell 1 0 Cell 2 0 Cell 3 0

Sa = (0, 0, 1) = 1 va1(t) Cell 1 0 Cell 2 (va2(t) + va1(t))/2 Cell 3 va1(t)

Sa = (0, 1, 0) = 2 va2(t) − va1(t) Cell 1 va2(t) Cell 2 0

Cell 3 Vdc − va1(t) Sa = (0, 1, 1) = 3 va2(t) Cell 1 va2(t) Cell 2 (va2(t) + va1(t))/2 Cell 3 Vdc

Sa = (1, 0, 0) = 4 Vdc − va2(t) Cell 1 Vdc − va2(t) Cell 2 Vdc − (va2(t) + va1(t))/2 Cell 3 0

Sa = (1, 0, 1) = 5 Vdc − va2(t) + va1(t) Cell 1 Vdc − va2(t) Cell 2 Vdc Cell 3 va1(t)

Sa = (1, 1, 0) = 6 Vdc − va1(t) Cell 1 Vdc Cell 2 Vdc − (va2(t) + va1(t))/2 Cell 3 Vdc − va1(t)

Sa = (1, 1, 1) = 7 Vdc Cell 1 Vdc Cell 2 Vdc Cell 3 Vdc

the complementary IGBT switches from OFF to ON. We call failed cell. For example, if the state Sa = 3 is applied, the this a cell fault. Clearly, a cell fault can be produced only at a real output voltage will not be the expected one if a fault is switching instant. Depending on the cell which has failed, in occurs in cells 2 or cell 3. Conversely for this case, a fault in a 3-cell FCC three different situations may arise. To elucidate cell 1 is not perceived in the output voltage vao, because the this issue, in Fig. 3-a) a fault in cell 3 is shown. This fault expected and the observed output voltage are the same. causes the voltage on the capacitor va2 to increase until it A set of switching states that can be applied at instant time reaches the dc-link voltage Vdc. If the fault is produced in k depending on the previous switch state is presented in the an internal cell, the capacitor voltages at each side of the Table III. These sets, namely Sa(k), allow us to ensure that failed IGBT are equalized to the average value before the when a fault occurs, it will manifest immediately in the output fault. In the case of a 3-cell converter this would mean that voltage when a commutation is realized. va2 = va1 = Vdc/2, as shown in the Fig. 3-b). Finally Fig. 3- The only cases where the fault cannot be detected are c) shows that a fault produced in the first cell forces this cell’s when the states Sa = 0 or Sa = 7 are selected. However, capacitor to discharge completely, i.e., give va1 = 0[V ]. The in this situation a fault will always be detected in the next time taken to reach these capacitor voltage changes depends on commutation. Consequently, we can use the measurement of the capacitance values and the line and IGBT impedances and the output voltages vao, vbo, vco to identify a failed cell in the will in general occur quickly [2]. If the fault is not detected on respective output phase in one or at most two commutations. time, fault repetitions will be produced in the cell, destroying IV. PREDICTIVE CONTROLOF FLYING CAPACITOR the IGBT’s [12]. CONVERTERS WITH ROBUSTNESSTO FAULTS B. Output Voltage Under a Fault Condition We can distinguish the following control objectives: As mentioned, a cell fault can only be detected when a i. Tracking of three-phase output current references. commutation is realized. These causes changes in one or two ii. Tracking of capacitors voltage references. capacitor voltages, but not necessary in the output voltage vao. To achieve these objectives, even if a fault occurs, we will Table II shows how a cell fault will manifest itself in the output next present a predictive controller which minimizes a suitably voltage vao, for a 3-cell FCC. Whether faults can be detected defined cost function and where switching states are restricted in the output voltages depends of the switch state and the according to Table III. TABLE III Here, λ1 and λ2 are design parameters, which allow one to SETOF SWITCHING STATES DEPENDINGOFTHE PREVIOUS STATE trade current tracking errors versus capacitor voltage tracking (PHASEA) errors and, thus, achieve the proposed goals (i) and (ii). The decision variables are S , S and S , which are restricted to Sa(k − 1) Sa(k) a b c 0 {0, 1, 2, 4} belong to the finite sets defined in Table III, to allow the fastest 1 {0, 1, 2, 3, 5} fault detection. 2 {0, 1, 2, 4, 7} The optimal switching action to be applied at time k + 1, 3 {1, 2, 3, 5, 7} namely Sopt[k] is obtained by minimizing J(Sa,Sb,Sc)[k]. 4 {0, 2, 4, 5, 6} Then, at the next sample time, k + 1, the cost function 5 {0, 3, 5, 6, 7} J(Sa,Sb,Sc)[k + 1] is minimized using fresh state measure- 6 {2, 4, 5, 6, 7} ments. This gives Sopt[k + 1], etc. 7 {3, 5, 6, 7} If a cell fault is detected, then the capacitor voltage reference of the associated phase is changed to keep normal output voltage levels, despite the fault conditions. As will be apparent A. Basic Principles in Section V, this reconfiguration method gives robust perfor- mance of the converter, as seen by the load. Consequently, the The predictive control strategy is implemented in discrete FCC does not need to be shut down immediately, but can be time with sampling frequency f = h−1. To obtain a discrete s repaired when convenient. time model of the converter, we use a forward Euler approx- imation. Expression (1)-(8), then yields: B. Estimation of Capacitor Voltages using Output Voltage Feedback

vao[k] = va1[k]Sa1[k] + (va2[k] − va1[k])Sa2[k] The predictive controller proposed in the previous section, in principle requires 3 sensors per phase when applied to a + (Vdc − va2[k])Sa3[k], (9) 3-cell FCC [8]. These are 2 measurements of the capacitor h va1[k + 1] = va1[k] + (Sa2[k] − Sa1[k]) ia[k], (10) voltages and one of the output current. In addition, we also Ca1 require measuring the output voltages v , v , v to identify h ao bo co va2[k + 1] = va2[k] + (Sa3[k] − Sa2[k]) ia[k], (11) a possible cell fault. µ C¶a2 More generally, in a n-cell FCC the number of sensors hR h would be 3(n + 1). We will next show how to reduce the ia[k + 1] = 1 − ia[k] + van[k], (12) L L number of sensors needed to achieve robust performance. 2 1 1 v [k] = v [k] − v [k] − v [k]. (13) The, capacitor voltages can be estimated from (5)-(6), which an 3 ao 3 bo 3 co in discrete time can be rewritten via: where x[k] , x(kh). h vy1[k] =vy1[k − 1] + (Sy2[k − 1] − Sy1[k − 1])iy[k] To incorporate the tracking objectives (i.) and (ii.), we define Cy1 the error signals per phase via: h   vy2[k] =vy1[k − 1] + (Sy3[k − 1] − Sy2[k − 1])iy[k] ∗ Cy2 vy1[k] − vy1[k]  ∗  ey[k] , vy2[k] − vy2[k] , y ∈ {a, b, c} (14) where iy[k], y ∈ {a, b, c} refers to the current values. ∗ iy[k] − iy[k] In a real implementation, this can produce an incremental In normal fault-free operating condition , the references are error due to inaccuracy of the model used, e.g., dead time and [13], saturation volt drop. To improve this situation, this estimation can be corrected measuring in some instants the capacitor ∗ Vdc voltages. The way to do it is to utilize the output voltage vy1[k] = 3 measurement when the applied state is Sa(t) = 1 or Sa(t) = ∗ 2Vdc v [k] = 3. In this case the output voltage will be vao(t) = va1(t) or y2 3 vao(t) = va2(t) respectively. Thus, in instants that other states ∗ whereas iy[k] are the desired three phase sinusoidal currents. are applied, the capacitors voltages values can be estimated. At each time instant k, a measurement of the capacitor The above method allows reduce the number of sensors, using voltages and load currents is used for the minimization of only one measurement of voltage per phase to determinate the following cost function: the internal values of the capacitor voltages and to detect a X T fault condition, independent of the number of cell. Current J(Sa,Sb,Sc)[k] = ey[l] P ey[l] (15) measurements are always necessary for closed-loop control. y∈{a,b,c} V. RESULTS where To verify the performance of the proposed strategy, simula- P = diag{λ1, λ2, 1} (16) tion studies were carried out on a three-phase FCC with three results of this simulation are presented in Fig. 4. It is possible to see from the figure that the controller achieved good performance in the three phase currents and the capacitors voltage. At time t = 51.48[ms] switch Sa2 of the converter is kept in a permanent ON state simulating a short circuit failure of the switch. Then a fault occurs every time that switch S¯a2 commutates to an ON state, therefore, the fault is not always present. In this case the capacitor voltages va1 an va2 are equalized, reducing the number of levels of the output voltage vao(t). Other consequence can be noted in the capacitor voltages behavior, the controller does not know cell 2 has failed and tries to control them, it reduces the performance in the output voltage vao(t) and in the line to line voltage vab(t). This behavior could be detrimental to the converter itself causing a succession of faults and eventually catastrophic failure [12].

Fig. 4. Standard predictive control strategy, λ1 = λ2 = 0.1.: capacitors volt- B. Predictive Control Robustness to Faults ages va1,va2, load currents ia, ib, ic, output voltage vao and corresponding line to line voltage vab. The same situation is applied to the algorithm proposed. In this case, the capacitor voltages are estimated using output voltage feedback and a the set of states are reduced depending of the previous state. The Fig. 5 shows this situation. The startup is similar to the standard predictive control. It is possible to see the capacitor voltages a ripple slightly higher than the standard method. It is because to the reduced set of states. However, the algorithm proposed achieve a grate performance. When the fault is produced, the capacitor volt- ages are equalized, but in this case the fault is detected and then the cell is isolated and it is no more considered in the optimization. Therefore, the line to line voltage vab(t) present a better behavior than in the previous case, but in some instants this voltage presents some anomalies due to the interaction between the three level voltage vao(t) and the four level voltage vbo(t). C. Standard phase shifted PWM with Fault Reconfiguration To analyze the reconfiguration performance, we compare the Fig. 5. Predictive control robustness to fault, λ1 = λ2 = 0.1.: capacitors volt- method proposed in [2], which is applied to a four level FCC ages va1,va2, load currents ia, ib, ic, output voltage vao and corresponding using phase shifted PWM modulation. This method achieves line to line voltage v . ab reconfiguration by changing the phase of the carrier in order to obtain a three level output voltage. In the simulation, the carrier frequency selected per cell cells per phase. A common dc-link voltage of Vdc = 300[V ] is f = 1.5[kHz], obtaining a switching output voltage of was used. The electrical parameters were: Cyj = 470[uF ], cc R = 2.5[Ω] and L = 1[mH]. The three phase current fc = 4.5[kHz]. In Fig. 6, the result of the same fault is ∗ shown. (Note, that start up performance was not included in references iy have an amplitude of 50[A] and a frequency of the simulation as it is time consuming and not the focus of fo = 50[Hz]. The performance of the converter operating with the pro- this work.) This strategy improves the output voltage of the posed method is compared with the standard predictive control phase that has failed but does not achieve good results with applied under the same conditions. Additionally, the proposed respect to the line to line voltage. scheme was compared to standard PWM reconfiguration. D. Predictive Control Robustness to Faults with Reconfigura- A. Standard Predictive Control tion Standard predictive control was applied using a sample In this case, a change in the reference of the capacitor volt- frequency of fs = 25[kHz]. Furthermore, the controller is ages is proposed as a reconfiguration method. Figure 7 shows adjusted using a weight factor λ = 0.1. In this case, the state the results from the fault case considered in the previous three Sy[k] does not depend of his previous state Sy[k − 1]. The simulation studies. When the fault occurs (at t ≈ 51.48[ms]), Fig. 6. Standard phase shift PWM with reconfiguration, fc = 4, 5[kHz]: Fig. 8. Predictive control robustness to fault with reconfiguration, λ1 = capacitors voltages va1,va2, load currents ia, ib, ic, output voltage vao and λ2 = 0.1.: capacitors voltages va1,va2, output voltage vao and corresponding corresponding line to line voltage vab.. switch sequence applied Sa

cell 2 has occurred.

VI.CONCLUSION A Predictive Control strategy to achieve robustness to faults has been proposed. This methodology is applied to a three phase 3-cell FCC. The most important benefits of this method is the good performance achieved in the tracking of the capacitor voltages and the three phase currents even when a fault occurs. The fault is identified using the measurement of the output voltages. To accelerate the fault detection, a carefully designing switching sequence is necessary, using a reduced set of switching states. A novel technique to reduce the number of sensors based on output voltage feedback is considered. The authors consider that the strategy proposed expands the possibilities of the predictive control in industrial application not only to achieve

Fig. 7. Predictive control robustness to fault with reconfiguration, λ1 = λ2 = good performance in the tracking errors but also to accelerate 0.1.: capacitors voltages va1,va2, load currents ia, ib, ic, output voltage vao the fault time detection. and corresponding line to line voltage vab. ACKNOWLEDGE The authors acknowledge the support of the Chilean Re- the phase output voltage loses a level. In this case, under fault, search Fund (Fondecyt) through grant No. 1085111. v and v works as a unique capacitor then phase a operates a1 a2 REFERENCES as a 2-cell FCC. So, as proposed in [14], the number of levels can be increased by changing the capacitors voltage ratio, then [1] J. Rodríguez, J. Lai and F. Z.Peng, “Multilevel Inverters: A Survey of Topologies, Controls, and Applications,” IEEE Transactions on Indus- setting the reference voltage of va1 to Vdc/3 the forth level is trial Electronics, vol. 49, 2002. restored. [2] T. A. M. F. Richardeau, P. Baudesson, “Failures-tolerance and remedial strategies of a pwm multicell inverter,” IEEE Transactions on Power Finally, a zoom of the fault instant is presented in Fig. 8. Electronics, vol. 17, no. 6, pp. 905–912, Nov. 2002. In this figure it is possible to see how the state Sa follows [3] F. R. F. F. T. M. C. Turpin, P. Baudesson, “Fault management of multicell a permitted sequence according to Table. III. In addition, the converters,” IEEE Transactions on Industrial Electronics, vol. 49, no. 5, pp. 988–997, Oct. 2002. reader should note that the fault occurs when the state Sa [4] T Meynard, H. Foch, P. Thomas, J. Courault, R. Jakob and M. changes from Sa(0, 0, 1) = 1 to Sa(0, 1, 1) = 3. Under normal Nahrstaedt, “Multicell converters: basic concepts and industry applica- operating conditions the expected value of the output voltage tions,” IEEE Transactions on Industrial Electronics, vol. 49, no. 5, pp. 955–964, Oct. 2002. is vao = va2 = 200[V ], but the measured output voltage is [5] J. Maciejowski, Predictive Control with Constraints. Prentice-Hall, vao = 150[V ]. Inspection of Table II tells us that a fault in 2002. [6] D. E. Quevedo, and G. C. Goodwin, “Control of EMI from switchmode power supplies via multi-step optimization,” Proc. of the 2004 American Control Conference, June 2004. [7] J. Rodriguez, J. Pontt, C. Silva, P. Correa, P. Lezana, P. Corte´s, and U. Ammann, “Predictive current control of a voltage source inverter,” IEEE Transactions on Industrial Electronics, vol. 54, no. 1, pp. 495–503, Feb. 2007. [8] E. I. Silva, B. P. McGrath, D. E. Quevedo, and G. C. Goodwin, “Predictive Control of Flying Capacitor Converter,” Proc. of the 2007 American Control Conference, pp. 3763–3768, July 2007. [9] R. Vargas, P. Corte´s, U. Ammann, J. Rodriguez and J. Pontt, “Predictive Control of a Three-Phase Neutral-Point-Clamped Inverter,” IEEE Trans- actions on Industrial Electronics, vol. 54, no. 5, pp. 2697–2705, Oct. 2007. [10] P. Cortés, J. Rodríguez, D. E. Quevedo, and C. Silva, “Predictive current control strategy with imposed load current spectrum,” IEEE Trans. Power Electron., vol. 23, 2008, to appear. [11] R. S . Chokhawala, J. Catt, L. Kiraly, “A Discussion on IGBT Short- circuit Behavior and Fault Protection Schemes,” IEEE Transactions on Industry Applications,, vol. 31, no. 2, pp. 256–263, March/April 1995. [12] Lefebvre, S. and Khatir, Z. and Saint-Eve, F., “Experimental behavior of single-chip IGBT and COOLMOS devices under repetitive short-circuit conditions,” IEEE Transactions on Electron Devices, vol. 52, no. 2, pp. 276–283, Feb. 2005. [13] T. Meynard, M. Fadel and N. Aouda, “Modeling of multilevel convert- ers,” IEEE Transactions on Industrial Electronics, vol. 44, no. 3, pp. 121–128, June 1997. [14] J. Huang and K. A. Corzine, “Extended operation of flying capacitor multilevel inverters,” IEEE Transactions on Power Electronics, vol. 21, no. 1, pp. 140–147, Jan. 2006.