CODING SOPHIE WILSON AND ARM SOPHIE WILSON, ACORN AND TUTORIAL THE DEVELOPMENT OF ARM ARM chips – via Android and smartphones – are taking Linux to JULIET KEMP the masses. Here’s what makes them so special. y 2014, over 50 billion ARM processor cores that they would have a machine to demonstrate had been shipped since the first ARM chip was within the week. They made it – just. Bcreated by Sophie Wilson in the mid-1980s. Wilson ported the OS across to the Proton’s raw Ten billion of those were produced in 2013, so by the hardware, and installed BASIC, in the two hours time you read this, the figure is probably coming up on between the hardware working and the BBC arriving 60 billion. This meteoric rise from a mere 10 billion for the demo. ever shipped in 2008 mirrors the rise of mobile However, what we’re looking at in this article is ARM, computing. Nearly 60% of mobile devices, and 95% of the Acorn RISC Machine, one of the first RISC smartphones, contain an ARM-based chip. You’ve processors, which later became one of the most probably got one in your pocket right now. I certainly successful IP cores of the 1990s and 2000s, in have. So where did they start out? particular for use in mobile devices. Sophie Wilson was born in Leeds in 1957, and studied maths at Cambridge. In 1978, during the Creating ARM big microprocessor boom (see the BASIC article in The ARM chip was a specific instance of a RISC LV005), she was working with Hermann Hauser to processor. Reduced Instruction Set Computing (RISC) solve a problem for a fruit machine manufacturer. originated at IBM. It meant that instead of the Someone had developed a hack which used a increasingly complex instructions that processors cigarette lighter to shock (literally!) the new electronic were using in the early 1980s, a RISC processor would machines into disgorging cash. Wilson created a use a limited set of simple instructions. However, IBM radio receiver to detect the cigarette lighter spark, hadn’t really got anywhere with the idea – they’d solving that problem; whereupon Hauser challenged created a RISC processor after months of work her to create a working PC by the end of the summer. simulating instructions on a mainframe, but it was a Wilson succeeded, and six months later, Hauser’s commercial flop. Meanwhile, working on the BBC company, now relaunched as Acorn Computers, machines, Acorn were becoming frustrated by the started offering the Acorn System One, with a princely limitations of the BBC’s microprocessor. The main 512B of RAM, for £70. Everything was built in-house: problem was the memory interface: how fast a chip logic circuits, assemblers, BASIC interpreters – the lot. could fetch, and thus execute, transactions. Wilson By mid-1981, the UK PC market was dominated by found it frustratingly slow, and it was restricting what the ZX81 (by Clive Sinclair, and available in WHSmith they could do with their secondary processors. shops) and the Acorn Atom (more expensive, and only After reading one of the first papers about RISC, available as a kit from Acorn). In 1981, Wilson improved and extended the Acorn’s IP cores version of BASIC into the Acorn Proton, which then became the BBC Micro and had its BASIC developed A semiconductor IP (intellectual property) core is a chunk into BBC BASIC. The Proton was built in a week after of chip or logic design that is the intellectual property of Chris Curry, co-founder of Acorn, promised the BBC a particular party, usually a company. The chunks can be used as building blocks for larger chip or logic designs. They may be used only by that company or may be licensed out. The ability to license designs like this means that chip makers can use a standard set of processors and internal functions, and then focus on specific features or innovations of their particular chip. This has sped up development significantly since it became common in the 1990s. IP cores can be soft cores, described in a ‘high level’ hardware description language (and thus modifiable The first ARMv1 in an by the chip maker), or hard cores, described as a physical evaluation system. ARM description (and thus not modifiable). ARM architectures chips have begun to show are soft designs and are licensed and used in a huge up in servers for the first range of systems. A major advantage of being an IP time, though they’ll have a core company is that you don’t have to pay for the (very long way to go to challenge expensive) kit to fabricate your own chips. Intel’s dominance. 104 www.linuxvoice.com SOPHIE WILSON AND ARM CODING Wilson and Acorn started investigating their options. A RISC visit to the huge facilities at National Semiconductors in Israel was depressing; Acorn couldn’t afford anything like that. Then they visited the much smaller The basic idea behind Reduced Instruction RISC is inherently more power-efficient Set Computing (RISC) is that you can than, say, x86, because a RISC instruction is but very successful Western Design Centre in Arizona, get better performance (compared to a always four bytes long. That means that the which consisted of only a couple of bungalows and a complex, specialised instruction set) out chip doesn’t have to expend any processor small team of engineers and students. Reassured that of a simplified instruction set running on power in parsing the length of the instruction you didn’t need a huge operation to design processors, a microprocessor which needs as few as and separating instructions. So (put very Wilson got stuck into designing the ARM instruction possible cycles per instruction. The ‘reduced’ simply) a RISC instruction takes less energy refers not necessarily to the number of to handle, and can be understood by a set back at her desk at Acorn (and in the local pub over instructions, but to the amount of work that smaller chip. lunches with colleagues!). Steve Furber was then an instruction does – each instruction should The two projects most associated with responsible for turning Wilson’s instruction set into use a single clock cycle (often achieved RISC are Stanford’s, which emerged into the something that could be produced at a factory. by using a technique called pipelining). A commercial world as the MIPS architecture, Eighteen months later, they had the first working ARM. precise definition is hard to pin down, but and Berkeley’s RISC, which eventually two common RISC traits are a small, highly became SPARC. IBM’s efforts (after their It’s odd that what is now the major selling point of optimised set of instructions; and load/ initial commercial flop) eventually led to the ARM processors, their low power consumption, was store architecture, where memory must be Power Architecture. And of course ARM has only a side effect. What Acorn were interested in was accessed through specific instructions, rather been incredibly successful, as have other low cost, and low cost meant plastic. Plastic is a good than as part of other instructions. RISC architectures. insulator, which is bad news on a high-power chip as the heat takes longer to dissipate and your chances of frying the chip increase. So that in turn meant keeping especially on embedded hardware with limited the ARM power consumption under 1W. memory bandwidth. If you’re interested in the details However, when they got the first test chips back and of the registers (37 of them), processor modes, plugged them into a development board, the chip exception handling, and so on of current ARM chips, worked – but seemed to be consuming no power at there’s a great lecture online at http://www.ee.ncu. all. It turned out that there was a fault in the board, edu.tw/~jfli/soc/lecture/ARM_Instr_Set.pdf from and the power supply line wasn’t working. The chip Jin-Fu Li, National Central University, Taiwan. You can was, as Wilson explains, “running on leakage from the also get extensive documentation for various chips logic circuits”. The chip consumed an incredibly low from the ARM website. 0.1 watts. Wilson’s ARM, it turned out, was a I wasn’t able to find an instruction set for ARM v1, particularly efficient version of RISC. but 1987 documentation for ARM v3 should have Wilson rewrote BBC BASIC in ARM assembler very largely the same instructions (with a larger address efficiently, but the first complete ARM computer was space). They divide into five basic groups: the Acorn Archimedes in 1987. It and its successors Data manipulation (ADD, AND, MOV, SUB, CMP were among the most powerful home computers at etc). the time. Of more long-term importance, Apple had Load and store (LDR to load a register and STR to realised that the ARM processor needed only a small save one). amount of chip real estate – making it possible to Multiple load and store (LDM, STM). squeeze further processing power onto the same Branch – conveniently jump between instructions. chip. Apple invested heavily in ARM for the Newton Software interrupt (SWI, but there are many (the first ever tablet, which flopped); but the different expressions that can be passed to it to investment paid off later in the iPhone, iPod, and iPad. determine what it does, including keyboard output and input). ARM architecture and instruction set Let’s take a look at some ARM assembler code. When Wilson and the other Acorn folk were designing This example from an ARM handbook multiplies a ARM, they weren’t dedicated to sticking exactly to the model set by Berkeley RISC.