Yawn: a CPU Idle-State Governor for Datacenter Applications
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Hardware Virtualization Support for Afterburner/L4
Universit¨atKarlsruhe (TH) Institut f¨ur Betriebs- und Dialogsysteme Lehrstuhl Systemarchitektur Hardware virtualization support for Afterburner/L4 Martin B¨auml Studienarbeit Verantwortlicher Betreuer: Prof. Dr. Frank Bellosa Betreuender Mitarbeiter: Dipl.-Inf. Jan St¨oß 4. Mai 2007 Hiermit erkl¨areich, die vorliegende Arbeit selbst¨andig verfaßt und keine anderen als die angegebenen Literaturhilfsmittel verwendet zu haben. I hereby declare that this thesis is a work of my own, and that only cited sources have been used. Karlsruhe, den 4. Mai 2007 Martin B¨auml Abstract Full virtualization of the IA32 architecture can be achieved using hardware sup- port. The L4 microkernel has been extended with mechanisms to leverage In- tel’s VT-x technology. This work proposes a user level virtual machine monitor that complements L4’s virtualization extensions and realizes microkernel-based full virtualization of arbitrary operating systems. A prototype implementation within the Afterburner framework demonstrates the approach by successfully booting a current Linux kernel. Contents 1 Introduction 5 2 Background and Related Work 6 2.1 Intel VT-x ............................... 6 2.2 Virtualization Hardware Support for L4 .............. 7 2.3 Afterburner Framework ....................... 8 2.4 Xen .................................. 8 3 Design 9 3.1 Virtualization environment ..................... 9 3.2 Nested Memory Translation ..................... 11 3.3 Privileged Instructions ........................ 14 3.4 Interrupts and Exceptions ...................... 15 3.4.1 Event Source and Injection ................. 15 3.5 Devices ................................ 17 3.6 Boundary Cases ............................ 17 4 Implementation 19 4.1 Integration into Afterburner Framework .............. 19 4.1.1 Resource Monitor ....................... 19 4.1.2 Device Models ........................ 20 4.2 The Monitor Server ......................... 20 4.2.1 Virtualization Fault Processing .............. -
Linux X86 Documentation
Linux X86 Documentation The kernel development community Jul 14, 2020 CONTENTS i ii CHAPTER ONE THE LINUX/X86 BOOT PROTOCOL On the x86 platform, the Linux kernel uses a rather complicated boot convention. This has evolved partially due to historical aspects, as well as the desire in the early days to have the kernel itself be a bootable image, the complicated PC memory model and due to changed expectations in the PC industry caused by the effective demise of real-mode DOS as a mainstream operating system. Currently, the following versions of the Linux/x86 boot protocol exist. 1 Linux X86 Documentation Old zImage/Image support only. Some very early kernels may not even support ker- a command line. nels Pro- (Kernel 1.3.73) Added bzImage and initrd support, as well as a for- to- malized way to communicate between the boot loader and the kernel. col setup.S made relocatable, although the traditional setup area still as- 2.00 sumed writable. Pro- (Kernel 1.3.76) Added a heap overrun warning. to- col 2.01 Pro- (Kernel 2.4.0-test3-pre3) New command line protocol. Lower the conven- to- tional memory ceiling. No overwrite of the traditional setup area, thus col making booting safe for systems which use the EBDA from SMM or 32-bit 2.02 BIOS entry points. zImage deprecated but still supported. Pro- (Kernel 2.4.18-pre1) Explicitly makes the highest possible initrd address to- available to the bootloader. col 2.03 Pro- (Kernel 2.6.14) Extend the syssize field to four bytes. -
Vic: Interrupt Coalescing for Virtual Machine Storage Device IO
vIC: Interrupt Coalescing for Virtual Machine Storage Device IO Irfan Ahmad Ajay Gulati Ali Mashtizadeh firfan, agulati, [email protected] VMware, Inc., Palo Alto, CA 94304 Abstract sue hundreds of very small IO operations in parallel re- sulting in tens of thousands of IOs per second (IOPS). Interrupt coalescing is a well known and proven tech- Such high IOPS are now within reach of even more IT nique for reducing CPU utilization when processing high organizations with faster storage controllers, wider adop- IO rates in network and storage controllers. Virtualiza- tion of solid-state disks (SSDs) as front-end tier in stor- tion introduces a layer of virtual hardware for the guest age arrays and increasing deployments of high perfor- operating system, whose interrupt rate can be controlled mance consolidated storage devices using Storage Area by the hypervisor. Unfortunately, existing techniques Network (SAN) or Network-Attached Storage (NAS) based on high-resolution timers are not practical for vir- protocols. tual devices, due to their large overhead. In this paper, we For high IO rates, the CPU overhead for handling all present the design and implementation of a virtual inter- the interrupts can get very high and eventually lead to rupt coalescing (vIC) scheme for virtual SCSI hardware lack of CPU resources for the application itself [7, 14]. controllers in a hypervisor. CPU overhead is even more of a problem in virtualiza- We use the number of commands in flight from the tion scenarios where we are trying to consolidate as many guest as well as the current IO rate to dynamically set virtual machines into one physical box as possible. -
X86-64 Assembly Language Programming with Ubuntu
x86-64 Assembly Language Programming with Ubuntu Ed Jorgensen, Ph.D. Version 1.1.40 January 2020 Cover image: Top view of an Intel central processing unit Core i7 Skylake type core, model 6700K, released in June 2015. Source: Eric Gaba, https://commons.wikimedia.org/wiki/File : Intel_CPU_Core_i7_6700K_Skylake_top.jpg Cover background: By Benjamint444 (Own work) Source: http://commons.wikimedia.org/wiki/File%3ASwirly_belt444.jpg Copyright © 2015, 2016, 2017, 2018, 2019 by Ed Jorgensen You are free: To Share — to copy, distribute and transmit the work To Remix — to adapt the work Under the following conditions: Attribution — you must attribute the work in the manner specified by the author or licensor (but not in any way that suggests that they endorse you or your use of the work). Noncommercial — you may not use this work for commercial purposes. Share Alike — if you alter, transform, or build upon this work, you may distribute the resulting work only under the same or similar license to this one. Table of Contents Table of Contents 1.0 Introduction...........................................................................................................1 1.1 Prerequisites........................................................................................................1 1.2 What is Assembly Language...............................................................................2 1.3 Why Learn Assembly Language.........................................................................2 1.3.1 Gain a Better Understanding of Architecture -
Booting View of the Linux Boot Process BIOS Tasks BIOS Example
Käyttöjärjestelmät LUENTO 23 Booting • Key problem: How do you initiate a system Booting, multimedia systems using only itself? Exam issues • Booting <- Bootstraping • Bootstraping - why this term? • Baron Munchausen pulled himself out of swamp using his boot straps 1 2 View of the Linux boot process BIOS tasks • BIOS – Basic Input / Output System Power-up /Reset • BIOS refers to the firmware code run by a personal computer when first powered on. System startup BIOS/ Bootmonitor • BIOS can also be said to be a coded program embedded on a chip that recognizes and controls various devices that Stage 1 bootloader Master Boot Record make up x86 personal computers. (source: wikipedia) Stage 2 bootloader LILO, GRUB, etc • Execution starts from a fixed location (on x386 that Kernel Linux location is 0xFFFF0000) • Check hardware, locate the boot device Operation Init User-space • Disk, CD, ... • Load the first ’loader’ from Master Boot Record Source: http://www-128.ibm.com/developerworks/library/l-linuxboot/index.html 3 4 BIOS loading the boot loader – BIOS example sequence pseudocode example 1. Check the CMOS Setup for custom settings • 0: set the P register to 8 2. Load the interrupt handlers and device drivers • 1: check paper tape reader ready 3. Initialize registers and power management • 2: if not ready, jump to 1 4. Perform the power-on self-test (POST) • 3: read a byte from paper tape reader to accumulator 5. Display system settings • 4: if end of tape, jump to 8 6. Determine which devices are bootable • 5: store accumulator to address in P register • 6: increment the P register 7.