COMPUTER SYSTEM ARCHITECTURE

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CONTENTS

1. Microprocessor 2. System Bus 2.1 Address Bus 2.2 Data Bus 2.3 Control Bus 3. Register 4. Accumulator 5. Instruction Register 6. Index Register 7. Flags 8. Flip-Flop 9. Sign Flag 10. 11. Overflow Flag 12. 13. Stack Pointer 14. Memory Address Register 15. Memory Buffer Register 16. Time and control register 17. Registers in System 18. Read operation 19. Write operation 20. Reset In 21. Interrupt 22. Types of interrupt signal 22.1 HOLD 22.2 HLDA 22.3 INTR 22.4 INTA 23. Instruction Cycle 23.1 Fetch 23.2 Decode 23.3 Execute 23.4 Store

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1. Microprocessor- it is a semiconductor device consisting of electronic logic circuit manufactured by LSI and VLSI. The microprocessor is capable of various computing function to change the sequence of the program execution. In large computer CPU implemented on one or more circuit board perform these computing function. Microprocessor in many ways similar to CPU. But it used all large circuit of logic gates including the control unit on single loop. 2. System bus - it is used to transfer the data from one part of the microprocessor to another between processor to I/O device on memory.

I/O Device

Microprocessor Component of based system bus CPU architecture

Memory RAM/ROM

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Microprocessor has following function: - 1. Read data or instruction from memory 2. Memory write data in 3. I/O read- accept data from input device 4. I/O writes- send data to output device

There are three types of system bus

3.1 Address bus - the memory location on its particular address

A0–A15 address lines 8085 applied. Address bus is a group of 16 lines generally identify address bus of 8085 microprocessor. It is unidirectional. The basic objective of this bus is to perform the function to identify the memory location on it identify address. The 8085 processor is 16 address lines. These are capable of addressing of 216=65536 (byte generally) known as 64kb. 8-bit microprocessor system this means it is number system of 16 binary bit. It is capable for identifying the memory location. The entire range from 0000F0FFFF. [Note- microprocessor initiated operation with system bus.] 3.2 Data bus- it is used to transfer the data from one processor to other. The data bus is a group of 8 lines used for the data because 8085 microprocessors using 8 lines. So that the capacity of the

microprocessor 8 bit. When 8 lines used for data P0 -P7 (8 bits). These lines are bidirectional data flow in both direction between 4

microprocessor and memory. Microprocessor uses the data bus performing 2nd function transfer of the data and data lines enable the microprocessor to manipulate 8-bit data. The largest number that can appear is 11111111 8-bit microprocessor is known as 8085 microprocessors. 3.3 Control bus -bhai directional it is set of both input control line and output control line and used to operation microprocessor uses touch control lines perform timing control signal.

A0–A15

Register organisation 4 Register -temporary storage of data during execution of program.

• Register organisation applied 8085 microprocessor storage 8-bit data. • 8085 architecture has 6 general purpose register which is called GPR 1st bit operation store 8-bit data. • Register pears bcde HAL to perform some 16-bit operation registers are programmable that a programmer can use to load or transfer the data. 5 Accumulator -is 8 bit that is set of ALU these are used to get the data and performing ALU results of the operation is accumulator. 6 GPR -used for temporary storage of the data during education of the program. 7 Instruction register -the storage of the next instruction to be executed the contents of instruction register are fit into instruction decoder. 5

8 Index register -the contain the word used to modify and instruction address is called index register. 9 Flags - test for data condition . 10 Set/reset - according to data condition of for example after adding two number if sum in the accumulator is larger than 8 bits. 11 Flip flop -it is to biostable state set /reset. Set (abnormal condition) - 1 Reset (normal condition) - 0 Inter operation suspended program counter zero. Flip-flop indicates flag the various types of flags in computer architecture. 12 .C/flag - when carries generated from MSB as result of certain operation carry flag is said otherwise reset. 13 . Sign flag - it is result of the operation producer in MSB. 14 . Zero Flag - if the result of an operation is zero then zero Flag is set otherwise it is reset. 15 . Overflow flag - when two positive or negative number at their resulting in large number which exceeds the capacity of the accumulator the overflow flag is produced and overflow flag is set otherwise reset. Programmable register organisation

ACC (8) FLAG (8)

B (8) C (8)

D (8) E (8) H (8) L (8) 6

Address Bus 16 Times Data Types 8 Times

16 . Program counter - this is a 16 bit register deal with sequence objective of the instruction register is memory pointer memory location at 16 address lines in microprocessor uses this register to sequence of education of the instruction. 17 . Stack pointer/stack organisation - Store the data electronically during execution of the program of stack pointer is also 16 bits it is used to memory. Initially it will be called the stock. Aristas it is. To memory location is it will be call to R/W memory location called a stack pointer. 18 Memory address register - it holds be address of instruction or data to be transfer from memory the processor transfer the address of the next instruction from program counter to memory address instruction the aim is sent to memories through the address bus it is called address register. 19 . Memory buffer register - all data register it hold be instruction for data received from send to memory it is connected to data bus the database write into memory and hold in this register unit operation is completed the flow of the data from CPU to memory or from memory CPU is always true memory buffer register. 20 . Time and control signal - the timing of all registers in the basic computer is controlled by a master clock generator the block clock pulse generator applied to flip flop. 21 . Registers in system - including the flip flop and register in the control unit the clock pulse do not change the status of registers unless the register is enabled by the control signal the control signal generated in control unit and provide control in input from common buses control 7

input in the processor common buses control input in the processor registers and micro operator of the accumulator. If provides timing and control signal to the microprocessor to perform operator following time and control signals which control the internal and external signal. Control signal : READY, RD, WR, ALE Status register : S0, S1, E0/…. DMA registers : HOLD, HLDA Reset signal : RESET, IN RESET OUT.

S0 S1 Operation 0(LOW) 0(LOW) Half 0 1 Write (WR) 1 0 Read (RD) 1H 1H Fetch

The status signal is issued by the microprocessor to identify the various types of operations. 22 Read operation -it is a control signals sent by the microprocessor to control the read operation these are selected from the memory or input output device is read when RD signal is low. 23 Write operation - this is a control signals issued by the microprocessor to write operation with select memory or input output device wr is low. 24 IO/…. - it is a signal to indicate whether the address sent by the microprocessor for memory or and input output device when it is hi the 8

address on the address bus for input output device when it is low the address on the. 25 Reset In -when the signal is applied CPU is brought to reset condition the contents of the program counter is zero (0). 26 Reset Out- this signal indicates that CPU is in recent condition. 27 Interrupt - in microprocessor is executed in main program whenever interrupt the microprocessor shift the control from main program to process the incoming request. After the request is completed control goes back to main program. There are five interrupts signal 1. INTR Lowest Priority 2. RST-5.5 3. RST-6.5 4. RST-7.5 5. TRAP Highest Priority

These are the interrupt line that trap is maskable interrupt and it is highest priority. • HOLD- it is an input signal when an external device wants to use the address and data bus it is said to hold signal in the microprocessor completed its current instruction at and reliquishes the control of the buses to allow the external device to use them. • HALD- it is output signal it is hold acknowledgement signal it is sent by the microprocessor to its standard device indicates that hold a request has been received on the completion of data transfer. the external 9

device removes the HOLD request. the HLDA goes to low after the removal of HLDA request. • INTR (input)- it is an interrupt signal of the lowest priority it is sent by the external device peripheral device. • INTR (output)- it is interrupt output signal it is used by the microprocessor when iron is received. What is instruction cycle? To execute an instruction process and normally follows asset of basic operation that are together known as instruction cycle the operation performed in an instruction cycle involves the following.

Store Fetch

Execute Decode

I. Fetch- an instruction or a data from memory. II. Decode- interpreting the instruction. III. Execute- running positive responding command to process the data. IV. Store- writing the input result of processing into memory the instruction cycle is reported country was until the power is turned off. 10

Book Reference: - 1. M. Mano, Computer System Architecture, Pearson Education 1992

2. A. J. Dos Reis, and Computer Architecture using C++ and JAVA, Course Technology, 2004

3. W. Stallings, Computer Organization and Architecture Designing for Performance, 8th Edition, Prentice Hall of India,2009

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