Issue 67: Fpgas Take Central Role in Wired Communications
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Issue 67 First Quarter 2009 XcellXcelljournaljournal SOLUTIONS FOR A PROGRAMMABLE WORLD FPGAs Command Center Stage in Next-Gen Wired Networks INSIDEINSIDE Dorkbot uses Xilinx Spartan-3E Starter Kit toto MakeMake 19th-Century19th-Century Pipe Organ Rock! Satellite-Based Computing Flies Flexible Virtex Platform Tools and Techniques to Tame FPGA Power Budgets R www.xilinx.com/xcell/ Xilinx® Spartan®-3A Evaluation Kit Target Applications » General FPGA prototyping » MicroBlaze™ systems » Configuration development » USB-powered controller » Cypress® PSoC® evaluation Key Features » Xilinx XC3S400A-4FTG256C Spartan-3A FPGA » Four LEDs » Four CapSense switches » I2C temperature sensor » Two 6-pin expansion headers ® ® The Xilinx Spartan -3A Evaluation Kit provides an » 20 x 2, 0.1-inch user I/O header easy-to-use, low-cost platform for experimenting » ® ® and prototyping applications based on the Xilinx 32 Mb Spansion MirrorBit NOR GL Parallel Flash Spartan-3A FPGA family. Designed as an entry-level » kit, first-time FPGA designers will find the board’s 128 Mb Spansion MirrorBit functionality to be straightforward and practical, SPI FL Serial Flash while advanced users will appreciate the board’s » USB-UART bridge unique features. » I2C port » Get Behind the Wheel of the Xilinx Spartan-3A Evaluation Kit and take SPI and BPI configuration a quick video tour to see the kit in action (Run time: 7 minutes). » Xilinx JTAG interface » FPGA configuration via PSoC® Ordering Information Part Number Hardware Resale Kit Includes » Xilinx Spartan-3A evaluation board AES-SP3A-EVAL400-G Xilinx Spartan-3A Evaluation Kit $39.00* USD (*Limit 5 per customer) » ISE® WebPACK™ 10.1 DVD » USB cable » ® Take the quick video tour or purchase this kit at: Windows programming application www.em.avnet.com/spartan3a-evl » Cypress MiniProg Programming Unit » Downloadable documentation and reference designs 1.800.332.8638 www.em.avnet.com Copyright© 2008, Avnet, Inc. All rights reserved. AVNET and the AV logo are registered trademarks of Avnet, Inc. All other brands are the property of their respective owners. Prices and kit configurations shown are subject to change. LETTER FROM THE PUBLISHER Will FPGAs Lead Semiconductors Xcell journal out of the Economic Doldrums? PUBLISHER Mike Santarini [email protected] 408-626-5981 Programmable logic’s ‘forgiveness factor’ should not be overlooked. EDITOR Jacqueline Damian ver the last couple of months, I’ve read opinion pieces in the electronics trade press predicting FPGAs could very well lead the semiconductor industry’s recovery from the economic down- ART DIRECTOR Scott Blair turn. I’m no financial guru, but I have to think this could well be the case. DESIGN/PRODUCTION Teie, Gelwicks & Associates O In my 14 years covering the electronic-design space (EDA, ASIC, FPGA, PCB and mem- 1-800-493-5551 ory industries), I’ve witnessed firsthand the maturation of the FPGA industry in its seemingly relentless quest to grab market share from the ASIC business. As FPGAs leveraged new process tech- ADVERTISING SALES Dan Teie nologies to increase logic-cell counts in line with Moore’s Law, they grew faster and lower in power with 1-800-493-5551 [email protected] each new node and became ever more affordable. At the same time, FPGA vendors have added a slew of advanced functionality, hardwiring MPU cores into their devices and offering the latest soft IP. INTERNATIONAL Melissa Zhang, Asia Pacific Tools for FPGAs have kept pace with this complexity, allowing engineers to invent novel designs [email protected] and implement them in FPGAs. What’s more impressive is that most FPGAs are forgiving—if your Christelle Moraga, Europe/ design doesn’t come out quite the way you want it, simply make a few tweaks and reprogram the Middle East/Africa FPGA until you have the functionality you need. If you need to accommodate a particular standard [email protected] that is not quite fully defined, you can quickly add that new functionality once the standard has Yumi Homura, Japan firmed up. You can even adjust your design and reprogram your FPGA after it has been deployed in [email protected] the field. You don’t have to be afraid to try something risky—something innovative. This forgiveness factor, I believe, will become a much more powerful selling point for SUBSCRIPTIONS All Inquiries www.xcellpublications.com FPGAs over ASICs as system companies look at their budgets and examine the cost and risks of implementing designs in application-specific ICs. It certainly is no secret that the mask costs REPRINT ORDERS 1-800-493-5551 for designs in the latest process technologies have grown exponentially, making ASIC starts viable only for extremely high-volume applications. At the same time, the cost of ASIC tools to deal with new process complexity is skyrocketing. Today, for example, most ASIC design teams must acquire design-for-manufacturing tools, sophis- ticated power-analysis tools to manage leakage and perhaps very soon (or already, in some cases) sta- tistical analysis tools just to produce viable silicon. Chances are, to become proficient in these new tools will require a training ramp-up and a bit of troubleshooting. Then you have to deploy all these new tools optimally to make sure your multimillion-gate ASIC is right the first time and doesn’t require a mask respin or 30. ASIC prospects are especially scary when you consider that during the last economic downturn, the dot-com bust, ASIC design starts plunged, from roughly 9,000 in 1999 to 4,000 in 2003, according to research firm Gartner Dataquest. And they have been steadily declin- ing ever since. Considering that ASICs back in 2000 and 2003 were nowhere near as complex as they www.xilinx.com/xcell/ are today and mask costs were far less, one has to wonder how much lower ASIC starts may go. Some may argue that application-specific standard products could step in to replace ASICs. You could indeed buy an ASSP that generally handles your specific task, and then modify the software Xilinx, Inc. running on it to do the job you want it to. But your competitors can buy the same part and imple- 2100 Logic Drive ment similar, or even better, software in their product. In short, with an ASSP you no longer have San Jose, CA 95124-3400 Phone: 408-559-7778 the advantage of differentiating your hardware, just the software. Gartner Dataquest predicts a FAX: 408-879-4780 steady, albeit gentle, erosion in ASSP starts, from roughly 4,200 in 2008 to 4,000 in 2011. www.xilinx.com/xcell/ Meanwhile, FPGA starts are expected to grow from 90,000 to around 105,000 over that time frame. Can you take innovative risks with ASICs and ASSPs? Can you afford to? These are questions © 2009 Xilinx, Inc. All rights reserved. XILINX, the Xilinx Logo, and other designated brands included that I think will resonate with greater frequency throughout the remainder of this economic down- herein are trademarks of Xilinx, Inc. All other trade- turn and likely afterward. marks are the property of their respective owners. Does all this mean that FPGAs will, in fact, lead the semiconductor industry in the recovery? No The articles, information, and other materials included one can say for sure, but the arguments ring true to me. in this issue are provided solely for the convenience of our readers. Xilinx makes no warranties, express, implied, statutory, or otherwise, and accepts no liability with respect to any such articles, information, or other materials or their use, and any use thereof is solely at the risk of the user. Any person or entity using such information in any way releases and waives any claim it might have against Xilinx for any loss, damage, or expense caused thereby. Mike Santarini Publisher GET UP TO 50% LOWER COST sIntegrated features and only two power rails minimize need for external components sSave up to 70% in logic cell resources with dedicated DSP blocks sRun cool with 11mW static power, 0μW in hibernate mode In the highly competitive high-volume market, cost is king. Our latest Extended Spartan®-3A FPGAs deliver the integrated features, low static power, complex computation and embedded processing capabilities you need to achieve the absolute lowest total cost. Period. Combine these advantages with the industry’s largest selection of IP cores, reference designs and I/O standards and you have the most complete low-cost programmable solution available for your next high-volume design. Visit us at www.xilinx.com to download our free ISE® WebPACK™ design tools and start saving money today. ©2009 Xilinx, Inc. All rights reserved. XILINX, the Xilinx logo, and other designated brands included herein are trademarks of Xilinx, Inc. All other trademarks are the property of their respective owners. CONTENTS VIEWPOINTS XCELLENCE BY DESIGN APPLICATION FEATURES 18 Xcellence in Wireless Communications Baseband Development for 3GPP-LTE Just Got Easier…14 66 Xcellence in Automotive & ISM Updated Starter Kit Speeds Video Development…18 Letter from the Publisher Will FPGAs Lead Semiconductors Xcellence in Aerospace & Defense out of the Economic Doldrums?...4 A Flexible Platform for Satellite-Based High-Performance Computing…22 28 Xpectations Xilinx’s Support Network: 28 Our Success Is Your Success...66 Virtex-5 Powers Reconfigurable, Rugged PC…28 XCELLENCE IN WIRED COMMUNICATIONS Cover Story FPGAs Take Central Role 8 in Wired Networks 8 FIRST QUARTER 2009, ISSUE 67 THE XILINX XPERIENCE FEATURES Xperts Corner Floating Point: Have it Your Way 50 with FPGA Embedded Processors…32 Xplanation: