IMPLEMENTATION OF ACTIVE ELEMENTS FOR ANALOG PROCESSING BY DIAMOND

Dalibor Biolek, Viera Biolkova UD/BUT, Dept. of EE/Microelectronics/Radio Kounicova 65/Udolni 53/Purkynova 118, Brno, Czech Republic [email protected]

ABSTRACT:

It is shown in the paper that more modern active elements for analog can be set up from the so-called diamond (DT) which is available as a commercial IC. The electrical characteristics predetermine this element particularly for analog filters up to tens megahertz range.

Keywords: Diamond transistor, active element, current conveyor

1 INTRODUCTION

Several new active elements for current-, -, and mixed-mode analog signal processing were recently proposed [1]. Experimental verification via their on-chip fabrication is expensive and time-consuming. It turns out that the development of the applications of the above elements can be effective enough in the following steps: 1] The implementation of a novel circuit element from commercial integrated circuits (ICs). 2] The manufacturing of a concrete application circuit. 3] The measurements and verification. 5] The chip design and manufacturing based on the knowledge acquired in the above steps. Items 1 to 3 are performed in the belief that if the specimen built from discrete elements works well, then its appropriate IC version, designed by a professional designer and fabricated via up-to-date IC technology, will work even better. The so-called “diamond transistor” OPA660 [2] by Burr Brown/Texas Instruments belongs to the well-known commercial Current-Controlled Current Conveyors (CCCIIs) [3]. However, today it is an obsolete product. Its analogy is available in the form of perspective circuits OPA615, SHC615, OPA860, and OPA861 from the above company. All of them contain the so-called diamond transistor (DT), or – in other words – the CCCII whose intrinsic Rx resistance is adjustable by an external current. In addition, OPA860 contains a very fast and independently utilized voltage buffer, whereas OPA615 and SHC615 include a fast comparator in the form of differential input single output OTA with extremely high transconductance. Concrete experiments lead to the observation that the OPA860 is a useful element for analog signal processing in the frequency range of units and tens of megahertz [2]. A detailed description of the OPA860 parameters is given in [2]. This paper is organized as follows: The Section 2, which follows this Introduction, briefly describes the DT as a three-pole element. Section 3 includes an DT-based implementation of basic building blocks which most active elements consist of. Also possible implementations of several active elements from [1] are discussed here. 2 DIAMOND TRANSISTOR

The schematic symbol and behavioral model of DT are shown in Fig. 1 (a) and (b). It is obvious that the diamond transistor operates as a positive current conveyor CCII+ with the x terminal (emitter) parasitic resistance, which is equal to the reciprocal value of the transconductance gm. The DTs also have comparatively high transconductances (up to 100 mA/V), which can be modified by bias current, and their characteristic Iout = f(Vin) is rather nonlinear; thus the linear operation region is within the Vin range of tens of milivolts. This drawback, which prevents this element from being used directly for circuits with a large dynamic range, can be suppressed by the so-called degeneration resistance Re in series with the emitter (see Fig. 1 c). The negative feedback will cause a decrease in the original transconductance gm to the value

gm 1 1 gm′ = ≈ for gm >> , (1) 1+ gm RE RE RE and, in addition, a considerable linearization of the OTA, an offset reduction, and an increased swing of the input voltage. For simplicity, the degeneration resistances are not drawn in the application circuits below but their utilization is recommended for the above reasons.

(a) (b) (c) c c c

Ic =Ie Ic g b b 1/ m b 1

I =g Vbe Ie e m V e be e e Vbe Re Vbe' e'

Fig. 1: Diamond transistor and its behavioral model.

3 BUILDING BLOCKS IMPLEMENTATION BY DTs

Fig. 2 summarizes main building blocks for implementing the current- and hybrid- mode signal processing circuits: OTAs (Operational Transconductance Amplifiers, Fig. a-c), CI and CF (Current Inverter and Current Follower, Fig. d-e), CDU (Current Differencing Unit, Fig. f), CS (Current Splitters, Fig. g-h). In addition, Fig. i, j shows the way how to implement grounded and floating via DTs. Note that DT can be simply applied as SISO (Single-Input Single-Output) OTA. DISO (Differential Input Single Output) OTA implementation requires an additional voltage buffer in order to provide high-impedance inverting input. DIDO (Differential Input Differential Output) OTA can be compiled via two DTs as shown in Fig. 2 (c). The total transconductance is compound of partial transconductances of DT1 and DT2: gm = gm1gm2/(gm1+gm2). Current inverters and followers as well as CDU are input parts of well-known active elements such as CDBA, CDTA, CIBA, CITA, CFBA, CFTA, etc. [1]. As follows from Fig. 2 (d)-(f), they can be implemented by DTs in common base configuration which is advantageous from the point of view of low-offset operation. Current splitters in Fig. (g), (h) work properly under the matching condition of equal transconductances of both DTs. Circuits in Fig. 2 (i), (j) can be used when resistorless application is required, or when resistances in the circuit are to be controlled electronically. gm V gm V gm V gm gm gm g V g V gm V V m V + m + + ++ DT V _ + DT V _ _ DT1 V V DT 1 g mm =g 12 2 gm V (a) (b) (c)

V V/R V g V V g V V/R g V m m DT m12 DT 1 DT1 R R V or V DT2 gm12V R= 1/ gm R= 1/ gm R= 1/ gm12 (d) (e)

In In Ip Ip Ip In Ip In DT DT1 DT2 DT1 DT2 n p p n n CI n CF n CDU z z z

Iz =-In (f)-In Iz =Ip (g)Ip Iz =Ip -In (h) Ip -In I I g =g I I m1 m2 gm1 =gm2 1 n CS+- n CS-- z- z+ DT1 DT2 z- z- DT1 DT2 -I I -I -I -I I (i)-I -I (j) Fig. 2: Modeling of basic blocks using diamond transistors and buffers.

I I I a =g a =gm2 / gm1 I m2 / gm1 1 n CA+ n CA- z+ DT1 DT2 z- DT1 DT2 aI -aI aI (a) -aI (b)

AV V DT -AV 1 1 1 V AV V DT V -AV +A R A=g R -A R m A=g R m or or DT 2 V DT DT2 1 1 1 1 V DT1 A=g /g A=g /g mm1 2 AV mm1 2 -AV (c) (d) Fig. 3: Modeling of current and voltage amplifiers using diamond transistors and buffers. I =I DT I y=Ix DT1 y x 1

I =I I z=-Ix DT2 z x I =I DT2 I y=Ix y x CCI+ DT4 CCI- y y z+ z- x x DT3 DT3 Ix g =g Ix g m 1 =gm2 m1 m2 I I =-I Ix I z=Ix (a) x z x (b) I = 0 y I y= 0 I y= 0 I y= 0 I =-I I z=Ix DT2 z x CCII+ CCII- y y z+ DT z- DT x x 1 I z=Ix I z=-Ix Ix Ix

Ix (c) Ix (d)

I =-I I =-I y x DT1 y x DT1

DT2 DT2 I y=-Ix I y=-Ix CCIII+ CCIII- y I =I y z+ z x z- x x DT4 DT3 DT3 Ix Ix I z=-Ix g =g g =g Ix I =I (e) m1 m2 Ix I =-I (f) m1 m2 z x z x z+ I z+=Ix+ I z=Ix y 0 DVCCII+ 0 DXCCII I =I DT Ix+ z+ x+ y+ 2 y z+ z+ y+ x+ DT3 y- z+ DT1 Ix x+ z- 0 1 x x x- z- I z-=Ix- DT1 DT2 Ix- R=1/gm1 1 Ix- Ix I z=Ix Ix+ I z-=Ix- x- y- (g) (h) R=1/g m1 Fig. 4: Modeling of current conveyors using diamond transistors and buffers.

Input resistance of current amplifier in Fig. 3 (a) is 1/gm1. The voltage drop between the emitter and the ground of DT1 will be I /gm1. However, is is also a base-emitter voltage of DT2, and the collector current of DT2 will be gm2/gm1I. The circuit in Fig. 3 (b) works analogously, but the voltage drop at DT1 is sensed by voltage buffer and applied to the emitter of DT2. As a result, the output current is inverted in comparison with the case (a). Circuits in Figs 3 (c), (d) represent non-inverting and inverting voltage amplifiers. The -type amplifier in Fig. 3 (c) consists of DT which transforms the input voltage V to the collector current gmV, flowing through resistor R, and the resistor voltage gmRV is buffered to the output. The second resistorless version utilizes the resistor simulation according to Fig. 2 (i), and the voltage gain is given by the ration of DT1 and DT2 transconductances. The inverting amplifiers in Fig. 3 (d) use an additional DT for reversing the current direction. For gm1=gm2, the last schematics represents resistorless unity-gain inverting amplifier. z v I z =I- 1 0 DT2 OC I =I CFA + DT z - + DT + v + 1 0 z - - i - i I 1 - I- (a) (b) -

DT2 DT3 z DT2 z DT DT I z =-I 1 I =I 1 w -Iw z w Iw 0 FTFN y 0 OMA y y z y z 0 0 x w x w 1 1 0 Iw Iw 0 I Iw x w x w (c) (d) w x+ pn p n DT I 3 I Ip In I Ip n p CDBA 1 p CDTA p w p x+ w DT DT g mz V DT DT n z 1 2 I z =I p -In n z x- 1 2 I z In z In z g m =gm34 I =I -I I =I -I DT4 z p n (e) z p n (f) x- Fig. 5: Modeling of another active elements using diamond transistors and buffers.

Fig. 4 demonstrates the methods of implementing various current conveyors via DTs and buffers. Since DT is the current controlled CCII+ (CCCCII+), this figure shows methods how to implement different kinds of current conveyors via CCII+. Surprisingly, the Differential Voltage CCII+ (DVCCII+) [4] can be compiled only from two DTs and one voltage buffer, and more complex Dual-x CCII (DXCCII) [5] from three DTs, one buffer and one grounded resistor, which can be replaced by one DT according to Fig. 2 (i). Finally, Fig. 5 instructs how to build several important active elements from DTs, namely CFA (Current Feedback Amplifier), OC (Operational Conveyor) [6], FTFN (Four Terminal Floating Nullor) [7], OMA (Operational Mirrored Amplifier) [8], CDBA (Current Differencing Buffered Amplifier) [9], and CDTA (Current Differencing Transconductance Amplifier) [10]. Note that CDBA and CDTA in Figs 5 (e) and (f) contain CDU from Fig. 2 (f) as a unified input stage. Among of all the presented circuits in Figs 2-5, DT-based implementations of applications containing Current Differencing Units and Current Inverters were experimentally checked very carefully. Readers can find more details in [11] - [15].

4 CONCLUSIONS

The above designs of topologies of various building blocks for analog signal processing based on diamond transistors can be useful, since the use of commercial integrated circuits such as OPA860 can speed up the prototyping most applications of special active elements which are not currently available on the chip. The methodology of modeling microelectronic elements by means of current conveyors and voltage buffers described here can be easily extended to other building blocks which are not mentioned in this paper. 5 ACKNOWLEDGMENT

This work was supported in part by the Grant Agency of the Czech Republic under grant No. 102/08/0784, and by the research programmes MSM 0021630503, MSM 0021630513, and MO FVT0000403. The research has also received funding from the European Community’s Seventh Framework Programme under grant agreement No. 230126, and by the ENIAC European Programme E3CAR.

6 REFERENCES

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