Alveo Data Center Accelerator Card Test
User Guide
UG1361 (v4.0) November 5, 2020 Revision History
Revision History
The following table shows the revision history for this document.
Section Revision Summary
11/05/2020 Version 4.0 General Updates Clarifying edits in various sections. Alveo Data Center Accelerator Card Compatibility Removed table and linked to answer record. 7/15/2020 Version 4.0 General Updates Added support for u50_3x4 and u50lv_3x4 3/11/2020 Version 4.0
General Updates • Standardization and simplification of test json: memory and test environment • New message display (use of ID number) • New installation procedure 3/02/2020 Version 3.3.0
General Updates • Add hardware watchdog support for all compute units • Software enhancement: json parsing, simplification of memory test configuration • Minor bug fixes General Updates Editorial/Style updates 11/06/2019 Version 3.2.1 Power Test Case Updates to Power Test Case General Updates Editorial/Style updates 10/25/2019 Version 3.2.1 Chapter 6: Platform Definition JSON File Added Shell Definition json file concept and usage information. Chapter 4: Test Case Description Updated test case information for clarity. 10/18/2019 Version 3.2 Initial Xilinx release. N/A
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Revision History...... 2
Chapter 1: Overview...... 5 Summary...... 5 Alveo Data Center Accelerator Card Compatibility...... 6 Architecture Overview...... 6 Hardware Overview...... 7 Software Overview...... 8
Chapter 2: Installation...... 11 Dependencies...... 11 Installation...... 11 Removal...... 15
Chapter 3: Usage...... 17 Set Up xbtest...... 17 Command Line Options...... 18 Identifying a Deployment Platform...... 19 Targeting Multiple Deployment Platforms Simultaneously...... 20 Understanding xbtest Messages...... 20 Pre-Canned Tests...... 21
Chapter 4: Test Case Description...... 23 Test Cases Overview...... 23 Verify Test Case...... 24 DMA Test Case...... 25 Memory Test Case...... 27 Power Test Case...... 29 GT MAC Test Case...... 30
Chapter 5: Test JSON File User Guide...... 35 Test JSON File Structure...... 35 Test JSON File Members...... 36
UG1361 (v4.0) November 5, 2020Send Feedback www.xilinx.com Alveo Data Center Accelerator Card Test User Guide 3 Chapter 6: Platform Definition JSON File...... 63
Appendix A: Messages...... 64 Common Test Case Messages...... 65 DMA Test Case Messages...... 67 General Messages...... 68 GT MAC Test Case Messages...... 70 Interfaces Messages...... 71 JSON Parser Messages...... 75 Memory Test Case Messages...... 76 Management Messages...... 78 Power Test Case Messages...... 78 Verify Test Case Messages...... 80
Appendix B: Additional Resources and Legal Notices...... 82 Xilinx Resources...... 82 Documentation Navigator and Design Hubs...... 82 References...... 82 Please Read: Important Legal Notices...... 83
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Chapter 1
Overview
Summary The Alveo™ Card Validation Test Solution application can be used to validate that the Alveo card hardware is operating correctly within the host server environment. The application monitors system health and validates the functionality of the essential hardware and software components of the platform.
The Alveo Card Validation Test Solution is also referred as xbtest.
xbtest can be configured to run the following tests:
• Validate compute units (CUs) • Host can communicate with target memory and CUs at the required rate • Dissipate a programmable amount of power • Check the GT transceivers at 10 GbE and 25 GbE line rates • Verify that CUs can communicate with on board memory at the required rate
IMPORTANT! Prior to using the Alveo Card Validation Test Solution, hardware and software must be installed as described in the Alveo Card Installation Guides.
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Alveo Data Center Accelerator Card Compatibility xbtest supports the Alveo cards and compatible XRT and target platforms. The specific Alveo cards and deployment platforms compatible with xbtest are listed in Alveo - XBTEST Version Platform Support (AR75656).
Related Information Installation
Architecture Overview The solution comprises an application software, which runs on the host and an xclbin that is downloaded to the card. The xclbin can contain power, memory, and GT MAC compute units.
The following block diagram shows an Alveo™ card with an example of deployment platform and compute units (part of the xclbin). Per compute unit type (power, memory, and GT MAC), the presence and the quantity of available compute units depends on the card and the platform capabilities (refer to the respective documentation).
Application software and xclbin are used in conjunction to test memories (DDR and/or HBM) and GTs while the card is consuming a programmable amount of power.
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Figure 1: Alveo Card Block Diagram
Alveo Card
Deployment Platform XCLBIN
DDR DDR MemoryDDR DDR DDR DDR Compute Unit DDR (DDR Mode) XDMA ERT DEPLOY Shell HOST
PCIe Memory PCIe Compute Unit XRT HBM (HBM Mode) CMC Memory Memory SubSystem
DDR DDR PowerDDR DDR DDR Compute Unit DDR PLRAM
GT-MAC Optical GT ComputeDDR Unit DDR Modules
Voltage, Current, SC Temperature…sensors
X22886-030920
Hardware Overview Specific CUs have been created to test different areas of the card hardware:
• Power CU: Throttles the clock of flip-flops, DSPs, block RAMs, and UltraRAMs, present in the logic of the xclbin, to control their power consumption.
• Memory CU: Measures the read and write bandwidth while performing a data integrity check on the data transmitted and received.
• GT MAC CU: Checks GT transceivers of the Alveo™ card at 10 Gigabit Ethernet (10 GbE) and 25 Gigabit Ethernet (25 GbE) lane rates.
There are several hardware safety mechanisms present in the various compute units:
• Watchdog: Stops the compute unit activity after 15 seconds in the case of the application software failing to perform the watchdog reset.
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• Status Register: Detects and prevents multiple instances of application software trying to control/access the same Alveo card.
Software Overview The application software is common for all supported platforms. Multiple Alveo™ cards can be tested simultaneously by running additional instances of the application. The application software automatically detects the number and type of compute units (CUs) are present in the xclbin (power, memory, or GT MAC).
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Figure 2: Software Model
Platform Definition Test JSON File JSON File
Verify Task Processing
DMA Test
Launch testcase Power threads Thread
GT Threads
Memory Threads
Results
X23157-030420
The application software also provides a DMA test (Server <-> Alveo card memories).
Each test case (power, memory, and GT MAC) runs independently. The DMA test case runs prior to all test cases.
To enable simultaneous support for multiple versions of the software (due to platform addition), the xbtest is split into two different applications:
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• Common level: In charge of dispatching the actual test. It selects, configures, and launches the application software based on the selected deployment platform under test. The user always runs xbtest from the common level. • Platform level (xbtest_core): The actual application software that performs the tests.
CAUTION! Only xbtest must be used as it configures xbtest_core according to the platform under test.
The application software uses two JSON configuration files:
1. Test JSON file: Contains the descriptions of the tests to perform. 2. Platform definition JSON file: Specifies the characteristics and the limits of xbtest.
IMPORTANT! The platform definition JSON file is part of the installed hardware package and should not be edited or modified. See the Installation section.
xbtest performs the following steps to launch a test:
1. Checks the command line options for validity and unsupported combinations. 2. Parses all platforms currently installed (under /opt/xilinx/xbtest/lib/) and checks their respective integrity. 3. Selects from the targeted platform based on the card selection ("-d" command line option). • Platform definition JSON file: /opt/xilinx/xbtest/lib/Platform/ xbtest_pfm_def.json • xclbin file: /opt/xilinx/xbtest/lib/Platform/xclbin/ Note: By default, xbtest_stress.xclbin is selected (see "-n" command line option). • Selects the xbtest_core version supported by the targeted platform. 4. Launches xbtest_core on the selected card with: • The pre-canned test (see "-c" command line option) or the provided Test JSON file (see "-j" command line option). • The platform definition JSON file and the xclbin selected previously.
The application software also manages the watchdog present in the different compute units and checks that the Alveo™ card is not in use by another instance of the application.
Related Information Installation
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Chapter 2
Installation
Dependencies The application software depends on the json-glib-1.0 package. This dependency is part of the xbtest package and will be resolved by the package manager (yum or apt depending on your operating system).
Your card should be installed and operating correctly. For instructions on how to install Xilinx® Runtime (XRT) and the deployment platform refer to the Alveo Card Installation Guides.
Installation xbtest is delivered as various archive files that contain the installation packages. Each archive is specific to:
• Architecture: x86_64/amd64 or ppc64
• Operating System (OS): CentOS, Red Hat, Ubuntu
The archive files depend on the deployment platform, see the Alveo Data Center Accelerator Card Compatibility section for the xbtest software and library links. For each architecture/OS supported, the software archive contains two packages while the target platform archive contains one package.
• Two software packages containing the application software:
○ Common level: Select, configure and launch the application software based on the platform under test
○ Platform level: Application software, also referred as xbtest_core in this document • One hardware package containing platform specific files:
○ Two hardware application files (xclbins) containing specific compute units: - xbtest.xclbin contains various compute units: GT MAC and memory (DDR and/or HBM)
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- xbtest_stress.xclbin contains the same content as xbtest.xclbin with the addition of the power CU
○ A set of pre-canned test JSON files. For example, verify, DMA, memory, gt_mac power, and stress
○ Platform definition (xbtest_pfm_def) and configuration JSON files
CAUTION! These files are specific to each deployment platform. Do not edit them.
The three high-level installation steps are first listed and then specific details are outlined in the following section.
1. Identify the package file that is compatible with your setup. 2. Select the compatible xbtest software and target platform package files. Note:
• The software packages are only installed once for all target platforms. • You can install multiple target platform packages (based on what is available on your system). 3. Install the packages in the following order: a. Common level: xilinx-xbtest-common-1.0 b. Platform level: xilinx-xbtest-sw-4-0 c. Target platform: If your system contains different target platforms, repeat this step for each of them.
Detailed Installation Steps 1. Identify the package file that is compatible with your setup: a. Identify the architecture • For CentOS and Red Hat:
$ uname -p • For Ubuntu:
$ dpkg --print-architecture
The architecture can be (for example): • x86_64 (for CentOS) • amd64 (for Ubuntu) • ppc64le b. Identify your OS release.
$ lsb_release -rs
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The OS releases can be (for example): • 7.6 (Red Hat) • 7.4.1708 (CentOS) • 16.04 (Ubuntu) • 18.04 (Ubuntu) c. Identify your deployment platform package name and version. For example, for the U50: • For CentOS or Red Hat:
$ yum list | grep 'xilinx-u50*' • For Ubuntu:
$ apt list | grep 'xilinx-u50*'
This will return the following information: • xilinx-u50-gen3x16-xdma-blp.noarch 1-2787592 In this case, the deployment package: • Name is xilinx-u50-gen3x16-xdma-blp • Version is 1 2. Select the compatible xbtest software and target platform package files based on the last character of the package file name (
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• For Ubuntu 18.04 x86_64 (amd64): 1. Common level: xilinx-xbtest-common-1.0-1.18.04_amd64.deb 2. Platform level: xilinx-xbtest-sw-4-0-1.18.04_amd64.deb 3. Target platform: xilinx-xbtest-xilinx-u50-gen3x16-xdma- blp-1-4.0-2787592_18.04.deb 3. Install all necessary packages. The installation command depends on your OS: • For CentOS and Red Hat:
$ sudo yum install
$ sudo apt install ./
IMPORTANT! Although the package manager will resolve the dependencies between the various xbtest packages, xbtest requires Xilinx® Runtime (XRT) and the deployment platform to be installed.
TIP: Refer to the Set Up xbtest section for how to setup xbtest and to run a quick check of the installation.
The following shows an example of the directory structure for two platforms,
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IMPORTANT! In the following example, two executables (called xbtest) are present:
• Common level: /opt/xilinx/xbtest/bin/xbtest
• Platform level (xbtest_core): /opt/xilinx/xbtest/4/bin/xbtest These executables must not be run directly. The xbtest environment must be set up before running xbtest (See Set Up xbtest).
/opt/xilinx/xbtest ├── bin/ │ └── xbtest* ├── setup.csh ├── setup.sh ├── 4/ │ ├── bin/ │ │ └── xbtest* └── lib/ ├── Platform A/ │ ├── config.json │ ├── xbtest_pfm_def.json │ └── xclbin/ │ │ ├── xbtest_stress.xclbin │ │ └── xbtest.xclbin │ └── test/ │ └── verify, dma, gt_mac, memory, power, stress.json └── Platform B/ ├── config.json ├── xbtest_pfm_def.json └── xclbin/ │ ├── xbtest_stress.xclbin │ └── xbtest.xclbin └── test/ └── verify, dma, gt_mac, memory, power, stress.json
Where:
*: identifies an executable file /: identifies a folder
Note: The folder test/ contains the pre-canned test json files.
Related Information Set Up xbtest
Removal To fully remove xbtest use the following command:
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• For CentOS and Red Hat:
$ sudo yum remove 'xilinx-xbtest*' • For Ubuntu:
$ sudo apt remove 'xilinx-xbtest*'
CAUTION! This will remove xbtest for all platforms.
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Chapter 3
Usage
This chapter describes the basic commands to:
• Set up xbtest and check if its installation was correct • Launch a pre-canned test • Launch xbtest while targeting one or more deployment platforms
Set Up xbtest To set up xbtext, your card should be installed and operating correctly. For instructions on how to install Xilinx® Runtime (XRT) and the deployment platform, refer to the Alveo Card Installation Guides. The Xilinx Runtime (XRT) Documentation is another resource.
Use the following commands to set up xbtest:
• In the csh shell:
$ source /opt/xilinx/xbtest/setup.csh
• In the bash shell:
$ source /opt/xilinx/xbtest/setup.sh
This script adds the location of the xbtest executable (/opt/xilinx/xbtest/bin/) to the PATH environment variable.
If xbtest is installed and set up correctly, the following command displays the xbtest help instructions.
$ xbtest -h
IMPORTANT! Ensure you run xbtest from a folder where you have write permission.
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Command Line Options The following table details the available xbtest command line options.
Table 1: xbtest Command Line Options
Command Line Description Option
"-v"1 Display the version. There are two version levels:
• Common level: Display xbtest version.
$ xbtest -v
• Platform level: Display xbtest_core version for the selected platform
$ xbtest -d
"-h"1 Display the help message and command line options available. There are two levels of messages:
• Common level: Display xbtest command line options and the list of all installed platforms supported by xbtest with their respective pre-canned tests
$ xbtest -h
• Platform level: Display the command line options for the specific version xbtest_core used by the selected platform:
$ xbtest -d
Note: All mandatory options reported by the previous command are automatically managed when using the xbtest command. They do not require any user specific attention.
"-d"2 Select the Alveo card. When not specified, card index defaults to 0. See Identifying a Deployment Platform.
$ xbtest -d [index] -j
"-j"2 Select Test JSON file:
$ xbtest -d
"-l"2 Define a logging directory in which all output_file defined in any test case will be stored. All messages displayed during the execution will be also stored into a xbtest.log file available in the provided directory.
$ xbtest -l
IMPORTANT! When this option is used, all output_file (See Test JSON File Members) must be a file name only (no path should be used in output_file).
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Table 1: xbtest Command Line Options (cont'd)
Command Line Description Option
"-c" Select a pre-canned test to run. To obtain the list of pre-canned tests available use the command: $ xbtest -h.
$ xbtest -d
See Pre-Canned Tests.
IMPORTANT! This option cannot be used with the "-j" command line option.
"-n"2 By default, all test uses the xbtest_stress.xclbin (see Installation). Selects the xclbin which does not contain the power compute unit.
TIP: Use this option to force a reload of the xclbin. For example, execute the following command prior your test.
$ xbtest -d
This option can also be used with your own Test JSON file ("-j"), but the Test JSON file must not contain any Power test case:
$ xbtest -d
Notes: 1. "-v" and "-h" will prevent any test being launched. 2. "-j", "-d", "-l", and "-n" can be used simultaneously within the same command line.
Note: All command line options that are not compatible with xbtest are passed to xbtest_core. For example, the "-l" option and parameters are passed untouched to xbtest_core.
Related Information Installation Identifying a Deployment Platform
Identifying a Deployment Platform After having installed and set up XRT (Xilinx Runtime (XRT) Documentation), use the following command to get the list of available platforms:
$ xbutil scan
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The command will output results similar to the following example. The card index is the integer value given in the square brackets [
[0] 0000:d8:00.1 xilinx_u50_gen3x16_xdma_201920_3 user(inst=133) [1] 0000:af:00.1 xilinx_u50_gen3x16_xdma_201920_3 user(inst=132) [2] 0000:86:00.1 xilinx_u50_gen3x16_xdma_201920_3 user(inst=131) [3] 0000:5e:00.1 xilinx_u50_gen3x16_xdma_201920_3 user(inst=130) [4] 0000:3b:00.1 xilinx_u50_gen3x16_xdma_201920_3 user(inst=129) [5] 0000:18:00.1 xilinx_u50_gen3x16_xdma_201920_3 user(inst=128)
Targeting Multiple Deployment Platforms Simultaneously When the system contains multiple deployment platforms, multiple instances of xbtest can be run simultaneously, each instance targeting a different deployment platform using the -d command line option.
The same Test JSON file specified using the -j command line option can be used by the different instances of xbtest. It is strongly recommended to use the -l option to store all xbtest output and log files into different directories.
The various instances of xbtest can be run from the same console using the command line operator &.
The following example shows how to run multiple instances of xbtest in one command, using the same Test JSON file, on the deployment platforms at device index 0, 1, and 2, and storing output and log files respectively in log_0, log_1, and log_2 directories.
$ xbtest -j test.json -d 0 -l log_0 & xbtest -j test.json -d 1 -l log_1 & xbtest -j test.json -d 2 -l log_2
Understanding xbtest Messages The application software outputs messages. Each message contains the following fields, separated by ":".
• Severity: From lowest to highest severity, INFO, STATUS, WARNING, CRIT_WARN, PASS, ERROR, FAILURE (see Verbosity Level). • Header/tag: Identifier of the message originator. For example, POWER messages originate from the Power test case.
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• ID: Unique identifier for a message. • Message: Actual message content.
The list of possible messages is provided in this document (see Appendix A: Messages).
An execution of xbtest will typically contain the following messages:
• Start banner containing:
○ Information about the run: start time, version used of the XRT and xbtest commands.
○ XRT firewall status. Use the xbutil query command to know when the last firewall error occurred.
Note: xbtest reports the status and cannot clear it • Start of a test case: ID CMN_008. • Message from the test cases. • Results of the test case: ID CMN_009 (failure), CMN_010 (error), or CMN_011 (pass). • End banner containing:
○ Information about the run: end time, version.
○ Summary of all test cases run and their results: ID GEN_022 (pass) or GEN_021 (fail).
○ Global result of xbtest: ID GEN_024 (pass) or GEN_023 (fail).
Related Information Messages
Pre-Canned Tests xbtest comes with a set of pre-canned tests which use one or more of the available test cases (verify, DMA, power, memory, or GT MAC). The pre-canned tests can be used as templates to create your own tests (See the Installation section for the location of these files). The following is a list of possible pre-canned tests:
• verify: Checks the integrity of the xclbin (see Verify Test Case).
• dma: Performs a basic DMA test case of all memories (DDR and/or HBM) available on the card. Host ↔ memory check (see DMA Test Case).
• gt_mac: Performs a basic GT MAC test case (see GT MAC Test Case).
• memory: Performs a basic memory test case of all memories (DDR and/or HBM) available on the card. Compute unit ↔ memory check (see Memory Test Case).
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• power: Performs a basic power test case (see Power Test Case)
• stress: Combines multiple test cases. For example: Verify, GT MAC, memory, and power test cases.
Note: The exact list a of available pre-canned tests is platform specific, see the Command Line Options section for how to list the pre-canned tests.
Note: The test_sequence used by these various tests is displayed when run and depends on the targeted platform.
Related Information Command Line Options Verify Test Case DMA Test Case Power Test Case GT MAC Test Case Installation
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Chapter 4
Test Case Description
Test Cases Overview Five different test cases can be run by xbtest depending on the deployment platform and the xclbin capabilities: verify, DMA, power, memory, and GT MAC. With the exception of the verify test case, a test case is composed of:
• A series of tests (also called test sequence). The duration and configuration of each test can be specified individually. • Common configuration for all tests within a test case (for example, results file).
Verify • Detects and reports available CUs. • Checks compatibility. • Displays Platform Definition. • Checks all CUs capabilities. • Checks basic communication between the host and the CUs: read/write of a scratch register.
DMA • Checks data transfer between the host and the memories available (DDR and/or HBM). • Tests DDR and HBM individually. • Uses counter for data integrity check. • Measures read and write bandwidths between the host and the memories available (DDR and/or HBM).
Note: The DMA test case does not use any CUs, but requires an xclbin with connection to the memory under test.
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Memory • Checks data transfer between the CUs and the memories available (DDR and/or HBM). • Tests DDR and HBM separately. The configuration settings to check the DDR are different to those of the HBM. HBM test configurations apply to all HBM while DDR test configurations apply to all DDR. • Uses PRBS31 for data integrity check. • Measure read and write bandwidths.
Power • Sets the power consumed by the card by controlling the toggle rate of the resources present in the CU.
Note: Power CU only exercises the logic of the xclbin. The maximum and minimum power depends on:
• The Alveo™ card selected.
• The platform used (see Chapter 6: Platform Definition JSON File).
• The configuration of other tests running simultaneously to the Power test case.
Related Information Platform Definition JSON File
GT MAC • Checks the GT transceiver of the Alveo card at 10 Gigabit Ethernet (10 GbE) and 25 Gigabit Ethernet (25 GbE) line rates. • Uses the Xilinx XXV Ethernet IP core (see 10G/25G High Speed Ethernet Subsystem Product Guide (PG210)). • Includes a packet generator which allows an Alveo card with simple loopback cables to generate packets, and to verify that these packets are received error free.
Verify Test Case The Verify test case is always executed at the start of any test and is not configurable. If any of its checks described here fail, none of the test cases are executed.
Application software automatically detects the compute units (CUs) present in the xclbin.
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The Verify test case crosschecks the contents of xclbin with regard to:
• Its compatibility with the application software • The content of the test JSON file
Compute Units Verification
Once uniquely identified, each CU present in the xclbin is checked for:
• Compatibility with:
○ Application software version
○ CUs stat information
• Basic communication where multiple read/write to each CU scratch register are performed.
Test JSON File Verification
An initial sanity check of the Test JSON file is performed when the application software starts. All JSON members are checked for validity and compatibility (value type and range) with the application software and the Platform Definition JSON file. This also includes a check of the test_sequence parameters for each test case.
If a test case is described in the Test JSON file but the xclbin does not contain the associated CU, the Verify test case fails. If a test case is not described in the Test JSON file, the associated CU will stay in its idle state and is not considered as a Verify test case failure.
DMA Test Case The goal of this test case is to check communication and available bandwidth between host and DDR and/or HBM memory through the PCIe. Data integrity and write/read bandwidths are measured.
The DMA test case consists of writing and reading back a certain quantity of data (total_size, in MB) over and over during a certain period of time. A write-read-check cycle is never interrupted, meaning that:
• The total_size of data is always fully sent, read back and checked for data integrity • If required, a test duration can be extended to perform all write-read-check cycle operations.
The data is generated via an 8-bit counter that is randomly initialized at the beginning of each write-read-check cycle.
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The total_size is predefined for each type of memory (HBM or DDR) but can be changed (see DMA Test Case Members). Per memory type (HBM or DDR), the total_size default value is the size defined in the Platform Definition; capped at 4096 MB.
The total_size of data is split into buffers which are transferred (via OpenCL) to or from the Alveo™ card.
The bandwidths are computed after each total_size of data transfer and the values are averaged over the test duration.
IMPORTANT! By default, the average read and write bandwidths are not checked against any pass/fail criteria but this can be overruled (see DMA Test Case Members).
Related Information DMA Test Case Members
Test Parameters Following are the mandatory test configuration parameters, more are available (see DMA Test Case Members):
• duration: The duration of the test in seconds. • mem_type: Type of memory to access (DDR or HBM). • mem_index: Index of the memory to access.
Related Information DMA Test Case Members
Main Test Steps A DMA test consists of the following steps:
1. Allocate N host buffers of 256 MB (aligned with memory page size), where N equals total_size divided by 256. 2. Allocate and initialize the reference buffer used to check data integrity. 3. The following steps are repeated for the duration of the test: a. Set host buffers with reference data (8-bit counter). b. Write host buffers to the card memory, measure bandwidth. c. Reset host buffers to 0. d. Read from the card memory, measure bandwidth.
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e. Check that the host buffers contain the same data as the reference buffers (data integrity). Note: These steps constitute a write-read-check cycle which is always entirely executed. 4. Compute write and read minimum, maximum, and average bandwidths. 5. If enabled, compare the average read and write bandwidths against their thresholds. 6. Release all host buffers.
Memory Test Case The goal of this test case is to check communications and available bandwidth between the Memory CUs and the available DDR and/or HBM.
Note: While in the DMA test case the data is transferred between the host and memories, in the Memory test case the application software commands the Memory CUs to transfer data between the CU and their associated memories.
The Memory test case includes the following features:
• All memories are tested in parallel. • Sequences are defined for memory types (DDR or HBM), and all memories of a particular type are tested with the same sequence. • Data integrity is checked using PRBS31 generator/checker within the CU. • Write and read bandwidths are measured. • All transfers are performed using linear addressing.
Prior to the first test and if enabled (see Memory Test Case Members), a verification of the communication between the Memory CUs and the memories is performed. For each memory, PRBS data are written with a known quantity of errors, then read back and validated (see Preliminary Test).
Related Information Verbosity Level Memory Test Case Members Preliminary Test
Main Test Steps 1. The preliminary test is run (if enabled).
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2. For each test configuration the following steps are repeated: a. The test is run for at least the defined duration. The entire range of the memory is always checked, meaning that, if needed, the test duration is extended. b. Every second, the application software requests status and measurements from the CU: • The instantaneous read and write bandwidths. • The data integrity status; an error message is displayed in case of mistake. c. After the test completes, the average read and write bandwidths are displayed. They are only checked against thresholds if the following condition is met: Test duration is greater than 20s.
Related Information Memory Test Case Members
Preliminary Test If enabled, this test validates that the correct memory is under test. The following steps are performed:
1. PRBS31 data with a known quantity of errors is sent to the memory. The quantity of errors differs for each memory. 2. The memory is read back and verified against the expected quantity of errors. 3. Data integrity of the memory is re-established by writing valid PRBS31 data.
Test Parameters The mandatory test configuration parameters are as follows (see Memory Test Case Members for more details):
• duration: Specifies the test duration in seconds. • mem_test_mode: Describes the data transfer mode: "Alternate_Wr_Rd", "Only_Wr", "Only_Rd".
IMPORTANT! To perform any "Only_Rd" test, the memory content must have filled with valid PRBS31 data. Within your test_sequence, define at least one "Only_Wr" test prior to the first "Only_Rd" test.
Related Information Memory Test Case Members
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Power Test Case The goal of this test is to allow the user to control the power consumption of the card. This is achieved by adjusting the toggle rate of the clock driving all flip-flops, DSPs, block RAMs, and UltraRAMs of the xclbin present in the Power CU. The toggle rate range is between 0% and 100%. The power is measured every second. It is computed based on the current and voltage measurements available via Xilinx® Runtime (XRT).
The following basic safety mechanisms are in place to limit potential damage to the Alveo card in cases of accidental misuse or demanding test environmental conditions:
• Temperature Limit: All tests are aborted if the temperature limit is reached.
• Power Limit: All tests are aborted if the power limit is reached.
Temperature and power limits are defined in Platform Definition File (see Platform Definition).
WARNING! The Power CU has been intentionally designed to exceed the power capacity of the card. You might damage your card and cause your server/workstation to reboot if you try to for example (but not limited to):
• Use a high toggle rate
• Use a particularly demanding test sequence (for example, alternating between 0% and a high toggle rate for a short period of time).
Note: No checks are made on the power consumed, so the Power test case always passes. The user is responsible of monitoring the consumed power which is displayed by the application software.
IMPORTANT! The total power budget of the card is not entirely available for the Power CU. Voltage regulators and other components on the card consume power on which xbtest has no control.
IMPORTANT! xbtest reports the entire power consumed by the card (for active card, it also includes the fan)
TIP: You should calibrate your target platform and card against the toggle rate according to your test environment to determine:
• The maximum permissible toggle rate • The relationship between the toggle rate and the power consumed
A simple calibration method could be as follows: Starting from 0%, increase the toggle rate by 5% and, for each toggle rate step, let the power and temperature stabilize for two minutes. This could help you establish the relationship between toggle rate and power.
IMPORTANT! Ensure that the environmental conditions (for example temperature) used during calibration are similar to those used during the tests.
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Other cases, like Memory (DDR or HBM) and GT MAC, have a significant impact on the power consumed:
• DDR: When running four DDRs simultaneously, the memory test consumes approximately 20W (write mode) or 15W (read mode).
• HBM: For example, when eight HBM ports are used, the memory test consumes between 7W and 8W.
• GT MAC: When two GT MAC CUs are present, the 25 GbE mode uses ±6W more than the 10 GbE mode.
• Logic: Memory and GT MAC CUs, and the memory subsystem also consume several watts.
Note: These values are indicative and can vary from card to card. Moreover, they also depend on test environmental conditions such as cooling, etc.
Care must be taken when mixing test case types or when changing the mode of other tests while the power test is running. For example, power will increase if the DDR memory test changes from Only_Rd to Only_Wr mode. Power will decrease when a Memory (DDR or HBM) test case ends.
IMPORTANT! The distribution of the power across the various regulators also limits which power is actually available for xbtest to control. For example, on an Alveo U50 card, although the power budget of the card is 75W, up to 10W are reserved for the HBM. This means that Power CU can only control up to 65W. It also means that the Memory CU has to be in use to have a card power consumption higher than 65W.
Related Information Power Test Case Members Verbosity Level Platform Definition JSON File
GT MAC Test Case The goal of this test case is to allow verification of GT transceivers on Alveo cards at 10 GbE and 25 GbE line rates.
This compute unit (CU) instantiates the 10G/25G High Speed Ethernet Subsystem IP core and allows the core to be configured from a Test JSON file. (See 10G/25G High Speed Ethernet Subsystem Product Guide (PG210)).
The CU also includes a packet generator, which allows a card with simple electrical or optical loopback cables to generate packets, and also verify that the generated packets have been received back, error free.
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Note: Under some circumstances the packet generator might not be able to send packets at the requested rate. This is most likely to occur when operating at 25 GbE, with small (for example 64-byte) packets. Reducing the number of active MACs and/or increasing the packet size should allow the maximum rate to be achieved (see GT MAC Test Case Members).
A test is generally composed of four steps and a definition of the hardware environment (see GT MAC Test Case Members).
Typical test steps are as follows:
1. Configuration 2. Clear status 3. Run 4. Report/check status
WARNING!
• All GT MAC CUs present in the xclbin are tested with the same test sequence.
• By default, after xclbin download, the GT MAC CU generates IDLE packets at 25 GbE rate. • When the test sequence is over, the GT MAC CU continues to send traffic as per its last configuration. • It is not possible to configure the source nor the destination MAC addresses. For each GT MAC CU, the transmitter MAC address is 00-bb-cc-dd-ee-fN, and the receiver MAC address is 00-11-22-33-44-5N, where N represents the index of the lane (0..3).
Related Information GT MAC Test Case Members
GT Test Set Up GT testing can be achieved by using one of the following methods:
• The use of a QSFP passive electrical loopback module. The module must be compliant to 100 GbE (25 GbE per lane) and have 0 dB insertion loss. This is the preferred method, the GTs having being validated using a QSFP28 module provided by MultiLane (ML4002-28-C5). Note: This module also has the capability of providing a QSFP temperature reading and a programmable power dissipation up to 5W. However these are not required to pass the GT tests. • The use of a QSFP optical module with suitably connected fiber loopback. The module must be compatible with the traffic rate being tested. Note: This is an active component the electrical interface between the GTs and the module will need to be validated to ensure optimum performance.
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• The use of a protocol analyzer with a compatible electrical or optical interface. This is the most complex method of connection as not only will the interfaces require validation with the GTs, the RX and TX paths will be independent. The Test JSON file needs to be modified to reflect that the RX and TX packet/byte counts might not be the same.
The configuration of the GT MAC test case depends on the set up. See GT MAC Test Case Members.
Related Information GT MAC Test Case Members
MAC_STAT Status Description
Each time the status command is executed, the following registers are read from the MAC hardware for each active MAC lane.
All registers are stored in hardware using 48 bits, and extended to 64 bits when read by software.
Note: The 48 bits RX_TOTAL_BYTES, RX_TOTAL_GOOD_BYTES, and TX_TOTAL_BYTES counters could saturate after approximately 25 hours of maximum rate operation at 25 GbE. It is therefore recommended that the test duration does not exceed 24 hours between status commands.
In addition, if the RX_TOTAL_GOOD_PACKETS count is equal to 0, then a "no good packets received" message (ID GTM_007) is reported, and the test will fail.
The optional parameter match_tx_rx causes the values of RX_TOTAL_GOOD_PACKETS and TX_TOTAL_PACKETS to be compared, and the values of RX_TOTAL_GOOD_BYTES and TX_TOTAL_BYTES to be compared. A mismatch will cause the messages "TX vs. RX packets mismatch" (ID GTM_008) and/or "TX vs. RX bytes mismatch" (ID GTM_009) to be reported, and the test will fail.
If the transmitter of one MAC instance is connected to the receiver of another MAC instance, then using the tx_mapping_n option allows the match_tx_rx to be used, with the comparison being made between the correct MAC TX and RX instances.
In the table following table, the "Register Type" column represents how the register is verified:
• Check: the content of the register must be null. Any other value will generate an error (message ID GTM_004). • Info: the content of the register is displayed as information (no verification performed).
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Table 2: MAC_STAT Status Description
Register Register Name Description Type
cycle_count Info Number of transceiver clock domain cycles (approximately 1.5625e8 / sec at 10 GbE and 3.90612e8 / sec at 25 GbE).
Note: A value of 0 means that clocks were not active during the test and other registers should be ignored. Any non-zero result indicates the clocks were active.
fec_inc_cant_correct_count Check This count indicates how many uncorrected bit errors in the corresponding Clause 74 FEC Frame. fec_inc_correct_count Check This count indicates how many corrected bit errors in the corresponding Clause 74 FEC Frame. rx_bad_code Check This count indicates how many cycles the RX PCS receive state machine is in the RX_E state as defined by IEEE Std. 802.3. rx_bad_fcs Check The value of this count indicates packets received with a bad FCS, but not a stomped FCS. A stomped FCS is defined as the bitwise inverse of the expected good FCS. rx_broadcast Info Increment for good broadcast packets. rx_error Check This count indicates a mismatch occurred for the test pattern in the RX core. rx_fragment Check Increment for packets shorter than stat_rx_min_packet_len with bad FCS. rx_framing_err Check This count is used to keep track of sync header errors. The stat_rx_framing_err output indicates how many sync header errors were received. rx_inrangeerr Check Increment for packets with Length field error but with good FCS. rx_jabber Check Increment for packets longer than ctl_rx_max_packet_len with bad FCS. rx_multicast Info Increment for good multicast packets. rx_oversize Check Increment for packets longer than ctl_rx_max_packet_len with good FCS. rx_packet_64_bytes Info Increment for good and bad packets received that contain 64 bytes. rx_packet_65_127_bytes Info Increment for good and bad packets received that contain 65 to 127 bytes. rx_packet_128_255_bytes Info Increment for good and bad packets received that contain 128 to 255 bytes. rx_packet_256_511 Info Increment for good and bad packets received that contain 256 to 511 bytes. rx_packet_512_1023_bytes Info Increment for good and bad packets received that contain 512 to 1,023 bytes. rx_packet_1024_1518_bytes Info Increment for good and bad packets received that contain 1,024 to 1,518 bytes. rx_packet_1519_1522_bytes Info Increment for good and bad packets received that contain 1,519 to 1,522 bytes. rx_packet_1523_1548_bytes Info Increment for good and bad packets received that contain 1,523 to 1,548 bytes rx_packet_1549_2047_bytes Info Increment for good and bad packets received that contain 1,549 to 2,047 bytes.
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Table 2: MAC_STAT Status Description (cont'd)
Register Register Name Description Type
rx_packet_2048_4095_bytes Info Increment for good and bad packets received that contain 2,048 to 4,095 bytes. rx_packet_4096_8191_bytes Info Increment for good and bad packets received that contain 4,096 to 8,191 bytes. rx_packet_8192_9215_bytes Info Increment for good and bad packets received that contain 8,192 to 9,215 bytes. rx_packet_bad_fcs Check Increment for packets between 64 and ctl_rx_max_packet_lenbytes that have FCS errors. rx_packet_large Info Increment for all packets that are more than 9,215 bytes long. rx_packet_small Check Increment for all packets that are less than 64 bytes long. Packets that are less than 4 bytes are dropped. rx_pause Info Increment for 802.3x Ethernet MAC Pause packet with good FCS. rx_rsfec_corrected_cw_inc Check This count will increment if the RS-FEC decoder detected and corrected a bit errors in the corresponding frame. rx_rsfec_err_count0_inc Check Increment for RS-FEC detected errors. rx_rsfec_uncorrected_cw_inc Check This count will increment if the RS-FEC decoder detected uncorrectable bit errors in the corresponding frame. rx_stomped_fcs Check The value of this count indicates packets were received with a stomped FCS. A stomped FCS is defined as the bitwise inverse of the expected good FCS. rx_test_pattern_mismatch Check This count indicates how many mismatches occurred for the test pattern in the RX core. rx_toolong Check Increment for packets longer than ctl_rx_max_packet_len with good and bad FCS. rx_total_bytes Info Increment for the total number of bytes received. rx_total_good_bytes Info Increment for the total number of good bytes received. This value is only non-zero when a packet is received completely and contains no errors. rx_total_good_packets Info Increment for the total number of good packets received. This value is only non-zero when a packet is received completely and contains no errors. rx_total_packets Info Increment for the total number of packets received. rx_truncated Check This count indicates that the number of packets truncated due to their length exceeding ctl_rx_max_packet_len[14:0]. rx_undersize Check Increment for packets shorter than stat_rx_min_packet_len with good FCS. rx_unicast Info Increment for good unicast packets. rx_user_pause Info Increment for priority-based pause packets with good FCS. rx_vlan Info Increment for good 802.1Q tagged VLAN packets. tx_total_bytes Info Increment for the total number of bytes transmitted by the packet generator. tx_total_packets Info Increment for the total number of packets transmitted by the packet generator.
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Chapter 5
Test JSON File User Guide
CAUTION! Test JSON files from previous versions of xbtest are not compatible with this version. Contact Xilinx Support for information on how to convert Test JSON files from previous versions.
Test JSON File Structure The following is a Test JSON file example. The various schemas present in test cases can be listed in any order. Schemas can be removed/added to disable/enable test cases. Test cases are executed in parallel with exception of:
• Verify: executed prior to any tests, as a preliminary check. • DMA: executed prior to all other listed tests (Memory, Power, or GT MAC).
The Test JSON file has the following properties:
• If the same Member is repeated throughout your file, only the last value is used. • Comments are not supported.
{ "testcases": [ { "type": "dma", "parameters": { "test_sequence":[[10,”DDR”,"all"],[10,"HBM",2]], "output_file": "dma_output_file" } }, { "type": "power", "parameters": { "test_sequence_mode": "config_duration_toggle", "test_sequence":[[60,15],[120,50]], "output_file": "power_output_file" } }, { "type": "memory_ddr", "parameters": {
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"test_sequence":[[60, "Alternate_Wr_Rd"]], "output_file": "memory_output_file" } }, { "type": "memory_hbm", "parameters": { "test_sequence":[[60, "Alternate_Wr_Rd"]], "output_file": "memory_output_file" } }, { "type": "gt_mac", "parameters": { "test_sequence" :[[2,"conf"],[1,"clr_stat"],[10,"run"], [1,"status"]], "line_rate": "10gbe", "output_file": "gt_mac_output_file" } } ] }
Test JSON File Members
Test Environment Members
Table 3: Test Environment Members
Mandatory/ Member Sub-Member Description Optional
Possible values: 0 to 6; default: 0: status. (See Verbosity Level section). This controls the verbosity level of the entire test. This will verbosity – Optional be applied to any test case which does not have its own verbosity defined. If the verbosity is defined at a certain level, all messages with equal and greater levels will be displayed. List of the test cases to be executed. Note that these are performed in parallel. A failure in a particular test case does not stop other test cases. testcases – Optional Define which test is performed. Because test cases run in parallel, you can define 0, 1 or more. When not defined, the verify test case is still performed.
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Table 3: Test Environment Members (cont'd)
Mandatory/ Member Sub-Member Description Optional
Possible values: • "dma" Mandatory if • "memory_ddr" – type testcases defined • "memory_hbm" • "power" • "gt_mac" – parameters Mandatory if Test case parameter definition depends on the test case testcases type. defined
DMA Test Case Members The following is an example of DMA test case for a platform containing DDR and HBM.
{ "type": "dma", "parameters": { "test_sequence": [[10,"DDR","all"],[10,"HBM","all"]], "output_file": "dma_output_file" } } Where: [10,"DDR","all"] │ │ └──────> mem_index │ └────────────> mem_type └────────────────> duration
The following table shows all members available for this test case. More details are provided for each member in the subsequent sections.
Table 4: DMA Test Case Members
Mandatory/ Member Sub-Member Description Optional
type – mandatory Test case type definition; must be "dma" parameters – mandatory Test case parameter definition. – test_sequence mandatory Describes the sequence of tests to perform. A test is defined by the following values:
• Duration: Test duration in seconds • mem_type: Targeted memory type "DDR" or "HBM" • mem_index: Targeted memory index
– test_source optional Select where the test_sequence originates. – check_bw optional Enable bandwidth checking. Disabled by default.
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Table 4: DMA Test Case Members (cont'd)
Mandatory/ Member Sub-Member Description Optional
– output_file optional Relative path to the files used to store all DMA measurements. – verbosity optional Controls the verbosity level of the entire test case. – ddr_total_size optional Total amount of data (MB) per bandwidth measurement for DDR tests. – hbm_total_size optional Total amount of data (MB) per bandwidth measurement for HBM tests. – hi_thresh_wr_ddr optional Overwrite high threshold of the DDR/HBM write/read hi_thresh_rd_ddr bandwidth (MB/s). hi_thresh_wr_hbm hi_thresh_rd_hbm – lo_thresh_wr_ddr optional Overwrite low threshold of the DDR/HBM write/read lo_thresh_rd_ddr bandwidth (MB/s) lo_thresh_wr_hbm lo_thresh_rd_hbm
test_source Optional. When not specified, it uses the default value.
• Possible values: "json" (default), "file". Select where the test_sequence originates:
○ When "json" is used, each element of the test_sequence list, defined in the Test JSON file represents one test.
○ When "file" is used, the content of the files provided in the test_sequence will be used.
Note: Multiple files can be listed and will be read sequentially.
test_sequence Mandatory. Describes the sequence of tests to perform. Tests are performed serially, and a failure in one test does not stop the sequence (the next test will be launched).
The following modes are supported:
json mode:
In this mode, the Test JSON file contains the test to perform. This field contains a list of grouped values. The grouped value is interpreted according to test_source (see the previous section).
This is a list of values, each separated by a comma: [ [] , [] , [] ]
The values are interpreted as: [duration,mem_type,mem_index].
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• duration: The duration of the test in seconds: Range [1, 232-1] • mem_type: Type of memory to access: "DDR", "HBM" • mem_index: Index of the memory to access: integer or "all"
○ The index must be within the range specified in the platform definition file. - "all" is used when all the available memory for the specified types are tested consecutively. The test fails when the memory to test is not connected in the xclbin.
Note: mem_type and mem_index information can be retrieved using the xbutil query and checking the tag associated with each memory.
Example:
• Single test: [ [50,"DDR",0] ] • Multiple test: [ [50,"DDR",0],[1,"DDR",1],[10,"DDR",2] ] Note: If, in an xclbin, only DDR[0] and DDR[1] are available, then [ [5,"DDR",0] , [5,"DDR",1] ] is equivalent to [ [5,"DDR","all"] ].
There is no limit to the length of the test_sequence.
file mode:
In this mode there is no limit to the number of files you can use. All files must be listed as in json mode, as a list of a list.
• Example:
○ Single file: [ ["../test_cfg/single_file_example.txt"] ]
○ Multiple test: [["../test_cfg/test_file_1.txt"] , ["../test_cfg/ test_file_2.txt"] ]
The content of each file must be csv-like with one test configuration per line. Similar to the json mode, the number must be in decimal format and positive.
The fields are interpreted the same way as the value provided in the test_sequence in "json" test_source mode.
The following is an example ../test_cfg/test_file_1.txt syntax:
50,"DDR",0
1,"DDR",1
10,"DDR",2
Note:
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• No comments are allowed in the Test JSON file nor in the CSV file.
• The value of mem_type is always quoted in both "json" and file test_source mode.
Table 5: Valid/Invalid Syntax
File Type Invalid Syntax Valid Syntax
Test JSON [[1,DDR,0]] [[1,"DDR",0]] CSV 1, DDR,0 1,"DDR",0
check_bw By default, none of bandwidth values (read or write) are checked against any pass/fail criteria; they are just reported as information. By setting this member to true, all bandwidth results will be compared to thresholds specified inside the platform definition file. These thresholds can be overwritten (see the following section).
ddr_total_size Optional: When not specified, the default value is used.
Possible values: Minimum: 1; Maximum: depends on the platform definition file. Default: 4096.
This is the total amount of data (MB) per transfer cycle for DDR tests. This must be a multiple of the 256 (host buffer size).
hbm_total_size Optional: When not specified, the default value is used.
Possible values: Minimum: 1; Maximum: depends on the platform definition file. Default: 256.
This is the total amount of data (MB) per transfer cycle for HBM tests. This must be a multiple of the 256 (host buffer size).
hi_thresh_wr_ddr,hi_thresh_rd_ddr, hi_thresh_wr_hbm, hi_thresh_rd_hbm Optional. Overwrite high threshold of the DDR/HBM write/read bandwidth (MB/s) specified in the Platform Definition file.
Range [1, 232-1]
After all bandwidth measurements made during the test duration are complete, if the measured bandwidth is greater than this threshold, the test fails (with message ID DMA_016).
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lo_thresh_wr_ddr, lo_thresh_rd_ddr, lo_thresh_wr_hbm, lo_thresh_rd_hbm Optional. Overwrite low threshold of the DDR/HBM write/read bandwidth (MB/s) specified in the Platform Definition file.
Range [1, 232-1]
After all bandwidth measurements made during the test duration are complete, if the measured bandwidth is lower than this threshold, the test fails (with message ID DMA_016).
verbosity Optional. This controls the verbosity level of the entire test case. This overwrites the Test Environment Members verbosity.
• Possible values: 0 to 6 • Default value: verbosity defined in Test Environment Members. See Verbosity Level for descriptions of all possible values.
output_file Optional. Absolute or Relative path to the files used to store all DMA measurements.
IMPORTANT! If the "-l" command line option is used while calling the application software, output_file must strictly be the name of a file.
By convention, the CSV file extension is appended by the software to the value given by the output_file member, and therefore is not specified in the Test JSON file.
The values are stored in a CSV type format with one column per each information type.
Up to three CSV files are created:
• output_file.csv: this file is always created. It contains the bandwidth measurement done for each of the write-read cycle (See DMA Test Case) for all memory types (DDR and HBM).
Table 6: output_file.csv for a Platform Containing 2 DDRs and 1 HBM of 32 Pseudo Channels
Tag buffer size iteration Write BW Read BW
DDR[0] 256 0 DDR[0] 256 1 ...... DDR[1] 256 0 DDR[1] 256 1 ...... HBM[0] 256 0
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Table 6: output_file.csv for a Platform Containing 2 DDRs and 1 HBM of 32 Pseudo Channels (cont'd)
Tag buffer size iteration Write BW Read BW
...... HBM[1] 256 0 ... … ...... HBM[31] 256 0 HBM[31] 256 ...
• Tag: Tested memory name • Buffer Size: Size of buffers (MB) transferred during the test • Iteration: Index of the Write-Read Cycle: the number of cycles depends on duration, total_size and the Buffer Size • Write BW: DMA write BW measurement (MB/s) • Read BW: DMA read BW measurement (MB/s) • output_file_ddr.csv and output_file_hbm.csv : if a memory type is present in the Platform, its equivalent CSV file will be created (and maybe not populated if the memory is not tested). For convenience (for example, to plot figures), the same values contained inoutput_file.csv values are also sorted per memory tag and grouped into sets of columns. Each set contains four columns:
○ buffer size
○ iteration
○ write bandwidth
○ read bandwidth
The following tables describe the contents of output files for a platform containing two DDRs and one HBM of 32 pseudo channels.
Table 7: Example: output_file_ddr.csv
DDR[0] set of columns DDR[1] set of columns
values values
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Table 8: Example: output_file_hbm.csv
HBM[...] set of HBM[31] set of HBM[0] set of columns HBM[1] set of columns columns columns
values values values values
Related Information Verbosity Level DMA Test Case
Memory Test Case Members Following is an example of DDR and HBM test case. Note that:
• The same output file name can be used for DDR and HBM tests; a suffix will be automatically be inserted. • The memory must be initialized, via "Only_Wr" test, prior to "Only_Rd" test.
{ "type": "memory_ddr", "parameters": { "test_sequence":[[60, "Alternate_Wr_Rd"]], │ └─────> mem_test_type └───────────────> duration "output_file": "memory_output_file" } }, { "type": "memory_hbm", "parameters": { "test_sequence":[[1, "Only_Wr"], [60, "Only_Rd"]], "output_file": "memory_output_file" } }
The following table shows all members available for this testcase. More details are provided for each member in the subsequent sections.
Some Alveo cards have multiple 16 GB of DDR and some variants have HBM. This information is defined in the Platform Definition file. The HBM stack can be split into pseudo channels (PCs) (see AXI High Bandwidth Controller LogiCORE IP Product Guide (PG276)).
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Table 9: Memory Test Case Members
Mandatory/ Member Sub-Member Description Optional
type – mandatory Testcase type definition: Must be memory_hbm or memory_ddr. parameters – mandatory Test case parameter definition. – test_source optional Select where the test_sequence originates. – test_sequence mandatory Describes the sequence of tests to perform. – check_bw optional Enable the check of the bandwidths. Enabled by default. – output_file optional Relative path to the files used to store all memory measurements. – verbosity optional controls the verbosity level of the entire test case. – hi_thresh_alt_wr optional Overwrite high threshold of write/read bandwidth hi_thresh_alt_rd (MB/s). hi_thresh_only_wr hi_thresh_only_rd – lo_thresh_alt_wr optional Overwrite low threshold of the write/read bandwidth lo_thresh_alt_rd (MB/s). lo_thresh_only_wr lo_thresh_only_rd – error_insertion optional Enable preliminary error insertion test. Disabled by default.
test_source Optional. When not specified, it uses the default value.
• Possible values: "json" (default), "file". Select where the test_sequence originates:
○ When "json" is used, each element of the test_sequence list, defined in the Test JSON file represents one test.
○ When "file" is used, the content of the files provided in the test_sequence will be used.
Note: Multiple files can be listed and will be read sequentially.
test_sequence Mandatory. Describes the sequence of tests to perform. Tests are performed serially and a failure in one test does not stop the sequence (the next test will be launched).
json mode:
In this mode, the Test JSON file contains the test to be performed. This field contains a list of grouped values.
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This is a list of values, each separated by a comma: [ [] , [] , [] ]
The values are interpreted as: [duration, mem_test_type]
During the Verify test case, the application software automatically detects the number of ports connected to the HBM by checking the test_sequence value based on the hardware (For all xclbin and the Platform Definition file).
Note: mem_test_type, the full range of the memory is written and/or read, meaning that, if required, a test duration can be extended.
• duration: The test duration in seconds: Range [1, 232-1] • mem_test_type
○ "Alternate_Wr_Rd": The memory range is fully written then fully read. These operations are repeated until the duration is reached.
○ "Only_Wr": The memory range is fully written. This cycle is repeated until the duration is reached.
○ "Only_Rd": The memory range is fully read. This cycle is repeated until the duration is reached.
Example
• Single test:
○ [[60,"Alternate_Wr_Rd"]]
○ [[60,"Only_Wr"]]
○ [[60,"Only_Rd"]] • Multiple test:
○ [[60, "Alternate_Wr_Rd"], [60,"Only_Wr"], [60,"Only_Rd"]]
○ [[1,"Only_Wr"], [60,"Only_Rd"]]
○ [[1,"Alternate_Wr_Rd"], [60,"Only_Rd"]]
There is no limit to the length of the test_sequence.
file mode:
In this mode, there is no limit to the number of files you can use. All files must be listed as in json mode, as a list of a list.
For example:
• Single file: [ ["../test_cfg/single_file_example.txt"] ]
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• Multiple test: [["../test_cfg/test_file_1.txt"] , ["../test_cfg/ test_file_2.txt"] ]
The content of each file must be csv-like, with one test configuration per line. Similar to the json mode, the number must be in decimal format and positive.
Following is an example ../test_cfg/test_file_1.txt syntax:
60,"Alternate_Wr_Rd"
60,"Only_Wr"
60,"Only_Rd"
Note: No comments are allowed in the Test JSON file, nor in the CSV file.
check_bw Optional: By default, all bandwidth values (read or write) are checked against pass/failed criteria. By setting this member to false, not all bandwidth values will be compared.
Default bandwidth limit is defined by the Platform Definition file but can be overwritten by the user (see the following). The default values are displayed at the beginning of each test.
hi_thresh_alt_wr, hi_thresh_alt_rd, hi_thresh_only_wr, hi_thresh_only_rd Optional: Overwrite high threshold of the write/read bandwidth (MB/s) specified in the Platform Definition file.
Range: [1, 232-1]
hi_thresh_alt_wr is the write threshold when mem_test_type is "Alternate_Wr_Rd"
hi_thresh_alt_rd is the read threshold when mem_test_type is "Alternate_Wr_Rd"
hi_thresh_only_wr is the write threshold when mem_test_type is "Only_Wr"
hi_thresh_only_rd is the read threshold when mem_test_type is "Only_Rd"
After all bandwidth measurements made during the test duration are complete, if the maximum bandwidth is greater than this threshold, the test fails (with message ID MEM_028).
lo_thresh_alt_wr, lo_thresh_alt_rd, lo_thresh_only_wr, lo_thresh_only_rd Optional: Overwrite low threshold of the write/read bandwidth (MB/s) specified in the Platform Definition file.
Range: [1, 232-1]
lo_thresh_alt_wr is the write threshold when mem_test_type is "Alternate_Wr_Rd"
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lo_thresh_alt_rd is the read threshold when mem_test_type is "Alternate_Wr_Rd"
lo_thresh_only_wr is the write threshold when mem_test_type is "Only_Wr"
lo_thresh_only_rd is the read threshold when mem_test_type is "Only_Rd"
After all bandwidth measurements made during the test duration are complete, if the maximum bandwidth is lower than this threshold, the test fails (with message ID MEM_028).
verbosity Optional. This controls the verbosity level of the entire test case. This overwrites the Test Environment Members verbosity.
• Possible values: 0 to 6 • Default value: verbosity defined in Test Environment Members. See Verbosity Level for descriptions of all possible values.
This controls the verbosity level of the entire test case and overwrites the Test Environment Members verbosity.
output_file Optional. Absolute or Relative path to the files used to store all memory measurements.
IMPORTANT! If the "-l" command line option is used while calling the application software, output_file must be the name of a file.
By convention, the CSV file extension is appended by the software to the value given by the output_file member, and therefore is not specified in the Test JSON file.
The values are stored in CSV type format with one column for each information type.
IMPORTANT! Different CSV files are used to store all DDR and HBM memory test results. These are stored with different files extensions. For example, extension _ddr_0 is used for DDR[0] and _hbm_2_3 is used for HBM[2:3]. This means that the same output_file name can be used for the HBM and DDR test case.
For each memory, two files are written with _detail.csv and _result.csv extensions.
• The _details.csv contains all intermediate bandwidths computed every second, based on information retrieved form the Memory compute unit. There is one line of result for every second of each test of the test_sequence. For readability, there are columns for live and average value for each mem_test_type.
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Table 10: _details.csv for 3 Different mem_test_type (2s Duration for Each Test)
Alt Wr Alt Wr Alt Rd Bw Only Wr Only Wr Only Rd Only Rd test Alt Rd Bw Bw Bw live live Bw Bw live Bw Bw live
1 4477 4477 12253 12253 1 8139 11378 8192 4599 2 15524 15524 2 15525 15526 3 17219 17219 3 17220 17221
• Test: Test index within the test_sequence • Alt Wr Bw: Current average write BW (MB/s) for Alternate_Wr_Rd tests • Alt Wr Bw live: Current live write BW (MB/s) for Alternate_Wr_Rd tests • Alt Rd Bw: Current average read BW (MB/s) for Alternate_Wr_Rd tests • Alt Rd Bw live: Current live read BW (MB/s) for Alternate_Wr_Rd tests • Only Wr Bw: Current average write BW (MB/s) for Only_Wr tests • Only Wr Bw live: Current live write BW (MB/s) for Only_Wr tests • Only Rd Bw: Current average read BW (MB/s) for Only_Rd tests • Only Rd Bw live: Current live read BW (MB/s) for Only_Rd tests Note: The live values are for internal use only of the application software. • The _results.csv contains only the final BW computed for each test of the test_sequence.
Table 11: _results.csv for 3 Different mem_test_type (2s Duration for Each Test)
Only Alt Wr Alt Rd Only Test Mode Wr Bw Bw Rd Bw Bw Duration rd_num_xfer wr_num_xfer rd_burst_size rd_start_addr wr_burst_size wr_start_addr
1 Alterna 2 0 64 268435 0 64 268435 8139 8192 te_Wr_ 456 456 Rd 2 Only_ 2 0 64 268435 0 64 268435 15525 Wr 456 456 3 Only_R 2 0 64 268435 0 64 268435 17220 d 456 456
• Test: Test Index • Mode: Test mode
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• Duration: Duration of the test • wr_start_addr: Starting address for the write transfer. • wr_burst_size: Write burst size: AXI 4 beat size • wr_num_xfer: Write transfer size: Quantity of AXI transfers to write the entire memory; based on the AXI4 beat size and the memory definition (see Platform Definition) • rd_start_addr: Starting address for the read transfer • rd_burst_size: Read burst size: AXI4 4 beat size • rd_num_xfer: Read transfer size: Quantity of AXI transfers to read the entire memory; based on the AXI4 beat size and the memory definition (see Platform Definition) • Alt Wr Bw: Average write BW (MB/s) for Alternate_Wr_Rd tests • Alt Rd Bw: Average read BW (MB/s) for Alternate_Wr_Rd tests • Only Wr Bw: Average write BW (MB/s) for Only_Wr tests • Only Rd Bw: Average read BW (MB/s) for Only_Rd tests
Related Information Memory Test Case Verbosity Level
Power Test Case Members
The following is an example of a Power test case running for 60 seconds at a toggle rate of 15%.
{ "type": "power", "parameters": { "test_sequence_mode": "config_duration_toggle", "test_sequence":[[60,15]], │ └─> percent └────> duration "output_file": "power_output_file" } }
The following table shows all members available for this test case. More details are provided for each member in the subsequent sections.
Table 12: Power Test Case Members
Mandatory/ Member Sub-Member Description Optional
type – mandatory Test case type definition; must be power.
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Table 12: Power Test Case Members (cont'd)
Mandatory/ Member Sub-Member Description Optional
parameters – mandatory Test case parameter definition – test_source optional Select where the test_sequence originates. – test_sequence mandatory Describes the sequence of tests to perform. A test is defined by the following values: • Duration: In seconds • Target: Toggle rate – test_sequence_mode mandatory Define the Power CU mode. The only supported setting is config_duration_toggle. – output_file optional Relative path to the files used to store all DMA measurements. – verbosity optional Controls the verbosity level of the entire test case.
test_source Optional. When not specified, it uses the default value:
• Possible values: "json" (default), "file" • Select where the test_sequence originates:
○ When "json" is used, the test_sequence (see the following section) present in the Test JSON file will be interpreted according to the test_sequence_mode specified with each element of the list is representing one test.
○ When "file" is used, the content of the files provided in the test_sequence will be used. Note: Multiple files can be listed and will be read one after the other.
test_sequence_mode Mandatory. Must be specified.
Possible values: "config_duration_toggle".
The following describes how to interpret the value provided in the test_sequence.
• config_duration_toggle: A pair of values respectively corresponding to: 32 ○ Time in seconds: Range [1, 2 –1]
○ Toggle rate in %; range [0–100]
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test_sequence Mandatory. Describes the test to perform. Tests are performed serially and an error in one test does not stop the sequence (the next test will be launched). The test sequence interpretation depends on the test_sequence mode (json or file mode, set by test_source).
json mode:
In this mode, the Test JSON file contains the test to perform. This field contains a list of tests, each test being defined by a list of parameters: [ [], [], [] ]
The values are interpreted as: [duration, target]
• duration: The duration of the test in seconds; range [1,232-1] • target: Toggle rate; range [0, 100]
For example:
• Single test: [ [40,75] ] • Multiple test: [ [40,15], [240,30], [120, 40], [20,50] ]
There is no limitation to the length of the test_sequence.
file mode:
In this mode, there is no limit to the number of files you can use. All files must be listed as in json mode, a list of a list. For example:
• Single file: [ ["../test_cfg/single_file_example.txt"] ] • Multiple test: [["../test_cfg/test_file_1.txt"] , ["../test_cfg/ test_file_2.txt"] ]
The content of each file must be csv-like with one test configuration per line. Similar to json mode, the number must be in decimal format and positive.
For example, ../test_cfg/test_file_1.txt syntax:
40, 15 240, 30 120, 40 20, 50
Note: No comments are allowed.
output_file Optional. Absolute or relative path to a file used to store all power measurements.
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IMPORTANT! If the -l command line option is used while calling the application software, output_file must be the name of a file.
By convention, the CSV file extension is appended by the software to the value given by the output_file member, and therefore is not specified in the Test JSON file.
The values are store in CSV type format with one column per type of information. All measurements from all test_sequence are combined into a single file.
At a minimum, the following values are recorded:
• FPGA temperature • Fan RPM: For passive cards, the column contains 0 • Raw power: Value measured • Toggle rate
The CSV file also contains:
• Filtered power, target power, error, error filtered. These columns are reserved and must be ignored. • The detailed measurements for each power rail. The power rails (voltage and current) to monitor are defined in the Platform Definition. The Platform Definition file also contains their respective names, which are similar to those found when using the XRT command xbutil query. For more information, refer to the Alveo Card Installation Guides. If the names are not defined, a generic naming convention is used, for example, voltage[0], current[0], power[0]. Because the Platform Definition is displayed at the beginning of the test (as information with the tag XBT_PFM_DEF), the link between the index [0] and the actual power rail can be done manually.
verbosity Optional. Controls the verbosity level of the entire test case. This overwrites the Test Environment Members verbosity.
• Possible values: 0 to 6 • Default value: verbosity defined in Test Environment Members. See Verbosity Level for descriptions of all possible values.
Related Information Verbosity Level Platform Definition JSON File Power Test Case
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GT MAC Test Case Members
Following are examples of GT MAC test cases:
GSFP: Electrical/Optical Loopback
Note: The default TX/RX lane mapping is used with QSFP.
{ "type": "gt_mac", "parameters": { "test_sequence" :[[1,"conf"],[1,"clr_stat"],[30,"run"], [1,"status"]], "line_rate": "25gbe", "match_tx_rx": true, "utilisation": 100, "output_file": "gt_mac_out" } }
SFP-DD: Electric Cross-Connect with Molex 4 Pair 30AWG, 1m, P/N 2049621101
Note: The TX/RX lane mapping must be defined.
{ "type": "gt_mac", "parameters": { "test_sequence" :[[1,"conf"],[1,"clr_stat"],[30,"run"], [1,"status"]], "line_rate" : "25gbe", "match_tx_rx" : true, "tx_mapping_0": 2, "tx_mapping_1": 3, "tx_mapping_2": 0, "tx_mapping_3": 1, "output_file": "gt_mac_out" } }
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SFP Electric/Optic Loopback
Note: Two of the four lanes are disabled.
{ "type": "gt_mac", "parameters": { "test_sequence" :[[1,"conf"],[1,"clr_stat"],[30,"run"], [1,"status"]], "match_tx_rx": true, "line_rate" : "10gbe", "active_mac_1": false, "active_mac_3": false, "output_file": "gt_mac_out" } }
The following table shows all members available for this test case. More details are provided for each member in the subsequent sections.
Table 13: GT MAC Test Case Members
Mandatory/ Member Sub-Member Description Optional
type – mandatory Test case type definition; must be gt_mac.
parameters – mandatory Test case parameter definition. – test_source optional Select where the test_sequence originates. – test_sequence mandatory Describes the sequence of tests to perform. A test is defined by the following values: • Duration in seconds • Command – active_mac optional Enable/disable packet generator for all lines. – active_mac_n optional Selectively enable/disable packet generator for each line. n = [0,3]
– line_rate optional Set line rate: 10 or 25 GbE. – utilization optional Transmit utilization [0, 100]. – set_test_pat optional Enable test pattern IEEE 802.3 clause 45. – fec_mode optional Select the Line FEC mode to be used for both transmitter and receiver. – traffic_type optional Define the content of the payload area of the packets. – packet_cfg optional Define the packet length. – match_tx_rx optional Enable RX and TX packet count match when loopback is present. – tx_mapping_n optional Specify the TX line number which will be checked against RX n = [0,3] status.
– gt_tx_diffctrl optional Configure the GTY Transceiver TXDIFFCTRL input to all transmitters. See UltraScale Architecture GTY Transceivers User Guide (UG578) for details.
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Table 13: GT MAC Test Case Members (cont'd)
Mandatory/ Member Sub-Member Description Optional
– gt_tx_pre_emph optional Configure the GTY Transceiver TXPRECURSOR input to all transmitters. See UltraScale Architecture GTY Transceivers User Guide (UG578) for details. – gt_tx_post_emph optional Configure the GTY Transceiver TXPOSTCURSOR input to all transmitters. See UltraScale Architecture GTY Transceivers User Guide (UG578) for details. – gt_rx_use_lpm optional Configure the GTY Transceiver RXLPMEN input to all transmitters. See UltraScale Architecture GTY Transceivers User Guide (UG578) for details.
test_source Optional. When not specified, it uses the default value.
• Possible value: "json" (default), "file". Select where the test_sequence originates:
○ When "json" is used, each element of the test_sequence list, defined in the Test JSON file represents one test.
○ When "file" is used, the content of the files provided in the test_sequence will be used.
test_sequence Mandatory. Describes the sequence of tests to perform. Tests are performed serially, and a failure in one test does not stop the sequence (the next test will be launched).
JSON mode
In this mode, the Test JSON file contains the test to be performed. This field contains a list of grouped values.
This is a list of values, each separated by a comma: [ [] , [] , [] ]
The values are interpreted as: [duration, command]
• duration: The duration of the test in seconds: range [1, 232–1]. • command (see the following table).
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Table 14: test_sequence Commands
Command Description
conf [optional] conf applies the settings specified in the configuration parameters to the MAC hardware. Part of the configuration process is to issue a reset to the MAC hardware, so the conf operation will always result in the Ethernet link dropping and restarting, even if the configuration is identical to the previous test. clr_stat [optional] clr_stat is provided to read and clear the MAC status registers, but ignore the values returned in the counters. It is intended to be used after a conf operation to clear the status errors caused by the link dropping and restarting. run [optional] run enables the packet generator Any test sequence entry without a run will disable the packet generator. If the final test sequence entry contains a run then packet generation will continue after execution of xbtest has terminated
status [optional] status reads the MAC status registers, and for any MAC instances that have active_mac = true it checks for any counter values that indicate an error has occurred, or the received number of packets indicates a fault on the link. If an error is detected the overall test will be flagged as a fail.
An example of a test_sequence is as follows:
"test_sequence" :[ [2,"conf"] , [10,"clr_stat"] , [60, "run"], [1,"stat"] ]
This will:
• Apply the configuration to the MACs, reset them, and wait for two seconds. • Clear the status registers and wait for 10 seconds. • Start the packet generators for any active MACs, and wait for 60 seconds. • Read the Status registers and check the results, then clear the status registers, stop the packet generator and wait for one second before exiting.
file mode
In this mode, there is no limit to the number of files you can use. All files must be listed as in JSON mode, as a list of a list.
The following example shows the format of the file content:
• 2,"conf" • 10,"clr_stat" • 60,"run"
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• 1,"stat"
active_mac
Optional. Possible values: true or false; default: true
This configuration is applied to all lines of the GT MAC compute unit (CU).
When true the packet generator of all MAC instances will be enabled, and receiver statistics will be gathered and used to determine the overall pass/fail result of the test.
When false no packets are generated by any MAC instance, and all receiver statistics are ignored.
active_mac_n
Optional. Possible values: true or false; default: true
This configuration can be applied individually to one or more of the four lines connected to the individual transceivers.
When true the packet generator of the selected line will be enabled, and receiver statistics will be gathered and used to determine the overall pass/fail result of the test.
When false no packets are generated by the selected line, and receiver statistics from that instance are ignored.
line_rate
Optional. Possible values: 10gbe or 25gbe; default: 10gbe.
This configuration is applied to all lines of the GT MAC CU.
The line rate for all MAC cores can be selected as either 10gbe (10.3125 Gb/s) or 25gbe (25.78125 Gb/s).
utilization
Optional. Possible values: from 0 to 100; default: 50.
This configuration is applied to all lines of the GT MAC CU.
This sets the transmit utilization of the link in the range 0 to 100 (percent). The parameter is used to set the approximate link utilization for the packet generator, by adjusting the delay between packets.
Setting the utilization to 100 causes packets to be generated at the maximum achievable rate.
Setting the utilization to 0 disables the packet generator completely.
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set_test_pat
Optional. Possible values: true or false; default: false
This configuration is applied to all lines of the GT MAC CU.
This causes the MAC to generate the test pattern specified in IEEE 802.3 Clause 45 MDIO bit 3.42.3.
Note: If a loopback cable is used to pass this test pattern to the receiver, it will not report any count values.
fec_mode
Optional. Possible values: none, clause_74 or rs_fec; default: none.
This configuration is applied to all lines of the GT MAC CU.
This parameter selects the Line FEC mode to be used for both transmitter and receiver
• none: Disables both FEC options, and uses 66-b words with 2-bit sync headers. • clause_74: Enables the Forward Error Correction mode specified in IEEE 802.3 Clause 74. It can be used for both 10 GbE and 25 GbE line rates. • rs_fec: Enables the Forward Error Correction mode specified in IEEE 802.3by Clause 91. It can only be used in 25 GbE mode. If selected in 10 GbE mode, it will be ignored, and the link will operate in 66b mode (equivalent to none).
traffic_type
Optional. Possible values: 0x00, 0xff, count or pattern; default: count.
This configuration is applied to all lines of the GT MAC CU.
The test packets produced by the traffic generator consist of a statically configured Destination Address (48 bits), Source Address (48 bits) and Ethertype (16 bits) followed by a payload area and a CRC (32 bits).
The content of the payload area is controlled by this parameter.
If set to 0x00 the whole payload area will be filled with bytes of value 0x00.
If set to count the payload area will be filled with a byte count sequence. The byte following Ethertype will be 0x00, the next 0x01, with each successive byte incrementing to 0xFF, and rolling over to 0x00 and repeating to the end of the payload area.
If set to pattern, the payload area will be filled with the pattern (0x00, 0x55, 0xAA, 0xFF) repeating for the number of bytes in the payload area.
If set to 0xFF the whole payload area will be filled with bytes of value 0xFF.
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packet_cfg
Optional. Possible values: sweep or value from 64 to 1518 or 9500 to 10000; default: sweep.
This configuration is applied to all lines of the GT MAC CU.
This parameter sets the packet length to be generated, or specifies that all packets in the range 64 to 1518 bytes are to be generated in sequence.
If a single numeric value is used, and this is in the range 64 to 1518 or 9500 to 10000 is supplied, then all generated packets shall be this size.
If the value sweep is specified, then a sequence of 1455 packets will be generated continuously with sizes between 64 and 1518 bytes.
Note: Note that the receive MTU is adjusted to match the configured transmit packet size:
• If the transmit size is less than or equal to 1518, then the receive MTU is set to 1518. • If the transmit size is greater than 1518 but less than or equal to 9600, then the receive MTU is set to 9600. • If the transmit size is greater than 9600 then the receive MTU is set to 10000.
match_tx_rx
Optional. Possible values: true or false; default: false
Specifies if RX is checked against TX.
This configuration is applied to all lines of the GT MAC CU.
If the transmit and receive interfaces of each active MAC instance are connected via a loopback cable, then the transmitted packet and byte count are expected to exactly match the equivalent received good packet and byte counters. Setting this parameter to true enables this comparison to be made, and included in the overall pass/fail assessment of the link.
When set to false the comparison of TX and RX counters is not included in the overall pass/fail assessment of the link.
tx_mapping_n
Optional. Possible values: 0 to 3; default: n
Specifies the line number of the nth TX which will be checked against RX status.
gt_tx_diffctrl
Optional. Possible values: from 0 to 31; default: 11.
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This configuration is applied to all lines of the GT MAC CU.
This parameter sets the TXDIFFCTRL input to all transmitters.
Further details can be found in Chapter 3 of UltraScale Architecture GTY Transceivers User Guide (UG578).
gt_tx_pre_emph
Optional. Possible values: from 0 to 31; default: 0.
This configuration is applied to all lines of the GT MAC CU.
This parameter sets the TXPRECURSOR input to all transmitters.
Further details can be found in Chapter 3 of UltraScale Architecture GTY Transceivers User Guide (UG578).
gt_tx_post_emph
Optional. Possible values: from 0 to 31; default: 0
This configuration is applied to all lines of the GT MAC CU.
This parameter sets the TXPOSTCURSOR input to all transmitters.
Further details can be found in Chapter 3 of UltraScale Architecture GTY Transceivers User Guide (UG578).
gt_rx_use_lpm
Optional. Possible values: false or true; default false.
This configuration is applied to all lines of the GT MAC CU.
When FALSE this parameter causes the GTY transceiver to use the DFE receive equalizer. When TRUE it causes the GTY transceiver to use the LPM Receive equalizer.
Further details can be found in Chapter 4 of UltraScale Architecture GTY Transceivers User Guide (UG578).
output_file Optional. Absolute or Relative path to a file used to store all GT measurements.
IMPORTANT! If the -l command line option is used while calling the application software, output_file must strictly be the name of a file.
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By convention, the CSV file extension is appended by the software to the value given by the output_file member. It is therefore is not specified in the Test JSON file.
The values are store in CSV type format with one column per type of information. All measurements from all test_sequence values are combined into a single file.
For each GT MAC CU, one file is generated per line with the suffix/extension _gt
• gt_cu_index being the index of the GT MAC CU • line_index being the index of the line
Each line of the CSV file contains:
• Overall result: set to FAIL as soon as one test fails, otherwise set to PASS. • Overall result: set to FAIL if the current test fails, otherwise set to PASS. • Values of all status registers (see MAC_STAT Status Description).
verbosity Possible values: 0 to 6.
Default value: verbosity defined in Test Environment Members. See Verbosity Level for descriptions of all possible values.
Related Information Verbosity Level MAC_STAT Status Description
Verbosity Level
If the verbosity is defined to a level, all messages with equal or higher level will be displayed.
Table 15: Verbosity Level
Level Message Type Description
Message showing intermediate progress of a test; for example, 0 (default) STATUS measurements. General information about the progress of a test; for example, the start 1 INFO of a particular step of the test sequence. Message that does not alter the progress of the test. User action might 2 WARNING be taken or might be reserved. Message that does alter the progress or the results of the test. User 3 CRITICAL WARNING action is strongly recommended. 4 PASS Message returned in the case of successful check.
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Table 15: Verbosity Level (cont'd)
Level Message Type Description
Message returned in the case of failed check. This does not interrupt any 5 ERROR test cases or tests. The only message level which aborts all test cases/tests. For example, in cases of:
• SW/HW incompatibility 6 FAILURE • Test JSON file typo or wrong settings/members
• Critical FPGA temperature • User interruption: CTRL+C
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Chapter 6
Platform Definition JSON File
xbtest uses a Platform definition JSON file, which is part of the installed package (see Installation section). The file specifies the characteristics and the limits of xbtest (for example, quantity and size of DDR/HBM) and is specific to each deployment platform. The content and structure of the Platform Definition JSON file is beyond the scope of this document.
The definitions drive the limits and the pass/fail criteria of xbtest for:
• Minimum and maximum DMA bandwidth. • Minimum and maximum Memory bandwidth.
Based on the physical characteristics of the Alveo card present in the platform definition JSON file, the Test JSON file defined by the user is verified. For example, no DDR test can be run if there is no DDR defined for the platform under test.
TIP: The platform definition parameters are displayed at the beginning of each test (as information with the tag "XBT_PFM_DEF").
Related Information Installation
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Appendix A
Messages
This document lists all messages output by xbtest. It also provides more information about them and, when applicable, a possible resolution. For each message, you will find the following information:
1. ID: unique identifier of the message. The ID is composed of: • One string: 3-letter code which identifies the type of the message:
○ GEN: (general) message not specific to any test case
○ ITF: (interface) message related to device interface (for example OpenCL) and Test JSON file
○ JPR: JSON file parser
○ MGT: (management) control and safety features
○ CMN: (common) used by different test cases
○ DMA: DMA test case specific
○ VER: Verify test case specific
○ MEM: Memory test case specific
○ PWR: Power test case specific
○ GTM: GT MAC test case specific
• One number: per type, this is a unique 3-digit number identifying the message. The ID is formed as follows: string_number, for example: "GEN_022" 2. Content: the message itself is print out by xbtest. Some parts of the content might be described in this document using
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The following tables list all xbtest messages sorted by ID, with a severity level of STATUS, WARNING, CRIT_WARN, PASS, ERROR or FAILURE.
Common Test Case Messages
Table 16: Common Test Case Messages
ID Severity Content Details Resolution
CMN_001 FAILURE Invalid value (. CMN_002 FAILURE Wrong value for JSON member A wrong value has been Check the verbosity value verbosity. provided for the verbosity in the provided is in the range [0,6] test JSON file. CMN_004 STATUS Pre-Setup and test/task The test (or task) is entering its configuration. pre-setup phase which includes, at least, the verification of its configuration and settings. CMN_005 STATUS Post Teardown The test or the task is entering its post teardown phase CMN_008 STATUS Launch Test or Task Launch test/task confirmation CMN_009 FAILURE Test or Task aborted Test or Task has aborted due to Check error and failure a previous failure messages available CMN_010 ERROR Test or Task finished with Test or Task has completed but Check error messages available error(s). error(s) have been detected CMN_011 PASS Test or Task finished successfully Test or Task has completed without encountering any error or failure CMN_014 FAILURE The value (
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Table 16: Common Test Case Messages (cont'd)
ID Severity Content Details Resolution
CMN_017 FAILURE Low and high threshold mistake. The thresholds definition of the Provide a low threshold below The value of low threshold
CMN_031 ERROR Watchdog alarm detected
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Table 16: Common Test Case Messages (cont'd)
ID Severity Content Details Resolution
CMN_035 WARNING The default value of parameter This emphasizes the fact that the Check if the overwrite was
DMA Test Case Messages
Table 17: DMA Test Case Messages
ID Severity Content Details Resolution
DMA_002 FAILURE Parameter
DMA_009 ERROR
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Table 17: DMA Test Case Messages (cont'd)
ID Severity Content Details Resolution
DMA_010 STATUS
General Messages
Table 18: General Messages
ID Severity Content Details Resolution
GEN_001 FAILURE Command line option -
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Table 18: General Messages (cont'd)
ID Severity Content Details Resolution
GEN_008 FAILURE Required command line option A required option has not been Check the options in the not found -
GEN_011 FAILURE Test type
GEN_012 FAILURE User abort received An interruption has been Check if the SIGINT signal has received by the host application. been sent to the host application (for example, CTRL+C has been issued). GEN_014 FAILURE Invalid value
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Table 18: General Messages (cont'd)
ID Severity Content Details Resolution
GEN_029 FAILURE Could not find an xclbin This message is displayed when Check the correct HW package is compatible with target device at the SW could not find any installed device index
GT MAC Test Case Messages
Table 19: GT MAC Test Case Messages
ID Severity Content Details Resolution
GTM_003 STATUS
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Table 19: GT MAC Test Case Messages (cont'd)
ID Severity Content Details Resolution
GTM_013 ERROR Test failed for some lanes Global message indicating that Check the preceding error the HW status registers of GT message printed before this MAC compute unit are invalid for error some lanes
Interfaces Messages
Table 20: Interfaces Messages
ID Severity Content Details Resolution
ITF_002 FAILURE Parameter
ITF_006 FAILURE No device found at provided No board has been detected at Check the output of the xbutil index:
ITF_011 FAILURE Failed to execute xbutil dump The host application was not Check the output of the xbutil able to run the xbutil dump dump command command ITF_012 FAILURE No memory found in memory The host application was not Check the output of the xbutil topology able to extract any memory dump command information in the memory topology from the output of the xbutil dump command
ITF_013 FAILURE Failed to convert
ITF_014 FAILURE No compute unit found in xclbin The host application was not Check the output of the xbutil able to extract any CU dump command information from the output of the xbutil dump command
ITF_017 ERROR xclbin download time greater Although the xclbin has been As the xclbin is not re-loaded than expected:
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Table 20: Interfaces Messages (cont'd)
ID Severity Content Details Resolution
ITF_018 PASS xclbin download time within The duration of the xclbin tolerance:
ITF_025 WARNING Unable to get compute unit info The host application has Check the xclbin used
ITF_032 FAILURE Failed to get xclbin connectivity The host application was not Check connectivity section in the able to get the compute unit output of the command: necessary running the command xclbinutil -i --dump-section CONNECTIVITY:JSON:
ITF_033 FAILURE Compute unit
ITF_034 FAILURE Connection of AXI master
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Table 20: Interfaces Messages (cont'd)
ID Severity Content Details Resolution
ITF_035 FAILURE Memory not found in memory The host application was not Check the output of the topology while allocating able to create the OpenCL buffer command: xbutil query
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Table 20: Interfaces Messages (cont'd)
ID Severity Content Details Resolution
ITF_066 FAILURE
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Table 20: Interfaces Messages (cont'd)
ID Severity Content Details Resolution
ITF_076 FAILURE Wrong value in test parameter A wrong value has been Check the test parameter value
ITF_082 WARNING xbtest log file (
JSON Parser Messages
Table 21: JSON Parser Messages
ID Severity Content Details Resolution
JPR_001 FAILURE JSONReader error:
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Table 21: JSON Parser Messages (cont'd)
ID Severity Content Details Resolution
JPR_011 FAILURE Invalid node name
Memory Test Case Messages
Table 22: Memory Test Case Messages
ID Severity Content Details Resolution
MEM_001 FAILURE Cannot run Memory Test for Only HBM or DDR can be tested Do not test anything else than type
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Table 22: Memory Test Case Messages (cont'd)
ID Severity Content Details Resolution
MEM_014 ERROR Failed to clear error status After the error insertion test, the Isolate the test condition and register of compute unit application failed to clear the contact Xilinx support (optional
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Table 22: Memory Test Case Messages (cont'd)
ID Severity Content Details Resolution
MEM_030 FAILURE Failed to compute error insertion The host application is Check BW threshold in platform test duration as
Management Messages
Table 23: Management Messages
ID Severity Content Details Resolution
MGT_003 CRIT_WARN Timing misalignment: 333 ms The SW 333 ms tick timer is not Check if your OS or processors timed out (350 ms) generated at the correct rate are not overloaded MGT_004 CRIT_WARN Timing misalignment: 1s timed The SW 1s tick timer is not Check if your OS or processors out (1.1 s) generated at the correct rate are not overloaded MGT_005 ERROR
Power Test Case Messages
Table 24: Power Test Case Messages
ID Severity Content Details Resolution
PWR_001 WARNING All
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Table 24: Power Test Case Messages (cont'd)
ID Severity Content Details Resolution
PWR_002 CRIT_WARN Target power reach time The time it takes xbtest to Check xbtest documentation verification is enabled reach the target power is for how to enable/disable this monitored. By default, there is check no verification of the speed the target power is reached. This message is displayed when the comparison with a maximum time has been enabled PWR_007 WARNING Fan control files are going to be Using fan control files if the user Check xbtest documentation used can determine the fan speed of for how to enable/disable this the host feature PWR_010 WARNING Power error filter alpha:
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Table 24: Power Test Case Messages (cont'd)
ID Severity Content Details Resolution
PWR_049 ERROR Target power (
Verify Test Case Messages
Table 25: Verify Test Case Messages
ID Severity Content Details Resolution
VER_001 PASS HW & SW major versions of The HW and SW version of a test compute unit
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Table 25: Verify Test Case Messages (cont'd)
ID Severity Content Details Resolution
VER_002 ERROR HW & SW major versions of The HW and SW version of a test Check versions of host compute unit
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Appendix B
Additional Resources and Legal Notices
Xilinx Resources For support resources such as Answers, Documentation, Downloads, and Forums, see Xilinx Support.
Documentation Navigator and Design Hubs Xilinx® Documentation Navigator (DocNav) provides access to Xilinx documents, videos, and support resources, which you can filter and search to find information. To open DocNav:
• From the Vivado® IDE, select Help → Documentation and Tutorials. • On Windows, select Start → All Programs → Xilinx Design Tools → DocNav. • At the Linux command prompt, enter docnav.
Xilinx Design Hubs provide links to documentation organized by design tasks and other topics, which you can use to learn key concepts and address frequently asked questions. To access the Design Hubs:
• In DocNav, click the Design Hubs View tab. • On the Xilinx website, see the Design Hubs page.
Note: For more information on DocNav, see the Documentation Navigator page on the Xilinx website.
References These documents provide supplemental material useful with this guide:
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1. Alveo Card Installation Guides: • For the Alveo U50 card: Alveo U50 Data Center Accelerator Card Installation Guide (UG1370) • For the Alveo U200, U250, and U280 cards: Getting Started with Alveo Data Center Accelerator Cards (UG1301) 2. 10G/25G High Speed Ethernet Subsystem Product Guide (PG210) 3. UltraScale Architecture GTY Transceivers User Guide (UG578) 4. AXI High Bandwidth Controller LogiCORE IP Product Guide (PG276)
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