DOCUMENT RESUME CE 034 295 Electronic Computer Systems

DOCUMENT RESUME

ED 222 761 CE 034 295

TITLE Electronic Computer Systems Repairman, 7-4. Military Curriculum Materials for Vocational and Technical Education. INSTITUTION Air Force Training Command, Keesler AFB, Miss.; Ohio State Univ., Caumbus. National Center for Research in Vocational Education. SPONS AGENCY Office of Education (DHEW), Washington, D.C. PUB DATE 78 NOTE 611p. PUB TYPE Guides Classroom Use - Materials (For Learner) (051)

EDRS PRICE MF03/PC25 Plus Postage. DESCRIPTORS *Computers; Electric Circuits; *Electronic Equipment; *Electronic Technicians; *Equipment Maintenance; Military Personnel; Military Training; Number Systems; Postsecondary Education; Secondary Education; *Technical Education; Workbooks IDENTIFIERS *Computer Technicians; Military Curriculum Project

ABSTRACT These military-developed curriculum materials consist of three volumes of self-paced, individualized training manuals for use by those studying to be electronic computer systems technicians. Covered in the individual volumes are the following topics: computer principles (number sytems, computer circuits, computer components, computer units, input-output units, and computer power supples); general maintenance (supervision and training, general maintenance, equipment identification, and testing equipment); and system maintenance (adjustments, alignments, programming, and troubleshooting). Each volume contains a text with charts and diagrams as well as a workbook with objectives, assignments, review exercises and answers, and volume review exercises. (MN)

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TO THE ECAMATIONALRESOURCES ,INFORMATION CENTER (ERIG).:" , MILITARY CURRICULUM MATERIALS

The military-deveipped curriculum materialsin this Course peckage were selected by the National Centerfor Research in Vocational Education Military CUrriculum Projectfor dissemr ination to the six regional Curriculum CoordinationCenters and other instructional materials agencies.The purpose of disseminating these courses was to make curriculummaterials developed by the military more accessible tovocational educators.in the civilian setting.

The course materials were acquired,evaluated by project staff and practitioners in the field, and preparedfor dissemination.Materials which were specific to the nilitary were deleted, copyrightedmaterials were either cmitted or appro- val for their use was obtained.These course packages contain curriculum resource materials utich can be adapted tosupport vocational instruction and curriculum development. Military Curriculum Materials for The National Center Vocational and Mission Statement- Technical Education rtrrSI:"'rtnrn"..',rrrc=::rrr:Tl ......

The National Center for Research in Information and Field Vocational Education's mission is to increase Sr.:TACOSDivision the ability of diverse agencies, institutions, and organizations to solve educational problems relating to individual career planning, preparation, and progression. The National The Hatierni Center for Research Center fulfills its mission by: in Vocational Ethtcation

Generating knowledge through research

Developing educational programs and products

Evaluating individual program needs and outcomes

Installing educational programs and products

Operating information systems and services

Conducting leadership development and training programs

FOR FURTHER INFORMATION ABOUT Military Curriculum Materials WRITE OR CALL Program Information Of lice The National Center for Research in Vocational Education The Ohio State University 1960 Kenny Road, Columbus, Ohlo 43210 Telephone: 614/486.3655 or Toll Free 800/ .; 4 848.4815 within the continental U.S. (except Ohio)

- = Military Curriculum Materials What Materials How Can These Dissemination Is .... Are Available? Materials Be Obtained? *;....1:a a a del:. a.. a:a A. ea ala

an activity to increase the accessibility of One hundred twenty courses on microfiche Contact the Curriculum Coordination Center military-developed curriculum materials to (thirteen in paper form) and descriptions of in your region for information on obtaining vocational and technical educators. each have been provided to the vocational materials (e.g., availability and cost). They Curriculum Coordination Centers and other will respond to your request directly or refer This project, funded by the U.S. Office of instructional materials agencies for dissemi- you to an instructional materials agency Education, includes the identification and nation. closer to you. acquisition of curriculum materials in print form from the Coast Guard, Air Force, Course materialsincludeprogrammed Army, Marine Corps and Navy. instruction, curriculum outlines, instructor CUIMICULUM COORDINIUlDiJ CEIN1rE flS guides, student workbooks and technical Access to military curriculum materials is manuals. EAST CENTRAL NORTHWEST provided through a "Joint Memorandum of Rebecca S. Douglass William Daniels Understanding" between the U.S. Office of The 120 courses represent the following Director Director Education and the Department of Defense. sixteen vocational subject areas: 100 North First Street Building 17 Springfield, IL 62777 Airdustrial Park The acquired materials are reviewed by staff Agriculture Food Service 217/78243759 Olympia, WA 98504 and subject matter specialists, and courses Aviation Health 206/753.0879 deemed applicable to vocational and tech- Building & Heating & Air nical education are selected for dissemination. Construction Conditioning MIDWEST SOUTHEAST Trades Machine Shop Robert Patton James F. Shill, Ph.D. The National Center for Research in Clerical Management & Director Director Vocational Education is the U.S. Office of Occupations Supervision 1515 West Sixth Ave. Mississippi State University Stillwater, OK 74704 Drawer DX Education's designated representative to Communications .4Meteorology & ticquire the materials and conduct the project Drill ling Navigation 405%377.2000 Mississippi State, MS 39762 activities. Electronics Photography 601/325.2510 Engine Mechanics Public Service Project Staff: NORTHEAST WESTERN The number of courses and the subject areas Joseph F. Kelly, Ph.D. Lawrence F. H. Zane,Ph.D. Wesley E. Budke, Ph.D., Director represented will expand as additional mate- Director Director National Center Clearinghouse rials with application to vocational and 225 West State Street 1776 University Ave. Shirley A. Chase, Ph.D. technical education are identified and selected Trenton, NJ 013625 Honolulu, HI 96822 Project Director for dissemination. 609/292.6562 808/948.7834 7 6 Coiresponde`nce Course: 7-4

ELECTRONIC COKPUTER SYSTEMS REPAIRMAN Table of Contents

Volume 1 General Maintenance- Text Material Page 1 General Maintenance- Workbook Page 97 Volume IA Computer Principles- Text Material Page 166 'Computer Principles- Workbook Page 335 Volume 2 System Maintenance -Text Material Page 399 System Maintenance -Workbook Page 505

a Correspondence Course ELECTRONIC COMPUTER SYSTEMS REPAIRMAN 7-4

Developed by: Occupational Arse: Electronics United States Air Force DeweloPieent and Cost: Print Pape: Review Dates: 594 Unknown AvaRabillty: Military Curriculum Project. The Center for Vocational Education, 1960 Kenny Rd., Columbus, OH 43210

Suggested Background:

Knowledge of number systems

Target Audiences:

Grades 10-adult

Organization of Materials:

diagrams; text Student workbooks with obiectives, assignments, reviewexercises and answers, volume review exercises, charts and

Type of Instruction: Individualized, self.paced

Type of Materials: No. of Pages: Average Completion Time: Flexible. Volume IA Computer Principles 163

Workbook 63

82 Flexible Volume 1 Genera/ Maintenance

Workbook 65

102 Flexible Volume 2 System Maintenance

Workbook 83

Supplementary Materials Required:

Technical maintenance manual for any particular system thestudents are studying

CZ 10111InfeleaIriteCilla 11.4.0.1rIteovIorr Expires July 1, 1978 Course Description:

This course is designed to upgrade the Apprentice (semi-skilled) repairperson to the Specialist (skilled) level. There is much basic information 'or persons who have no computer background. The more advanced material is designed for use in conjunction with a laboratory or onthe-job learning situation.

Electronic Computer Systems Repairman contains three volumes with workbooks, texts, exercises, volume reviews, and supplementary charts.

Volume IA Computer Principles is review material designed to present basic knowledge of computer principles and enhance understanding of computer circuits. It covers number systems, computer circuits, computer components, computer units, input-output units and computer power supplies.

Volume 1 General Maintenance Identifies tasks and presents analytical studies which provide in-depth insight into the tasks and relates these :Asks to specific areas of equipment. Each task is broken into subtasks. Because specific subtasks will differ with the computer system, the text refers the students to technical maintansnce manuals for :pacific procedures. The general topics covered by this volume Include supervision and training, general maintenance, equipment identification, and test equipment. The final chapter on equipment modification was deleted because of references to specific military procedures and forms. One section on reference designations for electrical and electronic parts and equipment was also deleted because of copyright considerations.

Volume 2 System Maintenance again includes analysis of the tasks of operational performance such as adjustments, alignments, programming and troubleshooting. During each study, all aspects of or parts of each task are identified and the placement of these parts in their proper perspective is explained. References are mad. to technical maintenance manuals for any particular system the students are using.

This course on electronic computer systems wes designed to provide basic information for persons wishing to upgrade their skills. The materials are individualized with student workbooks and selfevaluation. The more advanced materials should be used ,n ,..onjunction with a laboratory or on the-job situation which allows practice of the principles learned in the theory portion. In addition particular maintenance tasks and schedules will vary according to the systems being used. The course volumes refer to military technical orders which outline the specific tasks and steps in the basic functions of maintenance and repair. Thn maintenance manual of the system being used should be substituted for those references.

00114 le.° SIMI UN% OW 1 Li 1

30554 01 7207 CDC 30554

ELECTRONIC COMPUTER SYSTEMS REPAIRMAN

(AFSCs 30554154A/54B154C/54D)

Volume I

General Maintenance

Extension Course Institute Air University PREPARED BY KEESLER AIR FORCE BASE MISSISSIPPI. AIR TRAINING COMMAND

EXTENSION COURSE INSTITUTE. GUNTER AIR FORCE BASE, ALABAMA

THIS PUBLICATION HAS BEEN REVIEWED AND APPROVED BY COMPETENT PERSONNEL OF THE PREPARING COMMAND IN ACCORDANCE WITH CURRENT DIRECTIVES ON DOCTRINE, POLICY, ESSENTIALITY, PROPRIETY. AND QUALITY. Preface

THIS TWO-VOLUME course,30554,ElectronicComputer Systems Repairman, is prepared to carry on the training begun at the resident training center for those trainees on upgrade training. It also.- provides knowledge about maintenance of electronic computer and data processing tasks for persons not on upgrade training. The approach to training used in this CDC is one of identification ofa task and then presentation of *an analytical study. The study providesan in-depth insight into the task and also relates the task to specificareas of equipment. Each task analyzed is broken into its subtasks. The subtasks, after being explained, are placed in relative importance when applicable. Since tasks are identified in many specific technical orders, technical order references are made under a separate heading in most sections. The definition of subject matter listed in the text as being found ina particular technical order has been taken from Technical Order 00-5-1, AF Technical Order SYstem; however, certain manufacturers of electronic equipment have provided technical orders slightly different in structure from those listed in this text. If you Lid that your technical orders are designated by section and are contained in, for instance, the -2 service manual, you probably will find the logic circuits in Section III or Chapter 3. Generally, however, the logic diagrams are located in th.: -3 circuit diagram manual. For your convenience in studying this volume we have placed in the workbook 23 figures, a chart, and 6 tables to which there is extendedor frequent reference. Also an index to key elements has been included in this volume for quick reference. If you have questions on the accuracy or currency of the subject matter of this text, or recommendations for its improvement, send them to Tech Tng Cen (TTOC), Kees ler AFB, MS 39534. If you have questions on course enrollment or administration, or or, any of ECI's instructional aids (Your Key to Career Development, Study Reference Guides, Chapter Review Exercises, Volume Review Exercise, and Course Examination), consult your education officer, training officer, or NCO, as appropdate. If he can't answer your questions, send them to ECI, Gunter AFB, Alabama 36118, preferably on ECI Form 17, Student Request for Assistance. This volume is valued at 36 hours (12 points). Material in this volume is technically accurate, adequate, and current as of March 1972.

13 3

Acknowledgment

Chapter 3, Section 6, of this volume contains material which Mi.. 'beenextractedfromReference Designations for '11.1satAtate Electrical and Electronic Parts and Equipments (Y32.16 1968), by permission of United States of America Standards Institute, New York, N.Y. 30554 01 SO1 7511

CHANGE SUPPLEMENT CDC 30554

'ELECTRONICCOMPUTER SYSTEMS REPAIRMAN

(AFSCs 30554/54A/54B/54C/54D)

Volume 1

IMPORTANT: Make the corrections indicated in this supplement before beinning study of this volume. This supplement contains both "pen-and-ink" changes and replacement pages. It is perforated and three-hole-punched so that you can tear out the replacement pages and insert them in your volume.

CHANGES FOR THE TEXT: Pen-andink Changes:

Pave Paragraph lane(%) Cwrecuon

6 2-6 2 Change "3ABR30554B-1" to "3ABR30554-3."

6 2-6 11 Change "B 1" to "

57 7-7.1)(5) 6 Change second "A641" to "A841." 64 Fig. 62 Changetitletoread "Negative andpositive triggering level with negative triggering slope."

64 Fig. 63 Changetitletoread "Negative and positive triggering level with positive triggering slope."

66 8-16 6 Change "20.000" to "25,000."

73 14 Change ".05-volt" to "0.5-volt."

79 8-75 10 Delete "(Refer to fig. 87,A.)"

12 Change "87.A" to "87,13."

81 Chart 2, Group IV. Change "50.000 to 250,000 megohms" to "50,000 to 500,000 megohms."

81 8-78 2 Fourth display dot. Change "25,000 megohms" to "500.000 megohms." 84 8-95 8 Change "16-MA" to "16 micro A."

V- -1o Page Paragraph Line() Correertun 10 Change "I60-MA" to "160 micro A." 7.....

90 9-18 2 After "relatively" insert "simple." 99 11-2 2,3 Delete "Materiel Control, Records, Reports, and Administration."

99 1I-5,a 1 Change,"TO 00-20-2-1" to "TO 00-20-2."

99 11-5,d I Delete "Historical Records and."

99 -. -:I 1-5/ 1-6 Delete, 100 12-2 16-22 Delete beginning with "Observe thc flow chart... the work centers." 100 12-3 23 Delete "from the Maintenance Control Section." 6 Change "records" to "documentation."

100 12-4 I Change "Records. TheRecordsSection"to "Documentation. The Documentation Section."

8 Change"theRecordsSection"to"the Documentation Section."

9,10 Change "Workload Control for scheduling" to "Plans and Scheduling."

101 12-5 I Change "Records" to "Documentation." 5 Change "TOs 00-20-4 and 00-20-10-4" to "TO 00-20-4." 101 12-5 13,14 Change "Air Materiel Area (AMC)" to "Air Logistics Center (ALC)."

24 Change "Records" to "Documentation."

101 12-7 3 Change "Workload Control for schedufing" to "Plans and Scheduling."

101 12-8 1 Change "Workload Controrto"Plans and Scheduling."

105 14-17 2 Delete "through Maintenance Control."

3 Delete "(check fig. 114, in the workbook)."

109 15-14 11 Delete "(2) DD Form 829-1." 14,15 Change "TOs 00-20-4 and 00-20-10-4" to "TO 00-20-4." 110 Fig. 118 In the active portion. change "PCN REPORT (CURRENT) 9 LOG-K75" to "PCN REPORT (CURRENT) (LOG-MMO (M) 7124)," I II 16-6 5 Change "(9 LOG K75)" to"( LOG-MMO (M) 7124)." 119 Section T 24 Change "00 20 21" to "00 20-22."

Page Changes: Remove and insert new pages as

Ri'11111VePaA InAert Page%

710 7 10 107 108 107 108 6 Contents

Page Preface iii

Acknowledgment iv Chapter

1 Supervision and Training 1

2 General Maintenance 14 7, 3 EquipmeAt Identification 51

4 Test Equipment 62

5 Equipment Modification 98

Appendix 113

Index 117 MODIFICATIONS

in ai,J>449 I -of this publication has (have) been deleted adapting this material for inclusion in the"Trial Implementation of a

for use in vocational and technicaleducation. ,

CHAPTER 2

General Maintenance

THIS CHAPTER presents analysis of tasks personal feeling of accomplishment about performedingeneralmaintenance. These working on the equipment in your work tasks include performance routines, replace- center. To best attain this feeling, look closely ment, repair, and servicing. The study of at the task to be done, analyze the task, and repair and replacement of defective compo- determine that the performance of the task nents includes a study of soldering. will (1) provide better operational equipment for operations personnel, (2) increase the 3. Performance Routines, Repairs, and system reliability by decreasing the chance for Operational Cheeks failure, and (3) make a more presentable looking piece of equipment. The visual ap- 3-1. The general maintenance functions pearance of the equipment shows what type performed by most 305XXs fall in the cate- of maintenance repairman you really are. If gory of preventive maintenance routines and the equipment is clean, even spotless, then it the repairing or replacing of electronic com- is easily surmised that its operational capa- ponents. Included, are such tasks as service, bility will be good. However, if the equipment inspect, repair, replace and validate, and the is dirty, it follows that repair work accom- performance of operational checks associated with these tasks. To help achieve a clear plished will very likely be slovenly, crude, and understanding of you: job responsibilities in poorly accomplished, and eventual system relation to the tasks, it becomes important for deterioration is inevitable. you to analyze why a task is performed and 3-4. Analysis. Perhaps the term "analysis" understand the consequences if you fail to is new to you. Its meaning as related to your accomplish the task. What are some of the performance of tasks must be clearly under- features of maintenance routines? What is stood in order for you to become a skilled accomplished by their performance? What technician. Fortunately, inthe electronics areas of responsibilities are included? What career field all steps in our analysis are logical; repairing tasks will you need to perform and no arbitrary philosophies or generalities exist. what problems will you encounter? What So analysis consists of: repair skills will you need to develop? This a. Determining the objective. This is done text discusses answers to these questions. by identifying the task to be performed; i.e., 3-2.Servie Routinesand Operational perform a PMI, replace a lamp, etc. Checks. Generally, a maintenance routine b. Determining the steps involved in accom- requires you to clean and service equipment plishment of the task. In preventive mainte- sothat optimum equipment operationis nance routines, the steps are already listed. In obtained. Improper performance of these removal and replacement of components, the tasks can and does result in equipment status steps may or may not be listed in the TO, but deterioration,intermittenterror problems, they must be identified and listed. and corrosion. In the following paragraphs c. Determining what principles or charac- you will read about situations that arise teristicsor specific requirements must be because these routines are performed hap.. considered while the task is being performed. hazardly and when, how, and why repairs are These areas include (1) possible impact on the made to components of a system. system, such as power requirements, inter- 3-3, You, the maintenance man, are the ruption of system operation, and partial loss only one who can insure that the operations of system capability; (2) physical adjacent personnel have workable equipment. It there- subelements involved; (3) removal of other fore becomes necessary for you to have a units to facilitate repair; and (4) the use of 14 ID associated test equipment and testing proce-graph, cleanliness and operational readiness of /6 dures needed to effect repair. even the smallest component in a system is of paramount importance. So it then becomes 3-5. Many areas are included in this type of necessary for you to be aware of environment work. Many types of devices are used to and physical properties of moving parts that provide maintenance personnel with indica- can cause deterioration to system function. tors to tell them that problem areas are 3-n. Let us explore a few applications of developing. Some of these are visual indica- preventive maintenance routines. Also, let us tions such as-lights, fuses, and switches; dirt see if the failure to perform these tasks could and corrosion; meters and temperature read- result in failure of the entire system. ings. Other indications are audio, such as noisy motors, gears and belts, and squeaky doors. 3-6. Notice that in these areqs of your responsibility, the tasks are related to both °IIDOSTPARiTICLES DISTRIBUTED Ir% mechanical and electrical parts of the elec- THROUGHOUT CABINET .../..71 f. '''AIRFLOW RESTRICTED ...._ tronic and mechanical equipment. But you -...... !...ss .'" .1 ... must also understand the equipment oper- . ; ' ation pertaining to these areas and where to 10111,16 find information about them. \. , 16,r - 3-7.Use of technicalorders.In which technical order will the steps for this work "I; normally be found? Since you are on a site and/or in a work center, you probably know that your work cards (a term usually assigned FINS CLOGGED WITH DUST to PMIs) are designed and printed on hard card paper instead of regular TO pages. This book has a definite TO number and for most systems in the United States Air Force, the book is readily identifiable by the insertion of the letters "WC" inthe last part of the technical order number. Below are some examples: 31P1-2GPA73-52-6WC 31P1-2FST2106WC-1 3-8. Also notice that each of these technical orders is in the -6 technical order series. Therefore, when looking for and identifying preventive maintenance routines, refer to the index for the technical order and specifically iook for the listing containing "6WC." -- 3-9. Another technical order which is im- 'f/- . portant for you to know and be able to .! It .;::;:. identify is the technical order showing remov- .1(.' al and replacement of components. In most 'Q,:::: , Air Force systems this book is an Air Force technical order; however, some systems use ..e?..,/ commercial publications for repair and re- A PRIMARY CAUSE OF OVERHEATED EQUIPMENT placement.procedures of components. In Air Force technical orders, the information and procedures for replacement of componenth Figure 6. Squirrel cage. are usually found in Chapter 5 of the service manual, the -2 technical order, for that series. 3-12. Cleaning and lubricating air-condi- The -2technical order also containsthe tioning systems. Refer to figure 6. A typical theory of operation of a piece of equipment instruction could be "Step I. Inspect motor, in an earlier chapter, as well as the characteris- belt, and attached squirrel cage for cleanli- tics of the equipment. ness, proper operation, satisfactory condition, 3-10. Servicing, Inspecting, Replacing, andand oil." A simple enough step, although Validating. As we stated in a previous para-rather routine and unglamourous. But, what 15 happens if the squirrel cage becomes clogged They may act as insulators or conductorsor with dirt, or the belt dries and cracks,or the corrosive agents. They can oftencause a motor bearings become dry and burn? Your distorted waveform, cause an oscillator fre- task is twofold. First, visually inspect the unit quency shift,orcausea phase shift in and determine the condition as cleanor dirty, microseconds which could result in intermit- inspect the belt for cracks andwear, and tent problems and equipment malfunction. listen for dry running motor operatdon;sec- 3-16. The following are typical steps in ond, clean and lubricate the unit. Failure to cleaning: do the task well often results in equipment (1) Clean component boards, screen filters, downtime. Analysis of the conditions listed air passages, and cables. above is as follows: First, decrease in air flow (2) Vacuum cabinets to allow complete air through the entire cabinet or system results if circulation. proper cleaning of the air conditioning system (3) Clean dirt and grime from contacts for is not performed. The reduction of airflow good electrical signal flow. causes an increase in ambient temperature throughout the cabinet or system, increasing 3-17. Inspecting and servicing read and the possibility of intermittent failures. Sec- write heads used with magnetic device& A ond, a broken belt or frozen motor bearing typical instruction could be: "Clean heads causes equipment failure and results in un-daily," or "Lubricate tape drives." Whatare scheduled downtime to the work center, loss the two most dangerous enemies of magnetic to the net, and to the Air Force mission. tape/drum systems? Answer:(1) Residue from the tape or drum surface being depos- 3-13. Your job, then, is to prevent the need ited on the heads and (2) magnetizing of the for troubleshooting and to preventa system failure. Perform this routine with heads themselves. In data processing systems, care and a some form of storage is generally used. Often definite attitude that the operation ofyour these systems employ, ai tin systems depends on it. The followingare the SAGE, typical steps in servicing: AN/FET-2, a drum coated with oxide; or in (1) Remove power. the 465L, SACCS system, a magnetic tape (2) Remove or make access to the unit. unit for stored programs; or in the 412L or (3) Clean, inspect; lubricate. BUIC system, a computer with tape programs. (4) Reinstall, check. These units require constant cleaning because (5) Restore power. of the properties of magnetic flux in the

3-14. Cleaning and inspecting cabinets, SYMBDLOGY drawers, and modules. Again the enemy is dirt and dust, grime and grease. As before,your job success depends on your ability to combat cc NORMAL NORMAL these agents. A INPUT OUTPUT SIGNAL SIGNAL JL __FL

CLEAN, DEMAGNETIZED READ WRITE HEAD

teN NORMAL IMPAIRED B OXIDE COATING uCCURS HERE INPUT OUTPUT SIGNAL SIGNAL 1

OXIDE COATED REMO WRITE HEAD

Figure 7. Dirty module.

NORMAL IMPAIRED C INPUT OUTPUT 3-15. The dirty module, shown in figure 7, SIGNAL SIGNAL may cause you to recall from your studies in basic principles what effect these agents have 111111', on circuit components. With smaller units MAGNET ZED READi WRITE HEAD such as printed circuit boards, microelectron- \,.. ics circuits, and even vacuum-tube circuits, these agents become extremely important. Figure 8. Magnetic heads, clean and not clean. 16 la heads, and the loss of oxide from the tape orbuilt and installed.Physical features and drum surfaces to the heads. As the flux or principles of operation need to be analyzed. oxide is transferred to the heads and sur-The impact on the system during the repair of rounding area, signal losa increases and system the unit will be included as a part of the signal deterioration rapidly increases. Range analysis to show the relationship to the task. data, alert messages, and problem block data Logical approaches and basic steps will devel- are often garbled, incomplete, and of no value op. because of these conditions. 3-22. The analysis of this subject includes a 3-18. When we speak of magnetic flux and study of the types of lamps, their uses, and oxide deposits on heads, what are we talkingtypical replacement procedures used to re- about? Look at figure 8 and obeerve what store the circuits to normal operation; the happens as magnetic fields build up; noticetypes of fuses normally found in data proc- how the response falls off. See how, because essors; the types of fuse holders plus typical flux is present, that less of the signal is passed replacement procedures; and finally, analysis into or out of the read-write heads. Again of the switches used on data processors and look at the illustration and see how a buildup typical checkout and replacement procedures of oxide deposits interferes with the passing associated with switches. of signals into and from the tape when 3-23. Lamp and lamp sockets_Atudy table recording or playing, 1 (in the workbook) closely because it in- 3-19. Typical steps in servicing include: cludes a description of the most common (1) Clean visuallyall dirt and oxidation lamps used in data processors. These lamps from heads. come in various voltage ranges, sizes, and (2) Demagnetize heads according to specif-shapes. Common lamp nomenclatures are ic instructions with proper degaussing tool. given plus their voltage ratings. These are vital (Remove built-up magnetic flux.) for you to understand in the event that you (3) Lubricate tape drives with proper chem- must replace lamps with substitute lamps. ical agent. Some lamps even contain resistive and capac- (4) Visually examine heads for pitting, itive components internally. cracks, scars, or any other indication which 3-24. By referring to table 1, showing the could result in signal loss. (Use magnifying lamps, it is easy to see why each lamp requires glass.) a special type of socket. Consider the first (5) Return equipment to, operational sta- lamp, the screw base; its socket is as shown in ^ figure 9. Since only two wires are used, its tus, removal and installation are relatively simple. (6) Check operational status. Observanca of wire replacement to the termi- 3-20. We have examined some of thenals of the new socket must be exercised important areas in a data processor where when reinstalling a new lamp socket. Install- failure of the maintenance man to perform his ing the wires on the wrong terminals is a cleaning and lubricating task could result in modification of equipment and is not author- the loss of equipment operational capability. ized unless directed. The tasks in themselves are not difficult, but analysis of the tasks as described in this text explains their importance and relates the tasks to the impact these have on the equipmenes operational capability and the mission of the unit, wing, and command. Let us now tale a look into another area of general maiate- nance. 3-21.ReplacingLights,Fuses,and Switches. In the system on which you are now working, lights, fuses, and switches are used in abundance. This is true for all data processors. These are of vital importance to you because they show you the opereional capability of the data processor. As more of the systems are changed to solid-state and integrated circuits, quick reliable indicators such as lights or fuses are needed to speed the CONTACT CONTACT detection of failure. It then becomes necessary to understand how these indicators are Figure 9. Screw base socket. 17 13

3-25. Power, of course, must be removed prior to removing a defective socket and installing a new socket. Precautions must always be taken when these units are worked on because, although the lamp may be using onlya low-voltage DC or AC source, a shorting of the source voltage to the chassis can result in complete less of .power to the equipment and result in site downtime. 3-26. A typical removal, reinstallation procedure would be: (1) Remove power. (2) Label wires to be removed. (3) Unsolder wires from socket. (4) Solder new socket to wires. (5) Check continuity with a VOM. (6) Secure socket to chassis with washer and retaining nut. (7) Appiy power and perfcrm operational check.

OFFSET PRONG SOCKET

LEAD CONNECTOR

Figure 10. Ofket lamp socket. Figure 11. Deep socket, neon. 3-27. The offset prong plug-in lamp, as where counter operations are shown, when shown in table 1 (2), requires a socket es error indicators are used, and when register shown in figure 10. Observe how one side of operation shows cycling operations. Some of the socket has a cut higher than the other side these lamps contain internal resistive and to accommodate the prongs on the side of the capacitive networks plus lamp filaments. Most lamp. Also note thatthis socket usually of the sockets designed to accommodate this contains a spring which pushes the basetype of lamp are. -generally2-to 4-wire contact up to the lamp when the lamp is connectedunits.Refer tofigure 11 and seated properly. The spring allows for inser-observe a type of socket which is used. tion of the lamp to seat it properly. Replacement of this socket requires strict 3-28. Installation of a lamp requires: adherance to identification and replacement (1) Aligning the prongs on the lamp with of leads when reinstallation is performed. the slots in the lamp socket according to the placement. (2) Inserting lamp into socket, depressing the spring base. .30v (3) Twisting the lamp and releasing it, allowing the prongs on the lamp to seat in the slots. Removal procedures are the reverse of installation. Replacement of lamp holder (so(:ket) II is the same as for the screw type_ -AAA, o 3-29. The neon indicator, shown in table 1 (3),is commonly used in data processors Figure 12. Indicator circuit. 18 lamp, two wells filled with solder are installed to secure the leads of the lamp. Installation and removal consists of heating the envelope with a soldering iron, removing the lamp lead, and then inserting the new lamp lead in the molten solder. Again, any work performed in thisarea must be done withall power removed. ..011) 3-33. The final lamp shown in table 1 (5) is . .:1AON4. , . . a subminiature lamp. This lamp is pushed into a glass lens, and the lens is then screwed into the socket as shown in figure 14. This lamp anit usually contains a 2-wire connection; Figure 13. Neon in well socket. however, it may have multiple leads soldered to one of the two connector points. Strict 3-30. An installation of this lamp is shown observance of wire placement is necessary on in the schematic in figure 12. The NE2 lamps any removal or replacement of the lamp base. (shown) are placed in series with the output Use procedures outlined in the description of of the flip-flops. On these flip-flops, internally the basic screw lamp. the signal swing is from OV to - 30V, depending upon the state of the flip-flop. When the 3-34. The tasks involved in this area of output of the flip-flop is a logic 1 (OV), there work are basic and simple; yet a few specific is an approximate 67V difference of potential practices do become important when analysis across the lamp, and it lights. In the zero is applied. These are: state,the difference of potentialisonly (1) Mark the wires to be removed and approximately 37V, and ignition of the neon installed on the new socket. does not occur. The table shows that neons (2) Exercise care in removing and replacing need 65V to start. a lamp from the socket after first determining 3-31. To stress safety in this area, consider the type of lamp used. that - 300 VDC islethal voltage, extreme (3) Remove power from the unit before caution must be exercised when working with starting any repair action. this area, and power must be removed prior to (4) Use proper soldering techniques in all removal and replacement of any lamp socket. cases. 3-32. The neon lamp shown in table 1 (4) is (5) Make a static check with a VOM for usually found in a power supply. Quite often continuity prior to applying power. its purpose is for regulation of the power (6) Apply power and make a dynamic supply. It may be a plug-in lamp with stiff check. leads; however, more commonly it is a lamp 3-35. Learn to recognize the various types with no metal base, and it has flexible lead of lamps from their appearance, size, use, and wires protruding from the glass envelope. description on a schematic or wiring diagram (Refer to fig. 13.) In power supplies using this and their voltage ratings. Above all, observe and practice safety to protect yourself and your equipment. A mistake could burn or kill you. A mistake could also destroy your equipment,causeunscheduleddowntime, abort a mission, or cause a loss in the net. 3-36. Fuses and fuse holders. We have already identified a fuse as an indicator for the maintenance man which will alert him to a defect or malfunction in the system. The primary use of any fuseis,of course, to protect an electronic unit from dostruction by excessive current or voltage. This fact then leads to the analysis of fuse applications in the following terms:(1) Where are fuses normally installed? (2) What are the principles of fuse operation? (3) What sizes and shapes are they, and what type holders are provided for them? (4) Finally, what comparisons are Figure 14. Subminiature socket with neon lamp. there between the removal and replacement 19 LS

SYMBOLS circuits using fuses. In the first instancetne current-carrying element usedinfusesis engineered to specific thicknesses, lengths, and widths tocarryspecificvoltage and current loads. This metal will heat and remain intact provided the applied heat does not Fl exceed the melting point of the metal. Sec- OR ond, basic laws of electronics apply to selection of fuses for specific circuits. Considera- ticns of (1) total wattage dissipation, (2) total amperage needed to maintain circuit operation, and (3) total voltage requirements must be made when determining size and type of OR fuse that is to be used. 3-39. How does Ohin's law apply to fuses? -HIII- Ohm's Law: I = 1, or R = -1-, or E a IR, or P a IE Consider a unit using a 125V, 2A fuse. Figure 15, Fuse symbols. Consider also that the fuse will blow at exactly 2A. What effect can an increase in line of the holder to that of the lamp holders justvoltage have on the fuse?Using the formula discussed. E 3-37. Typically, you will finda fuse in anI = : input power line whether it be an ACor DC 1 source voltage. Fuses may be installed on a 1 a 2A E a 125V R (resistance of the fuse) drawer, a rack, and a chassis, or ina cabinet. 125+ +2A = Fm, -, = blown fuse (arrows indicatea change) They may be remotely placed and stillbe wired to the circuits of a given unit. TheWith the resistance of the fuse wire as a important thing to know is where the fuseconstant, an increase in line voltage causes an circuits are for your equipment. Air-cond-increase in current, and the fuse melts. An- itioning systems, motors, and cabinet service other problem: What effect can a decrease in lights are also examples of circuits that will be fused to prevent destruction by overload in resistancewithinthecircuitscause? The these units. On a wiring diagram you will power formula P ._.E2is used. A short circuit probably see a fuse as a symbol like those R shown infigure15. The designation willin the operating unit will very likely lower the usually be an "F" followed by a number. On total resistance of the unit to almost ground the fuse itself will be a number. It willvery potential and increase the power requirements likely look like this one here. Example: by increasing the current flow. Since power is related to heat, the fuse filament will develop Part more heat and burn through. Number Breakdown: F01 A 125V 2A E2. I *I' a a blown fuse L 2ampere rating 3-40. Another basic principle of electronics [125V maximum voltage is Kirchoff's law. Looking at the schematic in LCharacteristic (normal-blow) figure16, observe how, when the fuse is intact, current will flow into the entire circuit Style or dimension code (ferrule, glass, through the fuse and not the NE2 lamp size) circuit because current will always seek the easiest path. However, if the fuse blows, the 3-38. The current-carrying element in a current path is through the NE2 lamp. This fuse melts when heated to temperatures in lamp circuit will draw very little current and excess of about 1700 and opens, thereby no damage will result to the circuit. This removing the source voltage from a unit. Two circuit is used where a visible indicator is used factors are important in this analysis: first, to show a blown fuse. the type of material used for fusing and its 3-41. Refer to table2, Fuses and Fuse melting properties.and; second, the principles Holders (in the workbook), and study the of Ohm's and Kirchoff'g law as applied todifferent types of fuses normally fouLd in 20 2=0 various types of fuses exist for specific pur- /6 poses. Further, the fuse wire is designed to carry or handle a specific maximum voltage and current source. Exceeding these values causes the filament to melt, protecting the circuit. Also, analysis pointed out what effect a short circuit in the equipment must have on the circuit fuse. Interpretation of these facts makes it paramount that exact.replacement of fuses with both proper voltage and current ratings be installed and exact types, such as fast blow or slow blow, be reinstalled. 3-45. Switches. The final subject to be Figure 16. Fuse and neon circuit. studied in this area of maintenance is the switch. We have been using switches all of our dataprocessorsandancillary equipment. lives. We turn onlights,appliances, and Compare these types with ones used inyour entertainment devices with them. We know system. Compare the holders in your equip- that power is applied to these devices when ment with the ones shown in the table. Prove the switch is turned on and power is removed that fuses in your system are installed where when the switch is turned off. this text states, that symbols are drawnas 3-46. In data processors the same types of shown in figure 15, and that fuses are labeled switches are used for power on and off. as indicated in this text by analyzing yourSwitches are designed for many other uses. system and technical orders for this data. Two broad uses of switches are (1) digital 3-42. Fuse holders can become damagedinput and (2) command input devices. A and require replacement. The most common switch designed to provide a digital input will causes of damage are heat and mechanicalprovide the input source for either a static abuse.Ifholders are corroded,dirty, or level logic 1 or a dynamic level 1, or a pulse loosely hold the fuse, they will heat. Thetrain. It may even provide the source for an heat,inturn, can damage theinsulating octal input. A switch designed to provide a material in the holder. The heating condition command input will provide preset, reset, will get worse with time, and the holder will advance, repeat cycle, and other short-dura- have to be replaced. tion machine command signals. Analysis will 3-43. By observation of the fuse holdersalso show how these switches are used and shown in the table, it is easy to see that only what types of switches are usually associated two connectors will usually have to be un- with these actions. soldered and resoldered when replacing a fuse 3-47. This analysis of identificationof holder. The tasks of replacing a fuse holderswitches, their uses, and their defects also and the replacement of the lamp socket are so includesdescriptionsoftheirreference nearly alike that a restatement of the typicalsymbols, schematic symbols, coil operations, steps will apply to almost all work done on lamp circuits associated with these, and exter- fuse holder replacement: nal circuits commonly employing switches. (1) Mark the wires to be removed. Since defectsinswitches are common to (2) Remove power before starting anyalmost all types of switches, the analysis of repair action. repair or replacement of the switchesis (3) Exercise care in removing the unit. explained as a common element instead of (4) Employ proper soldering techniques inindividually. Removal and replacement tech- all cases. niques are related the characteristics of lamp (5) Make a static check with a VOM forand fuse replacement procedures. cnitinuity prior to applying power. 3-48. 'Types of switches and their related (6) Insert a new fuse of the proper voltageapplications. The following paragraphs ex- and amperage ratings, and size and type. plain the types of switches and their applica- (7) Apply power and make a dynamictions. check. 3-49. The most common switch known is the toggle switch. Refer to table 3 (1) (in the 3-44. The analysis of fuses and their hold-workbook) for a pictorial description of this ers has shown that the task of fuse holder switch type. This switch may be designed as a replacement is simple and basic and that itaingle-pole, single-throw (SPST) having two parallels the techniques used in replacementfixed Conditions, aN and OFF, or it may be of lamp sockets. Analysis has also shown that spring loaded as in the case of a reset switch 21

2 / 7

WITCH 9imOLS RIF

,LI SI A FLIP-FLOP INPUT FED BY SWITCH .41 : I SIT PER PRESS siit SWICLE THROW -( :1 . Milli 1m110. SI A RIP CAS : . SI COMMAND PULSE TO RESET SHIFT REGISTER INISSIS1J1101 TWO CIRCUIT CONDITIONS CLEAR RESET STAGES TO ZERO CLEAR 4.1.0 L. r1-71 SR(25) Ur PoNsauTT9AurAK II CISCUIT 011/0840 (MAK) Rip SI SI SPRING LOADIONITURH

comma calculi.ma(t) S3 STATIC LEVEL SWITCH ..-T.

CIIICuIT 011NINO (MAK) LEVEL 0 PROVIDES GROUND FOR KI AND 1(2 C o-AA 1I I 8 Figure 17. Switch symbols. IS3 I I where it can be turned on and will spring back to OFF when released. The spring-loaded versionisusually found in command or 'I control circuitry. This is where a reset pulse S3-0I must be used, or a clear pulse is needed, or a preset pulse is needed. In any use listed, a relatively short-duration pulse is required and -IIv -Illy the spring-loaded toggle switch is effective. 3-50. Another switch which is_used for the s same purpose is the spring-loaded pushbutton microswitch. Its description (see table 3(2)) is different, but its function is exactly the same LEVEL A FOR LIGHTS as the spring-loaded toggle switch. The schematic symbol and reference designation for both types of switches are shown in figure 17. LEVELS IS ANO C c 3-51. Another type of switch commonly FoR POWER AND GROUNO found in data processors and display consoles FOR THE HOLOING COIL is the pushbutton switch with a lamp indicator under the pushing surface (see table 3 LEVEL 0 TO SUPPLY (3)). This type of switch comes in two types, GROUND FOR DATA OR the nonholding or spring release return and RELAY CONTROL the holding type. The holding type employs a Figure 1c). Pushbutton switch circuit. holding coil which latches the switch in the +2IV ON position when depressed. The second pressing of the switch releases the voltage 21V RET from the holding coil and returns the switch A to its OFF condition. In some applications LEVEL OP SI the holding coil voltage may be removed by another switch remote fromtheoriginal switch. 3-52. In both these types of switches, the

NC holding and nonholding, lamp circuits are VIDEO employed to identify the condition of the 0 VIDEO LEVEL AMP switch ON or OFF. Observe the schematic OF SI in figure 18 and analyze how two of the lights DC NC II AND C RET (DS1 and DS2) are lighted when the switch is LEVEL OF SI SI-11 128V off and how two different lights (DS3 and

2AV DS4) are lighted when the switch is on. Trace RET the paths for current flow to prove this analysis. Also observe how the holding coil Figure 18. Switch (with holding coil) circuit. shown in the schematicisenergized and 22 deenergized as a result of the switch action. employed. Trace ita current path. Always remember that 3-56.Repairingorreplacingdefective all circuits function only when the path for switches. current flow is complete. Defects which occur most often are: (1) Defective spring. 3-53. The type of switch in figure 19 is (2) Broken contact. usually used in digital units. It may be used (3) Burned contact. (as shown in A) to enter a static level 1 toa (4) Shorted contacts. register or counter each time it is depressed, (5) Charred switch body. or it may be connected as shown in B and C Signs of defects are: to relays to provide a pulse train in either (1) Sticking spring-loaded switch. binary, binary coded decimal, grey code, (2) No continuity when checked. octal, or aspecial codepre-pi-redfor a specialized circuit. (3) Loose toggle. (4) Improper placement of microswitch 3-54. The microswitch used in mechanical unit. devices is another switch commonly found in (5) Improper solder connection. input-output devices (see table 3 (4)). This (6) Nonoperating holding coil. switch is often placed in a drive unitso that closing its contacts...causes a cycle to repeator stop. The Wustration in figure 20 shows that 3-57. Typical replacement procedures. Re- when the switch is depressed by the pivoted placement of switches is similar to replace- arm of the. cam,it breaks-the cycle and causes ment of lamp and fuse holders. Since switches a change in operation. These microswitches may haird ended than -tivo connections, exact are spring loaded and, when the pivot arm is replacement of wires is an absolute must. removed, the switch is returned to its normal Some switches, such as the push and lock, state. with lamp circuits and holding coils have, as many as 12 pins. Since these are arranged in 3-55.We havediscussedthevarious rows, they are often designated by A, B, C, D switches used in data processors. Now let's or 1, 2, 3, 4, and each row could have a identify malfunctions which might be attrib- normally open (NO), commdn (C), and nor- uted to them, what repair actionsare re- mally closed (NC) connector. Identification quired, and what safety factorsmust be of wires prior to their removal from the

IMO MINIM =MD 011111111111.1INIMIN =NM WOWS OMNI OMNI MOM INBONI OPERATE

A NO

111110110 11111110 IMMO 11111/31111111111111 MEMO 0111111111111 1111111111111H8

Figure 20. Microawitch operation. 23 placement. Remove wires by using proper unsolder- ing techniques (if soldered). WI. Position and solder new switch to leads. Secure switch to cabinet. Perform static check with a VOM. Perform a dynamic check withpower applied to: (1) Insure that all lights, if any, work properly. (2) Insurethat coil holds, or apring releases. (3) Insurethat 'switchispositioned properly. (4) Insure that mechanical operation is as specified in the technical order. 3-58. Inspecting and Servicing Electrical and Mechanical Connectors (Jacks, Plugs, Cable Connectors).,The,analysissoLthis.taskia ....--.' again in the area of generalmaintenance. You were working with soldered connections in the case of lights, fuses, and switches. Now you are going to analyze the solderless connector. You willfocus on the types of connectors used, tools used when repairing the connectors, typical problems or defects to identify in inspections, symbol designations, and typical repair procedures. 3-59. Types of connectors. Figure 21 shows two examples of connectors you will find in your data processing equipment. Either connector, although used in different places in the equipment, will perform the same function;thatis,connecting circuitsthrough electrical connections to transfer dataor voltages. These two types of connectorsare manufactured for as few as one wire connection to as many as 225 wire connections. Each pin in a multiple pin connector is labeled (see illustration). Lettering is usually used in preference to numbers, starting with "a" through "z" and continuing with "aa" through "zz" if necessary, except for the leters "i," "o," and "q," which arenever used. There are same equipmentareas in which the connector pins are labeled with numerals. Learn how the connectorsare labeled in your equipment and where they are. Numbering on the units usually follows general reading rulas. For example, the pins are designated "a" and "b" on row 1 across, "c" and "d" on row 2 across, and soon through to the end, or "a," "b," "c," etc., clockwise in circular cable connectors. 3-60. Reference figure 22 to follow the Figure 21. Connectors. explanation. On these multiple connector bodies, the solderless pins, both male and defective unit is a must. female, are designed to hold a single wire and Remove power to switch (be safe). are designed to be inserted into a connector Carefully label all wires for exactre- body. Each pin has three basic sections: "A" 24 20. .2a

CRIMPING UNIT

1 RETAINER TENSION CLIP 1 , 41 ,&, ., MALE

MATING CONTACT t -4

FEMALE

PIN EXTRACTOR

Figure 22. Solder less pin connector unit. the wire retaining section which is crimped to hold the unit; "B" the spring tension section which is designed to lock the pin in place in the hole provided in the connector body; and "C" the male or female mating unit. Looking at "D," the cutaway cross- section of a typical connector body, observe how a ridge is employed to accept the spring tension clip, the "B" portion of the pin. When inserted in the connector body, the pin locks in place. Removal of this pin requires an extraction tool which is designed to slide over the spring tension clip, compress the spring, and allow removal of the pin. 3-61. Types of crimping tools. Many com- panies manufacture crimpingtools.How- ever, each crimper is designed to perform the same functionsecure a wire to the pin by crimping a portion of the pin around the wire with enough pressuretoretainthewire. Figure 23. Crimper. Crimpers are designed to allow their function to be performed on all sizes of wire and pins. For instance, a crimper used to fasten a pin to 25 /

GROUNDING OF IMRE Illute Heat at the point of contact between the male BROKEN GUIDE RECESSED and female connections can result, causing PIN PIN burning and often melting of the plastic body BROKEN used to hold the pins. PIN (2) Loose-fitting pins. This problem occurs when a pin is pushed to one side instead of being properly mated. Again, intermittent electrical connection or shorts may result and heat builds up. (3) Cracked or broken plastic connectors. (4) Bare wire contact with the metal casing in metal connectorsespecially at the clamp that secures the wires that enter the rear of the connector. (5) Defective threads or missing guide pins

SENT on metal connectors. MALE FIN PROTRUDING TOUCHING 3-64. Before analyzing the typical steps RECEPTACLE CASE involved in removing and replacing jacks, RECESSED RECEPTACLE -plugs; -an- -replacing-jacks; plugs; -and- -cable- connectors, let's define the symbology used in the technical data. As outlined in the USA Standards,Y32464968, adopted by the Department of Defense, connectors are referenced according to the following rules: (1) "The movable (less fixed) connector of a mating pair shall be designated "P".. CRACKED (2) "The stationary (more fixed) connector 500Y of a mating pair shall be designated "J" or ,,x,, (3) "A connector "P" on a flexible cable shall mate with a fixed connector designated "J" rather than "X." Figure 24. Defective connector. (4) "If two cables are connected, each of the connectors will be labeled "P." #22 wire would have a very small opening as (5) "A connector to mount an item.. . shown in figure 23; whereas a size #12 wireshall be designated with an "X" prefix if its would require a crimper with a wider opening mate is directly mated (not on flexible cable) to accommodate the larger wire and pin. to the mounted item . ..." 3-62. When removing, replacing, or modify- 3-65. Further explanation of these rules ing the jacks, plugs, or connectors on your then brings out these factors: equipment, learn by studying the manu- (1) A plug will be designated "P" when facturer's publication which tool is used forattached to a cable or is the less fixed of two each size wire and pin used in your system. connectors. (Refer to rule 1, paragraph 3-64 3-63. Inspections. What do you look forabove.) when making inspections of jacks, plugs, and (2) Jacks "J" will designate the other unit cables? In both the metal and the plastic body the plug matches. (Refer to rule 2, paragraph type connector, certain defects will be visible 3-64 above.) and you can use them as indicators of txouble (3) No designation is provided to indicate spots. Some of the more prevalent connectorthe male or female portions of mating pairs. problems are described below. Refer to figure (4) A printed circuit card (PCB) or similar 24 for the defects listed and study themodule will not be labeled "P" but will have possible results from these conditions. an equipment location number. The recep- (1) A recessed pin. In this case a male ortacle for the PCB will use the "X" designator female pin has either slipped back into the before the location number. Example: PCB connector body because of a broken clip, the "A3" goes in location "XA3." (Refer to rule lack of spring tension on the clip, or a broken 5, paragraph 3-64 above.) plastic recess catch. It will not mate properly withthe male or female connector, and 3-66.Typical removal and replacement of intermittentelectricalconnectionoccurs. multiple connectors.One very helpful feature in the manufacture of multiple lead cables is work to perform, but with the proper training that the cable strands are twist paired and and acquisition of skills, the task is relatively color coded. This featureis invaluable in simple. This section shows how basic the task troubleshooting and marking. is and how the common maintenance tech- (1) Carefully mark each wire position and niques apply to a great variety of the task color code prior to starting any repair action. applications. As you study this text and are This may be done by using a piece of masking given more responsibilities in your work area, tape on each wire and labeling each wire with you will attain the skill necessary to maintain its location letter or number designation on the equipment. This discussion: the connector. Another method is to prepare (1) Recaps component replacement and a chart with a layout of each pin as seen on testing techniques previously developed in the connector and write the wire color code this text. adjacent to the pin hole number. (2) Identifies where technical data can be (2) Remove power before proceeding with obtained for the repair, replacement, a..d any work (be safe). checkout of components. (3) Disconnect connector from panel (if (3) Develops the knowledge needed and applicable). lists the tools to be used for soldering and (4) Use pin extractor to release pins. desoldering. (5) Insert pins in new donnector if all pins (4) Develops typical task lists for repair and are in good condition. replacementofcomponentsonPCB, (6) Replace any defective pin. microelectronicassemblies,andmodular (7) Eiiamine workmanshiP- for proPerly units. seated pins, no cracks, and no frayed or loose (5) Identifies special attention areas within wiring. typical applications. (8) Secure connector to frame (if appli- 4-2. Replacement Techniques.Inpara- cable). graphs 3-13, 1-16, and 3-19 of this chapter, (9) Secure mating unit to repaired or typical replacement techniques were identi- replaced connector and carefully match guide fied. These techniques are common for re- pin. placement of electronic and mechanical com- (10) Apply power and make dynamic ponents, including items like switches, light checks where applicable. sockets,fuseholders, motors, fans, gears, moving cams, and belt-driven units, and the 3-67.Inspecting and servicing of connectors is a task which requires a careful, dismantling and reinstallation of fixed sub- conscientious effort by you. Your attention assemblies and assemblies. Alsoidentified must focus on the elements listed in this text were two types of testing which must be and peculiar factors of your equipment that accomplished with a repair action. These are staticanddynamic.The static is generally may be trouble spots. You must select a accomplished with visual inspections and con- definite method of identification of wires tinuity checks. The dynamic is usually per- before removing them from the connector to formed with power applied using a standard be changed, and you must insure 100.percent performance check such as PMI or standards accuracy and quality when reinstalling the described in Chapter 5 of the -2 TO. To help pins.Further, you must use the correctyou recall the techniques previously listed, crimping tool for the size wire and pin when study the list below. replacement of pins is required. You must be (1) Remove power (be safe). able to recognize deficiencies and relate them (2) Label any and all wires to be removed. to possible trouble symptoms. Finally you (3) Disconnect any jacks or plugs which must design a method (procedure) to repair or may be used on the assembly to be repaired. replace the defective components. (4) Unsolder any wires as required. (5) Remove any assembly or subassembly 4. Repairing or Replacing Defective to facilitate access to the defective unit as Comp onents required. 4-1. All commands within the Air Force (6) Follow prescribed directions as outlined prefer to have maximum availability of all in TOs or contractor manuals for removal equipment component spares and units on repair, and reinstallation. hand at all times and in serviceable condition. (7) Remove assembly or component and This trend has resulted in a philosophy of replace with a serviceable assembly or compo- maximum on-site repair of electronic equip- nent. ment and a minimum of depot overhaul. (8) Reinstall allwires, jacks, and acces- Naturally, the maintenance man will have the sories. 27 23

(9) Make a static check. view of the component you may have to (10) Apply power and make dynamicrepair or replace; (2) a part number for checks, insuring that specifications as statedordering the replacement needed; and (3) a are measured. category listingtelling you if the part is recoverable, may be thrown away, or must be 4-3. Technical Orders. By this time in thelocally manufactured. We are not going to study of general maintenance, it is becominginclude the use of the IPB in this discussion evident that technical order's are preparedbut you should know that the IPB is needed under a common grouping of series, exceptfor identifying the part. where sectioning of a TO is used. In the task 4-7. 00-25-234, General Shop Practices. of repiairing or replacing components, certainThis TO was published to provide Air Force chapters of TOs are listed again because they personnel with general shop practices; how- provide the information necessary to maintain ever, it also provides information on soldering the equipment. These include theservice repair actions. The data in the TO pertaining manual, commercial publications, illustratedto soldering parallels reference materials pre- parts breakdown, and TO 00-25-234. pared by the National Aeronautics and Space 4-4. Chapter 5 of service manual -2 TO. Administration (NASA) publications, NPC -"Maintenance" is- thelitlerSubjectrincluded220-4; NPC-200-4Arand-NPC.275-1. YouwilI in the TO which are related to the task ofprobably never be certified to NASA stand- removal and replacement are (1) disassembly, ards for soldering; however, you can become a repair and replacement including general partsskilled technician equal to anyone who has replacement, (2) reassembly and testing, and been certified. (3) performance tests. 4-8. Soldering and Desoldering. This study 4-5.Commercialpublications.Certain of soldering and desoldering contains expla- equipment purchased by the Air Force has nonations of (1) terms used in soldering, (2) AF technical orders published because con-tools used in soldering, (3) the nature of tractor manuals already prepared are of a high solder, (4) good and bad solder joints and quality and are available. These publications examinationlistings,(5)desoldering,(6) are purchased to allow maintenance to bepreparation, (7)soldering, and (8) special performed. Within these publications, certain applications when using microelectronic cir- chapters or sections provide repair and re-cuits. Because of its length and complexity placement procedures and testing procedures. and because of its limited coverage in tech- If you have equipment which uses commercial nical school,this subject may seem over- publicatkas for providing this information,developed; but if, during the study of this study the publication and relate those sec-material, you consider the importance and tions of it to Chapter 5 of the AF technical relative impact it may have upon your system, orders. An example is the IBM Selectaicyou will agree that you can't learn too much keyboard used in SACCS, 465L system. about so vital an area. 4-6. Illustrated parts breakdown. The -4 4-9. Terms. The following is a list of terms, TO is the illustrated parts breakdown (IPB).together with their definitions, that you will This technical order provides (1) a pictorial need to know:

TERM DEFINITION ACID A substance that gives hydrogen ion in solution or which neutralizes bases yielding water, e.g., hydrochloric acid. ADHESION Force of attraction between the molecules (or atoms) of two different phues, such as liquid brazing filler metal and solid copper or plated metal and basic metal. Contrast with cohesion. ALLOY A substance having metallic properties and being compoaed of two or more chemical elements of which at least one is an elemental metal. BIFURCATED A terminal containing a slot or split in which wires or leads are placed (SPLIT) TERMINAL before soldering. BLIND JOINT Concealed or covered joint. BOND The junction of joined parts. Where solder is used, it b the junction of the solder and the heataffected base metal. BRAID A machinewoven coveribg applied over wire. Usually made of textile yarn or fine metallic wires. BREAKOUT The point where a wire or group of wires emerges from a cable or laced portion of a wire harness assembly. BRIGHT DIP A solution which produces, through chemical action, a bright surface on an immersed metal.

28 TERM DEFINITION CHEMICAL CLEANING Removal, by chemical means, of foreign material or oxide film which would interfere with soldering. COHESION Force of attraction between the molecules (or atoms) within a single phase. Contrast with adhesion. COLD JOINTS A type of joint that is characterized by nonwetting of one or both of the surfaces being joined. Usual causes are surfaces which are not clean and/or insufficient heat. FILLET Excess alloy deposited along the edge or edges of a joint forming a built-up area. FLOW Movement of molten solder in and around a joint. FLOW POINT That point at which an alloy is completely liquid. FLUX In brazing and soldering, a material used to prevent the formation of, or to dissolve and facilitate removal of, oxides and other undesirable substances. FLUX CONSISTENCY The degree to which the flux is liquid. FLUX RESIDUE Residue left on joint after soldering is completed. FRACTURE Irregular surface produced when a metal is ruptured or broken. FRACTURED JOINTS Fractured or disturbed joints that are usually caused by movement, relative to each other, of one or both of the surfaces being joined before the solder has completely solidified. This defect may be characterized by strain marks on the surface, by small cracks inthe solder, or by a rough, gritty appearance. A lack of electrical continuity may result from tilts defect, as wellat decreasedstructurar strength or loss of a hermetic seal 'in nonelectrical applications. HEAT DISTORTION Deformation of a material caused by the application of heat. Heat distortion temperature is the maximum temperature that a material will withstand without deformation. HEAT SINK A device used to absorb or transfer heat away from heat-sensitive parts. IMPURITIES Elements or compounds whose presence in a material is undesired. INSUFFICIENT A defect that is readily identified by the lack of enough solder to properly SOLDER wet and bond the surfaces being joined. The resulting joints are very weak and highly susceptible to vibration failures. INSULATING Material thatis any composition primarily adapted for preventing the MATERIAL transfer of electricity, the useful properties of which depend on its chemical composition, or atomic arrangement. INTERGRANULAR Process by which solder, by diffusion, penetrates into grain boundaries of PENETRATION parent metal. IRON SOLDERING Soldering by means of an iron bit, which heats the surface, stores molten solder, conveys it, and withdraws surplus. JOINT CLEARANCE Dimensions between interfaces of the soldered joint. LAND (or BOSS, The conductive area to which components or separate circuits are attached, PAD, TERMINAL usually surrounding a hole through the conductive pattern and the base POINT, BLIVET, material. TAB, SPOT, DONUT) LUG A metal device that is either soldered or crimped onto a conductor and used for making a terinination. MALLEAB7LITY The ability of a material to accept deformation under pressure; i.e., coining. MELT POINT The point at which an alloy starts to melt. MELTING POINT The temperature at which a pure metal or a compound changes from solid toliquid; the temperature at which the liquid and the solid are in equilibrium (eutectic). METAL An opaque lustrous elemental chemical substance that is a good conductor of heat and electricity. MODULE (ELECTRONIC) A group of electronic parts whose leads are joined by welding, soldering, or other method to form an assembly which is subsequently embedded, encapsulated, and/or placed in a shell, and has fixed external dimensions. 0 VER HEATING Heating a metal or alloy to such a high temperature that its properties are impaired. When the original properties cannot be restored by further heat treating, by mechanical working, or by a combination of working and heat treating, the overheating is known as burning. OXIDE A substance resulting from the combination of metal and oxygen which, though most prevalent on the surface of the metal, is also capable of penetrating the subsurface of the metal. This substance forms at room temperature and its development is greatly accelerated at elevated temperatures. PASTY RANGE Region between the solidus and liquidus temperatures. 29

3 .2 s

TERM DEFINITION POT 1. Avessel for holding molten metal. 2. To embed a component or assembly ina liquid resin using a case, shell, or other container which remains asan integral part of the product after the resin is cured. PRINTED CIRCUIT - A pattern comprising component parts, wiring,or a combination thereof, all formed in a predetermined designon a common insulating base. Usually the pattern is formed by etching away unwanted materialor by depositing the conducting material. PRINTED CIRCUIT A conductive pattern reproduced onan insulating base material. BOARD (or PRINTED WIRING BOARD) PRINTED COMPONENT An inseparable part of a printed circuit board,intended primarily to provide an electrical and/or magnetic function, other than formingan electrical connection between two locations. PULL STRENGTH The amount of force (in pounds)necessary to break a piece of material when loaded or pulled in a straight line ata constant rate. Rate of pull is in inches per ininute. RESIST A material such as ink, paint, metallic plating,etc., used to Protect the desired portions of the printed conductivepattern from the action of the etchant, solder, or plating. ROSIN.CORE SOLDER Wire.solder containing a-rosin-flux. ROSIN JOINTS kdefect identified by flux trapped in the solder joint.The entrapment is usually due to insufficient heator insufficient time at soldering temperature, or both. The flux, under the conditions noted,cannot boil off the surfaces it is protecting and rise to thesurface of the solder. The results of this defect are usually insufficient bonding andhigh electrical resistance. SEMICONDUCTOR A material whose conductive ability lies between thatof a conductor, e.g., copper and an insulator, e.g., glass. The mostcommon semiconductor materials used in such solid-state devicesas transistors, rectifiers, and diodes are silicon and germanium. SERVICE LOOP A service loop is a small portion of wire cable which is added to the overall length to facilitate maintenance and servicing. Generally, the lead is long enough to provide for one servicing in the field. SHEAR AREA or The distance that two parallel surfaces are overlapped. DEPTH OF SHEAR SHIELDED CABLE One or more insulated conductors covered witha metallic outer conductor to minimize the effects of external electrical fieldson signals passing along the conductors. SOLDERING Similar to brazing, with the filler metalohavinga melting temperature range below an arbitrary value, generally 800 F. Soft soldersare usually tin4ead alloys. SOLIDUS In a constitution of equilibrium diagram, the locus of points representing the temperatures at which various compositions finish freezing on coolingor begin to melt on heating. SOLUBILITY The amount of solute present in a given amount of solventor solution. SOLUTION A homogeneous mixture, the proportion of whose constituentsmay vary within certain limits. Solutions may be either liquid, solid,or gaseous. SOLVENT The component of either a liquid or solid solution that is presentto a greater or major extent; the component that dissolves the solute. STANDOFF A terminal insulated from and usually mounted on the chassis for the purpose of bringing two or more wires of similar electrical characteristics to a common point. STEP SOLDERING The technique of making a series of soldered joints insequence. The first joint is made with a solder operating at the highest temperature. Each succeeding joint is made with a solder at such lower temperaturesas will not impair the first joint. STRAIN RELIEF or The forming of component leads in a designated pattern to provide relief STRESS LOOP from stress between terminations. SURFACE TENSION That property, due to molecular forces, that causes liquid to pullaway or ball up when applied to a surface. This condition is most prevalenton a very smooth surface or a surface covered with an oily film. TERMINAL A tie point device used for making electrical connections. Five basic styles of terminals are: bifurcated, hook, perforated or pierced, soldercup, and turret. TERMINAL LUG A cylindrical piece of metal, either solid or hollow, of twoor more diameters which can be staked, flared, swaged, or pressed intoa ho/e for the purpose of connecting leads or external wires to the conductive pattern of a printed circuit board. 30 3 :7.0 24 TERM DEFINITION THERMAL The property of a material which describes the rate at which heat will be CONDUCTIVITY conducted through a unit area of material for a given driving force. It is dependent on the material or upon its temperature. THRU HOLE A conductive material used to make electrical and mechanical connection CONNEMON from the conductiviii pattern on one side, to the conducti-43 pattern on the (or FEED THRU opposite side of a printed circuit board. CONNECTION, PLATED THRU HOLE) TINNING Coating metal with a very thin layer of molten filler metal. TRANSISTOR A semiconductor device with three or more electrodes commonly used to amplify or switch electric current. WETTING ACTION The ability of one metal or alloy, when molten, to flow over or coat another metal or alloy. WETTING AGENT A surface active agent that produces wetting by decreasing the cohesion within the liquid. WICKING A condition resulting from solder running too far back on a stripped wire and even under the insulation. WIRE SOLDER Commercially available form of solder, produced in the shape of a wire. WIRE STRIPPING The removal of r predetermined portion of insulation without affecting the mechanical or electrical characteristics of the conductor or the remaining insulation. WIRE WRAP An electrical connection made between a wire and a terminal which has sharp corners by wrapping severid iurni of closely spaced solid Wife under tension around the terminal. The connection is held together thereafter by residual stresses in the parts.

Figure 26. Precision strippers.

Figure 25. Thermal strippers. which is an exhaust hood and fan ventilation system used to exhaust toxic fumes, such as 4-10. Tools. Tools necessary to perform polytetrafluoroethylene (teflon) or polyvinyl- removal and replacement tasks are listed and chloride. Another insulation stripper is the described below. precision cutting type, as shown in figure 26. a. Insulation strippers. Thermal strippers, as These strippers are designed to accommodate shown in figure 25, are usually not found inVarious sizes of wire normally used in elec- work centers; butif they are used, their tronics. Use the hole provided for the specific operation will be to place the wire to besize wire to prevent damage to the wire by stripped between th&.electrodes which will nicking. melt theinsulation.Heat isapplied and b. Bending tools. Bending tools, as shown in controlled by the selection switch. A safety figure27, are tools which have smooth factor must be observed when using this unit, bending surfaces so that no nicking, ringing, 31 .17

- according to the work to be performed. Temperature control may be accomplished through the use of a variable power supply, tip selection', or both. d. Thermal shunts. Thermal shunts, or heat sinks, are used to protect heat-sensitivecom- ponents such as semiconductors, crystal devices, meter movements, and insulating materials from damage due to heat while soldering. These devices, shown in figure 28, are placed or clamped in place so that they prevent the heat from reaching the component while its leads are being soldered. e. Tools and materials for cleaninggeneral. The following are tools and materials of a general nature that relate to the task of removal and replacement: (1)Braded, shielding tool (refer to fig. 29;A): (2)Erasures, typewriter (refer to fig. 29,B). This tool can be used effectively for removal of .gold plating from solder areas. (3)Eraser shield, (4)Alcohol dispenser. Figure 27. Bending tools. (5) Medium stiff natural or synthetic or other damage to the component can occur. bristle brush. Nonmetallic tools such as a spedger or solder- (6)Industrial lint-free cleaning tissue. ing aid may be used. (I)Soldering iron holder. c. Soldering irons. Soldering iron size (tip (8)Single-cut file. size and shape, voltage and wattage rating) and temperature are selected and controlled

FELTTIPPED TWEEZER

ANT1WICKING 'TWEEZERS isiteillit

Figure 28. Thermal shunts. Figure 29. Cleaning tools. 32 37 77-

(9)Electrician scissors. attachment hy virtue of a metal solvent or (10) Round-nose pliers (small). intermetallic solution action that takes place (11) Diagonal pliers (small). at a relatively low temperature. The distinc- (12) End cutting tweezers. tion between fusion and solution may be (13) Small wire brush. illustratedas follows:Ordinary table salt (14) Sponge with holder. (sodium chloride) has to be heated to 1488° (15) Vice, electrical. before it melts. However, when a little water (16) Solder SN60, 5N63. is added, it melts easily without any heat: The (17) Toe nail clippers. action of molten solder on a metal like.copper (18) Antiwicking tweezers, 20,. 21, and or steel may therefore be compared to the 22 AWG. action of water on salt; the solder, secures 4-11. The Nature of Solder. Any discussion attachment by dissolving a small amount of of soldering techniques should begin with an the copper or steel at temperatures quite explanation of solder itself. This generally below its melting point. accepted substance is thought tã bequite 4-13. Since the soldering process involves a simple in nature, and so it is when propermetallurgical or metal solvent action between preparation,materials, and techniques aresolder and the metal being joined, itis employed. obvious that a solder joint is chemical in .4-12. Ordinary soft solder is a fusible alloy character rather than purely physical because consisting essentially of tin and lead and used the attachment is formed in part by chemical -for-the-purpose-of- -joining-together -two-or action -rather than by mere physical adhesion. more metals at temperatures below theirThe properties of a solder joint are therefore melting point. In addition to tin and lead, soft different from those of the original solder solders occasionally contain varying amounts because, in the metallurgical process of solder- of antimony, bismuth, cadmium, or silver, ing, the solder is partly converted to a new which are added for the purpose of varyingand different alloy due to a solvent action the physical properties of the alloy. However, between the respective metals with the forma- in many solders, some of these elements aretion of a completely new metallic contact. present as impurities. Soft solder secures 4-14. Thus, a soldered connection is contin-

PURE PURE LEAD TINLEAD FUSION DIAGRAM T N

,- 711.1

Figure 30. Tin-lead fusion diagram. 33 follows that the physical properties of this new alloy are not necessarily the same as 0 those of theoriginalsolder. The tensile strength, shear strength, creep strength, and similar physical properties ofa soldered connection, therefore, depend on the extent to which alloy formation has taken place during soldering and are subject to wide variation due to the inherent variables in soldering techniques. It is important to appreciate that 40 the properties of a soldered connectionare not necesaarily those of the original solder.

-.. 4-18. In order to understand fully the alloy or solvent action on. molten solder, itis 30 essential to consider the tin-lead fusion diagram, as shown in figure 30. , 4-19. Rom this figure, you can see that when tin is added to lead, which melta at 621° F., it lowers the melting point of lead along the line 4 0 A 60 70 4 AC; also, when lead is added to tin, which FRACTIONAL TIN CONTENT melts at 450° F., it lowers the melting point Os*. oforolo, the thong. In ("lining "Ally of flnloe1 oo14wo .1106 Moses lo no tontoot, Wood on toofistsoco of Om oshieroil of tin along the line BC. At the 'point C, Isiof toshoeleteol boodleol onil forr stem. where these two lines meet, there is an alloy of the lowest melting point of the metals, tin Figura 31. Soldor joint quality. and lead. The alloy at this point, which is known as the eutectic composition, consists uous in metal continuity while an unsoldered of 63 percent tin and 37 percent lead, and has one is discontinuous; when two metals are a sharp and distinct melting point of 361° F. soldered together, they behave like one solid 4-20. The .characteristic of eutectic solder metal, but when bolted, wired, or otherwise having no plastic state is very beneficial to the physically attached, there are still two pieces soldering process. (Plastic statetime between of metal. The:P Ire not even in physical changing from a solid to a liquid when contact due to an insulating ram of oxide on heat is applied.1 Since it melts ata very low the surfaces of the metals. temperature and goes from e solid to a liquid 4-15. The permanence as well as the charac- at this point, it is very good for soldering ter of the soldered connection is also differ-heat-sensitive components or any soldering ent. The solder alloy lends itself to stresses operation where too much heat could be and other strains due to temperature change harmful. without rupture of the joint, while anun- 4-21. There lare several other alloys which soldered connection becomes more and more have a eutectic characteristic. However, they loosened by small differential movement from also have disadvantages. For instance, a solder temperature variations and by the gradual of 62.5 percent tin, 36.1. percent lead, and 1.4 accumulation of an increasingly thick film of percent silver is good but more expensive. nonmetallic oxide barrier on the metal sur- Also, 97.5 percent lead and 2.5 percent silver faces. is a good solder; however, this givesa gray 4-16. Soldering tlso provides a different dull appearance to the solder joint. form of attachment from electroplate in 4-22. Tile advantages of SN63 are further which the metals adhere by physical attach- emphasized by figure 31. From the diagram, ment only. It is important to emphasize that you can see that the addition of a little tin to electroplatedmetals are not successfullylead is reflected in a sharp increase in the soldered by alloying solder to the plating; the quality of the soldered joint which continues metal solvent action must proceed throughuntil the alloy contains 15 percent tin. Fur- the thin, physically attached plating to the ther, addition of tin beyond 15 percent lowers base metal itself where the alloy action must the joint quality somewhat, after which it form. Plating a metal preserves its soldering again increases sharply until the solder con- quality, but does not assist in the soldering tains about 60 percent tin. Beyond 60 percent itself. tin, there ir again a slight gradual decrease in 4-17. Since the soldering operation involves the overall joint quality of the soldered the partial creation of a new alloy between connection. You can see that the maximum the solder and the metal that is soldered, it points in the alloy quality curve correspond 34 3 D 3d closely to the critical points in the tin-lead to these conclusions about good solder joints. fusion diagram, that itis the lowest usable (1) Solder must cover the entire surface of melting point, and that it has the highest pullthe unit being soldered, but not so thick that strength occurring at nearly the same point. the unit's shape is indistinguishable. 4-23. Continuing with the analysis of the (2) The solder must be uniformly distrib- nature of solder, there is one item which,uted over the unit and base metal. when present, can destroy solder and its (3) No residue such as flux or oxide is left usefulnessdirt or contamination. Every time on the surfaces. you make a solder joint, everythingincluding (4) No solder reaches the shield of the wire. your iron, parts, wire. and solder must be clean. After the joint has been formed it mustThis is a fairly short list for a good solder be cleaned again. The solder joint isn't anyjoint,yet it does cover all the important better than what you put into it. If at anypoints of inspection necessary to identify a point in the operation you carry impurities togood solder joint. Now study the list which the joint, it will not be a good joint. You follows and identify the soldering defects you could go even further than that and say thatcan see in figure 32. Select a defect found in it has no chance of being anything butthe illustration and write its corresponding rejected. letter in the space provided for it on the list. 4-24. Flux. Flux is a substance used in Stay within each group. soldering andisessential to prevent the oxygen in the air from combining with the GROUP I metals. Without flux, heating a metal causes a _ Charred insulation combining of the oxygen and the metal, and a Insulation gap too long film of oxide results. The oxide prevents the Broken strand solder from fusing with the metal. If, prior to Insufficient solder the soldering operation, the metals are thor- GROUP 2 oughly cleaned and immediately coated with Melted insulation a thin film of flux, oxidationis prevented. _Scratches in solder Solder then fuses nicely with the surface of .._ _Spilledsolder the metals. There are two classes of flux _ _Solder or rosin splattered on surface corrosive and noncorrosive. Zinc chloride, _Insulation gap too short hydrochloric acid, and sal ammoniac are in GROUP 3 the corrosive class.Corrosive flux should Lead improperly formed never be used in electronics repairwork, since Bird caging any flux remaining in the joint,in time, eats No fillet through the connection and creates a high- resistance circuit. Rosinis a noncorrosive GROUP 4 flux, andisavailableinpaste, liquid, or _Fractured joint powder forms. All electronics soldering must be done with noncorrosive, nonconductive GROUP 5 rosin fluxes conforming to Military Specifica- lead length tion MIL-F-14256, Type A, and Federal Bare copper along lead Bure lead kngth Specification QQ-S-571, Type RA (refer to Excessive kad length table 4 in the workbook for a list of standards Lead misplaced which give detailed explanations of all aspects of soldering). Liquid rosin flux should be used GROUP 6 only for the following applications: Damaged terminal Removal of excessive solder from a joint Foreign material in solder Strands misplaced at cut end by wicking on a stranded wire. _ Pits in solder Soldering of nickel-plated wire. _ Excess so(der When used with flux-cored solder, the liquid Wel)VP flux must be chemically compatible with the _ . Pointsand/or hump% in solder __Solder ..plattered on component solder core flux. .... Scraped lead 4-25. Good and Bad Solder Joints. Figure 32 (in the workbook) shows the difference ANSWERS: between good and bad solder joints. Study Group 1: A, B. D, C Group 5: M, P. 0, X, N these illustrations carefully and learn to recog- Group 2: E. H. G. t, FGroup 6. S, T, R, U, W nize the faulty joints by comparison with the Group 3: K. d. L oup 7. Z, Q, V good. From your study you should have come Group 4 Y 35 MULTI STRAND WIRE COAX BRAIDED SHIELD CORE REMOVED

6 TO 8 INCHES

Figure 33. Wicking tools.

4-26. Desoldering. Although thereare vari- ployed. First the principles are examined. ous techniques whichcan be used in desolder-Then the steps needed to perform the taskare ing, we will explain only the "wicking" andlisted. "sniffing"techniques. Each of these tech- 4-27. Wicking. Refer to figure 33,A, and niques is very effective as. an .aid in the observe where .a typical source of wicking desoldering task. In each process the principle material cam be obtained. A wicking solder which is employed is that toremove nliilten removal unit may consist of a braided shield solder from a previously soldered joint,some wire with the core removed, or itmay be a physical force or attraction must beem- piece of wire containing many strands.

SOLDER JOINT

.- .7 ; .7.

Figure 34. Wicking application. 36 REMOVAL IRON OF SOLDER SOLDER FRoAt SNIFFER REMOVAL OF SOLDER FROM TERMINAL D-SOLDER

Figure 35. Sniffing application.

4-28. The preparation steps for making an Place the wick on top of the solder joint effe,ctive wick from these types of materials to be removed. are as follows and are shown in figure 33,B: Place the iron tip on top of the wick. The (1) After removing core materials, flattenheat of the iron will melt the solder and the the shield with a bending tool. solder will flow into the wick. (2) Dip the wick in liquid solder flux of the v.Clip off the wick containing removed eaine té 61' itsiri -fig 'was 'or will-be used insolder, and repeat the operation until all repairing operations, to about 2 inches deep. solder is removed from the joint. (3) Tin the end of the wick with solder and a hot iron. 4-31.Sniffing.Inthis method, a tool (4) If using a multistrand wire, strip the fashioned as a syringe is used (refer to fig. cover back about 4 inches. 35). This tool is made from a substance which (5) Flatten the wire slightly, keeping thedoes not form a bond with solder. Its use is strands uniformly in place. not as highly recommended as the wicking (6) Dip the wire into liquid rosin. method, but it is effective. (7) Tin end of wick. 4-32. The sniffer or, as sometimes called, "solder sucker," uses the force of air pressure to accomplish the sniffingremoval of solder. 4-29. The principle of wicking simply This is done as follows: explainedisthat by applying heattoa Squeeze the air out of the rubber ball at well-saturated rosin wick, the solder will flow one end of the sniffer. readily into the rosin area, leaving the termi- While keeping the ball depressed, place nal to which it was previously affixed. It isthe pointed end of the sniffer tube next to almost as if by osmosis that the solder travels the solder to be removed. intthe saturated wick. Heat the solder with a solder iron, 4-., ). When preparing the wicking unit, use keeping the tip of the iron in the solder and a wiz: size no larger in diameter than the pad not on the sniffer. you will be wicking solder from. This Slowly release the pressure on the sniffer is important because the wick, ifal- ball, allowing air to enter the ball through the lowe touch the board, will cause tro sailfer-ttibe:As the air enters, it will pull the eyeingif the material on the board...R.efefto molten solder into the tube with it. figure 34 for a pictorial application of wicking After the solder has been pulled into the as listed below. sniffer, remove the sniffer from the joint and, 37

44 .33

by depressing the ball again, force the col- Dry with an industrial lint-freerag or lected solder from the sniffer tube. paper- 4-37. Circuit board. The above list of 4-33. Each of these methods is effective for "do's" for preparation also applies to circuit removal of solder from a joint. Cautionmust boards. However, because circuit boardsare always be used because of heat, component composed of many substances whichcan be reactiOn to heat, and possible damage tobase harmed, the wire braided brush must not be materials and adjacent components.Prepare used; instead, the white typewritereraser can the work area and tools properlyso that a be used in its place. This tool is very effective minimum time of heat application is used because it can be sharpened to a point and when desoldering. can be controlled. Use it to clean surfaces to 4-34. Preparation. Preparation of boththe be soldered. Remove dirt, contaminants, gold tooLs and the surfaces to be solderedmust be plating, and any other foreign substances considered in order to effecta successful from the pad or pads to be soldered; clean preferred solder joint. This discussion includes with alcohol and brush and then dry. preparation of the (1) soldering iron, (2)the 4-38. Forming. Forming leads fromcom- component leads which are to be soldered, ponents to properly fit the circuit in which and (3) circuit and pad. they will be installed requires carefulcon- sideration and examination. Particular han- 4-35. Soldering irontip.Every time a dling must be used in order to have successful solder iron is to be used, it must be examined application and guaranteed usefulness. Refer to ascertainits condition for use in the to figure 36 (in the workbook) and the steps soldering task to be performed. It should be: that follow. Properly connected or screwed into the Bend component leads, using a bending holder. tool in such a manner that the radius of the Clean of oxides. bend is equal to twice the thickness of the Shaped properly for the task it will have lead wire (refer to fig. 36,A(1)). to be used on. Start the bend no closer than 1/16 inch Tinned. from the component body (refer to fig. 36, A(1 ),( 2),( 3)). If any one or more of these items is notas it Center the component between its solder should be, preparation is needed: connectionsunlessspecificationsdictate otherwise (refer to fig. 36,A(2)). Scale oxides from the tip surface withan abrasive cloth as in the case of ironor plated After insertion into a circuit board,use tips. the bending tool to secure the component by Form the tip into the proper shape by bending the protruding lead 450 (refer to fig. 36,B(1),(2)). filing. This must be done on unplatedcopper tips because of pitting, burning, and oxidation Cut the lead so that no portion when to the tip surface. Heat iron to the minimum point where solder will melt and coat lightly the entire soldering point. To maintain a clean tip after the iron has been prepared, prepare a wet sponge, either natural or synthetic, and use it to wipe heated tips to remove dirt, grease, flux, oil, or any foreign matter which could, if present, become part of the solder joint and cause the joint to be classed defective. 4-36. Component. Each component, wire, or terminal to be installed in a circuit required physical handling duringits manufacture, processing, and shipping. Further handlingby you is required to shape its leads pyoperly, cut the leads, etc. After all handling is done: Clean the surfaces which must be soldered with the braided cleaning tool. Dip the stiff bristle brush in alcohol and brush the surfaces just cleaned. Figure 37. Applying solckr. 38 el tj7 the rules, but they are the most essential to 31/. general applications you will use in your maintenance area. Cleanliness is the watch- word. 4-41. Soldering. Each component, wire, or terminal prepared for soldering must have the solder applied in such a manner that: The solder will form a bond. It will flow readily, providing the complete immersion of all elements of the joint. Figure 38. Integrated circuit; It will cool and solidify into a bright, flake-free surface. bent flat exceeds the perimeter of the pad There will be no obscurity of the shape (refer to fig. 36,D). of the elements in the joint. Press the cut lead firmly against the pad (refer to fig. 36,B(3), D). 4-42. The best way to do this is to place Cut the lead on a turret so that the wrap the iron at a 45° angle with the tip touching around the turret will reach 180° past the both or as "Many elements of the joint as first point of contact with the turret (refer to possible, as shown in figure 3'7, and start the fig. 36,C). solder flow near the iron. Pass the solder Cut the lead the thickness of an AWG around the joint and end near the iron. #20 wire on a joint where the lead is not Remove the iron, and let the solder (still bent. remaining near where the iron was) flow into that place, completely covering the elements 4-39. In all cases, whether it be leads from of the joint with solder. This technique is components or wires, the forming provides applicable for almost all soldering applications two main functions. These are the (1) secur- except certain integratedcircuits(IC) de- ing of the lead to the circuit and (2) providing signed units. proper stress relief. This relief is needed to prevent rupture of the component lead from 4-43. Soldering of Integrated Circuits (IC). the component itself. In the case of forming a Certain ICs are designed as shown in figure wire, the wire should be able to move slightly 38. This type of IC does not require any without rupture of the turret or terminal, forming and does not protrude through a without having stress pull on the solder joint, printed circuit card. It is normally soldered to or without causing rupture of the wire the component side of the card, as is shown in strands. figure 39. This soldering is accomplished by 4-40. The preparation of tools and com- more than one techniquethe electric arc or ponents is probably the most critical phase in an electrode supplying current and the meth- this entire task of removing and replacingod shown in figure 39. You place the iron components. Its variety of situations and near the tip of the IC lead and onto the pad. tools makes it extremely important for you to Place solder in the space between the tip of exercise care and observe strict compliance the IC, the iron, and the pad. The heat will with tl.rules listed herein. These are not all allow the solder to flow under the IC tip and

FEED SOLDER HERE

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Firm 39. Integrated circuit installation. 39

42 3$.

lead and form a bond. This technique is called Allow to cool and solidify. Do not bridging. disturb. 444. Task Lists for Repair and Replace- Clean with alcohol. rdent. Let's examine this subject from two Apply hermetic sealer if applicable. viewpoints:first,the general tasks of the preparation and work done prior to desolder- 4-48. Checks. Perform static check before ing arid soldering, and second, the soldering the hermetic seal is applied. (Refer to the tasks themselves. technical order for the appropriate sealer.) 4-45. General Tasks. Perform the check with a VOM by measuring Observe and record how the component for resistance on the lowest scale. Do this by is placed before removing it by observing touching the solder with one VOM lead and polarity, placement angle, positioning, insulat- the wire or component lead with the other. ing requirements, and adjacent heat-sensitive Any reading except a short reveals a defective components or substances. joint. After completing the static checkon all Label the elements to be removed. joints repaired, clean the surfaces again with Remove any assemblies that will facilitate alcohol, and seal. Perform dynamic checks in repair. accordance with specified standards, or by Locate replacement procedures in techni- inserting in an actual circuit in the case of cal orders or manufacturers' manuals. PCB, or apply power in lamp fuse and switch Remove power if applicable. replacement. Prepare work area by removing obstruc- 4-49. Special Attention Area. The subjects tions, obtaining sufficient light, and obtaining in this area are mainly crystal type semicon- the tools necessary for the job. ductors,solid-state devices, and microelec- Examine and prepare tools, irons, etc., tronic, IC components (shown in fig. 40). The for the job. discussion consists mainly of identifying the special care needed when installation of a new 4-46. Task list for removal of a component. component is required. Remove any hermetic sealer from the 4-50. The primary consideration needed soldered joint to be worked on witha when replacing one of these devices is heat chemical agent. Refer to instructions in the control. Heat will destroy all of these com- TO for proper chemical agent. Look for the ponents. Therefore, a heat sink is required miliatry or-Fedelal specification listing. while soldering. Excessive heat may melt the Clean with isopropyl alcohol. internal leads from the component or destroy Wick solder from joint, using either the the solid-state junctions, which the following wick or sniffer technique. paragraphs outline. Remove element(s) from joint. Clean joint. 4-51. Observe how an IC is formed by studying figure 41. See how it is composed of layers or strata of semiconductor material. 4-47. Task list for the replacement of a During the formation of the circuit, each component. layer is designed to perform a portion of the Clean leads of new elements with clean- circuit as a P or an N type material or resistive ing tool such as braided tool; use abrasives as coupling or bias junction, etc., and from these applicable. points, wire of extremely fine AWG thickness Remove insulation if a wire lead. is affixed and fed to one of the external Form the strands if multiple. connecting wires or leads to which you will Tin to 1/8 inch from insulation. solder.If the ICisfairlylarge and the Form the element. conductors are side mounted to pass through Clean with alcohol. a PCB, as shown in figure 40, the heat sink Tin elements. may be easily fastened to the component side Place elements in the joint, of the card, The case of a round IC is usually Fasten heat sinks to protect heat-sensitive heat sinked when the leads are passed through items. the PCB and no place for a heat sinkis Apply solder iron to joint. possible on each connector lead. If a flat pack Feed solderintojoint, covering all IC is used, a heat sink may be laid close to the elements to provide a complete sealing. Do body of the IC, and the solder flow from the not use so much solder that the shape of bridging is effective; no heat damage to the elements in the joint are indistinguishable internal connections of the IC will occur. Remove solder iron and feed solder into These general rules also apply for crystal space occupied by iron. units. 40 4 5 '

loithi4v(th-s.40di'oe-theseibt*, or* relidi are properly. ifeine.,!**ith othepeleetronie',.des,igned. **0040niti:' "3tirt,:the.lotiii.no:00er.tho, 1a6 ,in.611.,,' ,4:-53 . ilfyoii wotk -on .:eciu ipthent .having tro*thibcidY:Of 44e Ooponeoi: ,,OinilicipOts. 'like .these, then 'you inustin

Cent.ii,iliadomporient.**een:, pads!. , &Wald* tO applying the general informa-

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Figure 40. Integrated circuit designs. 41

4 6 3 7

TRANSISTOR RESISTOR

DIODE

INTERCONNECTION COLLECTOR

BASE EMITTER OXIDE

Figure 41. Integrated circuit composition. tion given herestudy the specifications ofproper voltage and wattage rating, bending allowable solder iron sizes, voltage ranges, and tools, cleaning tools, and alcohol. Useproper other factors related to the placement inrosin flux. Understand that SN63 is the best circuits.Thisisso that you thoroughlytype of solder for soldering of electronic understand the damage you can do if you components; however, 5N60 is acceptable. improperly repair a unit. Recognize defective solder joints as cracked, 4-54. Conclusions. Replacement techniques pitted, cold, stressed, impurities in solder, and always include safety, removal, replacement, excessive flux. and testing. Remove power, mark wires to be 4-56. Wick or solder-suck solder froma removed, remove component leads, and re-joint requiring removal and replacement ofa move component. Clean leads and connector, component, and prepare your tools for the replace defective component-with a good one, job. Be sure your iron is clean and tinned; install leads, and check by static and dynamic that all surfaces to be soldered are clean and means. Be able to identify where in the -2 TO dry, including the wire, lead, pad, and solder. the chapter that lists the repair and replace- 4-57. Apply sufficient heat to allow solder ment techniques is located. Also rememberto flow, and apply solder so that a complete that the IPB, the -4 TO, lists the componentcoating of solder rovers the entire joint but part number and shows its placement in the does not obscure the definition of the com- circuit. ponent leads in the joint. 4-55. Secure the proper tools for perform- 4-58. On crystal devices and microelec- ing this task; include soldering irons of the tronic circuit elements,Ilseheat sinks to 42 4 7 306 protect the semiconductor structures in these corrosions and types; recognition of corro- units when soldering, whetheritbe the sion; preventive maintenance, including uses component lead to a pad type solder joint or of protective coatings and cleaning; and a the bridging technique. partiallistingofregulations and military 4-59. Improperly learned techniques can standards you may wish to secure for a deeper result in equipment deterioration and corro- study in this problem. First, let's consider sion. Therefore, you must understand some responsibilities. facts about corrosion in order to be able to 5-3. Responsibilities. The problem of corro- prevent it. sion control is acute. The Air Force has established distinct lines of responsibility for its 5. Controlling Corrosion prevention and control. Although not speci- 5-1. Corrosionthe silent, devastating de- fically named, these regulations do designate stroyer of computers and data processors you as the man most responsible for the suc- must be combatted continually. It may be cessof the program. For instance, AFR found almost anywhere, and it takes on many 400-44 lists specific areas for prevention and forms, shapes, and colors. This section ex- control of corrosion. The responsibility for poses the enemy and identifies the plan ofcompliance rests with you as well as your attack used to combat it. supervisors.. These areas are: 5-2. General. Corrosion, as defined in AFR Selecting component and protective coat- 400-44, Corrosion Prevention and Control ing materialsto minimize susceptibility. Program, is "Deterioration of metals owing to Applying protective coatings during or electrochemical or chemical attack resulting after fabricationcorrective maintenance. from exposure to natural or induced environ- Eliminatingcorrosion-inducingcondi- mental conditions, or from the destructive tions such as water retention and corrosive attack of fungi or bacteria." Since you are environments. new to the field of electronics, you probably haven't devoted a great deal of thought to the The regulation alsostatesthat corrosion problem of corrosion as it affects electronic control will consist of minimizing develop- equipment. The subject may or may not have ment of and damage from corrosion by been brought out intechnical school. In properly identifying, isolating, and eradicating either case, we present a comprehensive study corrosion and properly protecting equipment of corrosion and its direct threat to your on a timely basis. maintenance record and your equipment. The 5-4. Terms. Before proceeding with the areas to be covered include responsibilities of requirements for corrosion and other aspects maintenance personnel; terms; the require- of corrosion control, let's examine some new ments needed for corrosion to form; causes of terms you will see in this study:

TERM DEFINITION ABRASIVE Any substance used to wear, scrape, or grind away by friction as for grinding, polishing, etc. ALKALI A chemical that gives a base reaction (a substance which neutralizes an acid). ALKALINE COMPOUND A compound able to produce hydroxyl ions in solution, or having the properties of hydroxyl ions when in solution. ALLIGATORING A condition where cracks in the film are caused by contraction of the coating when a sudden change in temperature occurs during drying. AMPHOTERIC METALS Metals having both acids and bask properties. ANODE The positive electrode. ANODE CORROSION The electrochemical reaction with soluble anodes that causes the metal ions to go into solution at the positive electrode. ANODIZING The formation, by electrochemical means, of a thin oxide film on a metal surface. BOND A plate held to a basic metal by molecular forces. CATHODE The negative electrode. CA"'HODE EFFICIENCY The ratio of actual metal deposited on the cathode to that which is theoretically deposited, based on the amount of current. CONDUCTIVITY The ability of a solution to conduct electrical current. CONDUCTOR Any substance capable of passim .lectric current. 43 TERM DEFINITION CORROSION Action or effect of a material being eaten away by degrees through chemiCal action; also pr.oducts formed as a result of this chemical action. CORROSION- Chromium, nickel, tin, tin-lead, solder, titanium. RESISTANT METALS ELECTROCHEMICAL A process involving a change in composition as a result of electricalcurrent PROCESS or production of an electrical current by chemical reaction. ELECTROLYTE Any substance which, in solution, is dissociated into ions and is thus made capable of conducting an electric current. ENCAPSULATE To coat a component or assembly by dipping, brushing,or spraying. Generally used to, protect components from environmental and/or handling processes. FERROUS Compounds of iron in which ironis bivalent (combining of atom structures). FERROUS METALS Alloys containing iron. GALVANIC GROUP A list of metals having the same EMF characteristics. HERMETIC Permanently sealed by fusion, soldering, or othermeans, to prevent the transmission of air, moisture vapor, and all other gases. ION Acids (like hydrochloric acid), bases (like sodium hydroxide),or salts (like nickel sulfate) consisting of elements or a group of elements held together by electron attraction. When they are dissolved in water, the elements held together by electron attraction dissociate into particles that bear electrical charges. These charged particles are called ions. INHIBITOR A compound which restricts chemical reaction, especially corrosion. OXIDATION Combining with oxygen or increase in the positive valence ofan element. OXIDE FILM An adherent coating resulting from the chemical reaction thatoccurs when a clean metal surface is exposed to air. PASS/VATION Rendering a metal inactive to chemical reaction or activity. POLYMERIZATION The reaction of two or more molecules of the same substance to formnew products of higher molecular weight and, therefore, of different properties but without changing the chemical composition. The end product is calleda polymer. SCALE A coating of metallic oxide that forms on a metal surface. SILVER MIGRATION The progression of metal from one conductor in a circuit to another which is at a different voltage potential. SURFACE TREATMENT Any chemical or physical process which affects only the surface ofan object. 5-5. Four Requirements for Corrosion. corrosive attack in which there is an electron Corrosion occurs under two conditions but flow between an anodic area and a cathodic must have four requirements for electrochem-area which are separated by some electrolyte ical action. Thedirect attack,which is de- (see fig. 42). In ofaer for electrochemical struction of a metal by a chemical such as corrosion to occur, four elements must be acid or salt, can occur if improper chemical present: cleaning agents are used or if the equipment is Anode exposed to sea air containing high salt content Cathode or air containing high amounts of humidity. Electrolyte The electrochemical reaction(acell)is a Conductor By studying in figure 42, you can see that the four elements are present. The electrolyte is 9 EliStrirt; the obvious element to eliminate to stop fp corrosion. It is interesting to point out that 2 ."2y...:72;t .,4*.a 4. Zoo& when you or someone in your shop repairsan elA0/17, //.; assembly and solders, you often have to clean oCTAI.COmOvCIOA off protective (hermetic) coatings from the ttICTROCNIVAICAL CORROSION parts on the assembly prior to working. This wi /AL ICH ttICTAC*4 action is similar to opening the door to nvOROGIN tON NYDNOCIN CAS MAIM corrosion. However, if any one of the four tool: .ACTAL NION0210/ (ALVALI) elements is absent, no corrosion will occur. So let's study more about this subject of electro- Figure 42. Corrosive cell. chemical corrosion. 44 4 9 METAL IONS It) SOLDER /1/.111 SOLDER OXIDE /.1..72....).%9X100 vEl!'":31141i. ROSIN OXIDE 'HVOROG I WATER VAPOR . *.%17.7ELECTROLYTE CELL. " .

A+ GROUP 5

b, aldoll

GROUP 4 GROUP 10

Figure 43. Corrosion pror,ess.

5-6.ElectrochemicalCorrosion.Three done by interposing of a metal such as silver types of electrochemical cells can form: between the coupling, or designing the gold (1) Galvanic cell dissimilar metal elec- area (cathodic area) to be small inrelation to trodes in a common electrolyte. the copper area (anodic area), or applying an (2) Concentrated cells similar electrodes inhibitor, a nonhygroscopic (passive) gasket in a dissimilar electrolyte (oxygen concen- between the metals. In any event, if your trate). equipment comes from the manufacturer (3) Electrolyte cell an electrochemical coated with a protective covering, it is be- cellsuppliedwith an external source of cause an electrolyte exists somewherein the electrical current (low constantpotential) design_ of the equipment and provisions have been apPlia- to- faWehtita tontactwith The galvanic cell is created by maintenance galvanic areas. One example: Gold-plated personnel during replacement of components, leads on integrated circuit packages. leads, and cable. Therefore, it is explained in 5-8. The rate of corrosion is determined by depth. The other two types of electrochemi- the distance between the metals on the cal corrosion are not frequently found be- galvanic scale. The greater the distance In- cause engineering in designphases of equip- tween dissimilar metals as listed on the table, ment manufacture account for these. How- the more corrosive the coupling. Also includ- ever, you should know of them. ed in the rate is the felative size of the anode 5-7. The galvanic theory, broadly defined, and cathode areas. As the anode area is that corrosion occurs between dissimilar decreased, the corrosion rate increases, anu metals when an electrolyte is,present. R.efer the reciprocal is true. to table 5 (in the workbook) and study it to identify the following data. For instance, note 5-9. The corrosion process can be explained the grouping of metals and conducting sub- with figure 43. The four elements are shown stances. Second, observe that each grouping is as being present: assigned an EMF value and, last, the permis- (1) The cathodic (A) the copper and sible coupling combinations. To analyze the nickel alloy resistor lead (group 5). data in this table, consider the use of gold (2) The anodic (B) the solder lead (group with coppergroup 1 and group 4. Now the 10). chart shows that these two metals are not (3) The electrolytic (C) moisture residue permissible for coupling; therefore, a protec- from soldering (oxides) but containing water. tive measure must be employed to eliminate (4) The conductor (D) current from the corrosive galvanic action. This may be region B to A. 45

, r- t.) ij Lii

LOw OXYGEN sion must be considered and prevention CONCENTRATION HIGH OXYGEN must CONCENTRATION be applied. CA THOOE Most pins are alloys;some are hermet- ically coated with PASSIVE FILM a metal to provide better or greater conductivity. If the coating isscraped or worn away, electrochemical corrosioncan V ANN4/ start. A c. Human hands contain destructive agents A SURFACE DIRT DEPOSIT IS COVERED ay A which eat metal. Thesegreases and corrosive DROP OF WATER CREATING AN OxyGEN CONCENTRATION CELL. chemicals attack unprotectedmetal surfaces and, with an electrolyte, startcorrosion. They also soften encapsulants and allowpenetra- tion of electrolytes. SR EAK IN FILM d.High-current-carrying components at- tract moisture and dirt and formelectrolytes which try to and do eat throughprotective coatings. e.Corrosionis accelerated by excessive wear on moving parts whichare exposed to environmental conditions. OXYGEN CONCENTRATION CELL PROOUCES A MAK IN THE PASSIVE FILM AT THE ANOOE. EXPOSING f. A high concentration of dirtcontaining THE ACTIVE METAL. water is another source of corrosion. 5-11. Causes of corrosion. Environmental surroundings provide the majority of electrolyte material needed for corrosion tostart. These are water in any form, acids, salts, and alkalis. a. Change in dew point Any system employing air for conditioningis subject to

THE ANCOE CORRODES AT RAPID RATE variations in humidity. These variations be- seause IT is IN CONTACT WITH A LARGE CATHODE. tween day and night cause more or less moisture to be taken into the system and Figure 44. Passive film rupture. cause the dew point in the equipment to vary. A removed and reinserted assembly will affect The corrosive area becomes a cell andassumes the humidity level within the unit and will the position of a battery in. a circuit. Group supply the environment with water. 10 material, solder, has an EMF voltage rating b. Uniform etching. This type of corrosion of - .50, and group 5 material, copper and is caused by chemical attack over the entire nickel alloy, has an EMF rating of- .20; surface. A good example here might be the therefore, current flows from the negative B turning black of a soldering iron tip. area to a more positive A area to the battery c. Galvanic causes. The concentration cell (corrosion cell), and a potential difference of may be one of three forms: .317exists. Because of the action of the (1) Metal ionmetal ions in water. electrolyte, solder atoms from the anodic area (2) Oxygen a concentration of oxygen break down into alkali particles. This action trapped in a cell. continues until one of the four requirements (3) Active-passive metals which depend is taken away. Since the anode provides the on a tightly adhel-ing passive film. When a low material for the alkali and the cathode does oxygen concentration is trapped by an elec- not, the alkali is created at the cathode. A trolyte, as shown in figure 44, the passive film proper solder joint in this example, would is chemically eaten and corrosion occurs. have provided the coupling sealer between the d. Pitting. This is evidenced by holes inthe copper run and resistor lead and provided a protective coating. smooth finish imperviotri to moisture, there- e.Intergranular. This is where corrosion by reducing the chance for galvanic corrosion. starts between grains of metal. 5-10. Let's examine a few places where 1. Exfoliation. This is a form of intergranu- corrosion can occur in data processing equip- lar corrosion. ment. g.Stress und fatigue. Thesecauses are a. Any time soldering is performed during usually found in and aroundareas supporting maintenance anywhere in the system,corro- high currents, or weights where actual break- 46 down of cells of metal can occur. Heated will be more grayish-white elements provide a source activity for this and quite voluminous. TIN-PLATED As tin corrodes, a white- area. COPPER yellow product appears on h.Fungus and bacteria. These elements the exposed copper. produce a growth of vegetable-like plant life MAGNESIUM Dry areas will have a gray and corrode the metals to which they affix powderycorrosionpro- duct. Moist ares4 will ap- themselves. pear green or black when corrosion is present. 5-12. Recognition. All areas of data processors are subject to corrosion andthe causes 5-13. The discussion thus far has revealed just mentioned bear this out. However, cer- that there are many recognizable signs by tain areas are more prone than others, andwhich the corrosion can be discovered. It these are identified here: therefore becomes all important to study a. Crevices. These exist in anyjoint where methods for the prevention of corrosion. two metal surfaces come in contact. Preventingcorrosionisoftenlesstime- b. Spot welds. Corrosion usually occurs consuming and more effective than curing the herebecause of entrapment of corrosive corrosion and restoring the equipment's relia- agents between the layers of metal (see fig. bility and functional capability. 45). 5-14. Preventive Maintenance. Preventive c.Moisture (boxes, switches, connectors, maintenance for corrosion can be divided into and other enclosures). Accumulated by con- two general areas: (1) the uses of protective densation through varying dew points, mois- coatings, including types and classes, syn- ture will also allow bacteria and fungi to thetic binders, and functions, and (2) clean- grow. These agents, if leftunattended, can ing, including when to clean, what to use, cause electrical shorts. Normally,6 months to how to clean, and what cleaning methods to 1 year is required- for these agents to cause use. serious problems. Moisture can accumulate 5-15. Protectivecoatings. A coatingis within a sealed unit because condensation is applied as a liquid and forms a solid, continu- deposited during a cooling period and cannot ous film after it has been applied.Coatings are escape when the temperature risesduring the divided into two main groupsinorganic and daily temperature variation cycle. Moisture organic. These substances retain their basic will therefore accumulate as a result of many properties after drying. Two tasks in which temperature change cycles. these coatings become extremely important d. Uncapped conduits. These are especially are crimping and wire wrappingof leads and prone trlmoisture collection when passed solderings. When performing a repair on, or through exterior walls of buildings. installing a new pin in, a piece of equipment e. Premature paint failings.These include and crimping is used, the protective coating blistering, fish eyes, and flaking. (if dissimilar metals are used) must not be f. Discoloration ,of metal and alloys. Nor- broken. Some pins have elasticity and, if the mally, metals and alloys are bright in color. correct crimping tool is used, the coating will When corrosion of these metals starts, distinc- not be broken. Since there is very little stress tive discoloration begins to accumulate. The applied to wires, the crimp usually secures the following list contains certain metals and their wire firmly without affecting the protective reaction to corrosion. coating. Soldering of componentsisper- formedinaccordancewithMIL-S-6872, METAL DESCRIPTION/REACTION 45743, 46844, and requirement 5 of MIL ALUMINUM Normallybright,itbe- STD 454. Solder and flux are selected in comes dull with a whitish powdery residue. accordance with QQ-S-571, type R or RMA. CARBON and Rust forms over the ex- Solder joints are to be protected with mois- ALLOY STEEL posed surface; it appears in CNIIIOSivt the form of a red-to-black Aotm, $11ORIANG WINS scale. OP 0111(11 HEIR Seim SPOT PILO CADMIUM-PLATED Corroding cadmium will STEEL form a dull gray coating which can be wiped off. COPPER ALLOYS Unfinished copper and its ;Z0E7 /A./.4i;z7isg alloys normally take on a :V/4 dark color like an old pen- tOaltOtiCs. ny. Corroded copper will IRMO UP be greenish-white in color. If corrosion is caused by acid such as flux, the color Figure 45. Corrosion in a spot weld. 47 I/3. ture-proofing coatings such as MIL-V-173or 5-20. When to clean. Today's cleaning MIL-I-46058, or as specified in the TO for techniques for aerospace equipment are no your equipment. longer a simple matter of applying water, soap, and elbow grease. Each piece of aero- 5-16.Classesof coatinet Coatings arespace equipment demands its own unique basicallyclassified as paints, enamels, var- cleaning techniques. A change of environ- nishes, and lacquers. There are two specialmente.g., moving equipment from an arid formsdopes and primers.. Each coating is location, such as Texas, to a hot, humid place, composed of a vehicle, which is a binder and such as SEAalso requires a reassessment of solvent, and a pigment, the color. cleaning procedures Periodic inspections must 5-17. Synthetic binders (resins). Coatings be established on a regular basis to insure that are commonly classified by the binder on cleaning is properly performed prior to the which they are based. The binder is important start of corrosion. because it limits the chemical and corrosion a. The appearance of dirt and grime on resistance of the complete coating. Coatings air-conditioning ducts indicates that immedi- play an important role in corrosion abate- ate cleaning is necessary. ment; hca-amer, improper coating substances b. Battery areas require close inspection can result in destructive corrosion accelera-and prompt cleaning when spillage or cor- tion. Two effective binders are acrylics and rosion is detected. epoxies. Acrylics are highly durable, have excellent resistance to light and weather, an. c. Oil and grease accumulations and spills are an ideal top coat material for epoxyshould be removed when detected. This is primer. Epoxies have outstanding adhesive particularly true for spills on painted surfaces properties as well as excellent chemical and because petroleum products will soften paint corrosionresistance.Epoxiesareformed systems and cause them to fail. when an oxygen atom, is joined with two resin d. High-humidity areas should receive in- atoms. spections for fungus, and when it is detected, it should be treated immediately. Elec- 5-18. Function of coatings. The primary tronic black boxes that are cooled by a function of coating is protection of the unit refrigerated forced air system are especially from environmental surroundings. Since most prone to fungus attack. coatings rarely succeed 100 percent of the time; -amore-direct method is sometimes 5-21. What to use. Proper selection of a employed. That is, a primer coat is applied cleaning agent and tools for a given prob- first, and it becomes the cathodic protection lem depend upon three important factors: surface; or a passive primer may be employed, type andamount of soil, condition and com- and it acts as a passive norzeactive agent toposition of parent metal,and degree of the environraent. Protective codtings are also cleaning desired.Soils may be placed into used to provIde: three classes: a. Surfaces to which other coatings may a. Oily soilsoil, chemical, skin oils. easily adhere. b. Semisolid soilsgreases or heavy rust b.Identification and/or marking. preservatives. c.Beautification. C.Solid soilsmud, corrosion, lint, dirt.

5-19. Cleaning. Recalling that an anode, a Each class of soil must be cleaned a specific cathode, a conductor, and an electrolyte must way. Oily soils are usually removed with be present simultaneously for corrosion to alkaline cleaners which are covered by specifi. occur brings us to a simple fact, but not so cation MIL-C-25679. Very stubbornareas simple task. That is, one of the four elements may be removed with solvent P-D-680, fol- must be removed to prevent corrosion. Clean- lowed by alkaline cleaning. It is important to ing removes surface contamination which, thoroughly rinse the area after cleaning to when .combined with moisture, forms the insure that no alkali remains. Semisolid soils electrolyte. These contaminants are dust and are also removed from a surface with the dirt and grime and grease, and they are the appropriatesolventfollowedbyalkaline prime enemies to combat in performance of cleaning. Solids must be removed with solvent tasks associated with general maintenance. followed by alkaline pressure siiraying, scrub- When performing the tasks already covered in bing, and rinsing. Remember, aging makes the this chapter and any other tasks requiring soil even more difficult to remove, so help hands-on work, clean the equipment thor- establish timely cleaning procedures for the oughly and properly to prevent corrosion. equipment. 48 5 3 5-22. Alkaline cleaners (i.e., MIL-C-25679) two techniques which can be used in cleaning. 4 remove soil by dispersing it from the surface These are the chemical and mechanical tech- and holding it in suspension with the cleaning niques. Selection of the method to use or solution. Fatty soils will react with the alkali combination of methods to use depends upon to form water soluble soaps; in fact, pioneer the type of corrosion detected, the degxee of women produced soap with the same chemi- corrosion, and the accessibility to the corro- cal reaction by mixing lye and grease. Alka- sive area. Consideration must also be made as line water-base cleaners are the most common to the types of metals employed in the type of cleaner used in the Air Force today. system. Some equipments are provided with When the cleaner is fully mixed, it is basically kits containing acids and dopes for identifying a water solution of silicates, phosphates, and themetal, and thenthe technical order wetting agents. It is useful in hard water prescribes the correct cleaning 'agent and because it tends to prevent the formation of application technique. Listed below are some solid hard water deposits. This cleaner per- of the common metals found in data proces- forms well on oily and traffic soils. The sors and ancillary equipment, and the typical solution must be thoroughly rinsed when treatment methods and agents. cleaning is finished. 5-27. The chemical technique is generally 5-23. Solvent cleaners remove soil by dis- applied for cleaning and removal of light solving it and usually leave a thin oily film corrosion. The removal of soil such as oil, which can easily be removed with an alkaline grease, dirt, lint, fingerprints, and other for- cleaner. Acid cleaners remove soil by chemical eign residue with various solvents and deter- attack and are often used to remove corrosion gents is an example of chemical cleaning. products. 5-24. Cleaning tools are as follows: METAL ORALLOY TREAT WITH COPPER and 1. Alkalinewater-base (1) Vacuum cleaners. COPPER ALLOYS MIL-C-25769 or (2) Brushes, all types, sizes, and bristles. P-5-661, TypeII,for (3) Abrasive papers, cloths, emery. greue. (4) Grinders, belts, disks, rotary files. 2. Vapor degreasing is ac- complishedusingtri- (5) Spray units using sand, steel balls, chloroethylene MIL- glass beads. T-27602. (6) Polish cloths, impregnated silicant 3. Generally, no protective cloths, lint-free rags. coating is required un lessspecifiedbyth manufacturer in the TO. 5-25. How to clean. Cleaning must be done in logically planned steps to obtain efficient, ALUMINUM ALLOYS 1. Alkalinewater-base cleanerMIL-C-25769, satisfactory results. or dry-cleaning solvent a. Assure that the cleaning apparatus and P-D-680, Type II. soiled equipment are close to each other prior 2. Mechanical methods for to starting the operation. removal of corrosion are recommended. b. Clean the soiled equipment as specified 3. Coat surface according in appropriate TOs. to TO specifications. c. Clean off contaminants by vacuum or wiping. MAGNESIUM ALLOY 1. Alk alinewater-base d. Apply the cleaner (if applicable) until cleanerMIL-C-25769 the soiled areais completely covered, and and solvent FED SPEC PD-680, Type II. begin cleaning at the lowest surface. 2. Use either chemical or e. Agitate the compound byscrubbing the mechanical methods to surface with a nonmetallic brush. treat metal. f.Finally, thoroughly rinse the cleaned 3. Apply protective coat- area. (Remember, alkali dissolves arnphoteric ingaccordingto TO metals.) Inspect areas such as seams and lap specifications. joints to insure that the cleaner has been rins...0 away. If the cleaning compound dries FERROUS METAL 1. Alkalinewater-base cleaner MIL-C-25769 or on the surface, streaking will occur. FED SPECPD-680, g. Apply abrasives or blastingif severe Type 11. cIrrosion exists as is specified in the TO or 2. Mechanical methods are MI L specification. recommended. 3. Prime and paint imme- diatelyaftercleaning 5-26. Cleaning methods to use. There are and treating. 49 METAL OR ALLOY TREAT WITH Program. Change 1, 8 March 1968, explains STAINLESS STEEL 1. Alkalinewater-base ground C-E-M responsibilities. and NICKEL-BASE cleaner MIL-C-25769 or b. AFR 400-44, Corrosion Prevention and ALLOYS dry-cleaningsolvent Control Program. This regulation explains the PS-861, Type II. 2. Mechanical methods are program and assigns responsibilities for attain- usedwhenchemical ing the objectives. methods are impracti- c. MIL-STD-1250 (MI), 31 March 1967, cal. Corrosion Prevention and Deterioration Con- 3. Chemical methods are trol. This standard is designed to establish recommendedonin- stalled components. minimum requirements for the control of 4. Methylene chloride or corrosion. It also lists all military and Federal trichlorotthylenemay specifications which apply to electronic and be used for wiPing sur- electromechanical components and electronic faces, but surface must then be cleaned after equipments. chemical corrosionre- moval with alkaline or 5-30. Conclusions. The more we study dry cleaning agents. corrosion, its control, prevention, and treatment, the more we begin to realize the impact The application explained here is concernedit has on the reliability of the system and the with light corrosion. Heavy corrosion canvast areas it may strike. The threat is real and exist and, if extremely severe, the corrodedacute. The manufacturer of the equipment components may hue to be removed and studied the problem and provided, as best he treated or replaced. could, a product which should not corrode, 5-28. The mechan;cal technique is usuallybut he cannot present you with a 100-percent associated with the removal of heavy corro-sealed unit unless it is in a vacuum. Therefore, sion in which abrasive papers, wheels, andyou must use the knowledge gained from this disks are used, or blasting is used. However,text in the performance of your tasks which mechanical techniques can be used when light expose areas to corrosion. Remember, when corrosion exists or especially when electrolyte dissimilar metals, an electrolyte, and a con- contaminants are in evidence; e.g., dust, dirt,ductor arepresent,corrosionwill occur. mud, condensation, humidity, fungus, and Preventing corrosion is easier than treating it. silvermigration. Inthis area of control,So clean thoroughly with proper solutions mechanical means of cleaning, such as using and use filter paper, filters, etc., to reduce the lint-free rags, brushes, or vacuums, representarea where moisture can collect. Clean off preventative maintenance as a way to controlgrease deposited from hands, oils, and other corrosion by its prevention. chemicals which may perform a direct attack. 5-29. AF Regulations, Manuals, and Mili- Also, remember that grease deposits may trap tary Specifications. The following partial list oxygen, and the chemical action resulting of military publications is presented here for could be that a protective epoxy coating your use in becoming knowledgeable to the could be softened and penetrated and corro- threat of corrosion. A study of these publica- sion could result. Poorly repaired assemblies tions willbenefit you and improve yourwith improper solder joints, flaked solder technical competence. residue, burned or charred flux, impurities in a. AFR 66-8, Maintenance Evaluation Pro- cleaning solvents, phenolic flaking (PCB base gram. This regulation explains and assigns material) or burned residue all lead directly to responsibilities for a Maintenance Evaluation corrosion.

53-

50 Lg.

MODIFICATIONS e)4.5 of this publication has (have) been deleted in ada ting this material for inclusion in the "Trial Implementation of a

Model System to Provide Military Curriculum Materials for Use in Vocational and Technical Education."Deleted material involves extensive use of military forms, procedures, systems, etc. and was not considered appropriate for use in vocational and technical education. (3) vertical and horizontal methods used to form lists of data and voltage signal distribution routes. 7-2. Elements. In Section 6 we discussed the various numbering systems employed for Air Force . equipment, and we broughtout that by using a numbering system you identify a specific location in your equipment. In Chapter 2 we analyzedconnectors and learned exactly what a jack is, what a plug is, and what a fixed connector is. Both of these subjects are brought into focus in this section. Each one is directly related to the discussion on interpreting wiring diagfruts because you must identify and understand the layout of the equipment in order to effectively trace data or voltage through cabinets and units. The following list of terms will aid you in understanding the explanations that follow.

TERMS DESCRIPTION BAYS or 1. Assembliesusuallyreaching RACKS from the floor to the ceiling within a cabinet. 2. They may be fixed or hinged. 3. They usually contain chassis, drawers, or subassemblies. 4. They generally have a distinctive identifying location number. 5. Theygenerallyprovidea major function for the overall unit or system. CABINETS 1. A unit or OA group consisting of a functional group of assemblies designed for a specific purpose. 7. Interpreting Wiring Diagrams and 2. Examples: Console, printer, data processor, memory unit, Correlating the Diagrams with Connectors, input device. Interconnecting Cables, Cabinets, and CABLE 1. A length of wire, either single Remote Equipment. ormultipleleads,usually 7-1.Interpreting wiring diagramsis an coveredwithaprotective extremely important task of any qualified outer weatherresistant coating. maintenance technician. This is especially so 2. Generagy, the cable is labeled when you realizethat your equipment is with a "W" and number, iden- often made by different contractors and is tifying it. linked together through cables. Each unit, OA 3. The label often contains the (operational amplifier) group, assembly, or length of the cable and the connecting units to which it is subassembly has some form of interconnect- attached. ing wiring. Each unit contains interconnecting CHASSIS 1. Assemblies or subassemblies cables within the unit. It therefore follows within a unit designed as a that a complete understanding of the data logical assembly which nor- flow between units and within units and a mally provide a function for comprehensive knowledge of the techniques the unit. employed bycontractors to interconnect DRAWER 1. Similartoachassis,only components is essential for you. You have designedto be rapidlyre- been through school and have learned to read moved and replaced. logic. You probably received some explana- FILTER 1. Usually an assembly panel af- tion on rack jack signal tracing. You may have PANEL fixed to the outer shell of a unit for the purpose of filter- heard of the main distribution frame, filter ing data leaving the cabinet. panel, or junction box. In this section you 2. A filter panel may be remote will study (1) the equipment and terms of the from theunit, but itstill system, (2) the technical order references, and provides the same function. 55

57 Lir

'V L/NIT NO. 13 Installation layout. Requirements for power and environment. Site considerations. ROw A Inspections of installations. ROw II NOw C 120615/03 In the descriptions and tables in this TO, the MIS data needed to interpret wiring diagrams is: COORDINATE SYSTEM OF PART LOCATION USED FOR THIS ITER Cable identification cable number. Routing data. Termination. REFERENCE LOCATION COOE 0 SIGNATION Jack and plug pin lettering and wire color coding. UNIT NO. PART SURASSENISLY Component part number. SUSASSEMOLT SUISASSENBLY 7-4. The circuit diagams manual, the -3 Figure 51. Location coordinate coding. TO (unless Sections III and IV of the -2 TO are used), provides the technical data for point-to-point signal tracing of data. This may TERMS DESCRIPTION be accomplished in various forms. It may be JACK 1. The more fixed connector of in the form of a wiring table as used in the a mating pair. 416L and 465L systems, or it may be in the 2. Designated by the letter "J" or form of a plug and jack layout as in the 416L MAIN FRAME 1. A common focal point where or 412L systems. This TO also provides data (MAIN DISTRIBU- cables from units and assem- on cable numbers between units, between TION FRAME) blies are joined to elements units and main distribution frames, and be- within the frame in order to tween units and filter panels. Quite frequently allow passage of signals be- the "J" number on the unit or component is tween units. 2. This unit reduces the need for shown on a block diagram along with the "W" extensive cabling; allows for wire number. We will examine some of the rteater distribution of signals methods most commonly employed, and you and greater variety of equip- must determine which method is used in your ment configuration. 3. This term is not to be con-system and where it is used. NOTE: See fused with the definition of a comment in Preface about TOs. main frame used in computer 7-5. In the following paragraphs you partic- terminology. ipatein the identificationof connecting PLUG 1. The most movable connector points of signals in a problem-solving type of of a mating pair. 2. Identified by the letter "P." presentation. After the titles Data Signal Flow TERMINAL 1. A rectangular unit consisting I, Data Signal Flow II, and Data Signal Flow BOARD of multiple connectors, usual- III, carefully study the italicized objective of ly screw type. each problem; then proceed with its solution. 2. Designed to connect two or 7-6.Data Signal FlowI.Identifythe morelinestoaspecific interconnecting connectors of a data signal source.. 3. Quite often found in high-from its originto its point of use.This voltage power units, high-volt- situation presents one signal which is routed agecouplers,filterpanels, through components, jacks,cabinets, and mainframes,andcircuit cables so that you can visually trace the signal breaker boxes. Usually desig- asitproceeds from point to point. The nated "TB." objective here is to identify each connecting UNIT 1. A major assembly. It may be a cabinet or an AN item; it may point and, by forming the alphanumeric code, be an OA group; in any event, relate the number to a real place in the it is a numbered item. equipment. By proper full aiphanumeric for- mulation and sequential listing of the num- 7-3. Technical Orders. Two technical orders bers, you will easily know when you have which are used most extensively while work- exited a chassis, rack, bay, or cabinet. ing with equipment numbering are the -2 and a. Before making your wiring list, follow -3 TOs (service manual and circuit diagrams along as we show you how the range marks manual). The service manual, the -2 TO,axe routed. Refer to figure 52,B (in the provides in Chapter 2 the technical data for in- workbook) and locate module location XA22 stallation of equipment. This chapter defines: in cabinet 45. This is the origin of the range 56 3988 58 marks. Follow the connecting lines through 7-7. Data Signal FlowIIIdentify and list XA13, 12, and 14, out of the rack jack J2, the connecting points of a multi-used signal, out of the cabinet jack J17, through cable using the chartandaccompanying figuros 53 W6060 into connector panel A14, jack J2 of and 54(printed as a foldout and placed at the cabinet 46, through.rack jack J2, into module back of the workbook). In this problem, data XA2, then to module XA1, to the HVC generated from module 611 is to be used in (high-voltage coupler), out of the coupler into various portions of the FGD (fine grain data) the rear of the CRT and to the displayed equipment. It is also routed to two remote range marks on the CRT face. When you, as units, the SIF (selective identification feature) the man who has to identify this routing data, unit and the SM:137 Simulator. Again this compileit as shown in figure 52,A, itis circuitry must be studied with the approach complete. However, when you physically try that data tranderred to other areas and units to locate these points and the signal is routed, must be routed by cables through connectors, as you can see, from chassis to racks to and all the connecting points must be iden- cabinets to other cabinets, your wiring list tified. takes on a physical dimension and you must a.Refer briefly to figure 53 and observe translate these physical characteristics into that the original generator 611 is distributing knowledge and understanding of the nomen- its output to five main paths. Three paths clature of the connectors as well as their complete their action in the FGD cabinet, and physical placement. Now complete the list of the other two, one goes to the SIF andone below. to the SM-137. b.Refer to figure 52,A. List, by using full b.Now follow along and observe from the alphanumeric code and the vertical listing pictorial view in figure 54 how the physical method, the assemblies, jacks, plugs, and routing of the signal is accomplished. Find cables in order from the range mark generator card location 611,the darkened rectangle in to the CRT. the FGD cabinet,bay600,subassembly 601-640: (1) (9) (2) (10) (1) Follow the solid line from 611 to 629. (3) (11) Thisisthe termination of this leg which (4) (12) generates a new data signal (RM6). (5) (13) (6) (14) (2) Also from 611 to a pin on 613, the (7) (15) signal is fed through 613 to 623, where it (9) generates another signal (TP1). c.List the jack/plug and terminal board (3) Follow again from 611 the line to 613 connectors forchassisandcabinetsusing the (another pin) to 614, through 622, through full alphanumeric Tode. jacks and plugs, to bay 800, through more Chassis Cabinet jacks and plugs, out of the FGD cabinet, into (1) the SIF cabinet, and more jacks and plugs in (1) the top of bay 400, to drawer 50'3, and jacks (2) (2) (3) and cards in rows 3 and 1 of drawer 503. This (4) signal terminates in card 503103 of the SIF unit. d.Your responses toparagraphbabove (4) Again follow another output from 611 should have been: to 616 through the jack and plug 602119, out of bay 600 into the lower portion of bay (1) 45A2A1XA22-7 9) 46A2A1P3/A2J2-G 800/900 to location J/P980112. This signal (2) 45A2A1XA13-16/4 (10) 46A2A2XA2-16/6 (3) 45A2A1XA12-17/6 (11) 46A2A2XA1-8/6 exits bay 800 here and is routed by coax lead (4) 45A2A1XA14-19/6 (12) 46A1A1OT82-6 to lower rack jack 4960 of bay 4800. From (5) 45A2J2/A1P2024 (13) 46A1A10 there it goes to jack plug 4682117, and then (6) 45A1J17-6 (14) 46A1A1OTB1-1 into card 4693018. The signal is terminated at (7) W6060 (15) V1-3 A4693. (8) 46A1A14J26 (5) Locate 611 again and trace the line leading from it to J/P602113 and 114. Note e.Your responses to paragraphcabove that two circuits on module 611 are used should have been: before the connection at 602113 is made. J/P602113 coax leadis fed to the 3 units Chassis Cabinets A641, A641, A701. The "CP" connections (1) 45A2J2/A1P2024 (1) 45A1A1J17.6 (2) 46A2A2J2-G (2) 46A1A14J2.6 are coax "T" connectors. (3) 46A1A1OTB2-3 (6) The lead from J/P602114 goes to bay (4) 46A1A10T131-1 800 and 900. In bay 800 it is tied at CP841, 57 and one line is fed to J/P842104 which feeds two modules, 844 and 846, and the other branch' of the tie is fed to J/P902105 and Al A2 A3 feeds four modules, 884, 886, 904, and 906. c. Now use chart 1 (horizontal method) in the workbook and list in order the connecting points of each separate path. Do this by indentifying the jacks,plugs, cables, and J4J1 J1 J2.12 J1 Jf J J4 a J4 assemblies in each path. Identification of input and output pins on jacks is indicated at the rear of the jack number as follows: in out J611014/018 kAA: d. Your responses on the chart should have been as follows: (1) RM3 to RM6 J611015 - J629018/015 (2) RM3 to TP1 RUA J611015 - J613014/018 - J623017 (3) RM3 to SIF in out A4 J611015 - J613005/004 - J614002/010 - J622014/013 - J/P602101 - J/P800119 - ca ble 5-6-22 - J/P403703007'- J/P503405001 - J50332053/050 - J503103004 (HFF-1) (4) RM3 to SM-137 J611015 - J616005/004 J/P602119- J/P980112 - cable5623-J/P4960- vai L. J/P4682117 - J4693018 (5) RM3 to assemblies in bay 600 J611015 - J611002/003-J/P602113- CP642; branch A - J/P701109 - A701; branch B - CP682; branch A - J/P641 109 - A641; branch B - J/P681109 - A681 (6) RM3 to bay 800/900 J611015 - J611002/003 - J/P602114CP 841; branch A - J/P842104 - J844018 and J846016; branch B - J/P902105 - J884002 and 018, and J886016, and J904002 and Figure 55. Main distribution frame. 018, and J906016 7-8. In this exercise you compiled individual lists of a multipath signal. In real plished with jacks and connectors. application on line, possibly only one or two Each point of a junction is identifiable by of the paths would have had to be checked. a location number. However, in our objective we had to prove The data for making a complete signal that in interpreting wiring diagrams, connec- wirelist may have to be extracted from tors are used to route data. The figure and various technical orders (such as the TO on your completedlists have proven this. A the FGD, SIF, and SM-137 equipments in this signal which started in a card in a bay has example) and, within the TOs, from selected been distributed to chassis, other bays, and chapters or sectionsproviding connecting other cabinets each time a connector, jack, or point listings (jack listings). connecting point was used. This is the second 7-9. Data Signal Flow HI. Use the wiring application of interpretation of wiring dia- table to identify and locate interconnecting grams, and some very definite characteristics cables between the main distribution frame are becoming evident: and units. In performing this task we will have Originating signals are generally fed to a to identify what a main distribution fnune is connecting point such as a jack. and show itsrelative position hi ystem Multiple routing of a signalis accom- wiring schenie. II was defined In paragraph 58 GtJ UNIT TITLE ...... ci ITInt CABLE RINE Comm CONS PPE COLO* MELiihirimaimargr. mo sin COLOR PIM FUNCTION KIPIMPuramieliwrison miermwwrimiwgiwpr"WAIIIIIIMIllrillill

MAIN FRAME OUTPUT INPUT

Figure 56. Table layout. 7-2, and if you observe figure 55, you can seeunit usually by use of single-strand wire from a pictorial representation of a typical frame.point to point within the frame. In order to Th discussion is based upon the use of afacilitate the installation and tracing of signal main frame, but the principles of usage are paths, tables are formed, with the main frame the same if, instead of a frame, a filter box orbeing the focal point of the table. junction box is used. The frame is the most b. Refer to the table layout in figure 56. complex of the three, so it is selected for thisThe tablewillverylikelycontain these study. columns and this data: a. Refer again to figure 55 and observe how this unit is made of rows and columns and Input tiers or planes. Each location is identifiable by (1) A connector point. a coordinate number consisting of a row, a (2) A pin number in the connector. column, and a plane number usually given a (3) Color of wire. "J" prefix. Each pin connection on each jack (4) Size of wire. further identifies the exact point connection. (5) A cable number. Generally, all connections from a unit are Main Frame Connectors located within specific groups of rows and (1) Point of connection of input cable. columns. Signals are transferred to another (2) Culor code of ,fire.

CONSOLE, DIGITAL DATA CONTROL mot, CONN PIN AVG Ca LI CABLE PIN COLOR Pim Comm FUNCTION '701.011 ORO.. COLO/ lo NO.

J6 A 0 13 34 A3-A3.41.1 0 INE A2.-A2.40...10ri 1 16 903 MN CIRCUIT GROUND IIIIII 900 insinsmslumer=ming 1. is 11111111 MISEINI $3 U DATA SIT 06 TO LINE STORE DO 203 v OATA SIT Os TO LINE STONE NI 6 11111111111111111115/1 111111=111111111111 A I 22 r , ^ A T A SIT 07 TO LINE STORE 1111111111111111111=111.51 A3-.A 333 911111= ill 111.1111111111 "IIII ?...... SITUATIONA

CORE MEMORY GROUP CARLE mOP Cal. E CONN FIN1 COLOR A G AG COLOR FIN CONN FUNCTION NO TO COLOR FROM

J3 i 906 36 ris 63-A2.13..13 OPEN

13 AA I 313 16 4,13 63..A2..13-16 OPEN

13 SS I 332 16 vil A3..A2,43-13 OPEN

13 CC 096 16 r13 A3.A2.11-16 OPEN

J3 DO 613 ir 13 SEt 0.0 4310202 ::: Roi 4310161 ,043 11 3 x NI CHASSIS GROUND LUG

Et 0,0010261 3E1 ORG 4300163 *44 33 3 16 *CHASM GROUNO LUG

JI Et 376 16 I3 £3...A2.j1-ts 0 AS.A 3.JI r I 63 22 0 A 16 CIRCUIT GROUSE/

JI or 120 16 13 13-4243.89 OPEN

m 003 16 13 x3-A2..13-10 0 10.10.13-J1 41 ' 0 A 16 CIRCUIT GROUNO SENO COMPLETE 14 13 AI A 3.1I-.1 0 83.A3.1. 3 A I IA .11 FROM RETROA90 04 s SI -3 1=..10.141.1' SENO PARTIAL C I - 6.3.6.3..e-20 AODRESS ... ..1.--0--"\--...... ----,..0,00".....-.. -

Figure 58. MDF routing. 59 P332 J2 A3TBI .12383017

POWER

OVERHEAT

428V

A137

12Z1=30

P620-01 J>--a0-MT-01

71-7-06

-12:7-(72:7-6

Figure 59. Jacks.

(3) Point of connection to output cable. e. Perform situations A and B which follow Output by using the vertical listing method, and by (1) Output cable. listingin order, connector points, cables, (2) Size and color of wire. jacks, etc., of each signal path. Start at the (3) Pin number console in situation A and at thememory (4) Connector number. group in situation B. Use figure 58; refer to (5) Functional requirement of the signal. figure 57 for routing. c. With this information we can begin to Situation A Situation B apply the analysis to ,a situation/problem. To (1) (1) do this we will use figure 57 (in the work- (2) (2) book). Our task, once again, is to use the (3) (3) table to identify and locate the interconnect- (4) (4) (5) (5) ing cables between the main frame and the (6) (6) units. (7) (7) d. Follow along once again as we use views (8) (8) A and B, and the routing data table on figure 57. Let's suppose that we are required to determine where data bit "DO" was routed to f. Your responses tosituation/problem A understand a modification change, or for and B should have been: some other reason. Look at the table and observe the expanded area (fig. 57). The "DO" Situation A Situation B (1)J6, Jack 6 at console(1) J5 at memory unit data signal is transferred from J6, pin r, of the (2) Pin FF in J6 (2) Pin HH on J5 console through cable W59 to the main frame (3) Cable W59 (3) Cable W13 where wire little r is connected to A2-A341- (4) A2-A343.9 (MDF) (4) A2-A245-20 (MDF) 15vertical row A2, horizontal row A3, first (5) A2-A246-19 (MDF)(5) A3-A343-11 (MDF) (6) Cable Wll (6) Cable W64 terminal row J1, and contact 15. From that (7) Pin W on J1 (7) Pin A on J6 point it is routed by a color #9 wire to (8) Jack J1 at memory(8)J6 at the console A2-A2-J8-12. Pin 12 has one lead from W11 unit with a color #209 wire connected, and the 7-10. In this analysis we examined how the other end of cable W11 wire color #209 is main frame is used as a connecting point connected to J1, pin N, on the line storebetween units. It is easy to understand how (memory unit)functional assembly.Itis useful this unit is because of its great flexibili- actually quite easy to perform this task oncety. Tracing connectors and connectorconnec- analysis is applied. tions is simplified when the pictorial view is 60 associated with, the tables and cable layout nomenclatureofallconnectors must be 53 drawings. If a filter box layout or distribution recorded in your list. This data will reveal any box layout were used in the analysis just reversal trend. We have identified and used completed, the following data would have the vertical listing technique and the horizon- been needed: tal listing technique in the three situations. Cable numbers for incoming and out- Adaptations of these techniques should be going signals. developed by you after a study of your Jack and plug numbers. equipment configuration so that you com- Pin numbers on jacks. pletely understand the signal routing. Filteror terminal board connectors 7-13. Let's list once more the points that points. we have identified which will aid in interpreting wiring diagrams: 7-11. Jacks. Figure 59 shows a few ex- Cables are numbered with "W" on both amples of how jacks and plugs are laidat in incoming and outgoing lines. logic diagrams and wiring diagrams. These Jacks and plugs each have numbers symbols have been used in each of the prefixed with J or X or P. situation/problem analyses just completed. Jacks are indicated at the point of the 7-12. We have described some of the double arrow or the rectangle on schematics. typical wiring situations found in data proces- Plugs are indicated on the back side of sors, where the task of interpreting wiring the double arrow and on the rounded corner diagrams is employed. We have identified the rectangle on schematics. components necessary for a list to be com- Each pin has a letter or number or both piled so that a complete picture of the signal on jacks and plugs. All letters are used except path canbe obtained. Some terms were o, and q. identified and explained. It should be noted Upper- and lower-case letters are used. here that when using wiring diagrams -and Terminal boards normally use numbers in tables in forming a list or tracing a signal to preference to letters for connecting points. findits connecting points, you sometimes Main frames, filter boxes, and junction may double back upon yourself. This means boxes provide the same basic functions, ex- that while going from jack to jack, etc., and cept that the filter box also provides isolation flipping pages of logic, you can reverse your by filtering. direction and return to the starting point. To You will need logic and wiring diagrams prevent this, a complete understanding of and wiring tables, cable listings, and rack jack jack/plugnomenclatureandacomplete listings to perform this analysis.

61 cf CHAPTER 4

Test Equipment

AS A DATA processing equipment repairman, theory beyond that necessary to describe the you know that you have the responsibility for use of the test set under discussion. When you the maintenance of complex equipmentnot use a piece of test equipment that is new to complex because of the individual circuits, you, always consult the technical order or the but complex because of the vast number of manufacturer's instruction manual on that circuits. Your ability to maintain this equip- particular piece of test equipment. This chap- ment depends largely upon your knowledge ter covers these three main topics: (1) opera- of the use and care of test equipment. Since ting standard test equipment, (2) operating you have already completed an ipprentice- special AGE equipment, and (3) calibrating level training course, you have a good knowl- test equipment using Category I and II proce- edge of the principles of test equipment. dures. However, you must continue to work with and study your test equipment to develop a 8. Operating Standard Test Equipmet thorough understanding of its uses and cap- 84. Inthis section we discuss various abilities. pieces of test equipment used in maintaining 2. Do not limit.yourself to thinking of thedata processing equipment. The testsets standard pieces of test equipment such as described are examples to show applications. scopes, voltmeters, and counters. Expand The section is broken down into areas. First your knowledge of specialized test circuits as we identify the controls and operation, then well. Specialized test circuits are not limited the applications of standard test equipment: to auxiliary units. They also include test the oscilloscope, differential voltmeter, and circuits and error indicators that are built into multimeter. the data processors and function as an integral 8-2. Oscilloscopes. The oscilloscope isas part of the equipment indispensable to the data processing mainte- 3. Electronic test equipment is designed nance man as the stethoscope is to the doctor. and constructed to perform a wide variety of In fact, the oscilloscope is one of the most tests. These tests are used to determine the widely used test sets in the electronics career proper operation or alignment of electronic field. The uses of an oscilloscope are many, sets, circuits, or parts. The performance of but you will use it primarily to troubleshoot data processing equipment depends in a large and align data processing equipment. You will measure on the accuracy of the test equip- do this by observing and analyzing waveforms ment and on the integrity of the repairman astoshape, amplitude, coincidence, and who does the job. Without test equipment, duration, and compare the waveform with very few electronic devices could be kept inthose presented in technical orders for your operating condition; therefore, you must use particular data processor, which designate test equipment properly. what waveforms are to be observed at various 4. A piece of test equipment can be as test points throughout the system. simple as a light bulb or as complex as the 8-3. Front panel controls of most oscillo- Electronic Circuit Plug-In Unit Test Set AN/scopes are very similar. Therefore, we shall GPM-60 used in the 412L Weapons System. review controls and their functions, using a The test equipments and circuits discussed in model commonly usedindata processing this chapter are limited to the ones that are maintenance. Figure 60 (in the workbook) is now being used in the maintenance of data a front view of the type 645A with a type CA processors used by the Air Force. The more plug-in unit installed. Like most test equip- simple-to-use test sets are not discussed in this ment, its controls are grouped into numerous chapter, and no attempt is made to include sections and subsections which have specific 62 6 4 graticule length. This providesfor closer inspection of a specific display as illustrated in figure 61. RIP11111/TARINNIIIII b. Triggering Mode selection switch. This switch arranges the circuits to provide the 1111111111111MMOMEkind of triggering you need. Thisisthe 111111111111111111111111111111 smaller outside knob, and its selections are labeled in red on the panel. 1MIIMELIvi (1) AC and DC. Slowly changing wave- NORMAL forms work best on the AC and DC positions. In the AC position, a capacitor removes the DC component of the triggering waveform and makes triggering on the vertical signal independent of trace position. This position is 111211111111111111111111 suitable for signals from 20 hertz up to about 5 to 10 megahertz. The DC position is the 111111111M1111111111111 same except that it responds to DC as well. (2) AC LF REJECT. In the AC LF RE- limmassmisJECT position, the circuit includes an RC filter, useful for preventing 60-hertz, or other niniishowEXPANDED low-frequency components, from triggering the sweep when both high- and low-frequency Figure 61. 5X expanded view. components arepresent in the triggering waveform. The low-frequency limit is about 2 functions to perform. We shall discuss these, kilohertz. In either of these three positions, if along with controls associated within a sec- the Stability control is properly set, the sweep tion. will not run unless triggered by a signal. 8-4. Controls. The front panel of the scope (3) AUTOMATIC and HF SYNC. The in figure 60 can be divided into three main AUTOMATIC and HF SYNC switch positions areas of control: (1) the horizontal display both arrange synchronizing circuits, rather controls, (2) the vertical position and deflec- than strictly triggering circuits. tion (plug-in preamplifier), and (3) the indica- (a) AUTOMATIC. The AUTOMATIC tor controls. The other controls and inputs circuit provides a free-running multivibrator that do not fall in any particular area will be having a normal repetition rate of about 50 grouped under a title of (4) miscellaneous hertz. This locks in, and runs synchronously controls. with, recurrent triggering waveforms from 60 8-5. Horizontal Controls. Horizontal con- hertz to about 2 megahertz. The synchronized trols are groupings of controls located for the multivibrator then triggers the sweep-gating most part on the upper right side on the front multivibrator. of the oscilloscope. They include Time Base A (b) HF SYNC. The HF SYNC setting and Time Base E and the Delay-Time Multi- arranges a circuit which connects the trigger- plier. ing source directly to the sweep-gating multi- 8-6. Time base A. Time base A will provide vibrator so that it can synchronize with the complete control of the horizontal circuas triggering waveform. The sweep-gating multi- within the scope and will provide a variety of vibrator must be free-running for this type of selections to cover displaying of signals from operation. It free-runs at advanced settings of DC to 2 megahertz. It is made to work by the Stability control. It will synchronize with selection from the Horizontal Display selec- frequencies as high as 30 megahertz, at a tion switch, the time base A selection. An sweep repetition rate up to 200 kilohertz. external trigger is gated into the circuitry by c. Trigger Slope selection switch. use of trigger input and selection of EXT on (1) Positive (+) selections. The + (positive) the Triggering Mode selection switch. positions of the Trigger Slope switch (black a. Horizontal Display selection switch. This knob) cause triggering to occur during the switchis used to select the desired sweep rising portion of the triggering waveform. The function. It is a three-section switch that may level may be either negative or positive. be set to one of three areastime base A, (2) Negative (- )selections. The - (negative) time base B, or External. The 5X magnifier positions cause triggering to occur during the section of thisswitch, when turned on, falling portion of the waveform. Thus, the expands the waveform that occupies the triggering-tint can be caused to occur at middle two divisions to occupy the entire almost any point in the waveform. 63 TMOGERING NOCE adjusts bias level on the sweep-gating multi- TRIGGER SLOPE ACCJECTINT vibrator near thelevelat which it will AC free-run. Three principal settings of the Stabil- 1.44E ity control are used: the first setting is with the control advanced to the right, just past AUTO the point where the sweep-gating multivibrator free-runs;50 the second, retarded to the left HF SYNC about or 10° left of the point where STABILITY STABILITY free-running ceases; and the third, retarded all TRIGGERING LEVEL TRIGGERING LEVEL the way left,to make the multivibrator inoperative. e.Triggering Level control. The Trigger Level control selects the point on the trigger. ing waveform at which triggering will occur. To trigger on small signals, this control must be set near 0, or near the DC level with DC triggering. The levels are indicated on the E 111111M111111111111MINIIIK panel as positive to the right and negative to MUM theleft.Negative positions of the Level control (as shown in fig. 62) cause triggering IINZIMIONVA11111 to occur during negative level of the triggering waveform, and positive positions cause trig- Figure 62. Negative and positive triggering level with -P gering during positive levels. Reversing the triggering slope. Trigger Slope control inverts the polarity of the waveform, as shown in figure 63; how- (3) Source of trigger. An additional func- ever, the Level control reacts the same. This tion of the Trigger Slope switch selects the control is not used in the AUTOMATIC and source of trigger signal sources. These are: HF SYNC positions of the Triggering Mode (a) External (+ or - ), where an external switch.Presetisalso a function of this triggeris supplied to internal circuits to control. When used, it selects a predetermined provide triggering of the display. DC voltage to cause triggering to occur. Refer (b) Internal (+ or), which triggers the to figure 64 and observe how the variable and scope from the waveform to be displayed. preset functions are identical except that the (c) Line (+ or - ), which triggers the preset is obtained by closing switch 51. scope from a power line voltage waveform. f.Time/CM control. The Time/CM control d. Stability control. The Stability control selects horizontal sweep time per centimeter; from .1 microsecond to 5 seconds may be selected. The setting of the Time/CM control TRIGGERING NOM TCOGER SLOPE AC determines the time base sweep speed and LF REJECT ic!-tlIT4 AC horizontal size on the displayed waveform.

LINE g. Variable Time/CM control (inner knob). This control permits you to vary the sweep 6" AUTO speed continuously between .1 microsecond and 12 seconds Der centimeter. When the HF SYNC STASILITY STABILITY TRIGGERING LEVEL TRiGGERING LEVEL STABILITY CONTROL 0 150V GANGED CONTROLS TRIGGER MODE ITCH 150V SI

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Figure 63. Negative and positive triggering level with triggering slope. Figure 64. Preset control. 64 6 6 controlisin the calibrated position, theThis delay time is the product of the settings Time/CM readingisaccurate. The uncali- of the Time/CM or Delay-Time control and brated position is inaccurate for determining the Delay-Time Multiplier control. Use of this an unknown frequency. However, the posi- control with time base A and time base B is tionis very useful in obtaining a desired covered in more detail later. number of pulses when frequency is not 8-9. Use of Horizontal Controls. Let's go important. back now and discuss the Time Per Centi- 8-7. Time base B similarities and differ- meter control in a little more detail as it ences. The controls under time base B have applies to period and frequency measure- the same basic function as those of time base ments. As a maintenance man, you will A. With the Horizontal Display switch in the measure pulse widths, periods, frequencies, B position, time base 13 may be displayed on arid any other events that may be a function the screen instead of time base A. Notice in of time. It should be relatively simple for you, figure 60 that time base B has three triggering.as an operator, to determine the number of modesAUTO, AC, and DCwhile time base centimeters that the beam is deflected hori- A has five. Not available for time base B zontally and then, with a little mathematics are the HF SYNC and AC LF REJECT(number of centimeters times the setting of triggering modes. In addition, time base B has the Time Per Centimeter control), determine 18 calibrated sweep speeds while time base A the time for any event associated with the has 24. The Length control adjusts the sweep displayed signal. As for frequency measure- length between 4 and 10 centimeters. ments, frequencies can be readily determined 8-8. Delay-time multiplier. This is a ten- by the use of the following formula: turn control. When the Horizontal Display 1 switch is in the "B" INTENSIFIED BY "A" Frequency or the "A" DEL'D BY "B" position, time time per hertz base A is held inoperative until after a delay 8-10. For an example of frequency meas- time following the triggering of time base B. urements, look at figure 65. Here a 50.kHz

IND:CATOR PRESENTATIONS

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Figure 65. 50.kHz sine wave. 65 sine wave is an input to theoscilloscope 8-13. Before discussing the next subject, shown in figure 60 with the UggerLevel and let's be sure you know howto determine the Trigger Slope controls set to developsweep frequency of a waveform. In figure 66,there triggers at the 0-volf level ofthe negative are three problems. We will go through figure slope. Now consider three differentsettings of 66,A, together, then youcan complete 66, B the Time Per Centimeter controlas shown in and C. A, B, and C of figure 65. Thesweep length is Figure 66,A: always 10 centimeters. Frequency determi- Step 1. We can determine thata Time/CM nation under these conditions isas follows: control setting of 5 microseconds resultsin a The A setting of the Time PerCentimeter 1-hertz presentation. control is 1 microsecond;therefore, a full Step 2. With a 5-microsecond Time/CM 10-cm sweep takes 10 microseconds. Note setting, the time for 1 hertz is 50micro- that 1/2 hertz occupies the fullsweep. The seconds (5 )< 10 = 50). time per hertz would thus be20 micro- 1 seconds. You can calculate thefrequency by Step 3. Using the formula F= we using the following formula: time, 1 1 Frequency have F = or a frequencyof time hertz 50X 10-6 1 20,000 hertz. (F 8-14. Now refer to figure 66,B,and com- 1 F 5 plete the following statements. 20 X 10-4 0,000 Hz a. The lime/CM is micro- 8-11. One trouble encountered with this seconds. method of frequency determination isthat it b.Thefull10-cm sweeprepresents is very difficult to determine whenthe scope microseconds. displays exactly 1/2 hertz. Ifyou err in c. The time for 1 hertz is determining the time fora half hertz, this microseconds. error is compounded by doubling the value to d. The frequency of the displayedwave- determine the titne per hertz. When possible, form is hertz. you should not use settings of the Time Per Centimeter control that present less than 1 8-15. Before checkingyour answers, refer hertz. to figure 66,C, and completethese state- The B control setting, as shown in figure ments. 65, of 2 microseconds results ina 1-hertz a. The time for 5 hertz is presentation. Here, again, it is difficult to microseconds. determine when exactly 1 hertz is presented; b. The time for 1 hertz is however, this time the error is notcom- microseconds. pounded by multiplying. a. The frequency of the displayedwave- The C control setting, as shown in figureformis hertzor 65, of 5 microseconds results ina display of kilohertz. 2 lh hertz. Here the point at which the signal crosses the zero reference line is much more 8-16. Let's review each problemand see if definite because of the steepness of its slope;your answers are correct. (Refer to fig.66,B.) therefore, a More accurate calculationcan be a. 10 microseconds. made. b. 100 microseconds. 8-12. There areseveral ways you can c. 40 microseconds. calculate the frequency inthis case; the d. 20,000 hertz. following method is recommended: 1 centi- Figure 66,C: meter represents 5 microseconds; therefore, a. 20 microseconds. the full 10-cm sweep represents 50micro- b. 4 microseconds. seconds (5 X 10 = 50). The time for 2 ½hertz c. 250,000 hertz or 250 kilohertz. is then 50 microseconds, and the timeper 50 8-17. Use of B Sweep. The BSWEEP hertz is 20 microseconds ( 20).. position of the Horizontal Displayswitch 25 shown in figure 60 selects another 1 1 set of . le 50,000 Hz circuits containing a triggergenerator and I 2 0 x 10* sweep generator that operates similarly to the In practice you will find that the most A sweep and triggering circuits. Lookat the B accurate frequency determinationsare ob-sweep time base controls in figure 60 and tained by setting the time controls forpresen- note the similarity to the Asweep time base tations of 2 to 10 hertz. controls. Since their functiOns and operations 66 -

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Flgure bb. bale-wavy pabblebta. are similar, it is not necessary to coverthem particular scope uses the unblanking voltage again. of the A sweep to intensity-modulate a 8-18.'B" INTENSIFIED B Y "A." Until portion of the B sweep. The intensified now we have discussed a single sweepfunc- portion may be expanded to give you an tion withits associated triggering circuits. enlarged presentation. Used alone, the addition of another sweep 8-20. In the "B" INTENSIFIED BY "A" generator andits associatedcircuits adds position of the Horizontal Display switch, the nothing to the capability of an oscilloscope. B sweep generator functions normally. When However, when one sweep is used to modify triggered, it develops a sawtooth horizontal the other sweep, much is added to the scope's sweep voltage and a positive unblanking sig- capabilitkes. nal. These signals are coupled to the indicator, 849. The two sweep generators in theand a normal sweep pattern begins. The oscilloscope can be triggered by the same sawtooth sweep voltageisalso sent to a synchronizing signal or by separate signals. trigger pickoff circuit. The trigger pickoff Regardless of the trigger source, there are two circuit is set 1,o produce a trigger pulse when sweep voltages and two unblankingvoltages the B sweep sawtooth voltage rises to some that can be applied to the indicator. 'Thispredetermined (pickoff) point. The bias on 67

....1.1111.1110.14,..6.1111 the pickoff circuit can be varied So that the before the pickoff circuit is pickoff point canoccur at any desired ampli- triggered. Now the trigger from the pickoff circuit(signal E) tude of the sawtooth voltage.In the oscillo- is fed to the A sweep generator. scope shown in figure 60, the pickoff The A'sweep point is generator is triggered and producesa saw- controlled by the Delay-TimeMultiplier control. This is the second tooth sweep voltage (not shownin fig. 67) control from the and an unblanking pulse(signal F, fig. 67). bottom on the right-handside. Regardless ofThe indicator circuits combine the slope of thesweep voltage, it always takes the A and B the same voltage to sweep unblanking pulses (signal G,fig, 67). deflect the beam 1This combining of the unblankingpulses centimeter; therefore, the delaycontrol which sets the voltage of the pickoff results in an increase in CRTcurrent, thus point can be intensifying the trace fora period equal to the calibrated in centimeters. Thedelay time (the unblanking pulse time of time between the beginningof the sweep and sweep A (pattern H the start of the intensified of fig. 67). portion) is then 8-23. Look again at the Asweep unblank- calculated by multiplyingthe setting of the ing pulse in figure 67 (signal "B" Time Per Centimetercontrol times the F). Note that it number of lasts for 50 microseconds.Now, if the Time , centimeters on the Delay-TimePer Centimeter control isset to 5 micro- Multiplier control. seconds per centimeter 8-21. Now let'ssee how this sweep intensi- as previously stated, fication works, using thenthe A sweep generatorproduces a a practical example. sawtooth of thesame amplitude as the B Look at figure 67 (in theworkbook). Signal A is a 40-kHz input that is sweep sawtooth, but in a shorter time: applied as a vertical A sweep time = 5 microseconds/cm input and as an input totrigger generator B. X 10 Time base B controlsare set as follows: cm = 50 microseconds Triggering Source to INT. B sweep time = 20 microseconds/cmX Triggering Level to 0. 10 cm = 200 microseconds Trigger Slope to positive. In this application, the Asweep sawtooth is Signal B in figure 67 showsthe output of not used but its unblanking puhe is used.The trigger generator B. Note A sweep unblank4 pulse is equalin duration that a trigger is to the A sweep sawtooth, produced when the input signal(signal A in so its duration must fig. 67) reaches point X. Thistrigger is fed to also equal 50 microseconds. Theindicator the B sweep generator. It initiates sweep is the result of the much slower B a sawtooth sweep signal, so the 50-microsecond A sweep voltage (signal C) and a positiveun- sweep blanking pulse (signal D). The sawtooth unblanking pulse intensifies the Bsweep for sweep only 2 1/2 centimeters (50 voltage and the unblanking pulseare coupled microseconds/20 through appropriate circuits microseconds per centimeter= 2 IA centime- to the indicator ters). to unblank and sweep theelectron beam horizontally across thescope. 8-24. Let's see now ifyou can solve some 8-22. Let's assume that the Asweep genera- problems on the "B" INTENSIFIEDBY "A" tor is set for a 5-microsecond-per-centimeter sweep function. Figure 68 isa display ob- sweep, the Stability control is fully clockwise, tained with the HorizontalDisplay switch in and the B sweep generatoris set for a the "B" INTENSIFIED BY"A" position. The 20-microseconds-per-centimeter "A" Time/CM control isset to 10 micro- sweep. Also, seconds/cm, and the "B" Time/CM assume that the indicator beam is deflected1 is set to 20 microseconds/cm. Usingthe information centimeter for every 15 volts ofsweep signal given and figure (signal C). The operator hasset the Delay- 68, solve the following Time Multiplier control to 3 1/3 problems: centimeters, a. The setting of the Delay-Time which means that the delaypickoff circuit Multiplier will produce a trigger (signal control in centimeters is . cei E, fig. 6'7) when b. The time between the the sweep has moved 3 'i,centimeters. Now beginning of the let's look a little closer athow the pickoff trigger is produced. Thesweep voltage (signal C) is fed to the pickoff circuit.Remember that the delay time was to be 31/3centimeters. If horizontal deflection takes15 volts per centimeter, then 3 til centimetersrequire 50 volts. What the delay controlactually does is setthe pickoff circuitbias so that the sawtooth (signal C) must rise to 50 volts Figure 68. Intensified sweep problem. 68 sweep and the start of the intensified area is / microseconds. c. The duration of the A sweep unblanking ISIMMOIMMI pulse is microseconds. 111111111M111111111511111 8-25. In a above your answer should have been 3 centimeters. This is the time between 111111111111MIEWAINI the beginning of the sweep and the intensified portion, which is controlled by the setting of 111111111111116111111111 the Delay-Time Multiplier switch. 8-26. The "B" Time/CM setting is 20 Figure 70. Measuring time problem 1. microseconds. The time between the beginning of the sweep and the start of the 8-30. Now look at figure 69. This figure intensified sweep is 3 centimeters. Therefore,shows an example of how the intensified dot 3 cm X 20 microseconds/cm = 60 micro-can be used. In figure 69 the frequency of the secondsthe answer for b. displayed signal can be determined in the 8-27. The "B" Time/CM setting is 20 following manner: microseconds/cm. The sweep in figure 68 is First, place the dot at point X by setting intensified for 4 cm; thus, 20 microseconds/the Delay-Time Multiplier control to zero cm X 4 cm = 80 microseconds, the duration centimeters. of the A sweep unblanking pulsethe answer Rotate the Multiplier control until the for c. dot moves to point Y, a distance that repre- 8-28. Now let's summarize what we know sents 1 hertz, and record the control setting. about the "B" INTENSIFIED BY "A" func- Subtract setting X from setting Y (the tion. result in this case should equal setting Y, since The B sweep is triggered and functions setting X was zero). Now multiply this differ- just like the A sweep. ence by the setting of the "B" Time Per The B sweep sawtooth voltage is fed to aCentimeter control to obtain the time per pickoff circuit that produces a trigger for the hertz. Convert the time per hertz to fre- A sweep generator at a time determined byquency by formula F =1 the Delay-Time Multiplier control. The A sweep unblanking pulse intensifies 8-31.For example,let'ssaythe "B" a portion of the B sweep. Time/CM control is set to 5 microseconds/cm. You can select the portion of the BThe setting of the Delay-Time Multiplier sweep that you wish to int- sify by varying control is 8 centimeters when the intensified the setting of the Delay-Time Multiplier con- dot is positioned at Y in figure 70. What is the trol. frequency of the signal in figure 70? 8-29. Delay.time frequency measurement. 8-32.First we multiplythe Multiplier There are times when you may wish to use control setting (8 cm) by the "B" Time/CM this intensification principle to determine the setting (5 microseconds/cm). Thus, we have 8 frequency of the signal being displayed, the cm X 5 microseconds/cm = 40 microseconds, period or pulse width of the signal, or the the time for 1 hertz. The frequency then is signal rise time. To do this, reduce the setting 25,000 hertz. of the A sweep Time Per Centimeter control 8-33. You may be thinking that it's not until the A sweep unblanking pulse is so short necessary to use the Delay-Time Multiplier thatthe intensified portion of the trace control to determine the frequency. In this appears as a small intensified dot. case it is not because the signal completes 1 hertz at exactly 8 centimeters. Now refer to figure 71. In this illustration it is difficult to tell at exactly what point in time the hertz is PIASIMI111111161 complete. By setting the Delay-Time Multi- plier control with the dot at point Y, the time WIIIIMIIIIIIIWA for 1hertz can be read directly from the multiplier dial; reading, 94.1 = 9.41 centime- 1111111111011111M10111 ters. 8-34. You may use the same procedure to 1111111111111MEMI determine the width of a rectangular pulse as shown in figure 72,A. or the time between Figure 69. Measuring time with the intensity dot. pulses as shown infigure 72,B. You may 69 values. These are only a few examples of how 1111111111111111111111111 the intensified sweep can be used; however, in your day-to-day performance of maintenance, 1111110111111111111111 you will find many other useful applications. 8-35. "A" DELAYED BY "B." You will 1111111111111111111111M find it convenient at times to be able to obtain an expanded view of one particular 1111111111M51111 part of a display. This is probably the most 94.1 9.41 CM importantapplicationoftheintensified sweep. This can be done by intensifying the area you wish to expand and switching the Horizontal Display control (fig. 60) to the "A" DELAYED BY "B" position. 8-36. The "A" DELAYED BY "B" sweep function is relatively simple. The only difference between it and the "B" INTENSIFIED BY "A" is that the indicator receives only the A sweep unblanking pulse and the A sweep o sawtooth. The B sweep circuits are triggered just as they were in the "B" INTENSIFIED BY "A"; however, the B sweep outputsare

IA not used by the indicator. The B sweep sawtooth triggers the pickoff circuit, which in turn triggers the A sweep. This happens at a time when the part of the input signal to be Figure 71. Measuring time problem 2. intensifiedis present at the vertical plates. The A sweep sawtooth and A sweep unblank- wonder why it may be necessary to do this ing pulses are coupled to the indicator circuits when you can simply count the number of and allow the intensified area to be displayed centimetersdirectlyoff the faceof the over the entire 10 cm. indicator. True, you can count them but you 8-37. Figure 73 (in the workbook) shows cannot be as accurate as possible. Therefore,more clearly what happens. The intensified by using the micrometer type Delay-Time sweep shown in figure 73,F, is obtained while Multiplier control you can obtain the exactthe Horizontal Display switch is in the "B" INTENSIFIED BY "A" position. The Hori- zontal Display switch is then switched to the "A" DELAYED BY "B" position. The very next trigger received results in the generation of a B swe sawtooth (fig. 73,B) and a B sweep unblaing pulse (fig. 73,C). The B sweep unblanking pulse is not used. However, the B sweep sawtooth is fed to the pickoff circuit, and when it rises to the pickoff point (fig. 73,B), the A sweep is triggered. The A sweep sawtooth (fig. 73,D) and the A sweep unblanking pulse (fig. 73,E) are coupled to the indicator. Thus, the intensified area between X and Y of figure 73,F, is displayed across the entire face of the indicator, as shown in figure 73,G. 8-38. Intensity modulation. The intensity- modulation principle can also be used to compare parts of a serial pulse train. Look at the display in figure 74,A. If you want to compare pulse A and pulse B, the best way is to superimpose one upon the other. Let'ssee Figure 72 Me:Inuring pulse width problem 3. whatsteps arenecessary to do this withthe 70

4, istriggered,itdisplays pulse A, and the 43 second time it is triggered, it displays pulse B. This display is shown in figure 74,B, with the two pulses not quite matched. A slight adjustment of the Delay-Time Multiplier control will move pulse B from where it is shown in mimmummin figiire 74,B, and position it directly over pulse A as shown in figure 74,C. 5" INTENSIFIED BY 840. The oscilloscope shown in figure 60 is capable of two other sweep applications that are not a function of the dual-sweep generator principle, so let's take a look at them. f 1111===== 841. Use of."A" Single Sweep. Look again a figure 60 and note the Horizontal Display MINIMMINIMM switch position that is labeled "A" SINGLE SWEEP; also observe the RESET button MINMEMMEMME above and to the right of the display switch. With the switch in this position, a single MMEMEMMINIM sweep (one time across the scope) can be "A"DELAyED5Y"5" obtained each time the RESET button is depressed. Yotr eyes and mind can obtain very little knowledge from seeing a signalfor so short a time; however, with a cameraand 1111111161111111 high-speed film, a picture can be taken of this singletrace. This picture then becomes a MINIMMMIMM permanent record of the function displayed, MESIMMINMM and the function can be analyzed at your MOIMEMMEMEM leisure. OELAY TIME NULTIPLIER 8-42, Use of External Sweep. Most oscillo- USED FOR FINAL ADJUSTMENT scopes have provisions for the direct application of an external signal to the horizontal Figure 74. Pulse comparison. amplifiers. The External sweep function is especially applicable if you are to compare the phases of two sine waves. One signal is oscilloscope shown in figure 60: applied to the vertical input and the other Set the Horizontal Display switch to the signal is applied to the horizontal circuits via "B" INTENSIFIED BY "A" position and the Horizontal Input jack (fig. 60, just to the adjust the A Time/CM and the Delay-Time right of the Horizontal Display switch). With Multiplier controls until pulse B is intensified. the Horizontal Display switchinthe X1 Connect a small capacitor (approximately position, the horizontal input signal is fed 100 micromicrofarads) between the B sweep directly to the horizontal amplifiers. In the unblanking pulse (fig. 60, + GATE B jack) X10 position, the horizontal input signal is and the pickoff trigger output jack (fig. 60, attenuated by a factor of ten before applica- DEL'D TRIG jack). tion to the horizontal amplifiers. Figure 75,A, shows the display obtained when applying two sine waves of equal frequency but 90 8-39. When the B sweep unblanking pulse out of phase. This pattern and the other starts, it will be coupled via the DEL'D TRIG patterns of figure'75 are based on equal jack to the A sweep generator. The A sweep horizontal and vertical deflections (the verti- generator is triggered and its unblanking pulse cal input attenuator must be adjusted to make will intensify the pulse A area on the indica- the vertical deflection equal to the horizontal tor. The pickoff circuit was already set to deflection). An oval pattern such as shown in trigger the A sweep, so the pulse B area will figure75,B,isobtained when the phase beintensified. Now think thout whatis difference is between 00 and 90° or between happening. Each B sweep tr ,gers the A sweep 900 and 180°. A single line presentation as twice, once at the beginnink, of the sweep and shown in figure 75,C, is obtained when the once at the pickoff point. Now switch the signals are in phase or 180out of phase. Horizontal Display switch to the "A" DEL'D Figure 75,D, is the display obtained when the BY "B" position. The first time the A sweep horizontal and vertica"-,put signals are not of 71 the same frequency. These are only the basic unit installed. This plug-in unit is justone of patterns, but they are the onel most impor- many that can be installed in-the oscilloscope. tant to you. For further detail on these All of these plug-in units provide preamplifi- patterns, refer to TO 31-1-141, Chapter 10, cation and/or attenuation of the verticalinput Section III. signal. Other functions performed bythe 8-43.VerticalControls. Vertical ampli- various plug-in units are as follows: fiers in all type 545 scopes have separate Vertical positioning of the display. input-amplifier units that can be plugged into Acceptance of two vertical input signals. the main unit. The various plug-in units Display of either of two vertical input provide a variety of pass bands and sensi- signals separately. tivities, a differential amplifier, anda channel- Alternate display of two vertical input switching unit to provide dual-txace presenta- signals on separate baselines. tions. Chopped display of two input signals alternately selected and displayed 844. Plug-in unit. The oscilloscope shown on separate baselines while the sweep is in figure 60 has a type CA dual-trace plug-in in progess.

FREQUENCIES EQUAL FREQUENCIES EQUAL 900 OUT OF PHASE PHASE RELATION 00 TO 90° OR 90° TO 180°

FREQUENCIES EQUAL FREQUENCIES IN PHASE OR 180° OUT OF PHASE NOT EQUAL

Figure 75. Lissajous patterns. 72 inthe workbook). The positions ofthis control indicate the amplitude of theinput voltage necessary to deflect the beam 1 centimeter vertically; thus, if the switch isin the 5-volt position, an input signalwill deflect the beam 1 centimeter for every5 volts amplitude. Look at the.Volts/CM controland the display shown in figure 76.The signal 1, CN 11111111111111111111111111111 4 C4. displayed occupies 3.5 cm vertically,and the 111111111111111111111111111111 Volts/CM control is set at the .05-voltposi- tion. You can calculate its peak-to-peakvolt- age amplitude asfollows: volts/cm X cm of deflection = amplitude (peak to peak) 0.5 X 3.5 = 1.75 volts 8-48. DC and AC level measuring. To measure the amplitude of aDC signal, you first set the sweep baseline to somelogical reference level before applying thesignal. You use the Vertical control todo this. When you apply the signal, you need only determinethe distance in centimeters that thebaseline moved, and then multiply this figure bythe vOi. TT CNCONTE:N. setting of the Volts/CM control. Anexample of a DC voltage measurement isshown in figure 77. Note where the baseline wasset Figure 76. Volts/CM control. prior to the application of theinput signal. If you count thenumber of centimeters, you

SASELIHE AFTER Display of the algebraic sum of two SIGNAL APPLICATION vertical input signals. 8-45. Choosing the plug-in unit you wishto use is dependent onthe frequency response necessary, pulse characteristics,and the type of display that provides the mostconvenient analysis of the signal. You will learnof many needs through practical experience.To aid you in making the properchoice, let's discuss the plug-in unit functions that arelisted above. 8-46. Verticalpositioning.All plug-in units have front panel verticalpositioning controls. This control references theinput signal so that it can be movedvertically on the indicator. The input signalis applied to a paraphase amplifier, which produces twoout- eAseutie SIT puts that a:e 1800 out of phase.These two 940 INPUT) signals are amplified and each is appliedto a vertical plate. One signal is applied tothe upper deflection plate toproduce a push-pull vertical deflection. The VerticalPosition control varies the DC reference levelthat these two signals ride and thus positionsthe signal in the vertical plane. 8-47. Input attenuation. All verticalinput vOL TS. CAI VOL TVCN x CMDU vOLT signals are applied to an input attenuator S x Ia .TII 254 network. The amount of attenuationis a function of the Volts/CM control (seefig. 60 Figure 77. DC level measuring. 73 A

A ONLY 2 11111111111111111111111111

51W.111111211111PM 0

% 1111113.1,111111111=11111 11111111111111111111111n111 2 r B ON LY

REF LEVEL

ALTERNATE 2 DC OUREMPIPMIN 11:21111102111111102 0 11111IIIIMUI11111111111111111111111 2 AC Figure 79. Dual trace, alternate mode. 60) these functions are duplicated and, in addition, there is an input attenuator and a vertical control for both the A and B sections REF LEVEL of thepreamplifier.Inaddition to dual controls, the dual-trace plug-in unit has two Figure 78. DC reference of an AC signal. vertical input jacks and a switching multivibrator. The switching multivibrator and its associated circuits are used toalternately can see that the input signal moved theselect one of the two vertical inputs on a baseline 2'A centimeters. The Volts/CMcon- time-sharing basis for application to the verti- trol in the figure is set to the 5-volt position; cal amplifiers. therefore, the amplitude of the DC input equals 11.25 volts (5 X VA = 11.25). 8-51. If you wish to compare two signals 8-49. You may at times be required to for phase, amplitude, shape, orany other determine the DC reference level of an AC reason, connect one input to the B section signal. To do this, place the AC-DC switch in and the other ir.:lut to the A section (see fig. the AC position. With the Vertical Position 60). F9r a two-sweep comparison,you per- control, set the signal to some reference level. form the following setup procedure: Place the AC-DC switch to the DC position, Place the Mode switch (see fig. 60) in the and determine the number of centimeters that "A" ONLY position and adjust the A vertical the reference level shifted. In figure 78,A, the positioning and the A attenuator controls signal is shown set to a zero reference level until the presentation occupies theupper half with the AC-DC switch in the AC position. of the display area (see fig. 79,A). Figure 78,B, shows that the reference level Place the Mode switch in the "B" ONLY shifted I centimeter when the switch was set position and adjust the B vertical positioning to the DC position. The DC reference voltage and B attenuator controls until the B input of this signal can be determined by multiply- occupies the lower half of the displayarea ing the setting of the Volts/CM control by 1 (see fig. '79,B). centimeter. If the Volts/CM control was set to Place the Mode switch in the ALTER- its 20-volt position in the example in figure NATE position, and the dual-sweep display 78, the DC reference level would be: 1 cm X shown in figure 79,C, is obtained. 20 volts/cm = 20 volts. 8-50.Dual trace.The principles discussed 8-52. With this setup, the A vertical input thus far apply to all types of preamplifiers. In signal triggers the sweep circuits, is coupled to dual-trace preamplifiers (the one shown in fig. the vertical plates, and is displayed. When the 74 76 rust sweep is completed, the switching multi- Adjust theoscilloscope controls for a vibrator in the plug-in unit is triggered. The free-running trace with no input signal. output of the switching multivibrator is'then While rotating the Variable Volts/CM 7 used to select the B vertical input. The next control back and forth, adjust the DC sweep displays the B vertical input signal.This BAL control until the trace position is switching action is repeated at the end of each nolongeraffected by the Variable sweep. If you wish to use this type of display Volts/CM control. to check the phase relationship of two signals, use an external trigger source of knownrela- 8-55. Gain adjust. This adjustment deter- tionship to the signals under test. Internal mines the gain of the vertical amplifier and triggering should not be used because each thereforethe calibration of the Volts/CM signal would trigger its own sweep and the switch. To make the adjustment, set the phase relationship could not be checked. oscilloscope controls as follows: Triggering Mode to AUTO. 8-53. In the CHOPPED mode of operation, Trigger Slope to + INT. the multivibrator in the plug-in unit switches Horizontal Display to A position. the vertical inputs continuously as the indica- Time/CM to 1 millisecond. tor is swept. If two sine waves that are equal Preamp Mode selector switch to desired in frequency but opposite in phase (as shown channel. in fig. 80,A) are applied as vertical A and B Volts/CM of selected channel to .05 volt. inputs, a display similar to the one shown in figure 80,C, is obtained. The output of the Variable Volts/CM control to calibrated. switching multivibrator is shown in figure Amplitude calibrator to .1 volt. 80,8. The A input is displayed each time the output of the multivibrator is at its high level, 8-56. Now connect a lead from CAL OUT and the B input signal is displayed each time to the input jack on the selected channel. the output of the .multivibrator is at its lower Adjust the Focus, Intensity, Astigmatism, and level. The resultant display is shown in figure Position controls for a suitable trace and, finally, adjust the GAIN ADJ on the selected 80,C. channel for a deflection of exactly 2 centi- 8-54. DC balance. The need for adjustment of the DC BAL controlis indicated by a meters. vertical shift in the position of the trace asthe 8-57. We stated previously that the choice Variable Volts/CM control is rotated.This of plug-in units for a particular application is adjustment is not difficult and can be done as dependent on many factorsfactors that you willlearn through continued use of the follows: oscilloscope in the performance of day-to-day maintenance. Sometime, after you have attained your 7 level, you may be called upon to set up a maintenance shop, and you will have to decide what plug-in units your shop A MI= NM VERT INPUT will need to best accomplish the assigned 8 tasks. When this happens, you will have to VERT iNPUT 1111M1111111.... apply principles learned in this CDC plus 11111111.1111111011111 knowledge acquired on the job in making the selection. Before leaving the oscilloscope and A VERT INPUT going on to other testsets,let'sdiscuss SELECTED built-in calibration and indicator control circuits. 8 VERT INPIT 11111 11E1111111111 8-58. Use of Square-Wave Calibrator. In the SELECTED 111111111E111111111 performance of your job, there are many times when you must measure signal levels SWITCHING MV and signal excursions. Logic gating circuits make up a large part of your data processing equipment. The inputs to these gates are, for SIG A the most part, either DC levels, rectangular IIIHIMME1111 pulses, or square waves. In displaying these 111111illI1U11I1 signals to see if they meet proper specifica- SIG tions, it is necessary to know that your scope CHOPPED DISPLAY is properly calibrated. There are two calibration check procedures that you must perform Figure 80. Dual trace, chopped mode. frequently. These are: 75 z

the probes. 111111111111111111111 A. PROBE INTEGRATION IINIMI1111114111111 8-61. Indicator Controls. Thereare four MIUUURI front panel controls associatedwith the indi- 11111111111111111111111111 cator of the oscilloscope shown infigure 60. The Scale Illum controls theintensity of a light that illuminates the centimetermarkings 111011111111111111111 on the etched scale in front of theindicator B. PROBE OIFFERENTATION 11111111111111110111111 face. The Focus and Astigmatismcontrols are maimminm used together toobtain a clearly defmed MUM horizontal trace across the face ofthe indicator. The Intensity control sets tracebrightness by varying the emission of theindicator MIMI MIN cathode. Once set, the Scale Illum,the Focus, C. CORRECTED DISPLAY MEM NMand the Astigmatism controlswill usually 1111111111111111111111111111 need no readjustment; however, theIntensity KOMI Mincontrol may need resetting foreach new signal measured. This is due tothe fact that Figure 81. Adjusting the attenuator probe. the illumination of the trace isa function of both the strength of the electronbeam and Volth per centimeter. the frequency of the Attenuator probe. sweep. It may also be necessary to adjust the intensity whenyou wish to look at the leading andtrailing edges 8-59. To perform these checks,you will of pulses that have need a standard that very short rise and fall can provide a square times.Itis a good practice to turnthe wave of known amplitude. In the case of the intensity down whenyou leave your oscillo- oscilloscope shown in figure 60, sucha source scope for extended periods becausea high- is provided as a built-in feature. This circuitis intensity beam will burn thecoating on the called the amplitude calibrator. Itscontrol indicator face. and output jacks are located in the lower right corner of the front panel (see fig. 60). The 8-62. Differential Voltmeter. The differential voltmeter is a compact, highlyaccurate various positions on the calibrator control instrument designed for precise provide, at the CAL OUT jack, measurement a square-wave of DC voltages. It may be usedas a vacuum- signal ranging from 0.2 millivolt peak topeak tube voltmeter, as a differential DC voltmeter, to 100 volts peak to peak. This outputcan be or as a megohmmeter for measurement of applied asa vertical input to determine high resistance. It is possible to makeprecise whether the Volts/CM control is accurately measurements of stable voltages, calibrated. or to observe After you have checkedthe and measure voltage excursionsabout some Volts/CM control and found it to be accurate, nominal value. the attenuator probes can be placed between the CAL OUT jack and the Preamp Input jack 8-63. When used as a differential voltmeter, to determine their accuracy. the voltmeter operateson the potentiometric principle wherein an unknown voltageis 8-60. When checking the attenuatorprobes, measured by comparing it againstan adjust- it is also necessary to checkthem to see if able known reference voltage, and thediffer- they cause any differentiationor integration ence is read on a sensitive null detector. When of the input signal. If, whenthe CAL OUT is zero displacement current flows in the null connected directly to the verticalinput, a detector, the unknown voltageisexactly perfect square wave is_ presentedon the equal to the known voltage. Whenthe meter oscilloscope indicator, but distortionis noted is zero, the unknown voltage valuecan be with the probe in the line, thenan adjustment read directly from the dials. of the probe is necessary. Twocommon types 8-64. There areseveral models of the of probe distortion are shownin figure 81, A differential voltmeter. Theone you use may and B. The distortion shown infigure 81,A, is be a model 800 or 801 series; however,the due to integration, and that shownin figure operation and the applications 81,B, is due to differentiation. are basically This distortion the same. The voltmeter shown infigure 82 can usually be eliminated by adjusting the (in the workbook) and discussedin the study capacitor within the probe until thedisplay is the model 801B. appears as shown in figure 81,C. There isno set schedule for performing these 8-65. Preliminary Setup. As with othertest calibrations, sets you use, there aresome preoperation but you will find it good practiceto check checks to be made before making your scope in this manner before each any meas- use of urements. For example, ifan unknown volt-

76 y U CAUTION: If you are using the model 801 differential 1. 1 voltmeter and wish to recalibrate the instrument,followthisrule:"NEVER CHECK CALIBRATION WITHOUT

E FIRST DISCONNECUNG THE VOLT- OUT AGE BEING MEASURED FROM THE 4v PLUS (+) BINDING POST." The reason for LOWER UNIT 3.8v this is to prevent a momentary surge/im- OPTIMUM 4.0v UPPER LIMIT 4.2V pression of approximately 500V or 450 microamperes on the voltage source being measured. This overload could cause dam- Figure 83. DC amplifier. age to the circuit being meaSured and to the meter. A charge on two capacitors age is to be measured, you should always set within the meter will cause the meter to be the Range switch to the highest range posi- inoperative until the capacitors discharge; tion. This, of course, is to prevent overload usually this is only a matter of minutes. and possible damage to the instrument. To Now that we have explained the preliminary assure accurate readings, make sure that the control settags and calibration of the meter, meter is zeroed before it is turned on. The let's analyze some of the uses of the meter. adjustment screw on front of the meter case is 8-71. Measurement of DC Voltages. We for this purpose. already know from reading the introduction 8-66. Now let's consider the differential that the meter can be used as a VTVM and a voltmeter controls, what they do, and how differential meter. The following few para- they are used by referring to figure 82 and graphs illustrate the meter used as a VTVM studying the following paragraphs. and difference meter. 8-67. Range. This control permits selection 8-72. Using the meter as a VTVM. The first of highly regulated reference source voltages step in using this meter is to determine the of 500, 50, 5, and 0.5 volts. When measuring approximate voltage. This is done as follows: unknown voltages, the selection should be Set Range switch to 500 position; gull 500. If the voltage is known approximately, switch to VTVM position; and connect the for example, the selection then voltagewhichisto be measured to the 40 volts positive and negative binding posts. would be the next higher position, 50 volts. If the meter needle deflects to the left, 868. Null switch. This switch, when in the the polarityis wrong and the connections VTVM position,isused for selecting an should be reversed by changing the Polarity intemal calibrated multirange VTVM which is switch. used as a conventional VTVM for determining Set the Range switch to the lowest range the approximate value of an unknown volt- whichwillgive an on-scalereading. For age. It can also be used as a calibrated null example, if the voltage is 3.5 volts, the Range detector for measuring the difference between switch should be set to 5. an unknown voltage and a known voltage 8-73. We have now determined the approxi- derived from the 5-decade calibrated attenua- mate value of the voltage. To determine the tor. precise value, proceed as follows: Refer to 8-69. Voltage dials. These dials are labeled figure 83 which is the DC amplifier circuit. A through E and are preset to zero. These This circuit is designed to provide a constant controlsconsist of acalibrated 5-decade DC voltage output with a given input voltage. precision attenuator for dividing the internal Notice that the Gain control shows a gain reference voltage down to the exact level ofvariation of ±5% from the reference voltage. the unknown voltage. For this analysis we will apply 4 volts at the 8-70. Calibration knobs. The meter calibra- input.First, we willmeasure the precise tion check should be made after the instru- output. Then we will use the meter to set the ment has warmed up for at least 10 minutes.output so that the amplifier has a gain of To calibrate the model 801B shown in figure unity. 82, turn the spring-loaded Operate switch to 8-74. By connecting the meter as shown in the CALIBRATE position. Then adjust the figure 84 and determining the approximate CALIBRATE knob for zerono deflection ofrange as 4 volts with the Null switch in the the meter needle. The CALIBRATE ce carol VTVM position, Range at 5V, and switches A, knob adjusts an internal 500-volt reference B, C, D, and E at 0, we are now ready to supply. determine the exact voltage output: 77 lo 103 S is MIMI:Mk 24 /I* AlkOtilli 111119 ly if * k D. C. VOLTS

e 4wiirMIrnom

RANGE NULL

E OUT

Figure 84. Meter/circuitconnecting and recording.

Turn switch A, shown on figure 85, to 4. The exact voltage isnot3.8 volts. Turn Null switch to 1 from VTVM. The Increase indicator knob C tomove neon just below the 4 will light, indicating the indicator to null position. unit's range. The light representsa decimal Reading is 3.88V. point. Observe indicator B. 8-75.Using the meter to set circuit voltage The reading shows that the voltage is less output.Using the same connections, set the than 4V (negative deflection). output of the amplifier to 4V t .01. Since the Place Null switch to VTVM. measured output is 3.88V and the gain adjust Decrease voltage to 3.8000 by using on the amplifier is capable of adjusting t5 knobs A and B (refer to fig. 86). percent, the amplifier can be adjusted to 4V Place Null switch to 1V. output. (.05 X 4 = 0.2V ±.) Refer to figure 87 Observe meter indicator (C). (in the workbook) for the following analysis: 78 Lp,) "** 0 too 144 AV

40040400w0 I Yi6 % 1 \\* D. C. VOLTS f

e sts Z.:47.,`""c

1 ND ICATOR

Figure 85. Voltage reading.

the meter controls asfollows: direction you did to bring theneedle to Place center. (Refer to fig. 87,E.) (Refer to fig. 87,A.) (Refer to (1) Turn the Null controlto 1V. (Refer Move the Null control to .01V. fig. 87,F.) to fig. 87,A.) Using the Gain control on theamplifier (2) Adjust the Gaincontrol until the for a null. needle indicator moves tonull. (Re- circuit, adjust the control (Refer to fig. 87,E,) fer to fig. 87,C.) .1V (Refer to The output is now 4V t...01V. Move the Null control to Move the Null control toVTVM. fig. 87,D.) Remove the probes. Read the meter. If the needle indicator movesto the slightly to This completes this exercise. right, reverse the Gain control 876. Measurement of VoltageExcursions center the indicator. (Referto fig. 8'7,E.) left, continue About a Nominal Value.Although you may If the needle moves to the this application very turning the Gain controlin the same not use this meter in '79 NULL Miff Ito 00 wiii11111111111111111111110/*/ 4: ,,A\\ -kb 3 .s` 0/0" 4 4P A 41, D. C. TS

+Mom%

I ND I CATOR C

RANGE NULL

Figure 86. Calibrated voltage preliminary reading.

frequently, itis a useful device for you to nect the meter as follows: understand. The,primary result to be obtained Refer to figure 88 (in the workbook) for from this application is the measurement of pictorial views of instructions. the amount of excursion or change from a Connect leads from the voltage output specified value or, stated in more commonand equipment ground to the meter terminals, terms, the amount of drift a voltage reference as shown in figure 88,A. source has. An example of such a situation If the meter reads to the left, the voltage could be a regulated power supply outputbeing measured is negative; set the polarity which is supposed to maintain exactly- 15 switch to the negative position. Refer to VDC. However, because of a defective inter- figure 88,B. nal component, the voltage is not stable. To Set the Range switch to the lowestrange measure and check for this possibility, con- which will give an on-scale reading, and note 80 CHART .2 73 HIGH RESISTANCE MEASUREMENT GROUP ANALYSIS

GROUP METER SETTINGS COMPUTATION DIRECTIONS RANGE NULL FACTOR

500 10 Subtract10 fromthe 1. Adjust vol:age 1 to voltage readout dials., readout dialb for 500 ma full-scaledeflection.

II 500 1.0 Subtract 1.00 from volt- 1. Repeat step 1 above. 500 to agereadoutdialsend 2. Result of computation 5000 ma multiply the result by 10. istheresistancein megohms.

UI 500 0.1 Multiply the amount set 1. Repeat steps 1 and 2 5000 to on the voltage readout above. 50,000 run dials by 100.

IV 500 0.1 Apply the formula Em = 1. Adjust voltage readout 50,000 . .Substitute the meter dials for a convenient to reading in volts. meter deflection. 250,000 mfl the nominal value of voltage indicated. Refer = the voltage setting of the 5 voltage knobs. EM = the meter reading on the appropriate scale to figure 88,C. as determined by the Null switch setting. Set the five voltage Readout dials to the 10 = megohms &Input resistance of the VTVM nominal voltagein this case to 15 volts. circuit on 10-, 1-, and 0.1.volt null ranges. Refer to figure 88,D. Turn the Null switch to the lowest 8-78. There are four different routines for position tltat will allow voltage excursion to measuring resistances. Each routineis de- remain on the scale. (Refer to fig. 88,E.) signed to provide a result based upon a Read the excursions from the meter. grouping of resistance values. Note that full-scale deflections are equal to Grouts. Imust be used to measure the NULL voltage setting. Full-scale deflec- resistances from 1 megohm to 500 megohms. tion with NULL at 1V = 1V. In our example, Group II must be used to measure the excursion is approximately ±.4 volt. resistancesfrom500 megohms to 5000 NULL = 1V full deflection megohms. EXCURSION = ±200 = ±.4V. Group III must be used to measure resistances from 5000 megohms to 50,000 The voltage requirements at power ,supply megohms. output require regulated - 15 VDC. The actual Group IV must be used to measure output varies frmri -15.4 VDC to - 14.6 VDC. resistances from 50,000 megohms to 250,000 This condition would indicate a defective megohms. power supply and would require you to change it and repair it. 8-79. The primary differences in the rou- 8-77. Measuring High Resistances. The dif- tines for the groups are tht null seti ings and ferential voltmeter may be used to measurethe computation directions. Rathcz ;Alta. list resistances between 1 megohm and 500,000each one, study chart 2 so that you can megohms. The following equation is usedrecognin and interpret the differenus. when determining these resistances: 8-80. Multimeters. In resident training you studied the basic principles of meters used in Rx - 10 (-1) performing maintenance in the data process- EM ing field. Our discussion here will deal with where: one meter that is a good representative of the multimeters used with the different types of Rx unknown resistance in megohms. equipment. Some of the different multimeters 81 "- 1* -

7/543

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Urcs.,, e3P-1 1.0, ' tN:Th7t. ;13 ,v't-!.

i c

Figure 89. Multimeter. used are the PSM-6, PM-7, and models 260 put and decibel reading,are made by rectify- and 269. Of thesewe have selected the model ing the AC voltage with 269 (fig. 89) for discussion. an internal recitfier, and then applying the resultingDC voltage to 8-81, General Description. Themodel 269 the meter circuit. The differentAC range is designed tomeasure DC and AC voltage, selections are: direct current, and resistancein the ranges 0 - 3 most commonly encountered inelectronic 0 - 8 equipment. Let's first discuss thedifferent 0 - 40 ranges available and the maximum valuesthat can be measured. 0 - 160 0 - 800 8-82. DC voltage measurement. DCvoltages may be measured in the range of 0 - 4000 8-84. DC resistancemeasurements. Resist- volts at a sensitivity of 100,000ohms per volt ance measurements may be made in therange sensitivity on all ranges. Thedifferent DC of 0 - 200 megohms. Two range selections available are: internal batteries 0 - 1.6 volts furnish the requiredpower for making resist- 0 - 8 volts ance measurements. A 1.5-volt batteryfur- nishes the power for thelower four ranges 0 - 40 volts which are 0 0 - 160 volts - 2 megohms. A 22.5-volt battery supplies the power for the highesttwo ranges 0 - 400 volts 0 -20 and 0 -20C megohms. 0 - 1600 volts 0 - 4000 volts 8-85. DC measurements. Directcurrents from 0 16 amperes may be measured 8-83. AC voltage directly on the multimeter. Thedifferent DC measurements. AC volt- ranges available are: ages may be measured in therange of 0 - 800 0 - 16 microamperes volts at a sensitivity of 5000ohms per volt on 0 - 160 microamperes all ranges. AC measurements,inciuding out- 0 - 1.6 milliamperes 82 0 - 1.6 amperes meter leads while taking the reading or while 0 - 160 milliamperes power is still applied. A high-voltage probe 7$-- 0 - 16 amperes (X100) is normally supplied with meters that are capable of measuring high voltages. If a 8-86. Typical Uses of a Multimeter. A good highpositivevoltageisto be measured, habittodevelop when making voltage or connect the probe to the red terminal, or to current measurements is to turn off all power the black terminal if a high negative voltage is to the circuit under test, connect the test to be measured. Take the reading from the 0 - leads, and then turn on the power to take the 40 DC scale; then multiply this readiag by reading. Then, turn off the power before 100. disconnecting the test leads. If this is not 8-91. AC voltage measurements. Again, if feasible, be sure you do not touch the you are in doubt about the value of voltage uninsulated part of the test leads. being measured, always use the highest range. 8-87. Zero adjust. Before making any meas- First, turn the Range selector switch until urements with a multimeter, the r-^:4.: step is the pointer indicates the appropriate VAC to make certain that the needle indicates zero range. when the meter is in its operating position. If Second, connect the test leads across the the pointer is not on zero, adjust the screw voltage source to be measured. AC voltages that is normally located below the center of will read correctly regardless of polarity. the meter scale until the pointer is exactly on Third, take the reading from the red zero. numeral AC scale as follows: 8-88. DC voltage measurements up to 1600 (1) For the 3-volt AC range only, read the volts. When measuring any voltage you are voltage on the red arc marked 3 VAC, which not sure of, always start with the highest is the second from the bottom of the dial, range as protection for the meter. After using the red figures below the arc. observing the first reading to determine that a (2) For the other ranges use the red arc lower range may be used, set the range marked "AC," which is third from the bot- selector to a lower range for a more accurate tom of the dial. Read the black digits between reading. To measure DC voltages, turn the the AC and DC arcs. selector switch pointer to the desired range in (3).' For the 8-, 40-, and 160volt ranges, use the VDC 'area. Plug in the black test lead or the figures as they are marked. connect it to the common (COM), and the red (4) For the 800volt range, use the figures 0 lead to the positive (POS) jack of the meter. - 8 and multiply by 100. Then connect the other end of the black lead 8-92. Resistance measurements. Before you to the negative side and the other end of the make any resistance checks, you should al- red lead to the positive side of the circuit ways make sure that all voltage to the circuit tine,.test. This should be done with the under testisturned off. Then, turn the circuit under test deenergized. Once power is selector switchtothe desired range. The applied, though, the meter pointer may de- ranges are marked with red figures in the Rx flect off scale past zero. The polarity in. this area. Each reading on the ohms scale is to be case is wrong and the leads must be reversed. multiplied by the quantity indicated at each range position. 8-89. The voltage is read on the black arc The first step is to zero the meter on the marked DC, whichisthe second line of ohms scale. This is done by shorting the test numbers from the top of the dial. The scale is leads together and rotating the Zero Ohms read as follows: knob to indicate zero ohms on the top scale. For the 1.6-volt range, use the 0 - 160 The next step is to connect the leads figures and divide by 100. across the resistance to be measured. Take the For the 8-, 40-, and 160-volt ranges, read reading from the OHMS arc at the top of the the figures directly. dial. The meter is calibrated so that the most For the 400-volt range, use the 040 accurate reading is obtained at the center of figures and multiply by 10. the scale. Therefore, you should select the For the 1600-volt range, use the 0 - 160 range that gives a deflection nearest the center figures and multiply by 10. of the scale. 8-90. DC col tage measurements from 1600 - Third, take the reading from the ohms 4000volts.When measuring voltagesthis scale and multiply by the quantity indicated high, you must be extremely careful. Make by the range pointer. For example, suppose sure that the power is off and all capacitors in the indicator of the meter, as shown in figure the circuit have been discharged before mak- 89, on the ohms scale reads 20 and the range ing meter connections. Do not touch the pointer indicates the Rx 100K range. The 83 76 resistance is 20 times 100,000, or 2 million 8-97. Applications. We have already dis- ohms, which is the same as 2 megohms. cussed how the volt-ohrn-milliammeter is used to measure AC and DC voltages, current, and 8-93. When you complete your resistance resistance. Now let's discuss some other appli- cheeks and the meter is no longer in use, turn the Range switch to a position other than cations in which you will find the multimeter "Rx." If the switch remains in the Rx range a very handy tool. and the leads become shorted together, the 8-98. Checking capacitors. The ohmmeter circuit can be used to identify good, open, or batteries will be drained. short conditions of most capacitors. For best 8-94. DC measurements up to 1.6 amperes. results you should use the highest Ex range. A word of caution: The leads should never be The ohmmeter supply voltage is applied to connected across any voltage source when the capacitor to see if it will charge. A good measuring current. The meter should always capacitor will permit current to flow, deflect- be connected in series with the voltage source. ing the meter pointer, while it is charging up Position the Range switch to the current to the applied voltage. This produces a swing rangedesired.When in doubt about the of the meter pointer, with a gradual return to current value,use the highest range. The infinity at the left-hand side of the scale. The current ranges are marked in black in the DC greater the capacity, the more the pointer will area. Then make sure that there is no power swing and the longer it will take for it to., applied, open the circuit in which the current return to infinity. , is to be measured, and connect the meter in 8-99. If the capacitor is open, there will be series with the circuit with the red lead no pointer deflection. However, on very small toward the positive side and the black lead capacitors the pointer deflection is very slight toward the negative side. with a rapid return to infinity. So you must 8-95. Turn on the circuit power and read watch the meter closely when checking the the value on the black scale marked DC, smaller capacitors. If the capacitor is shorted, which is the second from the top of the dial. the pointer will remain deflected on the ohms ,If the meter deflects off scale past zero, turn scale and will not return, even slowly, toward the power off and reverse the test leads. Read infinity. the scale on figure 89 for the different values 8-100. When making checks on electrolytic of current as follows: capacitors, connect the positive lead of the For the 16-MA range, read the figures 0 - meter to the positive lead of the capacitor. If 160 and divide by 10 for microamperes. you have the leads reversed, the meter pointer For the 160-MA range, read the figures will peg off scale. 0 - 160 directly for microamperes. 8-101. Checking diodes. The resistance of For the 1.6-MA range, read the figures 0 - copper oxide, selenium, and crystal rectifiers 160 and divide by 100 for milliamperes. can normally be measured in both directions. For the 16-MA range, read the figures 0 - The forward and back resistance can be 160 and divide by 10 for milliamperes. measured at a voltage determined by the For the 160-MA range, read the figures battery potential of the ohmmeter and the 0 - 160 directly for milliamperes. resistance range at which the meter is set. For the 1.6A range, read the figures 0 - When the test leads of the ohmmeter are 160 and divide by 100 for amperes. connected to the crystal diode, a resistance is measured which is different from the resist- 8-96. For DC measurements up to 16 ance indicated if the leads are reversed. The amperes, observe the same precautions taken smaller value is called the forward resistance, in measuring currents up to 1.6 amperes and and the larger value is called the back resist- proceed as follows: ance. If the ratio of back-to-forward resist- Position the selector switch so that the ance is greater than 10:1, the diode should be range pointer indicates 16 MA-AMP. capable of functioning as a rectifier. However, Plug the black test lead into the COM you should keep in mind that this is a limited jack or. the left.side of the meter. Plug the red test and does not take into account the action test lead into the 16 AMPS jack on the right of the diode at voltages of different magni- side of the meter. tudes and frequencies. Connect the test leads in series with the 8-102. Checking tronsistors. An ohmmeter sourceto be measured; then turn on the can be used to test transistors by measuring po wer. the emitter-collector, base-emitter, and base- Read the current value from the DC collector forward and back resistances. A scale. Use the figures 0 - 160 and divide by 10 back-to-forward resistance ratio on the order for amperes. of 500:1 should be obtained for the collec- 84 tor-to-base and emitter-to-base measurements. oncertain pieces that arerepresentativeof The forward and back resistances between the others. The first type is the drawer tester. emitter and collector should be nearly equal. 9-2.DrawerTester.The drawer tester All three measurements should be made for shown in figure 90 (in the workbook) is used each transistor tested, since experience has for testing and troubleshooting drawer assem- shown thattransistors can develop shorts blies of the RCC and EDLCC portions of the between the collector and emitter and still 465L equipment. There is another similar have good forward and reverse resistances for tester (AN/FYM-13) for testing and trouble- the other two measurements. shooting other portions of the 465L system. 8-103. Because of shunting resistances in 9-3. The cabinet on the left in figure 90 is transistor circuits, you will normally have to the control and display console, and the one disconnect at least two transistor leads from on the right is the programmer and storage the associated circuit for this test. You must console. A detailed breakdown of the com- exercise caution duringthis test to make mon name and reference designationsis certain that current during the forward resist- shown in figure 91 (in the workbook). By ance test does not exceed the rating of the studying figure 91 for a few moments, you transistor. Ohmmeter ranges which require a can see that the control and display console is current of more than 1 milliampere shouldmade from fixed assemblies and drawers. not be used for testing transistors. Assemblies Al (time lapse panel) and A4 (display controller panel, also shown in figure 9.Special Test Equipment 93 as a closeup) are two fixed panels. Assem- 9-1. This sectionis devoted to specially blies A2, A3, A5, A6, A7, A8, and logic built test equipment. Special-purpose test sets power supply A9 are all drawers. Looking at are designed to isolate problems down to the the programmer and storage console on figure defective component with you, the operator, 91, you can see a shelf extended out from the simply following a set of instructions thatfront. The drawer to be tested is placed on exercise the test set. You will probably be this shelf, and the connectors on the rear of told at some time that certain pieces of the drawer mate with the receptacles on the special test equipment are no good and it's a test shelf unit A8. Assmebly Al accepts each Araste of time to use them. But, you must individually selected programmer panel. The remember that to insure that circuit conzpo- choice of panels depends upon the type of nents meet the designspecifications, you drawer under test. must usetest equipment designed totest 94. When a system malfunction has been these specifications. During this discussion we isolated to a particular drawer assembly, the will analyze the use of several pieces of test suspected drawer is mounted on the test ledge equipment that you may use,with emphasis and an appropriate pluggable programmer is

PROGRAMMER PATCHBOARD------461 TP TP

TEST SET DRAWER TEST SIGNAL UNDER SET GENERATOR INPUT TEST OUTPUT COMPARATOR SIGNALS SIGNALS 71-r-

TIMING PRIMARY TEST STEPS

1 PRIMARY TEST STEPS 1 0 0 TEST TIMING SET CONTROL TEST STEP ADVANCE

Figure 92. Automatic test, block diagram. 85 TP TP yOUTPUT SIGNALS TEST SET rDRAWER COMPARED AGAINST SIGNAL UNDER PERFORMANCE STANDARDS GENERATOR INPUT SIGNALS TEST INDICATOR A

TIMING PRIMARY v\) TEST STEPS

TEST SET CONTROL START PUSHBUTTON

Figure 94. Manual test, block diagram. aelected and mounted on the programmer of the test steps is interrupted and resumed panel (cabinet A2). One or more pluggable thereafter. You may also select the manual programmers are available for each of the mode of operation so that you can examine drawers the test set will test. One of these waveforms at any particular test step. programmer patchboards is shown installed in 9-6. Automatic test.Figure 92 shows a the top panel of the right-hand cabinet in block diagram of the automatic test setup. figure 90. Signals produced by the test set signal genera- 9-5. The drawer test set checks each drawer tor for each test step are applied, through the by automatically exercising each circuit in the patchboard,to appropriate inputs of the drawer in a preprogrammed sequence. The drawer under test. The output signals pro- input and output signals of the drawer are duced by thedrawer arethencoupled evaluated at each programmed step by com- through the patchboard to the test set comparator circuits. Each satisfactory response parator. The test set comparator samples the initiatesa GO (sequence advance)signal drawer outputs at each test step to determine which causes the drawer test set to advance whether they are of proper quality and in one step and automatically evaluates the next proper time relationship with the signals from programmed function.In some instances, test set control. If the comparator accepts the circuit domplexity makes itimpractical to signals, the test set will automatically advance perform the entire test procedure automati- to the next step. If the incoming signal is cally. Auxiliary "test equipment is connected rejected, the test set will stop and the test fail to the tester in order to make the necessary lamp wil/ go on. The primary test step lamp additional checks manually. During these matrix (see fig. 93 in the workbook) indicates manual operations, the automatic sequencing the step at which the fail condition occurred,

TEST SET DIGITAL DATA TRANSMITTER TEST SET SIGNAL GEN ERATOR T-871/FY2 FIGURE 2-14 COMPARATOR FIGURE 2-15 FIGURE 2-16 Nir

1 PULSE A55, A15, A7 TP87 AT T3 EXT TP69 All, Al2, Al5 (A5) A15, A19 TS 00 (A2) 1 LEVEL 0TP 164 Qi) (A2) A8 1 LEVEL (A6) A68, A72 A A

Figure 95. Test block diagram. 86

vol.Maa-,...... a. TP164 22FF 4P 1178b) ALL (.179y) 17X TO FIG. 2-15 21B 40 (.178A) ' c5HEET 7) 0775) 25BBo 22HH

Figure 96. Test 1 level at TP164. end the testfail iamp lights. Inputs and CALLO UT: outputs are then checked to determine the 1 - Indicates the figure number of the test cause of the failure. We willdiscuss the logic diagrams for the test set signal generator. control panel (fig. 93) in greater detail after 2 - Indicates,the figure number of the test firstanalyzing the manuai test mode of logic diagrams for the drawer under test. operation. 3 - Indicates the figure number of the test logic diagrams for the test set comparator. All 9-7. Manual test. Figure 94 illustrates the logic diagrams are conveniently use of visual comparison of signals insteadof of these the test set comparator. The test set control placed in the technical order with each drawer circuitsprovide the required control and test procedure. timing siipials that cause the signal generator 4 - Indicates the particular test step which to activate the drawer under test. The drawer is visually indicated on the display panel in outputs are then checked at the test point figure 93 (control panel). with auxiliary test equipment and compared 5 - Indentifies the particular test set drawer with prescribed performance standards. If the or drawers containing the PCBs or compo- indications are correct, the START push- nents being tested during this test step. button is depressed to advance to the next 6 - Identifies the particular PCB or compo- test set. If the indications are incorrect, the nent within the test set drawer or the drawer defective under test that is being tested at this test step. troubleisthenisolatedto the 7 - Indicates the sheet number of the logic printed circuit board. diagram in the figure designated above the 9-8. When a malfunction occurs during the block that corresponds to the indicated test performance of a test procedure, it is neces- point. For example, callout 7 in figure 95 sary to determine thelocation of the trouble indicates that sheet 5 of figure 2-14 contains by using the following support material: the logic for card A8 (J8 on logic diagram) Test block diagrams. which produces the 1 level at TP164. Figure 'fest set signal generator test logic dia- 96 shows the logic diagram that is tested to grams. generate the 1 level at TP164. Sheet 7 of Drawer under test logic diagrams. figure 2-14 contains the logic tested to gener- Test set comparator test logic diagrams. ate the signal at TP87. This portion of the 9-9. Tesk.Block Diagram. Figure 95 is a logic is shown in figure 97. Notice that TS100 typical test block.diagrarn for one test step. A is gated through all the cards indicated on the complete set of block diagrams is provided for test block diagram. each drawer psembly test. The test block 8 - Indicates the test points on the test diagram provides the initial data needed for panel shown in figure 91 (programmer and troubleshooting.Refer tothe calloutsin storage console, assembly A2). figure 95 and we will discuss the block 9 - Indicates the performance standard to diagram in detail. ohsprved.

1431 176-55 1P37

230 23 A2 466 2355 355IJ73A) ,c F,G 15 EFC 7$'00 0 0 2 131 JI9 J55 1466 514EET 3 3CC 178-C1 .1C

300 5..AAI NC .0. 72V 12K

Figure 97. Test, TP87. 87 940. If you know how to readthe test TO 31S5-2FYQ-47. This TO includesthe test logic diagxams, it is easy to troubleshootboth procedures,test block diagrams, and logic the drawer under test and the drawertester. diagrams used in testing and troubleshooting Refer to figure 95. If the testerfails on both the drawer under test and drawertest TS100, a check at the three test pointswould logic that is being checked. isolate the trouble to the group of cards listed 9-12. Self-Check. Refer to figure 93(in the for either the drawer under testor the test set workbook). As with any other pieceof test signal generator. If these signalsare correct, then the trouble would be in the equipment, the first step is to determinethe test set operational status of the test set. Performinga comparator. When the trouble has been local- self-check of the drawer checkerassures that izedto one of these sections, the PCBs the functional circuits of thetest set are indicated in this section should bereplaced. If operational. The test is comprised of 100test this doesn't correct the txouble,you should then refer to the appropriate steps with groups of these steps being usedto logic diagram test operation of specific test set circuits.The and make further checks withan oscilloscope. logic circuits used during a self-check Figure 98 (in the workbook) are illustrates. the made up of elements located in thevarious typical logic diagxam.and thegeneral ,sym- drawers of the test set. Ifa failure occurs bology and coding used in the drawertest set. during the self-check routine,you should 9-11. Test Procedures. Beforeyou attempt to refer to TO 33D7-49.14-2. This TOcovers the test a drawer you must referto the principles of opera';ion and the diagrams of appropriate technical order which describes thelogic exercised during each teststep. the operations of the tester and providesa Performance test data tables which indicate guide for correct interpretation of perform- the test points, performance standards,and ance standards. General information foroper- drawer and card under test at eachtest step ating the tester and the individual drawertest are also provided. procedures for the AN/FYM-2are covered in 9-13. The drawer tester enablesyou to

Figure 99. Printed circuit card. 88 Figure 100. Card testers, 416L. isolate the trouble to a card or group card circuits. One card, for example, may be level. If you know data flow well, it is quite connected to form four flip-flops with their possiblethat you will be able to further associatedinput and output components. isolatethemalfunctiontoasingle card When four of these cards are used, a 16-stage component. In most cases, however, you will shift register, storage register, or counter can need to subject the suspected cards to further be constructed simply by variations in exter- tests. Card testers are supplied for this pur- nal wiring. A small number of different kinds pose. of cards can be used to form the many 9-14. Again referring to figure 93 (in the circuits required by the data processor. Some workbook) notice the group of lights and processors use as few as five different kinds of controls. We have not explained all of them cards.This standardizationof cardsalso because of 'their varied complexity and spe- makes card testers practical in that they need cial-purposeuses; however, thetest status be programmed to check only a limited lamps indicate the overall testing capability of number of standard cards. the set. The primary test step and secondary 9-17. The test sets covered here generate test step light in sequence, and if a test fails, test signals And provide test loads and voltages the total of their numbers equals the test step which simulate actual input and output oper- where the failure occurred. The rest of the ating conditions for theplug-incards or lamps and switches are used for power control modules under test. Setups and programs for and special test features. card testers vary; however, all of them simu- 9-15. Card Testers. Each different type of late operating conditions when testing cards. card requires specific input and output condi- All testers have test jacks at which circuit tions for accurate testing. Since theusing functions areavailable for application to system often requires thousands of cards, you external test equipment such as the oscillo- could conclude that the problem of designing scope. Now let's look at some of these testers a card tester would beinsurmountable if each and see how they work. type of card had a different requirementfor testing. This isnot true, however, because designers of modem-day equipment have developed a system for the standardization of cards. 9-16. In any system there are requirements 7771 for basic circuits such as AND gates, OR gates, and diode matrices. The number of combinations of these basic circuits is almost unlimited; however, the number of different types of individualcircuitsis limited to a relatively small number. Cards are assembled 14 using capacitors, resistors, diodes, and other components necessary for the formation of one or more basic circuits. All components and circuits on the card are connected to a connector strip at one edge of the card (see fig. 99). This makes it possible to use varia- 6 7 2 13 tions in external wiring to connect various components on the card to form the required Figure 101. Card tester overlay program. 89 918. Card tester, 416L. 'The card tester Semiautomatic operation of this set is accom- used with the 416L system ic relatively when plished through use of predetermined test compared with others. This simplicity is due programs stored in binary-coded form on in part to the fact that all cards used by the punched tape. 416L data processor are not tested on the 9-21. The program stored on the tape is same card tester. There are at least three decoded by the program and decoding unit different card testers. Each one is able to which, in turn, automates all programmed test supply only the functions necessary for test- functions to allow a complete analysis of the ing one group of cards. Another reason for card under test. the simplicity is that test programs are set up 9-22. Values measured by the tester are by means of switches. Two of these testersare compared withhigh and low limits pro- shown in figure 100. Note the switch panel of grammed on the test tape. The test sequence the tester on the left. The tests which it automatically stops if a given test result is not performs on acard under test are pro- within the prescribed tolerance or if a manual grammed by various combinations of these reading or control manipulation is required. switch settings. The card tester comes sup- Note the two rows of small windows just plied with a set of plastic overlay cards for below the tape deck on the progyam and this switch panel. To operate this tester, you decoding unit. The upper row displays the simply select the overlay for the cardyou test number, and the lower row displays the wish to test, place the overlay on the switch out-of-tolerance measurement. The test num- panel, and set the switches as indicated by the ber refers the operator .to the applicable TO overlay. The overlay, shown in figure 101, has instructions about the test being performed. the test position for each switch indicated by Waveforms requiring detailedanalysisare a blackened area or a dotted area. In the automatically displayed on the oscilloscope of initial tests, the switches are moved toward the simulator and display unit. the blackened areas. If the center of the 9-23. For rapid reference to applicable TO rectangle is blackened, the switch remains in instructions, the viewing and switching unit its center position. Additional tests are made provides a microfilm view screen. Complete by individually moving each switch toward a TO reference data is contained on microfilm dotted area, reading an associated meter, and and is displayed on the view screen through then returning the switch to the position the use of a front panel film slew control. indicated by the blackened area. 9-24. Test signals (pulses, feedback nets, 9-19. Card tester, AN/GPM-50. Probably bias.voltages, etc.) are supplied by the simula- the most elaborate card tester you may come tor and display section. The manual test and in contact with is the AN/GPM-50, shown in power portion of the set is used to test cards figure 102, which is in the workbook. This that cannot be completely checked in the testerisused totest cards of the data semiautomatic mode. processing and display subsystems of the 9-25. Card tester, TS1996 /FY Q. Another 412L Aircraft Warning and Control System. example of a card tester (see fig. 103 in the This test set can completely test all of theworkbook) is the electronic circuit plug-in components on 95 percent of the system's unit used withthe 4654 data processing cards semiautomatically. It will check part of subsystem. The principles of this tester are no the components on the remaining 5 percent different from those of the card testers just semiautomatically. The remaining compo- discussed. This tester suppliesthe supply nents must be checked manually. The cards voltages and signalsthat the card would are subjected to one or more of the following receive under normal operating conditions tests: and then checks to determine whether the Resistance. card circuits perform their proper functions. Impedance. 9-26. Standard and special test equipment Static. is used in conjunction with the card test set Dynamic. forvarious performancetests. Figure 104 shows a bench test setup. The drawer tester 9-20. Lock closely at figure 102 and you covered earlier supplies the signals which are will note from the callouts that the tester is necessary for the operation of the card tester composed of four cabinet units bolted togeth- duringroutinesinwhich two signals are er. From left to right, the units are: applied simuitaneously to the circuit under Program and decoding. test.In addition to the drawer tester, two standardtestsets,anoscilloscope(not Viewing and switching. shown), and a signal generator are vsed. The Simulator and display. :iignal generator must he of the type that can Manual test and power. produce square waves and rectangular pulses 90 iter." 3 3

r18001111111"!" 3:\ : ' t I

..pel y I 01e.Y , Za 0 .0.an.

!!!.12;t.t: ..... tflllflEIllftU

111111 ..... Sill

4,..5:34440taIG. visosamvr -

Figure 104. Card tester bench setup, 465L of a frequency and pulse width thatis modate the various printed circuit assembly compatible with the equipment being tested. types (callout B). The 36 test jacks (caliout C) 9-27. Refer to figure 103, the cardtest set, enable you to monitor all of the assembly and you can see that the testset contains 30 outputs. The printed circuit board is inserted test circuit selector switches. These control into the receptacle with the componentside input voltages and signals, provideresistive forward, as shown in figure 103. There isa loads to the assembly under test,and supply lamp locatedbehind the assembly which outlputs to an externally connectedoscillo- provides a shadow of the etched printed scope or multimeter. At the beginning ofa wiring on the reverse side. This featureen- performance test, the hinged cardreceptacle ables you tolocatewiring junctions and subchassis (callout A) is pulled out from the defects or breaks in the etching (run). front panel of the set. There are five connec- 9-28. The test procedures for thistest set, tors or jacks on the receptacle whichaccom- TS1996/1:YQ, are coveredin TO 3135- 91 gl

TABLE 6 TEST PROCEDURE

Operation of Point of Performance Step Test Equipment Test Standard

5 Set POWER INPUT ON-OFF switch to OFF. Set TEST CIRCUIT SELECTOR switches to the following: 1-C, 2-D, 4-1, 5-J, 7-D, 15-B, 18-8, 24-F, 25-F, 26-1, 28-D, 29-C, and 30-1. Set all others to A.

6 Set POWER INPUT ON-OFF 2, 24 Waveform 5 switch to ON. Adjust oscilloscope horizontal display for 50 usec/CM.

Vo 0 t 1V

V -11 + 1V 1

Ta 50 usec d

T 1.5 usec r

Tf . 1.5 usec

2FYQ-7. Each test procedure includes the system to keep the downtime to a minimum. circuit description, the schematic diagram, To repair the power supplies, you must be and the waveforms for the circuit under test. able to use the test set that is provided with For example, the assembly shown plugged in your system. the tester in figure 103 is described in the TO 9-30. The test set shown in figure 105 (in as assembly 4581219-G1, consisting of two the workbook) is a typical se t. which is used flip-flops, two AND gates, an OR gate, and a to maintain four types of power supplies in differentiator. The flip-flops are used in appli- the 465L system. This test set is used to cations requiring negative setting, resetting, analyze power supply operation, to set over- and triggering. Complementary transistor out- load calibration, and to isolate malfunctions. put circuits provide pulses with fast rise and 9-31. Fuinctional Elements. The functional fall time. The card tester is then set up to elements of the test set include the variable measure the performance of these circuits. power transformer circuit, the resistive load Table 6 shows typical steps involved in the circuits, and the monitor meter circuit,as test procedure. If the output is below the shown infigure 106. The elements that performance standard, you can then go to the operate to perform a specific function or a schematic diagram and make further checks group of related functions are described be- toward isolating the malfunction component. low. 9-29. Power Supply Test Set, TS1846/FYQ. 9-32. Variable power transformer circuit. TS1846/FYQ. One of the most important This circuitisused to control the input pieces of equipment in any data processing voltage to the power supply under test. In this systemisthe power supply. Without the way, the regulation of a power supply under power supply,the systemisof no use. varyinginput voltageconditions may be Therefore, itis very important that you be determined. able to maintain the power supplies in your 9-33. Resistive load circuits. The +12-volt 92 or -12-volt output of the power supply under /ARIAN. I ihr tO rAc,E /0.(D testis applied to various configurations of TPNtrORO fbced and variable load resistors which com- ilaCjo prise the resistive load circuits of the test set. The resistive load circuits are used in the (.. 4 .041 os 40141 f04 performance of static load tests, transient UNDI f.I 10AP ME TEO load tests, and overload calibration tests. CISKUI 9-34. Monitor meter circuit. This circuit is connected in series with the output of the power supply under test ancr the selected Figure 106. Functional elements, power supplytest set. resistive load circuits. An ammeter in the monitor circuit indicates the amount of cur- 9-38. Static load. The static load function rent drain required to actuate the overload provides a variable load for a power supply protective circuit of the power supply under under test. Placing the front panel Static Load test. The ammeter is also used to set current On/Off switch to the ON position and varying drains on a power supply when testing the the Static Load control causes a resistive load power supply voltage regulation. to be presented to the power supply under 9-35. Operation. Let's now discuss the test. This variable resistive load presents static elements of the test set in terms of their loads in a range of 50 to 100 percent of the function in relation to the operation of the power supply rated output. The power supply controls and switches while testing a power DC output and ripple voltages are checked supply. (Refer again to fig. 105) under maximum load conditions usingan 9-36. AC input. The AC input function external meter or scope. provides a variable AC voltage for the power 9-39. Transient load. The front panel tran- supply under test. This voltage is available by sient load functionprovides a load step turning front. panel 120-VAC Input On/Off exercise to the power supply under test in switch to ON and adjusting front panel AC order to observe its recovery time. When the input to power supply control T1 to the Transient Load On/Off switch is placed in the required voltage. ON position, the Transient Load control is 9-37.Voltage polarity. The front panel adjusted to provide a load of 20 to 80 percent Voltage Polarity switch permits a posiLive or of therated output. Once the controlis negative voltage from a power supply under adjusted to a desired load,the Transient test to be appropriately applied to the test set On/Off switch is repeatedly cycled between circuitry without changing inter-equipment ON and OFF positions to provide a transient cabling connections. Also, this switch insures load. During this time, an oscilloscope is used that the correct voltage polarity is applied at to observe the recovery time of the power all times to the load current motiitor meter. supply.

,hr % %

%.014 4P. .4411 .t"1" 1111

I .11.

0 a a

Figure 107. Trouble analyzer, AN/GPM-17, 93 s?

points within the test set. Both groups of test jacks are used with auxiliary test equipment to monitor voltage levels and waveforms. 9-42. Trouble Analyzer. The trouble analyzer used with the 412L system (see fig. 107) tests suspected assemblies without their being removed from the equipment cabinet. The analyzer is a small, portable digital device composed of a number of plug-in cards which are identical in most instances to the cards it tests. The meter and indicators on the analyzer work in conjunction with a test probe and probe indicator to provide the operato): with simple GO or NO-GO results. This set isolates trouble to a faulty card, monitors assembly supply voltages, and aids in the adjustment of delay component cards. You may wish to use an oscilloscope in conjunction with the analyzer while troubleshooting or checking an .assembly. If so, the analyzer has sync, data, and ground terminals available forthispurpose. Data processors usually process data in both serial and parallel form, and the circuits that process that data must be checked. The trouble analyzer, for example, can compare two serial words bit for bit. One word is produced by the analyzer and is us0 as a standard. This standard word is processed by the circuits to be tested and then fed back to the analyzer for comparison with. the original word. Other tests performed by this tester are: Logic level. Pulse presence. Clock test.

Figure 108. Trouble analyzer interconnected. The particular test that you program the analyzer to perform is obviously determined 9-40. Calibrate load. The front panel Cali- by the circuit under test. The 412L equip- brate Load On/Off switch, in conjunction ment cabinets are composed of a number of with the static load circuitry, provides for racks. Test function switches that select pro- overload testing. While adjusting the static grams for the analyzer are located on these load control for a decreasing resistance, the racks. meter is observed for the maximum current 9-43. Figure 108 shows the same trouble indication before a sudden reduction in power analyzer interconnectedtoan equipment supply output occurs due to the overload rack. Notice that there is a multilead cable protection circuits of the power supply under connected from the analyzer to a plug mid- test. An oscilloscope is also used during this way up to the right-hand side of the rack. The test to observe the sudden reduction in the test function switches are adjacent to this power supply output. plug. The black plug in the center of the rack is inserted in one of the many possible signal 9-41. The test set has a bank of front panel test jacks. You can see from figure 107 that test jacks divided into two groups: power the analyzeris relatively small and can be supply and test set. There are 50 test jacks, A easily moved to whatever rack needs testing. through HFI, associated with the powe: sup. ply under test. Some or all of these test points are made available by using various types of 10. Category 1 and I! Test Equipment inter-equipment cables connected between Cabrati on Program the test set and power supply. There are six 10-1. As a data processing repairman, you test jacks, 3 through 8, associated with the not only must use test equipment but also test set group which permit access to test must determine that it is in proper working 94 condition and that it.is properly calibrated. of precision measurement equipment. Because of the many different types of test 10-6. TO 33-1-14. Titled Calibration and sets and the necessity for accurate standards Certification of PME, this TO provides in- with which to check these sets, test equip- formation such as calibration responsibilities, ment -has been divided into categories; thePME quality control, PME scheduling and responsibility for the calibration of equip-data collection, and preparation and use of ment within these categories is assigned to calibration forms and labels. various organizations. 10-7. TO 33K-1-100. This TO, Calibration 10-2.Formaintenancepurposes,test Technical OrdersRespdnsibilities and, Cali- equipment is divided into four categories, hut bration Measurement Areas, designates the only the first two apply to you as a main te- organization responsible for calibrating specif- nance man. ic items of PME, items not requiring calibra- Category I Category I includes alltion, and the publication pertinent to the operational test equipment installedin aequipment when either the type number or system as an integral part of the system.manufacturer's part number is known. For Examples of this are ammeters, voltmeters; example, the AN/FYM-2 covered earlier is and oscilloscopesthat arebuiltinto the classified as Categor, and the maintenance system. technical order is 331..7-49-14. However, the Category II Category II includes all calibration instructions, such as calibration equipment that is used to check Category I intervals,performance standards, etc.,are test equipment. This group may include de- covered in TO 33K-1-61. vices such as multimeters, counters, and fre- 10-8. Scheduling of Calibration. The PMEL quency meters. shouldautomaticallyschedule- Yonrtest 10-3. All equipment that you are responsi- equipment and call for it when calibration is ble for falls into Categories I and II. However, required. Normally, the materiel control ofthis doesn't mean that you are responsible for fice in the maintenance organization has the all Category I and II test equipment. There responsibility of seeing that the equipment is are two organizations that have the primary delivered to PMEL on the date scheduled and responsibilities for maintaining all equipment then returned to the maintenance work center in Categories I and II. These are (1) the using when calibration is completed. Materiel Con- organization of which you are a part and (2) trolalsonormallyhandlesunscheduled the base Precision Measurement Equipment maintenance requests on equipment that the Laboratory (PMEL). As part of the using PMEL is responsible for. However, test equip- organization, you have the responsibility for ment that is an integral part of your data thecalibrationofallCategoryI and II processing system and cannot be removed, equipment with the following exceptions: but which requires special skills and equip- Base PMEL calibrates all general-purpose ment for calibration, may be calibrated by the and commercial Category II test equipmentusing organization withthe assistance of that can be removed to the PMEL. This does PMEL personnel. not include test equipment that must be 10-9. Standards of Calibration. Each piece calibrated while it is an integral part of data of test equipment must be calibrated against a processing equipment. standard. The standard used must be desig- Maintenance oftest equipment that nated, and when all like items and items can requires special skills or special equipment be checked and aligned with this standard, (whether itbe CategoryIor II)that is they are called lower echelon items. The piece available only at the PMEL is the responsi- of test equipment used as a standard must in bility of the base PMEL. However, you do itself be calibrated before it can be used as a have responsibilities for maintenance of test standard; therefore, various levels of certifica- equipment, and these are outlined in the tion are established. The ultimate or highest technical orders. echelon used for certification of all standards in the United States is the National Bureau of 10-4. Technical Orders. The TOs listed Standards for Electrical and Electronic Equip- below are those most used in identification of ment, Boulder, Colorado. procedures for calibration of Category I and 10-10. You may have standards in your II test equipment. shop; if so, these standards are called shop 10-5. TO 00-20-10-6. This TO, PME Sched- standards. A shop standard is defined as a uling and Maintenance Data Collection Proce- precision measurement equipment known to dures, establishes procedures for the imple- have been officially calibrated and certified mentation and operation of an automated for use as a comparison in checking other items system for scheduling and inventory control in the maintenance shop. These standards are 95 used by PMEL the standard is classified as IDENTIFICATION NO. Category IV equipment. From this you can see that the same meter or other test set may 5ERML WAISPER fall into any of three categories, depending on its use. If used in regular maintenance, it is AUTHORITY (T.O.,ETC) Category II; as a shop standard, it is Category III; and as a PMEL standard, it is Category IV. 10-12. As another example of how a test set could fall into more than one category, CALIBRATION consider the oscilloscope. Some data process- re ACCURACY FUNCTION SPECIAL ing systems have an oscilloscope, modified and installed,as an integral part of the system. Notice the oscilloscope in figure 102 (in the workbook). This oscilloscope is part of the AN/GPM-50 and, as a result, :ails into the Category I test equipment area. 10-13. It is extremely important thnt you be thoroughly familiar with your test equipment. Knowing how to-use it effectively and Certified By: DATE CALIBRATED care for it properly cannot be overempha- 40,-C 6 7 sized. Properly used, it will provide you with , 0 years of dependable service. Know its capabil- DA TE DUE ities and it will aid you immeasurably in the A performance of your job. /6 t/a/v 7,0 10-14. Responsibility of Calibration. De- Certified By: DATE CALIBRATED lineation of responsibilities for calibration/ 0 certification of PME, definition of the cate- /6 do/ Zo goriesof PME, assignment of cilibration ADATEDUE intervals, and procedures and specifications foraccomplishing calibration,repair, and /6 Ofc 7e2 modification of all categories of PME are AFTO "ORM to, contained in TOs 33-1-14, 33K-1-100, or OEC 3 Weapon/Equipment System Series Calibration Measurement Summaries, Maintenance TOs, and TCTOs. TO 33-1-14 prescribes procedures Figure 109. AFTO Form 108, certification label. for clarification of conflicting instructions, correcting errors, and recommending changes not used for routine maintenance functions to calibration intervals. unless an emergency exists or all like items are 10-15. Forms and Labels for Calibration. inoperative. This section covers the forms and labels that 10-11. An example of a shop standard is you will encounter most frequently when the model 269 multimeter discussed earlier. using precision measuring equipment. Shop standards are classified as Category III 10-16.Certification label (AFTO Form test equipment. The same meter may also be 108). This label, shown infigure 109, is used as a standard by PMEL. However, when completed and affixed to standards and PME certified by all Air Force calibration labora- tories. This label is filled out and affixed by USER CERTIFICATION LAMM authorized PMEL personnel. IDZNIVICA 770N NO. Jill CALIUMTON !NM VALti 10-17. As indicated in figure 109, when the AUTHORITYTo 33kl---cAusiunD pox T piece of equipment is calibrated, the tech-

UMW) IV DAT1 MI ctIMMIMI $Y DM DUI ammo sr i.$ nician puts a certification stamp in the Certi- 3 fied By block. The next due date is then entered in the adjacent Date Due block. After FA744441 4 3 the second inspection and all blocks are filled, the label is removed and a new one is affixed by authorized PMEL personnel at the next A 0 FORM 17 AUG 64 I.e.t.a leo. 4 inspection. The only time you, as a data processing repairman, will make entries on this form is when you are authorized by Figure 110. AVM Form 27, User Certification Label, special order to certify calibration. 96 , 3?

NOTICE NO CERTIFICATION CALIBRATION VOID WHEN SEAL IS BROKEN r REQUIRED AFTO FORM 256, OCT 62 ArroFORM 255, OCT. 62 (.., AF , UNION-CAMP, 2-64,1250M AF, ARNOLD II F 4-69 3050M

Figure 111. AFTO Form 255, certification void seal. Figure 112. AFTO Form 256, No Calibration Required.

10-18.Certification label (AFTO Form 10-20. On complex PME, such as test 27).Thislabel, shown infigure110,is stands or checkout consoles, one certification completed and affixed to equipment desig- label for the stand or console will suffice for nated for calibration by the using organiza- all items that are an integral part of the stand tion. The labelis prepared as follows: or Console. Items are considered an integral Identification No. Enter the equipment partifthey are hooked up in the total serial number or appropriate base inventory complex in such a way that they must be number of the equipment receiving calibration. calibrated in, and as a part of, the stand or Calibration Interval. Enter the calibration console to assure the integrity of the com- intervalfor the equipment in days. For plex. example, 3 months is 090 days; 6 months is 180 days. 10-21. CertificaVon void seal (AFTO Form Authority. Enter thetechnical order 255). Refer to figura 111. This is a seal which number or special instruction source which PMEL attaches to all standards and to items containr thecalibration procedure of the of PME which have adjustments that affect specific equipment. calibration.Thissealisnot required on Calibrated For. Insert specific type of mechanical zero adjustment screws located on calibration conducted on the equipment. If electrical indicating meters. This seal is ap- equipment has been calibrated on all ranges, plied in such a manner that any attempt to enter the word "All." repair or adjust the equipment will result in Certified By. The organization's quality breaking the seal. When the seal is broken, stamp or theinitials of the maintenance certification of calibration accuracies is no inspector are entered in this block. The date longer valid. Recertification must be accom- calibration was performed is entered along the plished by PMEL inthe event calibration left outer margin, in the same block with the accuracy is in question. initials or stamp certification. 10-22. NoCalibrationRequiredlabel Date Due. The date the equipment is due (AFTO Form 256). TO 33K-1-100 is used to for recalibration is entered in the next Date determine which items are to be labeled with Due block by the technician who calibrated AFTO Form 256 (refer to fig. 112). The the equipment. forms are obtained from the local PMEL. 10-19. The certification label is affixed to a Usually, PMEL willfurnish a stamped or clean surface in a conspicuous, clear area on initialed form to the user for application. the equipment. On small items, the label may However, the form can be certified by the be affixed to a plain manila tag and tied to user simply by initialing it. the equipment. Items which, by their nature, 10-23. There are other forms and labels will not allow affixing of the label may have used in conjunction with PME; however, the the label affixed to their container. ones covered here are the most important.

97 ...-CI t) MODIFICATIONS

of this publication has (have) been deleted in adapting this material for inclusion in the "Trial Implementation of a

Model System to Provide Military Curriculum Maierials for Use in Vocational and Technical Education."Deleted material involves extensive use of military foru.s, procedures, systems, etc. and was not considered appropriate for use in vocational and technical education. 5'l

54. All operational test equipment installed in a system as an integral part of the system.

55. Test equipment used to check Category Itest equipment.

56. Precision Measurement Equipment Laboratory (PMEL).

57.I .e. 2. c. 3. b. 4. a.

58. United States National Bureau of Standards for Electrical and Electronic Equipment.

59. A piece of PME known to have been officially calibrated and certified for use as a comparison in checking other items in a maintenance shop.

1, 60.1. C. 2. cl. 3. a. 4. b. - -

MODIFICATIONS

F44 c=2 of this publication has (have) been deleted in 0 adapting this material for inclusion in the "Trial Implementation of a

Model System to Provide Military Curriculum Materials for Use in Vocational and Technical Education."Deleted material involves extensiva use of military forms, procedures, systems, etc. and was not considered appropriate for use in vocational and technical education. '73

MODIFICATIONS

>IJ4pdp44! of this publication has (have) been deleted in adapting this material for inclusion in the "Trial Implementation of a

Model System to Provide Military Curriculum Materials for Use in Vocational

and Technical Education."Deleted material involves extensive use of military forms, procedures, systems, etc. and was not considered appropriate

for use in vocational and technical education.

Ci Index

A Desoldering (4-26) AF Form 623, Training Record (2-10-12; Demonstration, the (2-21) Figs. 2-5)* Differential Voltmeter (8-62-70) AFM 39-1, AirmanClassification Manual controls (8-66-70) (2-13) DC measurement (8-71) AFM 66-1, Maintenance Management (11-2) high resistances measurement (8-77-79) AFM 100-12,Conirriunications-Electronics voltage excursions measurement (8-76) (11-3) output voltage set (8-75) AFR 66-8, Maintenance Evaluation Program used as a VTVM (8-72, 74) (5-29) Discussion, the (2-21) AFR 400-44, Corrosion Prevention and Con- Drawer Tester (9-2-14) trol Program (5-29) Dual-Channel OJT, definition of (2-8) AFTO Form 349/350 (12-4; 14-18, 25) Air Materiel Areas (13-5, 6; 14-26) Analysis, definition of (3-4-6) Assignment and Supervision of Work (1-11) Emergency Unsatisfactory Materiel Report Assignment Rules (1-12) (11-6) ATC Course Numbers, definition of (2-6, 7) Engineering Change Proposals (ECP) (13-1, 3) Equipment,automatedrecordingsystem (15-9-13) Calibration, certification label, AFTO Form history of (15-2) 27 (10-18) E quipmentIdentification(seeTechnical certificationlabel,AFTO Form108 Orders) (10-16) coordinate coding (6-17) certification void seal, AFTO Form 255 coordinate numbering (6-14) (10-21) location coding method (6-15) forms and labels (10-15-23) location numbering method (6-12) National Bureau of (10-9) sequential coding (6-16) No CalibrationRequiredlabel, AFTO sequential numbering (6-13) Form 256 (10-22) uait numbering method (6-3) manual recording system (15-5-8) responsibility (10-14) recording of (15-4) shop standard (10-10) Evaluate Performance of Personnel (1-29-35) Career Development (2-8) Card Tester (9-15-17) AN/GPM50 (9-19-24) TS 1996/FYQ (9-25-28) Flux (3-18) 416L (9-18) defined (4-24) Chief of Maintenance (12-2) Fuses and Fuse Holders (3-36) Components, replacement techniques (4-2) damage signs (3-42) Connector, nomenclature (3-64, 5) melting point (3-38) rempve, replace procedure (3-66) numbering (3-37) types (3-59) remove and replace procedures (3-43, 44) Corrosion, causes (5-11-13) size and use (3-41; Table 2) cleaning (5-19-28) definition (5-1-3) electrochemical (5-6) Galvanic Cell (5-6-9) prevention (5-14-18) General Plan for AF Training (2-2) requirements for (5-5) Graduate Evaluation Programs (2-28-33) terms (5-4)

H 'Indicates pant number. unleu otherwise stated. HOW MAL Codes (12-5, 6, 7; 15-10) 117 Indicator controls, 545A oscilloscope (8-61) Personnel, evaluation of (1-29.35) Inspect and Service Electrical and Mechanical Performance, the (2-21) Connectors (3-58-67) routines (3-2) inspect and Service Read/Write Heads (3-17) standard, definition of (1-21-24) Inspection Checklist (1-26) PowerSupplyTestSet, TS 1846/FYQ Inspection, connectors (3-63) (9-29-41) elements of (1-26) Priorities, definition of (1-20) responsibilities of (1-25) Production Controls (1-19) Instruction, techniques of (2-20) Interim Engineering Change Authorization (13-2, 3) Inventory Manager (13-1) Quality Control (12-3; 14-17, 34, 35) Quality Unsatisfactory Materiel Report (11-6) Jacks (7-11) Job Proficiency Development (2-8,b) Rating Forms, completion of (1-29-31) Lamp and Lamp Sockets (3-24; Table 1) Records (12-4; 14-25) neon indicator 93-29-32) Record Jacket File (15-14, 15) offset prong (3-27) Repair/ReplaceDefectiveComponents remove and replace procedure (3-25) (4-1-58) screwbase (3-24, 5) Repair, Replacement, General Tasks (4-45) subminature (3-33, 34) removal of component task list (4.46, 47) Lateral OJT (2-4) special areas (4-49-58) Lecture, the (2-21) Routine Unsatisfactory Materiel Report (11-6) Lights (3-21-36)

Maintenance Control (12-2) Sniffing (4-31-33) Materiel Control (12-6) Solder, joints (4-25) Maintenance Data Collection MDC (13-1, 4; nature of (4-11-23) 14-3, 6) application of solder (4-41-43) analysis (1-27) desoldering (4-8) Measurement of DC Voltages (8-71) forming (4-38-40) M1L-STD-1250, CorrosionPrevention and preparation for (4-34-37) Deterioration Control (5-29) terms (4-9) Multimeters, applications (8-97-102) tools (4-10) description (8-80, 81) Specialty Training Standard (2-14, 150 16) uses (8-86-96) Standard Configuration Management System (15-9-13) 0 action code (15-10) OJT, Dual-Channel (2-8) Supervision, adjusting to the new job (1-9, general plan for (2-2) 10) lateral training (2-4) categories of (Ch 1, Intro-3) records, AF Form 623 (2-10.12) definition (1-1) maintenance (2-9) determining lines of authority (1-8) used as a tool (2-18, 19) job assignment (1-5) Origin of TCTO (Sec 13) orientation (1-2) Oscillcscope, purpose (8-2) responsibilities (1-4) 545A (8.3) specific work areas (1-7) controls (8-4-8) Switch (3-45-57) indicator controls (8-61) micro (2-54) use of controls (8-9-40) pushbutton with lamp indicator (3-51) use of external sweep (8-42) repair or replace procedures (3-56, 57) use of single sweep (8-41) spring-loaded pushbutton micro (3-50) use of square-wave calibrator (8-58-60) toggle, (3-49) Oxide Deposits (3-18) System Support Manager (13-1) 33K-1-100, Calibration TO-Responsibili- tiG TCTO, applicability (14-13)" tiesandCalibrationMeasurement Areas event type (15-10) (10-7) format (14-12) 00-35D-54,USAF MaterielDeficiency installation (14-29-36) Reporting System (11-6) immediate action (14-2, 3, 17; 15-10) Tert Equipment, category II (10-2) record action (14-2, 11; 15-10) category I (10-2) routine action (14-2, 6, 9, 10; 15-10) Test Set, trouble analyzer (9-42, 3) routine, category I (14-2, 9) Time'Compliance Technical Order, definition routine, category II (14-2, 10) of (Ch 5, Intro-2) rotitine, class IVA (14-2, 6, 17) Training (SeC 2) routine, class IVB (14-2, 7) Training Methods (2-21) safety (14-6) techniques (2-22,-23) urgent action (14-2, 4, 17; 15-10) Technical Orders (3-7-9) remove, replace (4-4-7) series -2, series -3, series -6WC, (6-8, 9, 10, Unit Manning Listing (2-17) 11; 7-3) use to validate repaired equipment (1-28) 0-1-31-X, Numerical Index and Require- V ment Table (11-10) Vertical Controls, 545A oscilloscope (843-57) 0-0-5-1, AFTO System (11-4) 00-20-1, Preventive Maintenance Program (11-5) 00-20-2-1, MDC, AFTO Forms, and Gener- W al Documentation Peocedures (11-5) Wicking (4-27-30) 00-20-4, Historical Records and Configura- Wiring Diagrams, alphanumeric codes (7-6, 9) tion Management (11-5; 12-5) elements (7-2) 00-20-2-8, ON EQUIPMENT Maintenance horizontal connector listing (7-7) Documentation for C-E-M Equipment (11-5) identification of connecting points (7-6-9) 00-20-2-10, OFF EQUIPMENT Mainte- interpretation of (7-1-9) nance Documentation (11-5) jacks (7-11) 00-20-8, Ground C-E-M Records (11-5) multi-routed signal tracing (7-7) 00-20-10-4, Base Level Mechanized TCTO vertical connector point listing (7-6) Reporting System (11-5; 12-5; 15-10) table (7-9) 00-20-10-6, PME Scheduling and MDC Pro- Work, assignment and supervision of (1-11) cedures (10-5) Work Center (12-9) 33-1-14, Calibration and Certification of Work Load Control (12-8) PME 10-6) Work Methods (1-15, 16, 18)

6U S. COMNMINT PRINTISC ()Ma: 197S.64140/143

AU FOAM AUCAFS. ALA (74147o) :400

119 30554 01 21 WORKBOOK

GENERAL MAINTENANCE ...... _...... ciw-fr.W.T-Tet\CW2AM

SR G

This workbook places the materials you need where you need them while you are studying. In it, you will find the Study Reference Guide, the Chapter Review Exercises and their answers, and the Volume Review Exercise. You can easily compare textual references with chapter exeicise items without flipping pages back and forth in your text. You will not misplace any one of these essential study materials. You will have a single reference pamphlet in the proper sequence for learning. These devices in your workbook are autoinb=ctional aids. They take the place of the teacher who would be directing your progress if you were in a classroom. The workbook puts these v.:If-teachers into one booklet. If you will follow the study plan given in "Your Key to Career Development," which is in your course packet, you will be leading yourself by easily learned steps to mastery of your text. If you have any questions which you cannot answer by referring to "Your Key to Career Development" or your course material, use ECI Form 17, "Student Request for Assistance," identify yourself and your inquiry fully and send it to ECI. Keep the rest of this workbook in your files. Do not retum any other part oZ it to ECL

EXTENSION COURSE INSTITUTE Air University

1 TABLE OF CONTENTS

Study Referendi Guide

Chapter Review Exercises

Answers For Chapter Review Exercises

Volume Review Exercise BO Form No. 17

11...)1.3 STUDY REFERENCE GUIDE

I. Use this Guide as a Study Aid. It emphasizes all important studyareas of this volume. 2. Use the Guide as you complete the Volume Review Exercise and for Review after Feedbackon the Results. After each item number on your VRE is a three digit ,number in parenthesis. That number corresponds to the Guide Number in this Study Reference Guide whichshows you where the answer to that VRE item can be found in thetext. When answering the items in your VRE, refer to the areas in the text indicated by these Guide Numbers. TheVRE results will be sent to you on a postcard which will list the actual VRE items you missed. Go toyour VRE booklet and locate the Guide Number for each item missed. List these Guide Numbers.Then go back to your textbook and carefully review the areas covered by these Guide Numbers. Review the entire VRE again before you take the closed-book Course Examination. 3. Use the Guide for Follow-up after you complete.the Course Examination. The CE results will be sent to you on a postcard, which will indicate "Satisfactory"or "Unsatisfactory" completion. The card will list Guide Numbers relating to the questions missed.Locate these numbers in the Guide and draw a line under the Guide Number, topic, and reference. Review theseareas to insure your mastery of the course.

Guide Guide Number Number Guide Numbers 100 through 120

100Supervision and Training; Supervision: pages 109Test Equipment; Operating Standard Test 1-6 Equipment: Oscilloscopes"B" Intensified By "A"; pages 62-69 101 Training; pages 6-13 110Operating Standard Test Equipment: 102 General Maintenance; Performance Delay-Time Frequency MeasurememGain Routines, Repairs, and Operational Checks: Adjust; pages 69-75 AnalysisSwitches; pages 14-21 111 Operating Standard Test Equipment: Use of 103Performance Routines, Repairs, and Square-Wave CalibratorMeasurementof Operational Checks: Types of Switches and Voltage Excursions About a Nominal Value; The ir Re 1 a te d A pplicationsTypical pages 75-81 RemovalandReplacementof Multiple Connectors; pages 21-27 112Operating Standard Test Equipment: M e a suring High ResistancesChecking Transistors; pages 81-85 104 R e pai ri n g or Re p lacing Defective Components: Replacement TechniquesThe 113 Special Test Equipment; pages 85-94 Nature of Solder; pages 27-35 114Category I and II Test Equipment 105 Repairing or Replacing Defective Calibration Program; pages 94-97 Components: FluxConclusions; pages 35-43 115 Equipment Modification; Technical References; pages 98-100 106Controlling Corrosion; pages 43-50 116Responsibilities of the Maintenance 107 Equipment Identification; Using Organization; pages 100-101 Al p h an umeric Equipment Numbering Systems; pages 51-55 117 Organization of a TCTO; pages 101-102

108Interpreting Wiring Diagrams and Correlating 118Installation of a TCTO; pages 102-107 the Diagrams with Connectors, 119Recording a TCTO; pages 107-110 Interconnecting Cables, Cabinets, and Remote Equipment; pages 55-61 120 The Program in Perspective; pages 110-111

1 /o o

CHAPTER REVIEW EXERCISES

The following exercises are study aids. Write youranswers in pencil in the space provided after each exercise. Immediately after completing each set of exercises, checkyour responses against the answers for that set. Do not submit your answers to ECI for grading. /0/

MODIFICATIONS

n 3 of this publication has (have) been deleted in adapting this material for inclusion in the "Trial Implementation of a

1 I CHAPTER 2

Objective: To determine requirements and skills whichare necessary so that you can perform routines, repair actions, and control corrosion.

I. Name five tasks which fall in the category of ,preventive maintenanceroutines and repairing or replacing of electronic components. (3-1)

2. What would be the result of a poor general maintenance program? (3-2,3)

3.List the TO series which will provide step-by-step instructions of PM1s. (3-7)

4. If airflow is decreased within an equipment cabinet because of faultymaintenance, what may result? (3-12) I

5. What are the two most dangerous enemies of magnetictape and drum systems? (3-17)

6. Why is it important to remove powtr before installinga new lamp socket? (3-25)

i 1.... 4 1 o 3 7. What are the two uses of the NE68 lamp? (3-32)

8. Where are fuses normally found in a circuit? (3-37)

9. What is the approximate melting temperature of the current-canying element of a fuse? (3-38)

10. What effect will a large decrease in resistance have on a circuit fuse? (3-39, 40)

11. What are most common causes of fuse holder damage? (3-42)

12. The method used in replacing a fuse holder is much the same as replacing (3-43, 45)

13. What are two broad uses of switches in computer systems? (3-46)

14. What are the four most common switches in use today? (349-54)

15. When replacing a switch, you see the letters NO, NC, and C on the switch. What are the meanings of the letters? (3-57)

16. What three letters are not used to label pin connections of a connector? (3-59, 60)

17. What would be the most probable causes of a recessed pin in an electrical connector? (3-63)

18. How are the connectors labeled for a printed circuit board? (3-64, 65)

.1 ...I LI ,

19. What is the primary purpose of the 4 TO, illustrated parts breakdown? (4-6)

20. What are the usual causes of cold solder joints? (4-9)

21. Derme flow point. (4-9)

22. The point at which an alloYiiiris io melt is called .(4-9)

23. What is tinning? (4-9)

24. What is the primary purpose for using a thermal shunt? (4-10)

25. What is the most likely way to ruin a transistor or diode when soldering? (4-10)

26.Is soldering a metallurgical process or a physical adhesion? (4-13)

27. Explain why a soldered connection is better than one that is bolted or wired. (4-14, 15)

28. What is the purpose of using flux in the soldering process? (4-24)

29. What type of flux is required for electronics soldering? (4-24)

30. List two methods used in desoldering. (4-29-31)

31. In cleaning a circuit board for soldering, what would be the proper cleaning tool to use? (4-37) 32. What is the purpose of the stress relier? (4-39)

33. Who is most responsible for corrosion control? (5-2, 3)

34. Name the three types of electrochemical cells. (5-6)

35. What causes the dew point to vary in equipment? (5-11)

36. What causes uniform etching corrosion? (5-11)

37. Why does corrosion usually occur in and around spot welds? (5-12)

38. What is the physical appearance of corroded aluminum? (5-12)

39. What two preventive maintenance actions are used to control corrosion? (5-14)

40. What are two effective corrosion-preventive coatings? (5-15-18)

41. What type cleaner would be used on oily or fatty soils? (5-19-22)

42. When would you use mechanical cleaning techniques rather than chemical? (5-28)

43. What AFR contains the corrosion prevention and control progiam? (5-29)

44. Does corrosion control play an important part in the reliability of the system? (5-30) I D7

14. Which units of an equipment set are likely to have interconnecting cables? (7-1)

IS. What three parts of electronic equipment serve the same general purpose of linking elements of a system together? (7-1)

16. What are two methods of making a wiring list? (7-1)

17. What distinctive advantage does a bay or rack have over a chassis? (7-2)

18. Which unit in a set is similar in purpose to a chassis? (7-2)

19. Why is the service manual useful for identification of equipment wiring? (7-3)

20.Refer to figure 52. Before its full location is known, what other infonnation does jack A1.117-6 need? (7-6; Fig. 52)

, 9 1.1- 1.) 21. The RM3 pulse isnot being received at the SIF unit 1503103-4. List theposAle test points between its origin and 1503103-4. (7-7;Fig. 53)

22. Refer to figure 53. Whereis the output from assembly 616, 1616, routed to? (7-7; Fig.53)

23. Refer to figure 56. Do callouts 1 through 5 ona table listing refer to data location output of a signal? (7-9; Fig. 56) of the input or

24. The locations listed inthe From and To (Fig. 56) columns under MDF title, identifylocations physically located in which unit? (7-9;Fig. 56)

25. Cable 59 (Fig. 57) will route the DO pulses from where?(7-9; Fig. 57)

26. Refer to figure 58, situation B, and identify the followingelements: HH (7-9; Fig. 58) 16 W64 A 16.

CHAPTER 4 Objective: To show an understanding of the uses of AGE equipmentand apply this understanding problems dermed in the text. to

I. Which oscilloscope is usedas the example in Chapter 4? (8-3)

2. The front panel controls on the oscilloscope can be divided intothree main areas of control. List them. (8-4)

3. The are included in the Horizontal Display control. (8-5)

4.Explain the purpose of the time baseA group of controls. (8-6)

10 5. What portion of a display is presented when the 5X magnifier switch is on? (8-6; Fig. 61)

6. From the function in the right column, select the control setting in the left column which most closely identifies the control's use. (8-6)

Setting Function

1. AC and DC a. Use of an RC filter is to reject 60-hertz or 2. AC LF REJECT' lower frequencies to prevent triggering the scope 3. AtrromAnc when both high and low signals enter the scope. 4. HY SYNC b. Internal circuits connect the triggering source directly to the sweep-gating MV to synchronize with the triggering waveform. c. Provides the input with a low-frequency MV which can lock in with input signals from 50 hertz to 2 megahertz. d Controls the display positioning of a waveform by locking to the DC level or eliminating the DC level of the input signal.

7.What is the function of the Trigger Slope selection switch? (8-6)

8. Which control selects the position on the triggering waveform, the point where triggering occurs? (2-6)

9. When used, preset on the Trigger Level control provides a at a predetermined level to cause triggering. (8-6)

10. What are the maximum and minimum DC levels of voltage which can be preset? (8-6; Fig. 64)

11. Solve the following problems using the formula f = y.1

a. A sine wave requires 2 centimeters for one complete cycle. The TimePer Centimeter control is set to 1 microsecond. What is the frequency? b. A 100-kHz signal is being displayed and one cycle occupies 4 centimeters on the display. What is the setting of the Time Per Centimeter control? (8-10-14)

11 12.Explain the label "B" INTENSIFIED BY "A." (8-18-20)

.1,3.List the control conditions which must beset for a "B" INTENSIFIED BY "A" trace. (8-21-8.23)

14.Explain how the intensity modulation of the "A"trace results in greater intensity of a portion of the display. (8-22. 23)

15. Using figure 66,B, of the textas an example, and the Delay-Time Multiplier, what reading would you expect to rcad on the multiplier scale at the end ofone cycle if the scale read zero at the beginning of the graticule? (8-29-33; Fig. 66,B)

16.If the Delay-Time Multiplier control is used tomeasure a square wave or rectangular waveform, what two types of information can it provide? (8-33, 34)

17. For an "A" DELAYED BY "B" presentation, what controlsmust be used? (8.36, 37)

18. For "A" DELAYED BY "B" presentation, what unblanking pulseis inhibited? (8-36, 37)

19. What occurs when the Horizontal selector control is turnedto "A" DELAYED BY "B"? (8-36, 37)

20. What useful purpose does the single sweep serve? (8-40, 41)

21. The vertical input unit, type CA, can process in variousways. List the different ways. (8-43-45)

22.Calculate the amplitude of the signal shown in figure 76 of thetext if the Volts/CM switch is in the .2 position. (8.47)

23. To obtain the DC reference of an AC signal, what conditionsmust be established on the input unit? (8-48, 49; Fig. 60)

12 111 24. What is the primary oscilloscope operation difference when Using ALTERNATE mode or CHOPPED mode selections on a CA preamp? (8-51, 52)

25. One of the most valued uses of the square-wave calibrator on an oscilloscope is for . (8-58, 59)

26.List the four indicator controls on the front of the 545A oscilloscope. (8-61; Fig. 60)

27. Can a differential voltmeter measure AC voltages? (8-62)

28. Name the three uses of a differential voltmeter. (8-62)

29. What position must the Range selection switch be in when an unknown voltage is being measured? (8-67)

30.List the four major control switches on the 801B meter. (8-65-70)

31.If you try to calibrate the meter and an external voltage source is connected to the positive binding post, what condition results? (8-70)

32. What two ways can the meter be used when measuring DC voltages? (8-71)

33.If a circuit is designed to have a 4-volt output, how would the meter be set before an accurate VTVM measurement is made? (8-74; Fig. 82)

34. What is the maximum accuracy of the differential voltmeter? (8-73-75; Fig. 82)

35. To set a circuit to a specific output with an accuracy of ±.01 VDC, what must the meter controls be set to? (8-75)

13 //A

36. The differential voltmeter may be used to measure resistances between megolun and megohms. (8.77, 78)

37. List the uses of the multimeter shown in figure 89 of the text. (8.81; Fig. 89)

38. 'What precaution should be taken when measuring high voltage with the multimeter? (8-90)

39. The multimeter may be connected in various ways. Match the type of measurement in Column A with the type of connection in Column B. (8.81-96)

COLUMN A COLUMN B

1. DC voltage a. Connected in series with the source. 2. AC voltage b. Connedted in parallel with the source. 3. Direct current c. Either series or parallel connected. 4. Decibel measurements 5. Ohms

40. Explain the method used for checking a capacitor. (8.98)

41.List the steps used to check a diode. (8-101)

42. Which junction of a transistor amplifier will measure close to a 1:1 front-to-back ratio? (8.102)

43. Can a valid test with a multimeter usually be made of a transistor with two of the leads disconnected from the circuit? (8.102, 103)

44. Define the primary use for a special piece of test equipment. (9-1)

45. Explain the basic principle involved in the use of drawer and card checkers. (9.1-5)

14 l/3 46. The drawer tester shown in figure 90 can be operated in what two modes? (9-5-7)

47. List the support material that is needed to locate a trouble detected by the drawerchecker. (9-8)

48.Is it necessary to self-check the drawer checker prior to actual use? (9-12)

49. What feature of modem EDPs makes the development and use of cald checkers possible?(9-16)

50. Drawer checkers and card checkers have one major common element. Identify the element. (9-3, 17, 18)

51.List the four types of checks a tester may be designed to check. (9-19)

52. A power supply test set compares closely with what other type of test set? (9-29,30)

53. What does the static load provide when a power supply is under test? (9-38)

54. Define Category 1test equipment. (10-2)

55. Define Category 11 test equipment. (10-2)

56. What agency on base has prime responsibility for calibrating most standard testequipment used in work centers? (10-3)

1'?"... A, 57. Select the correct description ofa technical order in Column B that matches the technical order number in Column A. (10-5-7)

COT..UMN A COLUMN B

I. TO 00-20-10-6 a. Contains instmctions for performance standards to 2. TO 33-1-14 calibrate the ANIFYM-2. 3. TO 33K-1-100 b. Contains data which specifies responsibility for 4. TO 33K-1-6I calibration. c. Contains information about the use of calibration forms and labels. d. Identifies Category II maintenance as applicable to the AN/FYM-2. e. Establishes procedures for inventory control and scheduling of PME.

58. What agency contains the highest standards ofcertification of standards? (10-9)

59. Define a "shop standard." (10-10)

60. Select the description in column B that identifies the form labelin column A. (10-16-22)

COLUMN A COLUMN B

I. Certification label a. A seal placed upon PME in such a manner that (AFTO Form 108) prevents the user from making internal adjustments. 2. Certification label b. A label used on equipment often signed by the (AFTO Form 27) umr and authorized under provisions of 3. Certification void seal TO 33K-1-100. (AFTO Form 255) c. A label completed and signed by PME personnel 4. No Calibration Required label specifying that all standards have been met. (AFTO Form 256) eL A label completed by the user when calibration is completed.

.1?....,

16 Ur

MODIPICATIONS fif'r1.-.>1 of this publication has (have) been deleted in adapting this material for inclusion in the "Trial Implementation of a

CHAPTER 2

1.Servicing, inspecting, repairing, replacing, and validating.

2. System (it terioration.

3.Series 6WC.

4.Cabinet temperature will rise and the risk of equipment malfunctionwill increase.

S.Residue deposits and magnetizing of the headt.-

6. To prevent loss of power to the equipment or injury tothe personnel.

7.(I) Display and (2) voltage regulator.

8.Usually in an input power line.

9.170°.

10. The fuse for the circuit will blow.

11.(I) Heat and (2) mechanical abuse.

20 117 12. The lamp socket.

13.Digital input and command input devices.

14.(1) Toggle. (2) Pushbutton microswitch. (3) Palibutton with indicator. (4) Microswitch.

15.(1) NC = normally closed. (2) NO = normally open. (3) C = common.

16.i, o, q.

17.Broken clip, lack of spring tension on the clip, or a broken plastic recesscatch.

18.Printed circuit board is labeled A3, A4, and the receptacle XA3, XA4, etc.

19.Identification of parts.

20.Surfaces which are not clean or insufficient heat.

21. That point at which an alloy is completely liquid.

22. The melting point.

23. Coating metal with a very thin layer of*molten filler metal.

24. To protect components.

25. Allowing excess heat to eraer the component.

26. Metallurgical.

27. A soldered connection is continuous in metal :;ontinuity,while a bolted or wired connection is only physical. The latter connection becomes loose during small temperaturevariations.

28. To prevent combining of oxygen with the metals.

29. Noncorrosive.

30. Wicking, sniffing.

31. A white typewriter eraser.

32. The stress relief will allow movement of the wire withoutplacing stress on the solder connection.

33. You are.

34. Galvanic cell, concentrated cell, and electrolyte cell.

35. The amount of moisture taken into the air-conditioning system.

21 la

36. Chemical attackover the entire surface of a material.

37. Because corrosive agentsare trapped between the layers of metal.

38.It is dull with a whitish powderey residue.

39. Protective coating and cleaning.

40. (1) Acrylics and (2) epoxies.

41. Alkaline cleaners.

42. When heavy corrosion exists.

43. AFR 400-44.

44. Yes.

CHAPTER 3

1.Alphanumeric coding systems.

2.Smallest component.

3.Fault location guide, troubleahooting, andsystem validation.

4.R.

5.5, 6, 7; .5; 5A1.

6.Descending order, largest to smallest.

7.Circuit diagrams, 3.

8.Use of the letter "N" to identifyareas which are not assemblies.

9.Cabinet 1 because of its prefix NI.

10. 0001.

11.Even.

12.12H.

1 I?....i 22 //7 13. A- assembly. C -capacitor. CR -crystal, diode. F-fuse. L- coil. P - plug. Q transistor. X-socket. J - jack.

14.Unit, OA group, assemblies, and subassemblies.

15. Main distribution frame, filter panel, junction box.

16.Vertical listing and horizontal listing.

17.Bays or racks usually reach from the floor to the ceiling within a cabinet and contain chassis. They generally provide a major function or purpose, whereas chassis are part of a rack and provide only a portion of the major function.

18.Drawer.

19.It identifies installation layout, cable identification. routing data, termination,jack and plug pin lettering and wire color coding, and component part number.

20. Cabinet 45A1.

21. J611-5, J613-4, J6144DLI)10. J622-13, J/P602-01, J/P403703, J/P503405001, J50332053/50, and J503103-4.

22. J/P602119. J/P980112. J/P4860, J/P46821I7, to J4693018 in SM-137.

23. Input on left; output on the right.

24. Main distribution frame.

25. Console connector J6 to MDF location A2-A3 -J1-15.

26. J5, pin HH. Size 16 wire. W64, cable 64. A - pin A, J6. J6 - connector.

CHAPTER 4

I.545A Tektronix oscilloscope.

2.(I) Horizontal display controls, (2) vertical position and deflection, (3) indicator controls. /i2

3. Time Base A, Time Base B, and Delay-Time Multiplier.

4. The time base A group provides control of horizontal deflection circuits withinthe scope, can handle signals from DC to 2 megahertz, allows for the selection of various trigger synchronizations,and provides.magnification of the display.

5. The fifth and sixth centimeters.

6.1. d. 2. a. 3. c. 4. b.

7.It causes triggering to occur during the risingor falling portion of the triggering waveform, depending upon the selection of positive or negative slope..

8.Triggering Level control.

9. DC voltage.

/O. -150V to 0 VDC.

1 11.a.f=

1 f = 2 X 10-6

f = 500 IcHz.

1 b.t = f

t - 1 100 X 103

t = I X 10's

t = 10 psec per cycle

Time Per Centimeter control setting is 2.5 microseconds per centimetcr.

12. Two sweep generators are used within the scope to trigger sweep and unblanking voltages. "A" when used with "B" intensifies a pertion of "B's" trace. Therefore, "A"sweep time must be faster. "A" sweep intensity-modulates a portion of "B's" trace.

13. Time Base B controls are set as follows:

Triggering Source to INT. Triggering Level to 0. Triggering Slope to either negative or positive. "B" Time Per Centimeter control to desired setting. "A" Time Per Centimeter control to setting shorter than "B's." Delay-Time Multiplier to a setting which causes "A" intensity modulation to begin.

24 12) /.2 t 14. The "A" unblanking pulse is gated along with the"B" unblanking pulse. This causes an increase in emission through the CRT during the time that both unblankinglevels are present.

'15. 4.

16. (1) pulse width and (2) time between pulses (pulse repetitiontime).

17. Both A and B sweep controls (Time Per Centimeter). Trigger Slope. Trigger INT. Delay-Time Multiplier.

18."B's" unblanking pulse. Only "A" unblanking intensifies the display.

19. The intensified portion of "B" INTENSIFIED BY "A" is expanded to10 centimeters wide when "A" DELAYED BY "B" is selected.

20. For taking photographs of the single sweep display.

21. Either A or B input separately. A and B input alternately. Chopped display of two input signals. Algebraic sum of two vertical input signals.

22. .02 X 3.5 = .07V peak to peak.

23. The DC-AC switch must be in the DC position. A zero VDC reference line must be established by use ofthe Vertical position controls. The Volts Per Centimeter control must be set high enough tokeep deflection on the screen. Set the Polarity switch to the proper polarity.

24. The MV in the scope operates at a different rate.

25.Use in calibrating the attenuator probc.

26. Scale (11 lum) (illumination), Focus, Astigmatism, and Intensity.

27. No.

28.It may be used as a (1) vacuum-tube voltmeter, (2)differential DC voltmeter, and (3) megohmmeter.

29. The highest range.

30. (1) Range selection switch, (2) Null switch, (3)Voltage dial switches, and (4) Calibration knob switch.

31. Two capacitors charge to full potential inside the meter.Their charges disable the meter if no circuit damage results.

32. As a VTVM and as a differential meter.

33. Range control to 5V, Null control to VTVM,positive source to + post, return to GND post.

34.Plus or minus .01 VDC.

25 ***.**.r...

35. (1) Range control to the lowest voltage range which includes thevoltage being set. (2) Null control to .01 scale. (3) Dials to desired output voltages. (4) Polarity control which shows any deflection of the nullmeter needle to the right.

36. One (and) 500,000.

37. The 269 multimeter measures DC and AC voltages, directcurrent, and resistance.

38. Remove power, connect probes to test points (using high-voltage probe),then restore power.

39.1. b. 2. b. 3. a. 4. b. S. b.

40. Isolate the capacitor from the circuit. Select the highest Rxrange and apply the leads to the ends of the capacitor. The supply voltage will charge the capacitor (if good) toa given polarity. Observe the meter for a deflection of the needle and a return to infinity for detection ofa good capacitor.

41. (1) Isolate the diode. (2) Obtain an ohms reading with diode forward bias andreverse bias. (3) Calculate the difference and determine a front-to-back ratio if 10:1or greater is present.

42. Emitter to collector. 43. Yes. ) 44. Special test sets are built to insure that circuit components meet the design specification.

45. A drawer or card is inserted into a specially designed test set which simulates actual operating characteristics of the unit. The operator simply follows a set of written instructions to locate the trouble.

46. MANUAL, AUTOMATIC.

47. Test block diagrams, test signal generator logic diagrams, drawer under test logic diagrams, and test set comparator test logic diagrams.

48. Yes.

49. The limited number of different cards.

50. Each has a control panel for programming a variety of signals to check different types of assemblies.

51.Resistance, impedance, static, dynamic.

52. Drawer test set.

53.It provid, the necessary resistive load which simulates the maximum operating parameter in load of the supply under test. ) .1 3 ! 26 -1._ f 2.3

LMATCH ANSWER 2.USE NUMBER 1 SHEET TO THIS PENCIL. STOP- EXERCISE NUM. BER. 30554 01 21 VOLUME REVIEW EXERCISE

Carefully read the following: DO'S:

1. Check the "course," "volume," and "form" numbers from the answer sheet address tab against the "VRE au:Aver sheet identification number" in the righthand column of the shipping list. If numbers do not match, take action to return the answer sheet and the shipping list to ECI immediately with a note of explanation. 2.Note that numerical sequence on answer sheet alternates across from column to column. 3.Use only medium sharp #1 black lead pencil for marking answer sheet. 4.Circle the correct answer in this test booklet. After you are sure of your answers, transfer them to the answer sheet. If you have to change an answer on the answer sheet, be sure that the erasure is complete. Use a clean eraser. But try to avoid any erasure on the answer sheet if at all possible.

5.Take action to return entire answer sheet to ECI.

6.Keep Volume Review Exercise booklet for review and reference. 7.If mandatorily enrolled student, process questions or comments through your unit trainer or OJT supervisor. If voluntarily enrolled student. send questions or comments to ECI on ECI Form 17. DON'TS:

1. Don't use answer sheets other than one furnished specifically for each review exercise. 2.Don't mark on the answer sheet except to fill in marking blocks. Double marks or excessive markings Which overflow marking blocks will register as errors. 3.Don't fold, spindle, staple. tape. or mutilate the answer sheet. 4.Don't use ink or uny marking other than with a #1 black lead pencil. NOTE: TEXT PAGE REFERENCES ARE USED ON THE VOLUME REVIEW EXERCISE. In parenthesis after each item number on the VRE is the Text Page Number where the answer to that item can be located. When answering the items on the VRE, refer to the Text Pages indicated by these Numbers. The VRE results will be sent to you on a postcard which will list-the actual VRE items you missed. Go to the VRE booklet and locate the Text Page Numbers for the items missed.-Go to the text and carefully review the areas covered by these references. Review the entire VRE again before you take the closed-book Course Examination. 29

.1.34 Multiple Choice

Note: The first three items in this exercise are based on instructions that were included with yourcourse materials. The correctness or incorrectness ofyour answers to these items will be reflected inyour total score. There 2re no Text Page Numbers for these first three items.

I. The form number of this VREmust match

a. the form number on the answer sheet. b. my course number. c. the number of the Shipping List. d. my course volume number.

2. ,So that the electronic scanner can properly score my answer sheet, I must markmy answers with a

a. pen with blue ink. c. ball point or liquid-lead pen. b. number 1 black lead pencil. d. pen with black ink.

3: If I tape, staple or mutilate myanswer sheet; or if I do not cleanly erase when I make changeson the sheet; or if I write over the numbers and symbolsalong the top margin of the sheet,

a.I will receive a new answer sheet. b. my answer sheet will be hand-graded. c.I will be required to retake the VRE. d. my answer sheet will be unscoredor scored incorrectly. / 4 6

Chapter 2

14. (015) Preventive maintenance routines are found in which of the following technical order series? a. 2. c. 6. b. 4. d. 8.

15. (016)'If the air flow within an electronic unit is impeded extensively, what causes the intermittent failure rate to increase?

a. Dirt in the blower fan. b. An increase in ambient temperature. c. Deficient electronic components. d. Decrease in air flow.

16. (018) In a typical removal and replacement of a component just prior to restoring power, you should

1. label wires to be removed from and replaced on the new component. b. unsolder the old leads-and resolder the leads to the new component. c. secure the component to its chassis. d. make a continunity check with a VOM.

17. (020) The current-carrying element in a fuse melts when

a. an increase in line voltage causes an increase in current. b. an increase in line voltage causes a decrease in line current. c. an increase in line current causes an increase in fuse element resistance. d. a decrease in fuse element resistance results because of a decrease in circuit resistance.

18. (019) AC neon lamps usually require how much voltage for ignition?

a. 120 VAC. c. 10 VAC. b. 60-65 VAC. d. 5 VAC.

19. (014) Analysis, as defined in this chapter, means all of the following except determining

a. the objective. b. the steps involved in accomplishment of the task. c. what principles or characteristics or specific requirements must be considered while the task is being performed. d. why a task has been assigned and why you must do it.

20. (021) Which of the following is a command input?

a. Repeat cycle. c. Dynamic levelI. b. Static level logic 1. d. Pulse train.

32 12 7 21. (016-017) Other than oxide on the magnetic head surface, what phenomenon distortsand/or inhibits transfer of data onto or from the tape?

a. Improper hysteresis looping. c. Magneand head frame. b. Static deposits on tape. d. Lubricated tapes.

22. (019) Which type lamp is usually installed in power supply regulation circuitry?

a. Neon with screw-in. c. Incandescent screw-in. b. Neon with pigtails. d. Incandescent plug-in.

23. (020) At approximately what temperature does a fuse wire melt?

a. 2100 . c. 1700. b. 190°. d. 1500.

24. (022) Refer to figure 18 of the text. If switch SI is on,

a. DS1 and DS2 are on. b. DS3 and DS4 are on. c. video amplitude control is not in the circuit. d. the holding coil is not energized.

25. (023) Which type of switch defect would most likely require repair or replacement?

a. Defective springs. c. Loose toggle. b. No continuity. d. Improper placement of switch unit.

26. (024) When working with multiple pin connectors, identification of wires by alphabetic characters is common; all characters of the alphabet are used except

a.i. c.i and o. b. o and p. d.i, o, and q.

27. (026) A connector labeled "P" is the

a. stationary connector of a mating pair. b. movable connector of a mating pair. c. connector always connected to a jack. d. connector on a flexible cable matched with a connector designated rather than

78. (026) A printed circuit card might have a location designation

a. A3. c. XA3. b. JA3. d. PA3.

29. (023) Which of the following switches is energized by electromechanical devices?

a. Toggle switch. b. Circular microswitches. c. Pushbutton switch with lamp indicators. d. Microswitch with level contactor.

33 1. 3 3

.1 30. (026) Inspection of solderlessconnectors should reveal loose fitting pins, crackedor broken connectors, bare wire in contact with metal casings, and

a. recessed pins. c. improper lacing. b. bad solder joints. d. jack or plug designations.

31. (029) The term used for nonwetting ofone or both surfaces to be joined by solder is

a. ADHESION. c. COLD JOINT. b. BLIND JOINT. d. INTERGRANULAR PENETRATION.

32. (032) The four main characteristics of solderingirons are

a. tip size, tip shape, voltage rating, and wattage rating. b. tip angle, tip size, current rating, and voltagerating. c. handle shape, tip shape, wattage rating, and current rating. handle size, tip size, voltage rating, andwattage rating.

33. (033) Which is true of the technique of sordering?

a. It is the bonding of two metals into one metal alloy. b. It is a metal solvent action between so:der and themetal being joined. c. It involves fusion of the two metals being joined rather than solutionaction. d. It is another form of electroplating. :-

34. (029) A device used to absorbor transfer high temperature elements away from delicate parts is called a

a. water cooler. C. heat sink. b. heat extractor. d. refrigerant or fan.

35. (034) Concerning solder alloy withina joint, which of the follwing statements is incorrect?

a. It is capable of withstanding stresses and strains. b. It resists rupture due to temperature changes. c. It contains rosins for more secure bonding of metal surfaces. d. It allows for accumulation of nonconductive oxide filmbetween conducting surfaces.

36. (035) Of the four types of flux material listed below,which one is specified in MIL Specification MILF-14256, Type A, for use with electronic compcnents?

a. Hydrochloric acid. c. Sal amoniac. b. Rosin. d. Zinc chloride.

37. (038-039) If a component lead is to be cut off afterinstallation of a PCB and no bending is to be performed, the

a. solder is applied before cutting the excess lead. b. excursion onto the solder surface of the lead must becut as close to the solder as possible. c. lead must be cut to a height equal to a #20 wire before soldering. d. lead may be cut flush with the PCB, since solder will flowinto the hole around the lead. 38. (036-037) The principal difference in the desolderingtechniques called sniffing and wicking is that

a. sniffing Uses a system of air suction. b. sniffing uses a system of osmosis. c. wicking uses a system of air suction. d. wicking uses a system of rosin saturatedcore material.

39. (040) The task of removal ofa component includes the subtasks of removing sealer, cleaning the joint with alcohol, wicking solder from the joint, removal of thedefective part, and a. labeling of part. b. removing power. c. locating replacement procedures in TOs. d. cleaning the joint.

40. (035) The purpose of usinga flux when soldering is to

a. mix with oxygen from the air to make .,older melt faster. b. mix with solder for better bonding of the joint. c. prevent oxygen in the joint from combining with the metals. d. reduce the melting temperature of solder.

41. (039-040) A term used tomean soldering of IC parts where the IC does not protrude through the PCB is

a. bridging. c. iron soldering. b. plating. d. potting.

42. (043) Alkali is

a.the positive electrode. b. a chemical that gives a base reaction. c.the formation by electrochemical means of a thin oxide filmon a metal surface. d. a compound which restricts chemical reaction, especiallycorrosion.

43. (044) The four basic elements needed to have electrochemicalcorrosion are anodic and cathodic areas, an electrolyte, and

a. a conductor. c. ferrous materials. b. an encapsulate. d. scaling.

44. (047) Corrosion of metals is distinguishable by discoloration.Three of the four situations below correctly associates a metal with the color of its corrosion. Select theone which is incorrect.

a. Aluminumdull white powdery residue. b. Carbon and alloy steeldull gray coating. c. Copper alloysdark, greenish-white or grayish-white. d. Tin-plated copperwhite-yellow. 45. (048) Of the four areas pertaining to electronic 'equipment lisled below, which would probably require the most frequent inspections for fungus growth?

2. Air-conditioning systems. c. Painted surfaces. b. Battery areas. cl. Black boxes.

46. (048) Protective coatings used on electronic gear are placed in classes. Three of the four items below are correct classifications, select the incorrect one.

a. Lacquers. c. Binders. b. Varnishes. d. Paints.

47. (050) Which military standard is designed to establish minimum standards for control of corrosion?

a. MILSTD-1250. c. MILSTD-15. b. MILSTD-1050. d. MILSTD-15-1.

48. (050) Which AFR explains the program of c;ontrolling corrosion and assigns responsibilities?

a. 66-1. c. 100-8. b. 66-8. d. 400-44.

Chapter 3

49. (051) The number AR102, using the unit numbering methods, means the

a. 102nd resistor in the circuit. b. 102nd resistor in the assembly. c. assembly has 102 resistors. d. assembly 102, resistor 1.

50. (052) Given a unit alphanumeric of 2A1V2, the part would be located where and in what?

a. Unit 2, assembly 2A, transistor 2. b. Assembly 2A, tube 1V2. c. Unit 2, assembly Al, tube V2. d. Assembly 2A, subassembly 1, transistor V2.

51. (053-054) Coordinate numbering, whether using the location numbering method or location coding method, requires assignment of alphanumerics

a. right to left, bottom to top, back to front. b. left to right, bottom to top, front to back. c. right to left, top to bottom, back to front. d. left to right, top to bottom, front to back.

36 52. (055) The class letter A may be assigned to

a. an asumbly, computer, set, or teleprinter. b. only an assembly. c. only 1 subassembly. d. an assembly, a set, a teleprinter, or a motor.

53. (054-055) The alphanumeric 12B6A5/Q1 is a number assignedto which element?

a. Unit 12. b. Subassembly 6, subassembly A5. c. Unit 12, subassembly B6, subassembly A5. d. Transistor Ql.

54. (052) Which system of numbering of electronicequipment uses the letter "N" for areas which are not assemblies?

a. Unit numbering. c. Location coding. b. Location numbering. d. Coordinate coding.

55. (056) Information on cable identification, routing, termination,lettering, and coding can best be located in which technical order?

a. Service manual. b. Circuits and diagrams manual. 'c. Illustrated parts breakdown manual. d. Preventive maintenance manual.

56. (056) The connector alphanumeric AlP2/A2J2 indicates

a. plug A1P3 is a cabinet plug and jack A1J2 is a chassis or drawer jack. b. plug AlP3 is a cabinet plug and jack J2 is a cabinet plug. c. jack 32 mates. with_ interconnecting wire AlP2. d. plug P3 mates with jack 32.

57. (057) The part identified in figure 53 of the textas alphanumeric J/P503405001 is

a. an interconnector from assembly 503 to connector panel 405, pin 001. b. jack/plug 503 to connector 405001. c. an interconnector from connector panel J/P503 to SIF connector 405001. d. an interconnector from assembly 503 to SIFconnector 403, panel 703, pin 007.

58. (058-059) In order for a table used witha main distribution frame (MDF) to be complete, it must have a listing of incoming and outgoing connectors, pin numbers, wirecolor and size, and

a. MDF location. c. cable number. b. function. d. color of MDF wiring.

59. (056; 058-059) The main distribution frame provideswhat type of function?

a. Stores the memory. c. Links up cables to cables. b. Holds up the cabling. d. Routes inputs to outputs.

37 13,-; 13.2,

60. (061) In assigning numbers to a jack, to a socket, or to plug pins,

a. all numbers and letters may be used. b. any number and all letters except i,o, and q may be used. c. only lower-case letters and any numbers may be used. d. only letters may be used.

Chapter 4

61.(063) The 545A oscilloscope has two time base ,generators which control the

a. horizontal sweep. c. horizontal magnitude. b. vertical sweep. d. vertical amplitude.

62.(064) If the Stability control on the 545A oscilloscope is set all the way tothe left, the MV is

a. sweep gating. c.triggered. b. inoperative. d. free-running.

63.(067) What source is used to intensify part of the sweep in the "B"INTENSIFIED BY "A" mode of operation?

a. B sweep unblaaking. c. A sweep unblanking. b. B intensity pulse. d. A sweep trigger.

64. (064) If the Stability control sin the.545A oscilloscope is set50 to 10° left of a point where the MV runs free, the bias level will cause

a no effect on tile operation. h. the free-run or the MV to stop. c. the MV to become inoperctive. d. answers b and c both to be correct.

65. (068) The pickoff point used in the "B" INTENSIFIEDBY "A" mode of operation is controlled by he

a. Stability control. c. Horizontal Display control. b. Triggering Level control. d. Delay-Time Multiplier control.

66. (063) The 5X magnifier expands which segment or segmentsof the graticule display?

a.First. c. Fifth and sixth. b. Fourth and fifth. d. Last.

1 40

38 / 67. (067) In the "B" INTENSIFIED BY "A" mode of operation, the

a. B sweep functions normally. b. sweep generator develops a sawtooth and negative unblanking signal. c. developed voltages are coupled to the indicator but not sent to the trigger circuit. d. bias on the pickoff circuit is limited so that pickoff can only occur at specified amplitudes.

68. (069) If a display results in no cycle ending at a centimeter dividing line, what control can be used to measure accurately the time of a cycle?

a. Horizontal Display selectiOn switch. b. Vertical Amplitude control. c. Variable Time/CM control. d. Delay-Time Multiplier control.

69. (070) The primary difference between "A" DELAYED BY "B" and "B" INTENSIFIED BY "A" is that the

a. B sweep outputs are nOt used by the indicator. b. indicator receives only B sweep unblanking signals. c. A sweep sawtooth is not coupled to the indicator. d. intensity-modulated portion of the display is limited to 2 centimeters.

70. (072-.073) Vertical input units have provisions for control of allexceptwhich one of the items ..- listed below?

a. Acceptance of two input signals. b. Display of two signals separaely. c. Trigger input jack. d. Varying the amplitude of the display.

71. (076) The differential voltmeter may be used as all of the followingexceptas

a. an AC voltmeter. c. a vacuum-tube voltmeter. b. a DC voltmeter. d. a megohmmeter.

72. (076-077) The model 80IB differential voltmeter has an accuracy of

a. .5V. . c. .01 V. b. .IV. d. .00IV.

73. (076) The differential voltmeter is a high accuracy meter designed to measure

a. AC voltages. c. current. b. DC voltages. d. RMS voltages.

74. (077) The range switch on the differential voltmeter must be on which range?

a. Any range. b. Highest range. c. Highest range above the source voltage. d. Lowest range which will give an on-scale reading.

1 4.4: 75. (077-079) An adjustable thcuit.output is kn nvn to require a10-VDC output level. Prior to calibrating the voltage to exactly 10 VDC, in what conditions should the controlswitches be?

a. Dials set to 10V, Range set to 50, Null set toVTVM. b. Dials set to ZERO, Range set to 500, Null set to 10. c. Dials set to 10V, Range set to 50, Null set to1V. d. Operate/Calibrate to CALIBRATE, Range to 500, Null to VTV111.

76. (076) Which is an incorrect statement concerning oscilloscope indicator controls?

a. The Focus and Astigmatism controls are used to obtain aclear defined horizontal trace. b. The Intensity control sets the trace brightness by varying cathode emission. c. The Intensity control may show the rise time of apulse more clearly by decreasing the cathode emission. d. The scale illumination intensifies the graticule.

77. (078-079) If, while using the 801B as a differential meter, the needledeflects to the left, the voltage being measured is

a. below the programmed voltage. b. equal to the programmed voltage. c. above the programmed voltage. d. cannot be determined to be above, even, or below the programmedvoltage.

78. (081) When the 801B meter is used as a megohmmeter, the minimumresistance that can be measured is

a. 50 megohms. c. SOK. "b.l megohrn. d. 10K.

79. (083) On the model 269 multimeter, which of the four AC rangeslisted below requires a computation factor?

a.8. c. 160. b. 40. d. 800.

80. (082) Seven ranges of DC voltage measuring sele..:tions arebuilt into the model 269 multimeter. The lowest range is

a. 0 - 1.2 volts. c. 0 - 1.6 volts. b. 0 - 1.4 volts. d. 0 - 1.8 volts.

81. (081) When used as a megohmiroter, the model801B meter ohms readings are taken from what element of the meter for group I,11, and 111 measurements?

a. Range control. c. Null control. b. Null meter reading. d. Dial readouts.

82. (082) The sensitivity of model 269 multimeter is how manyohms per volt when using the AC selection?

a. 2000. c. 20,000. b. 5000. d. 100, 000. /35- 83. (083) If a multimeter connected to a circuit results in the needle being deflected off scale to the left, the probable cause is

a. improper mechanical positioning. b. incorrect ohms adjustment. c. incorrect polarity. d. incorrect range selected.

84. (084-085) Why is a diode check made with an ohmmeter have limited validity?

a. It can determine the front-to-back ratio of all diodes accurately. b. It does not account for conduction at other voltage values. c. All diodes have at least a 10:1 back-to-front ratio. d. Zener diodes as well as rectifiers have the same ratios and conduct the same.

85. (084) When checking capacitors, the meter has to be used in which mode of operation?

a. Ohms. c. AC. b. DC. d. Current.

86. (085) Drawer testers usually are useful in

a. making alignments. c. performance checks. b. troubleshooting. d. understanding technical orders.

87: (088) lf, the drawer under test fails at test step 100, for example. the test points will identify all of the following except

a. the drawer failure point. b. the test set failure point. c. a group of cards suspect. d. the logic associated with the equipment.

88. (090) An element common to the card testers discussed in Volume 1, Chapter 4, is that each

a.is programmed the same way. b. uses switches for programming. c. has a video output. d. can generate all signals necessary for checking cards.

89. (089) The card test sets described in Volume I generate all of the following except

a.test signals. c. various voltages. b. test loads. d. various socket arrangements.

90. (093) The purpose for a static load function on a power supply checker is to be able to

a. monitor its load during recovery time after subjecting the unit under test to loads. b. provide a resistive load for the unit under test, c. establish a capacitive loading of the test set during operation. d. calibrate the test set prior to its use as a power supply tester.

143 /34

91. (095) Which technical order establishes procedures for inventory control and scheduling of PME? a. 00-20-10-6. c. 33KI-100.

b. 33-1-14. , d. 00-35D-54.

92. (095) Examples of Category I test equipment include all of the following except

a. ammeters. c. oscilloscopes. b. voltmeters. d. multimeters.

- MODIFICATIONS

fie of this publication has (have) been deleted in

adapting this material for inclusion in the "Trial Implementation of a

Model System to Provide Military Curriculum Materials for Use in Vocational

and Technical Education."Deleted material involves extensive use of military forms, procedures, systems, etc. and was not considered appropriate

for use in vocational and technical education.

145 9 SKILL LEVEL AFSC

rUSA! :.UPI,RVISORY TEST

ADVANCED TECHNICAL COURSES

AWARD OF 7 SKILL LEVEL AFSC

REQUEST FOR UPGRADING

SUPERVISOR'S RECOMMENDATION

4 COMPLETION OF SUPERVISOR'S CERTIFI- CAREER DEVELOPMENT CATION OF PROFICIENCY COURSE 7 LEVEL JOB PROFICIENCY.57 GUIDES A v/V

AWARD OF 5 SKILL LEVEL AFSC

REQUEST FOR UPGRADING

SUPERVISOR'S RECOMMENDATION

.SUPERvISOR:S.CERTIFI- CAREER DEVELOPMENT CATION OF PROFICIENCY , COURSE $ LEVEL , r, JOB PROFICIENCY GUIDES r'AePA, v

AWARD OF 3 SKILL LEVEL AFSC

TECHNICAL SCHOOL END-OF-COURSE TEST

FORMAL BASIC TECHNICAL3 COURSE BASIC MILITARY MAIMING

RECRUITMENT

Figure I. Skill progression ladder.

45 13q

TABLE 1 LAMPS

1111 DESCRIPTION .,...NUMBERS SYMBOL SCHEMATIC REF

. :.-,:e

...'.4.

70: .,!

4."17.. GE 47 ''.'' 6-$V --- GE 57 12-16V ',... GE 313 211V 2 ; :,.. GE 1$19 25V 1:41

GE i29 2111V . 1/4. GE 11147 6.3V ...I...... cI. 4 ..

OP ) '7. 4 NE 2 65V START 3 ...'--;--- OC0 LAMP NE NE 51 65V START NE 211 65V START OS1. 2

arc

AC LAMP 41.

NE 2 65V START .4-: 4 hay NE 2E 65V START NE . NE611 60V START 40 NE $3 60V START

..- . GE 327 2111V GE 321 6V 5 0S1. 2 . 6WV3V GE 317 21V . . . . 9 .:

AIMIMIA /

TABLE 2 141SPS AND FUSE HOLDERS

SIZE VOLT AMP RATING DESCRIPT1ON USES APPLICATION NO TYPE PICTORIAL

, IZSV/ZSOV Metal ends with a glass or FAST BLOWIFf11,041_ ceramic cylinder between the 00001' .01/10A ends. Blows instantly with .. I -1/4" L X 1/4" Dia. input surges or shorts. .. ,,,.. 1" L X I14" Dia, . .. ;Pi X 5164

SLos 51.0w dal 1 ZSV/ZSOV Similar to Fastblow in size, except this fuse is designed to .01/30A withstand heavy surges for a /frill,. I.114.. X I/ 4" Dia. short time period but w.11 blow , instantly on shorts. 4

12S/250V A strand of malleable wire designed to melt as ally other - Variable amps fuse. However, this fuse is depending upon the 6-,----..... usually coneected between diameter of the wire, terminals and not put in a fuse FUSE wiRE holder.This wire may also be used to repair roparable fuses.

. This fuse has screwtypo end 1 12S1440V connectors which, when REPARABLE FUSE Variable to 100 amps. III' . removed from the center sizes vary with amp- cylinder, allow for replacement ...=:" re . erase and voltage of the fuss wire. ...-1:----...,,. requirements. REMOVABLE ENOS

Built to accommodate short and SNAP-IN FUSE MOLDER long FES and SB fuses as well as Size and weight is 4V reparable fuses. S. , Ioterii.ined by the size , Zs. of fuse to be held. ,0 -1.

1-11/32" X WI" Fuse holder with a twist top. overall, Top is removed by slight inward ::...... -.-"litk.' pressure and twisting the release...... -.0-'''' Internal contact is backed by a Voltage rangos ts) ZSOV spring to allow for removal and Ot IS tropft. installation of a fuse. FUSE NOLDER WITHOUT LAmP 1-ghe

FUSE HOLDER t i Appreedmately Fuse hulder with a neon sdni ''Or- 23/11* L X S/R"DiA. indicator in the cap. This neon Et4411$1410:7*E4 ..' Voltage ranges lights when the fuse blows (refer 2.SV to ZSOV a 20 amps. to text for desc ription. ) NEON .. , INDICATOR IN THE CAP

47 TABLE 3 SWITCHES

111IMMEIA NO. TYPE AND ILLUSTRATION, DESCRIPTION/USE 1. Toggle a. Two position OFF, ON, Normally Open (NO), Normally Closed (NC). b. Two position NO, NC c. SPST, Single Pole Single Throw. " - d. DPDT,Double-Pole-Double Throw. - ':::; **:--,.,. I.:..:.;,,,,,,,..s.t\1-":.,...... I k (not shown) multipI e connectors in .....:";PL`r, ( r: series. e. Spring loaded in one direction. ,;.,2:I,- . f. Primary uses. .:3,V::c cepa/ 'i,,,.-;f:.. (1) Control of voltage and current-- , p ' . ON-OFF. (2) Reset, Preset, Command Control of digital circuits.

. Microswitch, cjrcular a. Two position ON-OFF, spring loaded . contactor. ::: ::,.. c . ..- .ol - b. Command uses, Reset, Preset control of digit circuits. i.0

-. , ' Pushbutton Switch w/Larnp a. Pushbutton switch with: Indicators (1) Lamp indicator for either OFF, or ON or both. (2) Contact connectors NO, NC, C. -1,43r-" (3) Holding coil for locking in either ..... 40 'Iv, NO or NC. , 4, ,..,4, ill b. Holding coil may not be used as lock. I . requiring independent release. iregAP rI .i. , // iji c. Lamps may be OFF or ON or may e , .., contain dual lamp circuit where one or more lamps will always be on. d. Primary uses: . / 1ti (1) Digital input device, entering .. i i ..=)1 codes, bits, presetting wired . " -- - -0.* configurations, advancing. ....,-- 0. ..., (2) Command uses, transfer. clear, erase, reset.

. Microswitch, rectangular cased a. A rectangular encased switch with Level Contactor with 2 external connectors. :c';':.',.1%'. b. Connector ball is usually depressed . by a spring tension arm assembly. . c. Uses--controlling operations of .. electromechanical devices.

:: 4, . .,

48 1 4 TABLE 4 STANDARDS FOR SOLDERING

STANDARD TITLE MIL-S-45743A (M1) Soldering High Reliability Electrical Connections 0-E-760b Alcohol Spec MIL-F-14256C Flux Spec

QPL-14256C Flux Supply List

QPL-QQ-S-571d Solder Spec

QQ-S-571d Solder Supply List

MIL-STD-252A Wired Equipment Classification of Mechanical and Visual Defects

MIL-STD-275B Printed Wiring for Electrical Equipment

MIL-SI'D-454A Standard General Requirements for Electrical Equipment

QQ-R -57 lb Rods, Welding, Copper and Nickel Alloys Spec 1

MIL -S-006872A Soldering Process, General Specifications for I

49 .150 GROUP 2

arf011bis..- PREFERRED

MINIMUM

GROUP 4

GOOD

GROUP 7

GROUP 5

Figure 32. Good and bad solder joints.

.,)

50 I 16 IN. MINIMUM

TURRET TERMINAL STRANDED MAXIMUM INSUL.WIRc LARGER THAN 261 GAT EQUAL TO INSUL. DIAM 1/32 INCH, MINIMUM 1/32 INCH. ,-4111117-

INSUL. GAP PREFERRED 180° MINIMUM WRAP MAXIMUM LENGTH IF WIRE 225° MAXIMUM WRAP DOES NOT TOUCH POST IF WIRE CONTINUES PAST 180° OF wRAP. PRINTED CIRCUIT TO CONTACT POST.

PRINTED CIRCUIT 7.1)

4,"PRINT ED CIRCUIT BOARD

Figure 36. Forming component leads.

'" -

TABLE 5 GALVANIC COUPLES

GALVANIC COUPLES

GRouP METALLURGICAL CATEGORY EmF tvoLT1 DERANSSIBLE COUPLES'

1 GOLD, SOLID AND PLATED. GOLD - PLATINUM ALLOYS, WROUGHT PLATINUM ":115

2 RHODIUM, GRAPHITE 4'0.05

3 SILVER. SOLID OR PLATED, HIGH SILVER ALLOYS 0 NICKEL. SOLID OR PLATED, mONEL, HIGH 4 NICKEL - COPPER ALLOTS, TITANIUM -.0.15

COPPER. SOLID OR PLATED. LOw BRASSES _0.20 OR BRONZES. SILVER SOLDER. GERMAN 5 SILVER. HIGH COPPER-N1CKEL ALLOYS. NICKEL-CHROME ALLOYS. AuSTENITIC STAINLESS STEELS (301. 302. 304. 309. 316. 321. 347)

-, COMMERCIAL YELLOW BRASSES AND 6 BRONZES -0.25

HIGH BRASSES AND BRONZES, NAVAL 7 BRASS, muNTZ METAL -0.30

18,, CHROMIUM TYPE CORROSION- !' RESISTANT STEELS 440-430. 431. 446. -0.35 I7-7PH. I7-4PH

CHROMIUM. PLATED. TIN. PLATED. I2': q CHROMIUM TYPE CORROSION-RESISTANT -0.45 STEEL. 410. 416. 420

10 TIN-PLATE. TERNEPLATE; TIN-LEAD SOLDERS -0.50

LEAD. SOLID OR PLATED, HIGH LEAD 11 -0.55 ALLOYS '6 , ALUMINUM. WROUGHT ALLOYS OF THE 1 DURALLANN TYPE, 2014. 2024. 2017 -0.60

IRON, WROUGHT. GRAY, OR MALLEABLE. I-5 PLAIN CARBON AND LOW ALLOY STEELS. -0.70 ARMCO IRON . ALUMINUM. WROUGHT ALLOYS OTHER THAN DURALUMIN, TyPE 6061, 7075. -0.75 14 5052. 5056. 1100. 3003. CAST ALLOYS OF THE SILICON TYPE 355. 356 0

ALUMINUM. CAST ALLOYS OTHER THAN IS SILICON TYPE. CADMIUM. PLATED AND -0.10 CHROmATED

HOT-DIP-ZINC PLATE, GALVANIZED 16 STEEL -1.05

.. ZINC WROUGHT, ZINC-BASE DIE CAST I, ALLOYS, ZINC, PLATED -1.10 I IS MAGNESIUM AND MAGNESIUM-BASE ALLOYS CAST OR WROUGHT -1.60 0 mENBERS OF GROUPS CONNECTED SI LINES ARE CONSIOER EDAS PERMISSIBLE COUPLES HOWEVER, THIS SHOULD NOT BE CONSTRUE") AS BEINGDEVOID OF GALVANIC ACTION. PERMISSIBLE COUPLES REPRESENT A LOW GALVANICEFFECT. 0 INDICATES THE MOST CATHOOIC MEMBER OF THE SERIES. AN ANOOIC MEMBER, AND THE ARROWS INDICATE THE ANODIC DIRECTION.

REFER TO TABLE N. mIL-STO-186. FOR GROUP AMPLIFICATIONOF GALVANIC COUPLES

NOTE Ex T RAC TED FROm mIL-STD-1250(Aw 31 mAR 67

t"t.I x

[SYSTEMDESIGNATION 7.0=10,

REFERENCE DESIGNATION ASSIGNMENT BEGINS - 1 BELOW SET LEVEL SET (A) DESIGNATION

Gle =MOM IMMO, OMNI MEMO 1111111 IIIMIN110

UNIT I UNIT ADDITIONAL ADDITIONALI 6 7 UNIT UNIT ...)9 POWER SUPPLY ...... 1 (COVERED BY (COVERED BY GROUP SEPARATE SEPARATE sr...1 MO MI DO:UMENTATION) DOCUMENTATION)

---1 ASSY I

BREAKDOWN SIMILAR TO FST1 OTHER SET

SUB SUB ASSY ASSY

BASIC PART UNIT 2 UNIT I UNIT 3 UNIT 4 BASIC SUB PART ASSY

ASIC PART

SUB ASSY AS RI BASIC PART BASIC ASSEMBLY Al .PART SUBASSEMBLY

Figure 46. System Subdivision. /17

Fr/EI=WWW/ EIWEININID

11111 1.1111, MMINNO10 I 4SA2 Al 12 P202 AIJI7

1 I AIXA22 RANGE AIXAI3 AIXA12 AIXAII CABLE W6060 MARX 1:AMPLIFIER 17AMPLIFIER DRIVER 6 I :JT I GENERATOR

ar../NIMMIMWIIMM40.11 I I

011111/11MO WwWWW. INEOE WENEEWIWEE WWIOWID .0ENEWIEWE OMIWNIIO 40111 INMENMIEOO .WEIMENWEI

IWO MINA.IM OENEEIEED WWWWOMill WWW/WWONO IIMIMONNWO '4 A I

4m...ow/W. 41.17 r----1641A10--1 VI A212 TB2 TB)

AlXA2 3 A2XA1 11M RANGE 16 MARK INTENSITY 6 CRT GATE GATE P '0 CONNECTOR NIGH VOLTAGE PANELS L.. 111 WIWI/ft ONNIMMINI. LCOUPLER I

AIMEVWENOW .11=0.Mo. EEN!D OMMEIWIMINO WIENEWNEE0 IEWEI/Wwm. 01011... .11 1110 EOWEN/IWO INEwww=10=11

Figure 52. Range mark routing.

54 - COLOR NO. 9 iiJ3 CONSOLE, CORE DIGITAL DATA 11-N TO OTHER MEMORY CONTROL NO. 1 GROUP CABLES 32 CABLES J1 J2 JSJ6 9.71-1-FITY13 W59 THRU W90 MEMORY k W12 W14 UNIT A2

M.D.F. J6-r MAIN DISTRIBUTION 18-12 FRAME, DIGITAL DATA A

CONSOLE, DIGITAL DATA CONTROL CABLE CABLE AWG ----Wir---- AWG COLOP CONN FUNCTION CONN PIN COLOR NO. F RON COLOR 10 NO.

SEE WII 16 1103 J I CIRCUIT GROUND J6 A 0 22 W59 A2-A 3-11- I 0 A2-A2-.111- 10 e'-'",-...... -/----"----41-v #_A_...... -----4 UM" IIimmil Mai lbamilall woe 111,.. /11444.1. utrnrwamill

DATA BIT DO TO LINE STORE gril-er MIME 209 111 1.°1"4"41Pli BMW 1111011511111t NI Olt 111011.1011E waat 11=1/1111 DATA BIT DI TO UNE STORE ROUTING DATA

Figure 57. Signal routing through MDR

1 5 7 ^w

TYPE 5454 OSCILLOSCOPE AAP.,

-"Illibliftoommomomo' .

1°.:411 FOCUS Ntlnjltl MIK.MAtdM

, y

umy tYPE CA PtUG IN UNII MON Mmi WM. 9011 .41 .4 .,e.ly momooff I WI 4" 11 m.

`.^.7 v1/11% CM P0441.41

11,11. 101 In .1:14 1.1 1.# :! ft.r.1.4$ .7.1Viam 431:,4.,<

Figure 60. 545 oscilloscope.

56 1 5 .

VERTICAL INPUT - TO VERT DEF PLATES AND TRIGGER GEN

TRIGGER GENERATOR OUTPUT

SOY

1 SWEEP OUTPUT TO HORIZONTAL AMPLIFIERS AND OELAY PICKOFF

11 SWEEP UNISLANKING PULSE = 200 USEC

P1CKOFF TRIG TO "A" SWEEP GENERATOR

50 USEC

A SWEEP UNSLANKING PULSE

A 6

at at COMEINED UNISLANKING PULSES

1 1416----3-1/3 CM --11174-- 2-142 CM 4-1/6 CM

1 1 1 wagriguinvionI mowssallrill11111

, ,

1 INTENSIFIEO 160-- 66-2/3W --1111 AREA loll 3- I/3 USEC 1161

144-,- 30 USEC

INDICATOR OISPLAY

Figure 67. Intensified sweep.

S ,

VERT INPUT --bL

B SWEEP SAWTOOTH ...... -. PIGKOFF POINT

1 ___L.... C B SWEEP UNBLANKING

A SWEEP SAWTOOTH

A SWEEP UNBLANKING

F G 0 INT ENSIFIED BY A ADELAYED BY B

Figure 73. "A" delayed by "13" - display expansion.

...... r. /

MIL

okE I",TC CAJSRATE

ANGE NULL 5C

:41 V

14 0 GOV'T PROP4RTy AF191.626)B 111111111111111l ILICttK 0000000 40 MLA ItO EMIR'

Figure 82. Differential voltmeter.

59 / 5'3

RANGE NULL

NUL L

Ht. 00111111111111/44L!**m 4- "iv Rk

.10 C VOLTS jf

cst Wdbk*mak

NULL

Is nt 40111111040110likft/7. AtO"`V, 1 1 ik/ork .10 k pi, XD.TS N ULL

01 0INN 4.1111. MC

Figure 87. Circuit calibration.

60 NETER Ini° D POWER . 0 SUPPLY 0 0 . 0 ISY CC 0 0 0 0

B POLARITY 0 . 0EA) .-.... ---.. tot IN :c to tolon ilubili iiii 10 koVIO" \I I I 11/0/0/1/* + op *V% , 2 1 . by /.7. "ED-' RANGE 0 D. C. $ ,/ 1 ...... _ \1 /...- ...... _

1 IWO MICR .011. MC 6)

4640, , V ,,,. X.4

NULL

10 %tim . 0 -0

to IN t h. \141\011111111111111111111111009/1,4 0 .70/# * b \ 1/ \tit .1 di

u kb II1 I i I on. toe (9

EXCURSION ,

Figure 88. Voltage excursions.

6 1 163

IZ^.'

(CAB Al) CONTROL AND DISPLAY (CAB A2) CONSOLE PROGRAMMER AND STORAGE CONSOLE---C. TIME LAPSE PANEL PROGRAmNER LEVEL PANEL DESIGNATORS FOR REAR DRAWER TRANSmIT TER DRAwER RECEPTACLES GENERATOR CONTROLLER AC INTERLOCK DRAWER INTER-RACK TEST PANEL' WIRING PANEL Si AC INTERLOCK AUYILIARY TEST RESISTER & INTER-RACK JACK CAPACITOR t OAD J2 WIRING PANEL ASSEMBLY A I3A2 Pcti EXTRACTOR

RECEIVER COMPARATOR TEST SHELF LAmP TEST DIODE DRAWER ASSEMBLY AI3AI AC __PROCESSOR INTERLOCKS 668Y 10.4266) DRAWER

PROCESSOR 683Y ICA12671 DRAWER

LAmP POWER SUPPLY DRAWER (PP-32)8 FYI

DISPLAY CONTROLLER PANEL LOGIC POwER SUPPLY IPP-3239 FY)

STORAGE DRAWERS

TEST SET (AN Fut-2)

Figure 91. Test set, reference (Iesignalions.

16,,--- TEST STATUS tc,

"' I 03 tC

DUI PUT LINE CHECK VAG INPUT 41 44 43 44 " ,---11 in.,,e-- KEYBOARO.PRINTER XIATR CHADOR IIADOUT IS le le POPES all LOGIC SIT TAW OIL QQ0w QQ9 * * 9 g0000n u 9 9 9 9 9 . IS 9 0000 DRAWER ASSY & TEST SET TEST 9 Q cQ Q.90 MART LIST STIP 4/ II I S I (.4) QQQQQQ0 .---SICOSOANT LIST SUP OQQ0I e ENERGIZE DRAWER ASSY .,

(4)

1 I 0144 40 TEST SET LAMP TEST I. 1 (II

sot41:1

Figure 93. Control panel,

1u ITERMINAL LOCATION ON 1 PROGRAMMER PANEL (A)) !DRAWER REFERENCE] CONNECTOR AND PLUG-IN CIRCUIT MODULOCARD) LOCATION DESIGNATION PIN ON TEST WITHIN DRAWER (AS). CARD CONNECTOR .134 SHELF (A8) (A)3A2) CORRESPONDS TO LOCATION DESIGNATOR A34 PRINTED ON TOP OF DRAWER CARD TEST PO ti 34N R11 SUPPORTS. , TEST PANEL IA21 NC 0--A,A,A,f- 4110. (AS) IF 17E-17

TP1'65

17W 7511-a)83 7T (180-p) 6Y (.181-) .." P4 I 4 AS AS 16 > EFP 1 0 0 0iv -0 0---- AS 101613 P3 169 .734 1 ICOGIC FUNCTICN I fIG. 7-11A 1 DESIGNATOR I (SHEET 51 I IP 135 1 25 62 (381-wl AS : y 17 162 a > 0 AS 7L 13131-1 -...... 1 18 411- EFP IS8 0 37' 210 AS 19 162 26

TP167 P3 P4 17V 68B (J81-y) FIG. 2-11A 13 (SHE ET SI Ir. (AS) IE 16A-7 LA

13L (382-s)

-1, (AS) IF 14E-11

(A3) 316-00 I 1 AS y25F 6AA 1.181-41 24U (378-y) 241 13130-21 TS > 0 166 AS 0 0 P4 P6 A3 0--19 33 AS 76 380<< >A>87 ( TEST STEP ADVANCED) 1.9) .126 CCNNEC TOR AND PIN ON TEST SET DRAWER (A5) NAY BE USED PATCHING BETWEEN TERMINALS AS A TEST POINT FOR TRACING ON PROGRAMMER PANEL (Al) SIGNALS IMEN TEST SET DRAWER ACCOMPLISHED BY PATCHBOARD. EXTENSION CACL ES ARE USED.

Figure 98. Typical logic diagram with symbology and coding. 16 a /51

PROGRAM VIEWING SIMULATOR & & & DECODING DISPLAYING DISPLAY ------....-w-s---..-...... ---..

1. MANUAL TEST TWO ROWS-611. WINDOWS:. POwER

1.`:;?;&;..WAIrict;

1,-

7+4,772=7""rca , -.4 72z- gar

Figure 102. Card tester. AN/GPM-50.

66 CD' Fiv; ItPUT

CAND MAWS

8- To C:AD JACKS *-

TEST ORCUIT SITECTOI

P* 1.1 10

C-13 PLUG JACKS IiialigisglicsoouaoUg

sueCHASSIS, .1

1.Igure 103. Card toter. rs19961Eyo.

67 sj '1

, -, ' INPUT VOLTADE POLARITY , 12VOC 4r.(A...... 1....r.4IMC si Is 0 e-----TRANSIENT LOAD

LOAD CURRENT MONITOR 0

s.. i

, % 15 / It <,-, *- 10 20 ' AC INPUT----. 5 25

30 ...4, 6, 0, I 41'sorin!MPPINFIRPolriorth st CAIIIRATI leAll 1I1 se/ Ift , 1 TEST IAX POIN(t SUIPIT Mt SIT 3 I It, , ,, , .OOOOOOOOO , ,, 4N I I I I I # I IIII(Ilb IIII IS I IP

Figure 105. Power supply test set. TS1846/FYQ.

171

,...... 14.2-

MODIFICATIONS

,14.i01.03_ 41 9 71 of this publication has (have) been deleted in

el adapt. lb _his material for inclusion in the "Trial Implementation of a

Model System to Provide Military Curriculum Materials for Use in Vocational

.. and Technical Education."Deleted material involves extensive use of military forms, procedures, Systems, etc. and was not considered appropriate for use in vocational and technical education.

1 oi ,

11.0.0.111MIIML.11.1.4urMarntar...... a...... --a..---...... 1 ihs

,r1 1 1100119 p 1 I COL Wile 5 P10370)507 (WV 5) Ii 150133 1503111 1413 N1111 1 P501105001

1 IsI/

I r: Wm. 41=10 .WM0 masa WW1. Mal 1 PIO 119 IS P910 I) 1,01911 .P1.4481583111 I '11 I193 1(...CO CIllt < I .541)) / I L .....i I

I Inoft5.

1 CP 5 CONRICTOR P01.1 FOR COa CIlle. VP 03111 CP1 ti* 1 2 1 P.1CIC PLUG. 114 I 1 101113 I 1 90211)

.. 1 aII

t154C. $I ,IIIIANCH al 554 c5. SI I i CPO) ICP11 7- I S PI 1100 I ies .111111,4C. I C.. I / 1 1 111159 t1 I

I f 1 711101 1...... _ _....

Figure 53. Signal RM3 routing. CASIO 5421

SIF ..--- r40)703007 SAI-137 400 r/4111111WPS. t.O. (40)1 / OEM4i! ONN,11 k. 4400 4100 litint'ES 101-140 MILVIIOrni Pi:c cki iCitf. ak

Ulna CIE L. 1.1111111011111 402 10! 113 \ W :pm \ J/PillOt 3441130111 Kok3/PS42104 .1 P 50340$001 MEM .Z.SIIM b. 503 41.11110,--ijal (1001 CP1112 CP42 \ ..= il .1 3103-001 Atli 1.11.116. .1402117 ii \\ 1,P4S1101 N1011.Jr1402103 111111111.11 \ / I. 1700/ 10.10111 \ 700 \"9 I 150132053/050):0 ,Nnt \ ismie ,...a..,...... ". 13001 \ \ \

llyt/J1110112 1/P1140 MOWS COAX CABLE " - ...... -.^--10--'"

'? Figure 54. Signal RMS routing pictorial:" Ortgin (RM3 to RM6) I. Terminating Jack

2. Origin (RH3 to TP1) Terminating Jack

Bay Jack/Plug 3. Origin (RM3 to SIF) Bay Jack/Plug

Terminating Jack Drawer Jack Cable Cabinet Jack

Origin (RM) to SM 137) Ruck Jack 4. Bay Jack Bay Jack cable

Rack Jack Terminating Jack

in Bay 600) Branch B 5. Origin (RM3 to Assemblies Bay Jack Connector Pt

Branch B Terminating Branch A Connecting Pt A to Jack/ Jack/Plug Terminating Plug Assembly Assembly

B to Jack/ Terminating Plug Assembly

Branch A Jack/Plug 900 6. Origin (RM3 to Bay 800 Bay Jack/Plug Connector Pt Branch B jack/Plug

Branch B Branch A

Terminating Jacks Terminating Jacks

CHART I WIRING LIST FOR SIGNALS(HORIZONTAL TECHNIQUES)

1?6 /4 4 30554 01A 7505

CDC 30554

ELEcmoisx ConpuTER SYSTEMS REPAIRMAN

(AFSCs 30554154A154104C/54D)

Volume lA

Computer Principles

elp- Extension Course Institute Air University

1? 7 Preface THIS VOLUME lA of Course30554, Electronic ComputerSystems Repairman, is a refresher course toreview and extend yourbasic laiowledge upgrading in your of computer principles. Thisreview is to prepare you for AFSC. You will find that the principlespresented in this volume willenhance of computer circuits.In Chapter 1, we discuss your understanding Chaptera 3, 4, numbering systems. Chapter 2 isdevoted to computer circuits. and 5 deal with computercomponents, computer units,and input and output units. Chapter 6discusses computer power supplies. Foldout 1 is included as a separateinsert in the back of this volume. the accuracy or currency ofthe subject matter of If you have questions on its improvement, send themto thistext,or recommendationsfor USAFSAAS/TTOC, Kees ler AFBMS 39534. NOTE: Do not usethe other errors. suggestion program to submitcorrections for typopaphical or If you have questions on courseenrollment or administration, or on any Development, Study of ECI's instructionalaids (Your Key to Career Review Exercises, VolumeReview Exercise, and Reference Guides, Chapter officer, or Couzse Examination), consult youreducation officer, training can't answer your questions,send them to ECI, NCO, as appropriate. If he Student Request for Gunter AFS AL 36118,preferably on ECI Form 17, Assistance. hours (12 points). This volume is valued at 36 and cureent as of Material in this volume istechnically accurate, adequate, December 1974. Contents

Preface iii

Chapter

1 Number Systems 1

2 Computer Circuits 11

3 Computer Components 54

4 Computer Units 84

5 Input-Output Units 114

6 Computer Power Supplies 142 UST OF CHANCES

COURSE NO. CAREER FIELDS, POLICIES, PROCEDURES AND EQUIPMENT CHANGE.ALSO ERRORS OCCASIONALLY GET INTO PRINT. THE FOLLOWING ITEMS UPDATEAND CORRECT 30554 YOUR COURSE MATSIALS. PLEASE MAKE THE INDICATEDCHANGES. EFFECYIVE OATE OF SHIPPING UST 10 Feb 76

I 1. CHANGES FOR THE TEXT: VOLUME 2

a. Page 16, Figure 24: Change "CURRENT ADJ (CAPACITIVE IN EMITTER C'.:T)"to "CURRENT ADJ (RISISTIVE INEMITTER CKT) ." Change "PEAKING ADJ (RESISTIVEIN EMITTER CKT)" to "PEAKING ADJ(CAPACITIVE IN EMITTER CKT)."

b. Page 57, pare 13-5, table: Change "d.tape" from the columnlabeled "Either or Combined Mode"to the column labeled "Sequential."

c. Page 84, Figure 107: Change "C/N" to "C/M."

2. CHANGES FOR THE VOLUM:. WORKBOOK: VOLUME 1

a. Page 3, Chapter Review Exercises,question 18: Delete.

b. Page 17, Chapter Revieq ExerciseJ, question 5: Change "Records" to "Documentation." Change "WorYload Control"to "Plans and Scheduling."

c. Page 18, Chapter Review Exercises, question 17: Delete.

d. Page 20, Chapter Review Exercises,answer 18: Delete.

e. Page 25, Chapter Review Exercises, answer 22: Change ".02 x 3-5= .07V peak to peak" to ".2x 3.5 = .7V peak to peak."

f. Page 27, Chapter Review Exercises, answer 3: Change "500" to "501." g. Page 28, Chapter Review Exercises, answer 14: Change "DD Form 829-1" to "AFTO Form 95." Answer 17: Delete.

h. The following questions are no longer scored and neednot be answered: I 16, 56, 57, 74, 76, 88, 96, 98, 100, 101, 103 and110.

I 3. CHANGES FOR THE VOLUMEWORKBOOK: VOLUME lA i Ia. Page 13, Chapter ReviewExercises, question 34: end of statement and Delete the period at the add "with Q2 conductingprior to TO." b. Page 16, Chapter Review Exercises, question48: Delete. c. Page 18, Chapter Review Exercises, question 8: Ch.age "12" to "13." d. Page 22, Chapter Review Exercises, question 30: Delete the question mark and add "at the 7 detectliLe?"

IP.;ge 2 of 3 ) ) 7 /

LIST oF CHANGES

COUIISE INO. CAREER FIELDS, POLICIES, PROCEDURES AND EQUIPMENTCHANGE. ALSO ERRORS OCCASIONALLY GET INTOPRINT. 30554 THE FOLLOWING I TB1SUPDATE AND CORRECT YOUR COURSEMATERIALS. PLEASE MAKE EFFECTIVE DATE THE INDICATED CHANGES. Of SHIPPING UST 1_10Feb 76

3. CHANGES FOR THE VOLUME WORKBOOK: VOLUME lA (Continued)

e. Page 32, Chapter Review Exercise, answer 6: Change "b. limiter" to "b. Shunt negative Negative clamper."Change "c. Negative clamper" to "c. positive limiter." Series Change "d. Positive clamper" to "d. Change "e. Shunt negative limiter." Series positive limiter"to "e. Positive clamper."

f. Page 35, Chapter ReviewExercise, answer 48: Delete.

4. CHANGE FOR THE VOLUME WORKBOOK: VOLUME 2

The following questions are no longer scored and need not beanswered: 1, 41, 51 and 84.

NOTE: Change the currency date on all volumes to "December1975."

1L)

(Page3 of3 ) CHAPTER 1 /72

Number Systems

REMEMBER YOUR formal school training Digit Place-Value 1 Thousands days? Many of us just about "flipped out" 0 Hundreds when fkst introduced to the binary, octal, 2 Tens :.1 hexadecimal number systems. We were so 3 Units Leif. .+ed to working with one number system Point (namely, the decimal system) that it was Tenths 5 Hundredths diL"t.for us to adapt our thinking to 4 Thousandths anoti..number system, let alone three of However, you were able to "weather the 4.orm," complete your technical training 1-3. When the idea of place-value was first course, and make it out into the field ofdeveloped, a space was used to indicate that compute.. maintenance. But, we tend tono quantity appeared in a place-position. For forget the basic rules of mathematics if notexample, 205 was written 2 5 and 5,008 used often enough. How is your memoryappeared as 5,8. You can see that this leads concerning the basic rules involved in using to confusion. Does 2 5 mean 25 or 205, etc.? the decimal, binary, octal, and hexadecimal This defect led to the development of the number systems? Have you forgotten them place-holder system using a zero. Although sincelftvingformaltechnicaltraining? zero has a numerical Value meaning "no Because a good working knowledge of thesequantity," it serves a very important function number systems is so important in computeras a place-holder in mathematics. The idea of maintenance, a review of each system is place-value is familiar to us through its use in presented in this chapter. the decimal number system; for example, the zeros in 505, 5,005, and 50,005 are used to insure that the place-positions of all digits in thenumbers arepositivelylocated and 1. Number System Features identified. 1-1. In this section, we review five features 1-4. Radix. The number of different digits of a number system and explain how the used in a number system is called its radix or decimal,binary,octal,and hexadecimal base. Although many number systems are number systems are used in association with possible that have a radix larger than 1, only a computers. few of them lend themselves to computer use. 1-2. Place-Value.The decimalnumber Some of these are the binary system with a system, which is widely used today, uses 10 radix of 2, the octal system with a radix of 8, different basic symbols: 0, 1, 2, 3, 4, 5, 6, 7, and the hexadecimal system with a radix of 8, and 9. Earl of these symbols is called a 16. digit. A decimal r.umber, regardless of its 1-5. The radix of a number system is value, is comprised of one or more of these written as a subscript to a number. For digits. In order to represent a number larger example, in the number 102, the subscript 2 than 9, plsne-values are used: place, in this identifies the number system and the total cue, is the position of a digit with respect to quantity of different numerals that are used the decimal point. Place value is sometimes with the particular system. Let us say that we referredtoaspcisitionalnotation.For want to indicate any and all quantities of a example, take a look at the place-value of number system by the use of only two digits: each digit in the number (1,023.754) below. 0 and 1. Since the quantity of different digits

1 S I 73

TABLE 1-1 NUMBER SYSTEMS NUMBERING SYSTEM BASES,...,...www, (MDIX) 41 = = ., 41 41 = ca P. g . P. X c.2 z R 1 1.-1 I-I ca - i-= ta :I ,...... ;. ai 0 .. 0 0 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 1 1 1 1 10 2 2 2 2 2 2 2 2 2 2 2

11 10 3 3 3 3 3 3 3 3 3 3 100 3.1 10 4 4 4 4 4 4 4 4 4 101 12 11 10 5 5 5 5 5 5 5 5 110 20 12 11 10 6 6 6 6 6 6 6 111 21 13 12 11 10 7 7 7 7 7 7 1000 22 20 13 12 11 10 8 8 8 8 8

1001 100 21 14 13 12 11 10 9 9 9 9 10 10 101 22 20 14 13 12 11 10 A A A 10 11 102 23 21 15 14 13 12 11 10 B B

1100 110 30 2 2 20 15 14 13 12 11 10 C 110 1 111 31 23 21 16 15 14 13 12 11 D 1110 112 32 24 22 20 16 15 14 13 12 E

1111 120 33 30 23 2 1 17 16 15 14 13 F

10000 121 la 31 24 22 20 17 16 15 14 10

10001 122 101 32 25 23 21 18 17 16 15 11

10010 200 102 33 30 24 22 20 18 17 16 12

10011 20 1 103 34 31 2 5 23 21 19 18 17 13

10100 202 110 40 32 26 24 22 ,21 19 18 14

1010 1 210 111 41 33 30 25 23 21 1A 19 15

10110 211 112 42 34 31 26 24 22 ,20 IA 16

10111 212 113 43 35 32 27 25 23 21 1B 17

11000 220 120 44 40 33 30 26 24 22 20 18

1100 1 221 121 100 41 34 31 2 7 25 2 3 21 19

NDA6-2

2 7zic used is 2, the radix is 2, and the binary follow, we utilize these features to simplify number system is indicated. In the binary your understanding ofdeterminiiig-the value system, onlya0or a1 occursina of a number in a given number system. place-positionofthe number. Examples: 110112, 10101012,111112, etc. 1-6. For another example of, radix, let's 2. Basic Numbering System use eight digits (0, 1, 2, 3, 4, 5, 6, and 7) to 2-1. In the following text, we discuss four write any or all numbers. Since eight different basic numbering systems. They are: decimal, digits are used, the radix is 8, and the octal binary, octal, and hexadecimal. There are number systemisindicated.In the octal other number systems, but these four are system,only 0through 7occurs in a commonly used in computers. place-positionofthe number. Examples: 2-2. Decimal System. As statedearlier, 725b , 50638, 774138, etc. placetvalueisanimportantconceptin 1-7. Now refer to table 1-1 and notice that determining the value of a number. Each digit in each system represented, the point where position in the decimal system is called a the system increases to the next positiondecade, which is sometimes referred to as an (next higher power)is equal to the total order. Each decade is valued at 10 times the number of digits used in that system. For decade positioned toitsright, asinthe example, base two system has a zero and a following example: one, then increments to its next position at the decimal count of 2 (its radix). Also, note 512(10) = +500 at this time that any number system with a + 10 indix larger than 10 uses alpha characters as + 2 well as digits. 512(10) 1-8. The Point. A point (.) is a period that isused to separatefractional parts of a number from whole parts. The point assumes To determine the place-value of a number in the name of the number system in which it is the decimal system, you start at the point used; that is, in the binary system it is called and, working to the left, the radix is raised to successive positive powers. Ifthe number the binary point, and itis called the octal contains digits to the right of the decimal point when used in the octal system. point, start at the point and, working to the 1-9. Least SignificantDigit.In number right, the radix is raised to successive negative systems using positional value notation,the powers. An example of this concept for the digit that carries the least weight (value)is number 7,538.75 follows. Note that any called the least significant digit (LSD).The LSD occupies the units column inwhole number raised to 0 power is equal to 1. LSD numbers. In the decimal system, the Power of o3io 2101 o° 1 0-1 1 0- 2 seldom occupies any position other than the Radix one on the extreme rightof the number. Decimal 1,00010010 11/10 or1/100 or However, in other systems, the LSD may not Value .1 .01 Example 7 5 3 8 7 5 always occur on the right of the number, Decimal # especially ifitis a number that has been Decimal 7,00050030 8 .7 .05 manipulated by a computer. Some computers Equivalent have been known to show the LSDof a number on the left. This should not present To determine the decimal valueof our any confusion, however, aslong asitis examplenumber,multiplythedecimal indicated that the LSD is on the left. place-value of each place-position by the decimaldigitoccupyingthatparticular 1-10. Most SignificantDigit. The most significant digit (MSD) of a number is the position: digit that carries the most weight, and, unless otherwise noted, it is the digit to the extreme 7 x 1,000 =7,000 left of a number. For example, in the number 5 x 100 = 500 = 30 3,28610 ,the3isthe MSD becauseit 3 x 10 8 x 1 = 8 represents 3,000. Also, the 6 isthe LSD 7 x .1 = .7 because it represents only six. 5 x .01 = .05 1-11. The applicationof these features 7,538.75 simplifies the understanding of anynumber system, regardless of itsradix. Therefore, in 2-3. Binary System. This system is based the discussion of specific numbersystems that on a radix of 2. Only digits 0 and 1 are used

3 TABLE 1-2 RELATIONSHIP BETWEEN NUMBERS IN 11 1-410 1 binary number DECIMAL, BINARY, AND GRAY CODE 1--41 10 11 gray code number Decimal Binary Gray Code _ 0 0000 0000 1 0001 own A. Binary To Gray

2 0010 00 11

3 0011 00 10 4 0100 0110 1110 gray code number e. 0101 01 11

6 0110 0101 111141 10 11 binary number 7 0111 03.00 8 1000 1100 B. Gray To Binary 9 1001 1101 10 1010 III 1 NDA6-1 Figure 1-1. Converting. 11 1011 1110

12 1100 1010 place-value of each place-position by 13 1101 the 1011 binarydigitoccupyingthatparticular 14 1110 1001 position:

15 1111 1000 1 x 8 = 8 0 x 4 = 0 16 10000 11000 1 x 2 = 2 1 x 1 = 1 NDA6 3 x 1/2 = 0 1 x 1/4 =.25 1 x 1/8 = .1 25 to represent a binary number. Place-valueis 11.375 determined in the samemanner as in the decimal system. That is, the radix is raisedto 2-4. Binary Number System Variations. successive powers starting at the point(binary Two variations of the binary numbersystem point in this case) and working ineither are the gray code and thebinary coded direction. This means that the first positionto decimal.They are considered a variation of the left of the point is equal to 2°, the next the basic binary number system because of location 21, etc. The first position to the right their use of binary symbols 0 and1. of the point is 2-1, the next location 2-2, etc. An example of this concept forthe 2-5. Gila),code.This variation is also called binary number 1011.011 follows: thereflectedorcycliccode.A useful application of this code is found insome 23222120 types of analog-to-digital and digital-to-analog Power of 2- 2-2 2-3 conversion equipment. Its advantageover the Radix basic binary system is derived from the fact Decimal 8 4 2 1 1/2 or 1/4or 1/8or Value .5 .25 .125 that successive integers differone from the Example 1 0 1 1 0 1 1 next by only one digit. This reduces the Binary degree of error which might possiblyoccur Decimal, 8 0 2 1 0 .25 .125 when Equivalent numbers aretransferredwithina computersystem.Table1-2 showsthe relationships between numbers in decimal, To determine the decimal valueof our binary, and gray codes. Notice that a change examplenumber,multiplythedecimal from 0111(2) to 1000(2) requires a change 4 1 S5 I 74 frofri three ones and a zero to three zeros and a TABLE 1-3 one. Thus, all digits were changed RELATIONSHIP BETWEEN NUMBERS IN simultaneouslyforaconsecutivecount; DECIMAL AND BINARY CODEDDECIMAL whereasinthegraycode,consecutive numbers differ by a change of only one digit. The usefulness of the gray code does not Decimal Binary Coded Decimal extend to arithmetic operations; even simple additionisrelativelydifficult in the gray., 0 0000 code. For this reason, a computer working withthiscode converts back and forth 1 0001 betweengraycodeandbinaryduring arithmetic operations. 2 0010 2-6. A pencil-and-paper method of 3 0011 gray-code conversions is shown in figure 1-1. Part A of the figure illustrates a binary-to-gay 4 0100 conversion; refer to part A for this discussion. To convert a binary number to gray code, 5 0101 write the MSD (a 1) of the binary number as the MSD of the gray code number. The sum 6 0110 of the first (MSD) and second (a 1) binary 0111 digits (disregard a carry, if any) becomes the 7 second digit (a 0) of the gray code number. 8 1000 The sum of the second and third (a 0) binary digits (again disregard a carry, if any) becomes 9 1001 the' third digit (a 1) of the gray code number. The sum of the third and fourth (a 1) binary NDA6 4 digits (again disregard a carry, if any) becomes the fourth digit (a 1) of the gay code number. The result of the binary-to-gray 2-8 Binary-codeddecimal. In certain conversion in our example is binary number applications of computer operation, itis 1101 converts to gray code number 1011. For desirable to convert an entire decimal number largernumbersrequiringconversion,the into a binary equivalent. Instead of a true summing process of using the next digit to the conversiontobinary,thebinary-coded right would continue until the LSD of the decimal (BCD) codes each of the 10 decimal binary number was converted. Now, let's numerals into a four-digit binary number. convert a gray code number to abinary Another name for this system is the 8421 number. code. This name is derived from the fact that the symbols 8, 4, 2, and 1 are theplace-valig 2-7. Part B of figure1-1illustratesa of the digits in a four-digit binary number. gray-to-binary conversion; refer to part B for The 10 decimal numerals are coded in BCD as this discussion. Note that we also disregard shown in table 1-3. anycarrywhensummingdigitsina d4o. gay-to-binary conversion. The MSD (a 1) of 2-9. In BCD, decimal number74 is Wntten the gray code number becomes the MSD of 0111 0100, and decimal number3,084 is written 0011 0000 1000 0100.You can re thebinarynumber. The secondbinary in BCD each number (a 0)isthe sum of the binary fromthese examplesthat number just found (the MSD) and the second decimal digit is coded separately to abinary gray code digit(a 1). The thirdbinary form; that is, 01110100(2) is notequal to limber (2 1) is the sum of the second binary 74(10 ), but 01110100(0C D)isequal to digit just tound and the third gay code digit 74(10). There are many more usesfor BCD (a 1). The fourth binary number (a 1) is the than we have explained here. Forexample, in sum of the third binary digit just found and Section 3 of this chapter, BCD is usedfor the fourth gray code digit (a 0). The result of converting hex numbers to a usableform for the gray-to binary conversion in our example computerarithmeticoperations.Also,in is that gray code number 1110 converts to many systems usinglightemitting diodes binary number 1011. For larger numbers (LEDs) or nixie tubes for displays(or fault requiring conversion, the summing process indicators), you might find that a BCDcode is would continue until the LSD of the gray used in the selection of acharacter to be code number was converted. displayed.

5 /77

2-10. Octal System. The radix of the octal each place-position by the system is 8. Only digits0 through 7are used hex digit (where a to represent letterisusedasthedigitequivalent) an octal number. Place-valueis occupying that particular determined in thesame manner as in the position: decimal system. Thatis, the radix is raisedto successive powers startingat the point (octal 9 x 4096=36.864 pointinthiscase). An example A(10)x 256= 2,560 concept of this 1 x 16= 16 fortheoctal number 7014.36 B (11) x follows: 1 = 11 4 x .0625# .25 C (12)x .00390625= .046875 82 Power of 83 81 80 Eri 8- 2 39,451.296875 Radix Decimal 512 64 8 1 1/8 or 1/64 or 2-12. It has been said, "The Value .125 easiest way for Example .015625 7 0 1 4 3 6 a person to do something is to doit the way Octal # that is easiest for him." This'is'also true when Decimal 3584 0 8 4 .375 Equivalent .093750 determining the decimal valueof a number, regardless of the numbersystem involved. We discussed only one method ofdetermining the To determine the decimalvalue of our value of a specific number.No doubt there example, multiply the decimalplace-value of are countless other methods ofdoing the eachplace-positionbytheoctaldigit same thing. Your personal methodmight be occupying that particular position: quicker and easier than thatpresented here; if it is, by all meansuse it on the job. But, if 7 x 512 =3584 you do not have your own method, 0 x use the 64 0 one we have presented. Thissame fact holds 1 x 8 8 true for number systems conversion; 4 x 1 4 that is, 3 x .125 .375 convertingabinarynumbertooctal, 6 x.015625 .093750 hexadecimal to binary, etc. Themethods we 3,596.46875 present may or may not beas easy or as quick as yours. However, if you donot have a method of converting numbersfrom one 2-11. Hexadecimal System. The systemtoanother,usethosethatare hexadecimal system (sometimescalled hex) is presented in this chapter. based on a radix of 16. Therepresentation of 16 possible digits presentsa problem because there are only 10 decimal digitsto work with. 3. Number System Conversions However, this problem is resolved by using 3-1. In ordertocheckresultsof the letters A, B, C, D, E,and F to represent calculations as they numbers10,11.,12, appear internallyin a 13,14, and 15, computer, itis often helpful to beable to respectively. Thus, thecomplete character set for hex is 0 through 9 and convert numbers fromone number system to A through F; this is another. Conversion also aidstroubleshooting shown in table 1-1 underthe base 16 column. byenablingthe Again, place-value is determined maintenancemanto in the same determine the contents ofregisters or the manner as in the decimal system. Thatis, the radix is raised to successive specific address ofa failing memory location. powers starting at 3-2. Conversion the point (hexpoint,inthiscase). An from Decimalto Any example of this concept forthe hex number System. Successive divisionsof a decimal 9A1B.4C follows: number by the base (radix) ofanother system enables you to converta decimal number to that system. The divisionprocess is completed Power of 163 16216116016-1 Radix 16-2 when the quotient ofzero is reached. The Decimal 409625616 1 1/16 or equivalent in thenew system is formed by Value 11256 or .0625.00390625 listingtheremainderofeachdivision Example 9 AIB 4 Hex A c beginning with the lastone produced. The filst remainder becomes the Decimal 36,864 2,5601611 .25.046875 least significant Equivalent (LSD) and the last remainderbecomes the most significant (MSD) forthe equivalent number. In the case of thehexadecimal system (or any sy3tem which To determine thedecimal value ofour uses letters to example, multiply the represent numbers), these remaindersmay decimal place-value of have to be individually translatedto their 6 178' proper letter equivalents. Let's look at a few 3-7. Binary to decimal: 1101(2) ?( 10 ) examples. 3-3. Decimal to binary: 25(10) = ?(2) Double dabble: 1 X 2 = 2 + 1 = 3 X 2 = Divide 25(10) by base 2. 6 += 6 X 2 = 12 + 1 = Quotient Remainder 13(10) 25 + 2 12 + 1 (LSD) Result: 1101(2) = 13(10) 12+2 6 + 0 6 +2 3 + 0 3 +2 1 + 1 3-8. Octal to decimal: 2,067(8 ) .1(10) 1 - 2 0 + 1 (MSD)

Result: 25(10) = 11001(2) Double dabble: 2 X 816 + 0 = 16 X 3-4. Decimal to octal: 5,175(10)=9(8) 8=1.28+6=134 X 8= Divide 5,175(10) by base 8. 1,0727 = 1,079(10) Quotient Remainder Result: 2,067(8 ) = 1,079(10 ) 5,175 + 8 646 + 7 (LSD) 646+ 8 80 + 6 80 + 8 10 + 0 10 + 8 1 + 2 3-9. Hexadecimal to decimal: 137B(1 6) = 1 + 8 0 + 1 (MSD) 9(10)

Result: 5,175(10) = 12,067(8) Double dabble: 1 X 16 = 16 + 3 = .3-5. Decimal to hexadecimal: 4,987(10) 19 X 16 = 304 + 7 = (16 ) 311 X 16 = by base 16. Divide 4,987(1 o ) 4,976 + B(11) =- Quotient Remainder 4,987(10) 4,987+ 16 311 11B (LOD) Result: 1373(18) = 4,987(1 311+ 16 19 7 o ) 19+ 16 1 3 1+ 16 0 1 (MSD) 3-10. ConvertingDecimal Fractionsto Any Number System. You are probably Result: 4,987(10) = 1373(18) wondering at this point why most of our examples of number systemconversions haven't included numbers containing 3-6. Conversionfrom Any Systemto fractions. The reason for this omission is that Decimal. There are two methods commonly in most instances the fractional portion of a used for converting numbers from a specific number must be handled differently from the system to decimal. The first method is the whole portion when converting to another same as that presented in Section 2 of this number system. Examples ot determining the chapter.Thatis,determineeachdigit's decimalvalueofa binary,octal,or place-value, multiply this place-value by the hexadecimalfractionwerepresentedin number coded in that position, and then add Section 2. You should review this section at up the values of all the positions to determine thistime.Our discussion now concerns theoverall decimal value. This particular converting decimal fractions to any number method becomes cumbersome when system. This is accomplished by multiplying converting large numbers of one system to its the given decimal fraction and each successive equivalent value in another number system. product (fractional part only) by the radix, or Another method of convertmg any number base, of the new system. Ineach (especiallylarge numbers) to the decimal multiplication, if a carry into the unit column systemdoesawaywiththeneedof (left of the point) occurs, this carry is a digit determining place-values. This second method of the new number; otherwise, the digit is of converting any system to decimal is called zero. The required nevi system digits are the double-dabble method.Inusingthis obtained in order from left to right. The method, the digit to the extremeleftis operation can be carried out for as. many multiplied by the radix of the system, and the places as necessary for accuracy, but once the next position to the right is added to the fractional portion becomes equal to zero, result. This process is continued until the you'll have the answer. Let's look at some units digit is reached. Once the units digit is examples. addedin,theconversiontodecimalis 3-11. Decimal to binary. completed. .15() 0) = ?(2)

1 17?

.15 2 (Base of new system) .to its decimal fraction equivalentusing (USD) 0.30 place-value notation. 2 Convert the decimal fractionto the 0.60 desired number system, usingthe radix 2 multiplication method. 1.20 2 (Note: multiply only the 345. Conversion of NumberSystems by 0.40 fractional part) Relationships.Becausethereare definite 2 relationships 0.80 between certain number 2 systems, conversion fromone system to (LSD) 1.60 another is possible by an inspectionmethod. Let's look at some examples. 3-16. Binary to octal. The binary Answer: .15(10)= .001001(2) number is simply broken into groups of threeand read (Note; answer carried only six places) as an octal digit. This is possible sincethree binary place-positions can representdigits 0 through 7, and these are all thedigits used in 342. Decimal to octal. the octal system. To break .468750(10) = ?(8) a binary number into groups of three, start at thebinary point _ and work in both directions. Ifat either end .468750 of the number (that is, leftor right of the 8 (Bue of new system) binary point) there are less than three (MSD) 3.750000 binary digits, assume zeros to forma group of three: 8 (Note: multiply only the (LSD) 6.000000 fractional part) 10110001111010.10110(2) = ?(8) Answer: .468750(10)= .36011 010 110 001 111 010. 101100(2) -2.-6 1 7 2. 5 4 (8) 343. Decimal to hexadecimal. By inspection, .29687500)= ?us) 10110001111010.10110(2) = 26172.54(8) .296875 16 (Bue of new system) 317. Octal to binary. Eachoctal digit is 1781250 written as a group of three binary digits 296875 since the digits of the octal systemrange trom 0 (MSD) 4.750000 through 7. 16 (Note: multiply only the 4500000 fractional part) 750000 562.7(8) = ?(2) (LSD)12.000000 5 6 2 7 (8) 101110010. 111(2) Answer: .2968'75(10) = .4C(16) By inspection, 562.7(8)= 101110010.111(2) (Note: 12 in hex equals C) 3-18. Hexadecimal to BCD. Each hexdigit is written as a group of four binarydigits (recall that this grouping is BCD).This is 3-14. Knowing how touse place-value possible since four binary place-positionscan (discussed in Section 2)to determine the represent numbers 0 through 15, and these decimal value ofa fraction, and knowing how are all the numbers used in the hex system; to convert this decimal valueto another that is, digits 0 through 9 and letters A(10) number system (as we just discussed),enables through F (15): you to convert the fractional portionof a number from one numbersystem to another. 31A4(16)° ?(aCI)) Stated briefly, the rulesto follow when 3 converting the fractional 1 A 4 (16) portion of a number 001100011010 from one number systemto another are: 0100 (BcD) If the fraction is ina number system By inspection, 31A4116)= other than decimal, convertthe fraction 0011 0001 1010 0100(gm 8 183 4. Binary Arithmetic Minuend Subtraliend DifferenceBorrow / ea 1 1 0 0 4-1. Since the majority of computers use 1 0 1 0 the binary system in performing arithmetic 0 1 1 two 1 '1 from higher order operations,areview of binary addition, collimn is subtraction, multiplication, and division o o 0 0 presentedinthissection. The examples presented are referred to as direct binary Example: arithmetic, and they are typical of the binary arithmetic operations that are performed with 1 1 01 01 pencil and paper. Some of our examples .. presented in this seztion are similar to actual JO nil Minuend 22(10) - 01101 Subtrahend 13tioi computer arithmetic operations. Also, examples of the recommended 01001 Difference 9 pencil-and-papermethodofperforming binaryarithmeticare presentedthatis, NOTE: This problem necessitated convert the binary number (especially large borrowing in two instances. In both cases, the numbers) to their decimal equivalent and borrow was obtained from the adjacent higher perform the indicated operation. When you order column. A directsubtraction may have your answer, convert it back to binary. require a borrow from a higher order which is Our recommended method is presented as a not adjacent. For example: check of die direct method in our examples. Thedirectadditionof 1 1 4-2. Addition. 100010011 binary numbers follows the rules for binary - 1- 1- 1 addition that follow: 011 0 + 00 4-6. Complement method of subtraction. 0 + 1 1 - 1 + 0 - 1 Many computers perform binary subtraction 1 + 1 a. 0 with a 1 carry to the next higher place usingamethodverysimilartothis position. complement method. This method involves complementing the subtrahend and 4-3. Here is a binary addition problem: performing binary addition of the minuend and subtrahend. The final a,..twer will depend Add 1101(2) to 110(2) on whether or not a carry occurs in the MSD Check: position. First, we'll look at the rules for this 1101 = 13(10) method; then, two examples are presented. +110 =6(10) Complement the subtrahend and 10011 = 19 performbinaryaddition.(Note:Before complementing, insure that there are the same Result: In the first column (LSD), 1 + 0 number of place-positions in the subtrahend = 1. In the second column, 0 + 1 = 1. In the and minuend 'w adding an appropriate third column, 1 + 1 = 0 with a 1 carry to the number of zeros. next higher column. In the fourth column, 1 The answer will be positive if a 1 carry + 0 + the carried 1 = 0 with a l carry to the occurs in the MSD position. This carry must next column; this 1 must be carried to an be added to the LSD position of the answer additional or fifth position (the MSD) in the to derive the correct positive answer. answer. The answer will be negative if no carry occurs in the MSD position. In this case, the 4-4. Subtraction. There are several direct answer and its sign must be complemented to methods for binary subtraction. We'll present derive the correct negative answer. two of them here. The firstis similar to decimal subtraction, and the second (complement method) is very similar to the 4-7. Binary subtraction problem #1: way many computers perform subtraction. 4-5. Direct subtraction. This method of Subtract 10(2) from 1001(2) binarysubtractionissimilartodecimal 1001 subtraction in that it involves the process of +1101 (complement the subtrahend and borrowing from a higher order column when add) required. The following rules are involved in +1 (carry of 1 trom MSD column) this method of subtraction: 111 (answer is positive 7)

; 1 9' I

Check: 1101(2) X 0011(2) 1001 =9(10) - 10 = - 2(10) 1101 = 13(10) X 11 =3 7 (check answer is positive 7) 1101 1101 100111 = 39(10) Result: Since there was a carry from the MSD column, the answer is positive. The 1 Result: Note the numbers are linedup carry is added to the LSD position of the exactly as in decimal multiplication, and the answer to derive the correct positive answer. addition steps were accomplished using the rules for binary addition. 4-11. Division. The process of division is 4-8. Binary subtractionproblem#2: themosttime-consumingofthefour arithmeticoperationsperformedina Subtract 1010(2)from 111(2) computer. In the direct method of binary division presented here, the numbers are set 0111 up as in decimal division, and the rules of +0101 (complement the subtrahend and binarymultiplication,subtraction,and add) addition are applied. 1100 (Note: no carry from MSD;answer 4-12. Direct division problem: and sign must be complemented) 1111(2) divided by 10(2) - 0011 (answer and sign complemented 0111 = . 3) 10/1111 10 (1 X 10) Check: 01 (complement subtrahend) 111 = 7(10) 100 (add) - 1010 = -10(10) 1 (carry) -i (checkanswer is negative 3) 11 (add and bring down 1) 10 (1 X 10) 01 (complement subtrahend) Result: Since a carry did notoccur from the MSD column, the answer and its sign must 100(add) be complementedtoderive the correct 1 (carry) negative answer. 11 (add and bring down 1) 10 (1 X 10) 4-9. Multiplication. A computer normally 01 (complement subtrahend) performs mulilplication through a process of adding and shifting. Depending on the values 100 (add) of the numbers to be multiplied, computer 1 (carry) multiplication is a long, involvedprocess. The 1 (remainder) direct method presented here is much shorter than the computer method, and it involves Check: the following rules: 1111(2) = 15(10) 10(2) = 2-(10) 15 divided by 2 = 7 witha remainder of 1. And, 7(10) is equal to 111(2). Result: Note that all the rules discussed in this section for the direct method of binary addition, subtraction, and multiplicationwere 4-10. Direct multiplication problem: employed in our direct division problem.

10 r /82

Computer Circuits

THE BUILDING blocks of a digital computer beable Lorecognizethesecircuits and system are its individual circuits. Hundreds, determine when one of them is the cause of a often thousands of them, are interconnected malfunction. to accomplish the operation of transferring 1-2. Differentiators. Differentiating and processing data. Actually, only a few circuits produce an output voltage that is different types of basic circuits are used, but proportional to the rate of change of the they are used over again and again in different input. Note that in the RC differentiator conibinations. Thishastheadvantage of illustrated in figure 2-1, an output voltage simplifyingthedesignofthecomputer, occurs only when the square -wave rises or increasing its reliability by using only a few falls.An RCdifferentiatorrequiresa well-tested circuits, and making maintenance short-time constant (1/10 the input simpler and faster. frequency) with the output taken across the 2. The circuits used in digital computers resistor. At To ,the input changes rapidly are categorized as logic and nonlogic. Logic from one steady state to another; that is, the circuitsenablethecomputertomake rate of change is maximum and the output decisions, to manipulate data, and to store voltage is maximum. From To to T1, there is data. Non logiccircuitsperform functions zero rate of change and the output drops to such as supplying the necessary AC and DC zero at T1. How fast the output drops to zero voltages,shapingpulses,couplinglogic depends on the RC time constant of the circuits to indicators, converting data from circuit which determines the charge rate of andtoanalog values,andoperating the capacitor. At T1, there is another sudden electromechanicaldevices.Itwouldbe change of inputvoltagein the opposite impractical to describe every circuit now in direction with a maximum rate of change, and use; however, this chapter reviews many basic the output voltage is again maximum but in circuits from the standpoint of electronic the opposite direction. The sharpness of the principles, symbology, and Boolean output spike depends on the shortness of the equations. An in-depth discussion of Boolean techniquesisincludedtoemphasizeits usefulness fot analyzing and troubleshooting complex logic circuitry. OUTPUT

INPUT 1. Waveshaping and Referencing Circuits !NOR comsrAmy 1-1. Thesecircuitsare importantin computers for several reasons. First, timing .1 and data signals must adhere to the waveshape and voltage requirements specified by the INPUT Ov designer. Second, these circuits may require adjustment by a repairman to keep computer signalsintolerance. Such circuitsinclude differentiators,integators, limiters,and OUTPUT clampers. Waveshaping and referencing To TI circuits usually appear as an integral part of NDA6 45 other circuits suchasflip-flops (F/Fs) or amplifiers. Therefore, it is important that you Figure 21. RC differentiator. 11 /83

INPUT J_ OUTPUT

1 LONGTIME CONSTANT I._._..... A (POSITIVE)

INPUT RI OV_ Eout

T2 TO 5 (NEGATIVE)

OUTPUT REP4-1445 Figure 23. Series limiter. tiDA6-49 Figure 2-2. R.0 integrator. long-timeconstant(10 timesthe input RC time constant. Differentiators, such asfrequency), but the output is taken across a described here, are used as part of the input resistor. circuitry of F/Fs where a sharp spike is 1-6. Limiters, A limiter is defined as a needed to trigger the circuit. device which prevents some characteristics of a waveform from exceeding a predetermined- 1-3. Integrators. Recall that integrationis value. Limiting is used for waveshaping or for the process of summing up an infinite numbercircuit protection by preventing a voltage of minute quantities. An integrating circuitfrom becoming too large. The two types of produces an output voltage that is essentially limiters discussed here are the series and shunt the time integral of its input waveform. Inan (parallel). RC integrator circuit, a long-time constant 1-7. Serieslimiter.Alimitercanbe (10 times the input frequency) is used, anddesigned using a diode and a resistor. When theoutput voltageis takenacrossthe capacitor.Referto the output is in series with the diode, the figure2-2forthis circuit is called a series limiter. Parts A and B discussion of an integrator circuit. At time of figure 2-3 are diagrams of a positive and a To, the area under thesquare-wave input is zero. As time progresses from To to T1, the same amount of area is added with each increment of time. The output increases ina linear fashion, and it reachesa maximum at time T1. The input voltage during the time integral from T1 to T2 is negative, and the I output decreases linearly toward zero volts. 1-4. An integrating circuitcan be used as an input to a Schmitt trigger circuit wherea POSITIvu predeterminedthresholdvoltage must be reached before the circuit fires (or conducts). This threshold voltage could bea function of an integrator circuit that is receiving valid radar returns or tape drive sync pulse inputs. OV 1-5. We should note here that RC coupling OV circuits are similar to integrator circuits, and I this fact could cause confusion. RC coupling I I circuitsare I I I usedprimarilytotransfer I I I TO TI waveforms from one circuit to anotherso that T2 TO TI 72 the output closely resembles the input. Like I tHEGATIVO AsP4-144$ the RC intevator, RC coupling circuitsuse a Figure 24. Shunt limiter. 12 19,3 T1 12

1 1 1 I I I 4,0 I - RI CR1 +4V Ein Eout Oy 4V B1 10y-II I - I s 1 I 41 I 1 I TO 13 T4

POSITIVE LIMITER WITH POSITIVE BIAS

T2 T3 T2 T3 1 I 1 I 1 RI I

M. +10v-- +10V 1 Ov- OV 4V-4 I -10\/ 1 I 1 t I 1 I I 1 1 1 I 1 i T1 14 T0 T1 REP4-1453

B NEGATIVE LIMITER WITH NEGATIVE BIAS

Figure 2-5. Shunt limiter, with bias voltage. negative series limiter. Note that thediode shunt (parallel) with the limitingdevice, a allows conduction in only one directionand shunt limiter is formed. Shunt positiveand blocks or limits the signak in the opposite negative limiters are illustrated in figure24,A direction. In part A of the figure, the diodeis and B. The function of the shunt limiteris the same as the series limiter;that is, limit a reverse-biased by the positive alternation of note theinput;thispreventsthepositive portion of the input signal. However, alternationfrom being developed at the that,inthe shunt limiter, limiting occurs output. The diode is forward-biased by the during the conduction of the limitingdevice. negative alternation of the input, and this 1-9. In the shunt limiters just discussed, alternation is developed at the outputs In part limiting occurred near a zero-reference level. B, the diode is forward-biased by the positive This reference level could be controlledby and reverse-biased by the negative alternation. providing abiasvoltage for the limiting Therefore, the negative alternation is blocked device. Depending on the value of this bias or limited. voltage, limiting may remove only a portion 1-8. Shunt limiter. When theoutput is in of one alternation of an input sine wave. 13

1 9 ,:i Figure2-5,A,illustratesa positiveshunt limiter with positive bias. Notethat in this 25v -- particular circuit the batterycauses the diode CRI to be reverse-biased until the inputgoes more OV positive than a +4 volts. Therefore,limiting does not occur until the inputreaches this -25, --_1 _J 0 positive bias voltage level fromT1 to T2. TI 2 13 T TS Note that this is the only timethat the diode conducts. Now look at the shunt negative .40V_ limiter with negative bias, illustratedin figure .56V- - = 2-5,B. In this circuit, thebattery causes the diode to be reverse-biased untilthe input goes more negative than - 4 volts. Once theinput reaches ths level, the diodeconductscausing limiting to occur from T2tO T3. 10V 1-10. Clampers. Thereare certain circuit - applications within computers whichrequire -15V the upper or lower extremity ofa waveform TO TI Tr to be fixed at a specified value. Thisfunction 13TI TS 16 is accomplished witha clamping circuit 'which effectively clamps or ties theupper or lower P174.:47, extremity of a waveform toa fixed DC potential. Figure 2-7. Positive climper wit:1positive bias (10V). 1-11.Positi, clemper. Figure 2-6,A, illustrates a positive damper. The identifying featureto note hereisthatthe diode's cathode is connected to the capacitor.At To, the -25-volt input causes CR1 to conductand C charges to 25 volts. At T1,the 25 volts acrossC md the+25-voltinputare series-aiding. Thus, +50 voltsappears across R and CRI.. At this time, CR1 isreverse-biased. From T1 toT2, C discharges to approximately 23 volts (determined bythe value of R and C), and theoutput (part B of the figure) drops from 50 to 48volts. At T2, the input is25 volts, CR1. conducts, and the output goes to approximately2 volts. From T2 to T3, C charges quicklythrough CR1, OV - from 23 volts to 25 volts, and CR1 the output goes from 2to0volts.Notethatthe peak-to-peak value of the output isthe same -25y-- astheinput(50 volts),butitslower TO 11 T2 11i4 TS extremity is clamped tozero volts.

A 1-12.Negative damper.The identifying 40V-- feature of this type of damperis thatthe - diode's anode is connectedto the capacitor.If the damper in figure 2-6were a negative damper, the diode would beturned around (anode connectedtocapacitor),and the output would vary between 0 and- 50 volts. 1-13.Establishing the clamping reference. _2v-OV- .2**-- Some circuit applicationsrequirea signal r clamped to a voltage other thanground. If we add a +10-volt bias battery betweenthe signal -25V-t return line and the resistor anddiode, as TO T1 11 T3 14 15 shown in figure 2-7,we would change the clamping reference from 0 to +10 RIP4-1466 volts. In the positive damper shown, theminimum value of the signal is clamped Figure 2.6. Positive damper circuit and to the +10-volt bias waveform.s. voltage. In a negative clamper, themaximum 14 /84 value of the signal would be clamped to this shouldbe drawn ontheclamping bias voltage. reference level for a positive damper or 1-14. Determiningtheoutputofa the upper extremity drawn on the damper. In troubleshooting a damper circuit, clamping reference level for a negative you must know how to determine its output damper. for a given input; otherwise, you will not know whether the output is correct. The Figure 2-8 illustrates the use of these three following steps are a guide for determining a steps for a square wave and a sawtooth. Note damper's output. in part A of the figure that the peak-to-peak Determine whether it is a positive or amplitude of these waveshapes is 250 volts negative damper from the position of (- 50 to +200 volts). B and C of the figure the diode in the circuit. illustrate positive clamping, because the lower Draw the clamping reference level which extremity is clamped to the reference level. D is ground or a bias voltage. and E illush-ate negative clamping, because Draw the input waveshape exactly as it is the upper extremity is Clamped. This figure with respect to shape and peak-to-peak also shows that clamping does not change the amplitude; however, the lower extremity amplitude of the signal to any great extent.

+200V

A -50V

WITH NO CLAMPING

+250V .1111.111001I Imall10.11.

OV WITH CLAMPING, LOWER EXTREMITY OF WAVE IS HELD AT ZEROREFERENCE LEVEL

+100V -1 OV ITH CLAMPING, LOWER EXTREMITY OF WAVEIS HELD AT +100V

-250V WITH CLAMPING UPPER EXTREMITY OF WAVEIS HELD AT ZERO REFERENCE LEVEL

OV -125V

-37 5V WITH CLAMPING, UPPER EXTREMITY OF WAVE IS HELD AT-125

REP4-1465 Figure 2.8. Clamping waveforms. 15

190 18'7

collectorcontributes tothe amplification factor of the circuit. Resistor RD(divider) provides the necessary forward bias forthe base-emitterjunctionofthetransistor. Forward-bias current (IR, base current) flows from ground, through the emitter,out the base lead, and through RD to Vcc . Ig is a few hundred microanveres, andthe DC voltage on the transistor's base isa few tenths A.N P N of a volt. The coupling capacitor(Cc ) used in the input line passes the ACcomponent of the input signal and blocks its DCcomponent. This prevents the DC in the circuitryto the left of Cc from affecting the biason the -vccI" transistor. Cc also blocks the bias voltage from the input signalsource. This blocking IV action allows the input signal to act likean AC generator connected toan RC circuit. cc ."CC 2-3. The input signal toour circuit is a sine 01 OUTPU1 IV/II01161 wave that varies a few millivolts above and 11Y .Yrk7 IMUI POUT below zero. With the positive alternationof AAAAA 0R11 thissignal,the forward bias across the base-emitter junction of the transistorstarts toincrease.This,inturn,causesthe B. PNP 11DA6-76 transistor's junction resistance to demase. As the input signal continues togo positive, the Figure 2-9. Common-emitter circuit. transistor'sconductionincreaseswitha corresponding increase in emitter (IE ) and collector (Ic ) current, but onlya very small 1-15. So far in our review ofcomputer increase in Ig. Note in figure 2-9,A, that the circuits, we have discussed basic waveshaping output goes toward ground as the inputgoes and referencing circuits. Computer signals and positive. This is due to more voltage dropping levels also need to be amplifiedas well as across RI, as Ic increases. Since the voltage shaped and referenced. The circuitthat across RL and the voltage dropped across the performs this function is calledan amplifier. transistor must add up to Vcc, an iucrease in 2. Basic Amplifier Circuits the voltage dropped across RL results inan 2-1. Recall thatan amplifier is a circuit equal decrease iri the voltage droppedacross whose output is an enlarged thetransistor.Consequently,theoutput reproduction of voltageis its input. The three basic amplifiercircuits a negative-going alternation. In you should have a good worldng knowledgeshort, the positive-going alternation of the of are the common emitter (CE), input was amplified, but a phaseinversion common took place through this CE amplifier. base (CB), and common collector(CC). The 2-4. During the negative alternation ofthe common (or grounded) element in these input signal, the forward bias circuits is that which iscommon to both the on the transistor input and output circuitry. decreases, causing the transistor'sjunction resistance to increase. This, inturn, causes the 2-2. Common Emitter (CE). Thisamplifier current through the transistor to decrease. circuit is shown in figure 2-9. Note inpart A The voltage across RL makesa corresponding that the input is applied between thebase and decrease, which results in emitter of the NPN transistor an increase voltage and that the drop across the transistor. This actionis output is taken between the collectorand reflected in the output bya positive-going emitter. The emitter is thereforecommon to alternation. both the input and output circuitry;hence, 2-5. A PNP transistorversionof the the name common emitteror grounded common-emitter circuit is shown in figure emitter. Resistor RI,is called the collector 2-9,B. The primary difference betweenthe load resistor. It allows the voltageon the NPN and PNP configurations is the polarity of collector (Vc )to swing between Vcc and Vc c. With a negative Vc c , the base voltage groundasthetransistordecreasesand (forward bias)is negative with respect to increases conduction withan input signal ground.Forward-bias currentflows from applied.This changeinvoltage on the Vc c,through RD, through the base-emitter 16 197 nbr.

INPUT

A. PIN B. PNP NZ1A6-78

Figure 2-10. Common-collector configuration. junction of the PNP transistor, -then to emitter and the grounded collector. The ground. On the positive alternation of thecollector is therefore common to both the input signal, this negative forward-bias voltage input and output circuitry; hence, the name goes positive, which reduces the current flow common collector (or grounded collector). through the transistor. As Ic decreases, the Forward-bias current for the NPN transistor voltage drop across the load resistor (RL ) circuitflowsfrom VEE, through RE decreases, causing the voltage drop across the throughtheemitter-basejunction,and transistor to increase. Since Vc c is negative, through REto ground.Recall that the the voltage on the collector (output voltage) emitter resistor (RE )is sometimes called a goes in a negative direction toward Vc c . The swamping resistor, because it also functions to negative alternation of the input signal causes swamp (overcome) the effects of temperature the current flow through the transistor to on the emitter-base junction of a transistor. increase. Aslcincreases, the voltage drop Forward-bias current for the PNP transistor across Rincreases, which results in the circuit(fig.2-10,B)flows from ground voltage drop across the transistor to decrease throughRE, throughthebase-emitter (goes in a positive direction). The overall junction, and throughRE tO +VE E .The base effect is amplification of the input signal with current, or forward-bias current, increases phase inversion at the output. withtheapplicationofthepositive alternation of the input signal to the NPN 2-6. Common Collector(CC). Another transistor. This also causes an increase in 1E, name for this circuit is emitter follower.The which results in an increase in the voltage circuit is illustrated in figure 240. Note in dropped across the emitter resistorRE .The part A that the input signal is applied between end result is reflected in the output as it goes the base and collector of the NPN transistor in a positive (less negative) direction. On the and that the output is developed between the negative alternation of the input signal, base

y cc

+VCC OV 'PVC _v _v _v 4 0 4 CC INPUT OUTPUT INPUT OUTPUT

-= vE T

A.PI PPI B. PNP NDA6-75 Figurn 2-11. Common-baas configuration.

17 TABLE 2-1 GENERAL CHARACTERISTICS OF TRANSISTORAMPLIFIER CIRCUITS

CIRCUIT Power Input Current Output Voltage Similar to Vacuum CONFIGURATION Gain Rosistance Gain Resistance Gain Tube Circuit -- COMMON Highest Low Large EMITTER High Large Grounded cathode 25-40 db 500-1500 25-50 30K-50K I 300-1000 amplifier ohms Input signal to the base: Output signal from the collector

. COMMON Lowest High Large Low COLLECTOR Less Generally like a . 10-20 db ZOK-500K 25-50 50 ohms- than 1 cathode follower ix Input signal to the -.. base: Output signal from the emitter

COMMON BASE Medium Very Less Very Large Grounded grid 20-30 db Law than 1 high 500-1500 amplifier Input signal to the 30-150 . 300K-500K emitter: Output ohms signal from the collector

HP-A6-35 current decreasescausing a decreasein IE negative alternation of the inputcauses an and a smaller voltage dropacross RE . The end increase in IE. This Licrease in IE causes an result is reflected in the outputas it goes in a increase in Ic, which causes an increase in the negative direction. Note that the inputand voltage dropped across RL. output are in phase. Therefore, the output goesin a negative direction(less 2-7. The positive alternationof the input positive). signal causes base current todecrease when it 2-9. In the PNP CB amplifier circuit (fig. is applied to the base of the PNPcircuit in 2-11,B), the positive alternation of the.input figure 2-10,B. This results ina decrease in IE signal causesIEand Icto increase. The with a decrease in the voltage droppedacross increase in IC causes the voltage dropacross RE. Therefore, the output voltage goes in a RL to increaie, which causes the output positive direction. Base- currentincreases as voltage to go in a positive direction (less the negative alternation of the inputsignal is negative). On the negative alternation of the applied to the base of thetransistor. This input, IE and lc decrease and the output results in an increase in IE, with an increase in voltage goes in a negative direction (more the voltage dropped across RE. Therefore, the negative). The overall output signal taken output voltage goes in a negative direction. from the collector is an amplified Note that the input and output ofboth reproduction of the input signal. Note that circuits are in phase. the input caw' output signals are in phase. 2-8. Common Base (CB). In thecommon 2-10. Comparison of Amplifier Circuits. base (or grounded base) transistor amplifier Reier to table 2-1 for a simplified comparison circuit, the base element iscommon to the input of the characteristics associated with the CE, and output circuitry. Circuit CC, and CB transistor amplifier circuits. Note arrangements for NPN and PNP transistors are from this table that the CC amplifier hasa shown in figure 2-11,A and B. Forwardbias voltage gain less than 1, but its current gain is for the emitter-base junctions is provided by relatively high; whereas the CB amplifier hasa VE E and resistor RE. When the positive current gain lass than 1, but its voltage gain is alternation of the input signal is applied to high. la contrast, note that the CE amplifier's theemitterof the NPN transistor,IE current and voltagegain areboth high. decreases.ThisdecreaseiniEcausesa However, we snow from our study of this decrease in le, which causes a decrease in the circuit that itis characterized by a phase voltage dropped across RL.Therefore, the inversionbetween theinput and output output goes a positive direction. The signal. 18 1 I 9 d 3. Oscillator Circuits 3-6. Inductance-Capacitance (LC) 3-1. An oscillator is an electronic deviceOscillators. The FDD inthis type of an which generates AC power at a freqUency oscillator is called an LC tank or LC tuned determined by the values of certain constants circuit. The frequency at which the circuit in the circuit. An oscillator may be ccinsidered oscillatesisdetermined by the resonant an amplifier with regenerative feedback and frequency of the LC tuned circuit. The circuit parameters that restrict the oscillations approximate frequency (F) of oscillations of the device to a single frequency. Some of may be determined by the relation: the uses of oscillator circuits in computer systems include clock pulse generation, timing F .0.159 generation,andsignalgeneration.Itis VLC imperative that the oscillators used within a computer system provide an output consisting of the constant amplitude and frequency for By simple mathematical analysis, decreasing whichitwasdesigned.Theoscillators any factor in the denominator (other factors presented in this section are typical of those remaining constant) increases the value of the used in computer systems. fraction. Conversely, increasing any factor in 3-2. Functional Parts of an Oscillator. The the denominator (other factors remaining basic requirements for oscillations within an constant) decreases the value of the fraction. oscillator circuit are: Thus, in the formula above, decreasing either A frequency-determining device (FDD). L or C causes an increase in the frequency of Amplification. oscillations. Increasing either L or C causes a Regenerative feedback. decrease in the frequency of oscillations. For example, todetermine the frequency of oscillations in an LC tuned oscillator where L = 16 microhenries and C = 100 picofarads, 3-3. Frequency-determining device. As the you must first convert to the proper units for nameimplies,the FDD determinesthe frequency at which theoscillator circuit the formula: operates. Some common FDDs used are inductance capacitance (LC) tank circuits, 16 tih =, 16 x 10-6 henries v crystals,andresistancecapacitance (RC) 100 pf 21100 x 10-12 farads networks. 3-4. Amplification.The amplifierused within an oscillator must be capable of then: providing enough gaininthe output to 0.159 maintain constant amplitude and frequency F and to provide regenerative feedback. VLC 0.159 3-5. Regenerativefeedback. To sustain MI oscillationsintheamplifierstage of an V16 x 100 x 10-12 x 10-6 oscillator circuit, the output circuit must be coupled to the input circuit in such a way a 0.159 that part of the output energy is returned to V1600 x 10-18 0.159 the input. This energy (feedback) is amplified, . X 109 and when itis increased beyond a certain 40 critical point, sustained oscillations result. For ..9.98 MHz oscillations to occurwithintransistor oscillator circuits, two conditions must be feedback Now that we have reviewed the requirements satisfied.First,there must be for oscillations within this particular type of (regenerative) from the output to the input in circuit, let's take a look at a few specific LC sucha way as toaid, or reinforce, the transistor's forward bias. Recall that oscillator circuits. degenerative feedback in a transistor circuit 3-7. Armstrong ocsillator. A transistorized opposesthe forwardbias.Second,itis version of this type of oscillator is illustrated necessary that the regenerative feedback be of in figure 2-12. The circuit is comprised of an sufficient amplitude to transfer enough power NPN common-emitter amplifierwithR2 back to the input circuit so as to overcome providing the forwardbiasfor Q1.. The any losses in the FDD. Feedback may be secondary L2 (sometimes called the tickler accomplished by inductive,capacitive, or coil) of T1, and Cl, make up the FDD. resistive coupling. Adjustment of Cl determines the frequency 19

I 2 u i

v.t IT/

being induced into L2. Without voltage being induced into L2, C1 now acts as the voltage source for the tank by discharging through L2. As Cl discharges, it trsnsfers its energy intothe magneticfieldofL2. As Cl continues to discharge, its voltage decreases. The discharge of C1 also has an effecton coupling capacitor C2. 3-9, Coupling capacitor C2 is charged to approximatelythesame voltageasCl; therefore,as Cldischarges, C2 also discharges.C2'sprimedischarge pathis CC through R2. As C2 discharges, the voltage Figure 2-12. Armstrong oscillator. drop across R2 reduces the forward bias on Q1 (base becomes less positive). This decrease of forward bias causes a decrease in Ic. A of oscillations. Note that the FDD is in the decrease in Ic allows the magnetic field of Ll base circuit; therefore, this particular circuit to collapse. This collapsing field induces a couldbereferredtoasatuned base negative voltage into L2 which is coupled Armstrong oscillator. R3 is the swamping through C2 to the base of Q1. In other words, resistor that provides temperature stability for the base of Q1 feels a negative voltage which (41, and C3 is a bypass capacitor for R3 to causes the forward bias to decrease further. preventamplifierdegeneration. C4isa This action continues until Q1 is driven to coupling capacitor, and T2 provides a method cutoff. While Q1 is cut off, the tank circuit of coupling the output signal. The primary continuestoflywheel(oscillate). This (L1) and R1 determines the amount of flywheel effect not only produces a sine wave, regenerative feedback to the base of Ql. This which is induced back into Ll and coupled amount is controlled by adjusting R1 which, through C4 to the primary (L3) (if output inturn, controlsthe amount of current transformer T2, but it also aids in keeping Q1 through Li. With R1 adjusted for maximum cut off, Without feedback, the oscillations of resistance, most of the current flows through the tank would dampen out after several Ll and alarger amount of feedbackis cycles. To insure that the amplitude of the coupled back to the base of Ql. signal remains constant, regenerative feedback 3-8. Circuit operation is as follows: When is supplied to the tank once each cycle as Vc c is applied to the circuit, a small amount explained below. of base current (I8) flows through R2 which 3-10. As the voltage across Cl reaches a sets the forward bias for Ql. With Q1 forward maximum negative, Cl begins discharging biased,collector 'current (Ic )flows from toward zero volts. It continues to discharge ground through Ql, splits through R1 and Ll, through zero and becomes cherged positively. and terminates at +Vcc . The current through As this positive is coupled to the base of Q1, Ll develops a magnetic field which induces a it is brought out of cutoff and lc begins to voltage into the tank circuit. This induced flow again. This Ic causes a magnetic field in voltage is + at the top of L2 and Cl. At this Ll which is coupled into the tank to replace time, two actions occur. First, tank capacitor any lost eargy caused by tank oscillations. In Cl charges to this positive voltage, which means the tank circuit now has stored energy. Second, C2 cotiples this positive voltage to the base of Ql, causing it to conduct more. With art increase in the conduction of Q1,. more current flows through Ll, a larger voltageis induced into L2, and a larger positive signal is coupled to the base of Ql. While all this is taking place, the FDD is storing more energy because Cl is charging to the voltage induced into L2. Q1 continues to increaseinconductionuntilitreaches saturation.Atsaturation,Ic isatits maximum and cannot increase further. This Qi means the current through Ll is steady, Ll's REP4-1417 magnetic field is not moving, and no voltage is Figure 2.13. Collector current and voltage. 20 201 turn,thisfeedback drives Q1 back into saturation. After saturation is reached, Q1 is again driven into cutoff. 3-11. The waveforms shown in figure 2-13 illustratetherelationshipbetweenthe collector voltage and collector current. Notice that lc flows for only a short time during each cycle. And, while the tank circuit is oscillating, L2 of T1 acts as the primary and Li acts as the secondary. Therefore, the REP4-2420 output signal (sine wave) from' the tank is coupled through T1, to coupling capacitor A. SHUNT-FED C4, and through output transformer T2. 3-12. The operationof the Armstrong oscillatorisbasicallythis:Power being applied to the transistor allows energy to be appliedtothe tankcircuit. When the transistor cuts off, the tank circuit oscillates. Once every cycle, the transistor conducts for a short period of time (recall that this is Tl referred to as Class C amplifier operation) and OUTPUT LOAD returns enough energy to the tank to insure a constant amplitude sine wave out. The basic operation of other LC tank oscillators is very similar to that of the Armstrong. 3-13. Colpitts oscillator. The Colpitts is another type oscillator that uses an LC tank circuit.Refertofigure244forthis discussion. The identifying feature of this REP4-1418 oscillator is split capacitors (C3 and C4) in the tankcircuit.Theregenerativefeedback B. SERIES-FED obtained from the tank circuit to sustaiii oscillations is applied to the emitter of Q1. Figure 245. Hartley oscillator. Base bias is provided by resistors R2 and R3. R4 is the collector load resistor. The emitter tankcircuit. Our example illustrates resistor, R1, develops the feedback signal and capacitive tuning. C3 and C4 form a voltage also acts as the emitter swamping resistor. Cl divider networkthe voltage developed across provides an AC bypass around the emitter C4 being the feedback voltage. Either or both swamping resistor. C2 provides the required capacitors may be adjusted to control the coupling between the collector and the tank frequency and amount of feedback voltage. circuit. The tuned circuit (FDD) consists of However, for minimum feedback loss, the C3 and C4 inparallelwith transformer ratio of the capacitive reactance of Cl and C2 winding Ll. A Colpitts may be tuned by should be approximately equal. To maintain varying the inductance of capacitance in the this ratio and thus reduce the possibility of distortion or loss of oscillations, capacitors connected on the same shaft (ganged) are normally used with capacitive tuning. 344. Hartley oscillator. One of the most commonoscillatorcircuitsusedwithin computer systems is the Hartley. This circuit is similar to the Colpitts oscillator except that it uses a split inductance in the tank circuit in,tead of asplitcapacitancetoobtain feedback. The shunt and series-fed oscillator illustratedinfigures2-15,Aand B,is operationally similar except for the method REP4-1421 of obtaining collector bias. a.In the shunt-fed Hartley (fig. 2-15,A), Figure 214. Co lpitts oscillator. resistorsR1,R3,and R4 providethe 21 pin 193

frequency control of oscillators. Its cost is comparatively cheaper than other crystals, and it expands very little with heat.Quartz crystals used in oscillator circuits must becut and ground to accurate dimensions inorder to R5 function as the FDD. Oscillator circuitsthat require a very high degree of frequency stability use temperature-controlledovens to OUTPUT preventvariationsincrystaltemperature which affects crystal frequency. Theseovens are thermostatically controlled containers in which the crystal is placed. Thereare many Y 1 oscillator circuits that use crystals, and the RI C3 one we discuss below istypical of their operation. 3-16. Butleroscillator.Thisoscillator REP4-1424 (showninfig.2-16)has two primary identifying features: two transistorsare used, Figure 2-16. Crystal oscillator (Butler type). and a crystal isis connected between the emitters.Thepurposeofthecircuit components is listed below. necessarybiasconditions.Capacitor Cl providesan AC bypass around emitter R1 - Emitter resistor of Ql, develops the swamping resistor oatput of Qi- R2. The FDD network R2 - Emitter resistor of Q2, develops the consistsoftheseries- combinationof input signal to Q2. transformer windings Ll and L2 in parallel Y1 - Frequencydetermining device (FDD). with C4. Since capacitor C4 is variable, the R4 & R5 - Forward bias voltage divider for Q2. C3 - Base bypass capacitor for Q2. circuit may be tuned through a range of Li & C2 - Resonant tank load impedance for frequencies. C2 is a decoupling capacitor for collector of Q2. the power source. TI. windings LI. and L2 Cl - Coupling capacitor. function as an autotransformer (identifiable R3 - Forward bias resistor for Ql. by the single tapped winding) to provide the regenerative feedback signal. The feedback is Q1 is a common-collector configuration, and obtained from the induced voltage in L2 Q2 isa common-base configuration. The which is coupled through C5 to the base of regenerative feedback path is as follows: from Ql. By shunt feeding the collector through the collector of Q2, through CI. to the base of resistorR4,direct-currentflowthrough Ql, to the emitter of Ql, through the crystal transformer TI. is avoided. Y3., and back to the emitter of Q2. The b. In the series-fed Hartley (fig. 2-15,B), regenerative feedback must pass through the the oscillator is series-fed because DC flows crystal.Thecrystalisoperatedinits through the tank. Observe that DC flows from series-resonantmode. Atitsresonant ground, through R3, through Ql. and LI., and frequency,thecrystalhasaverylow then through R4 to +Vc c. When a part of the impedance and passes the feedback signal to tank circuit is in series with the power supply the emitter of Q2. All other frequenciesare so that DC flows through it, the circuit is said blocked because of the high impedance of the to be series-fed. Regenerative feedback from crystal. the collector to the base of Ql is through 3-17. Circuit operation. The output signal autotransformer action between LI. and L2. from this circuit is obtained directly from the collector of Q2. The tank circuit, L1 and C2, 3-3.5. Crystal-ControlledOscillators. In flywheelsand produces asignalonthe order to obtain a higher degree of frequency collector. At the same time, the crystal is stability, crystal oscillators are often used. vibrating to produce a signal on the emitter of Recall that when a crystal is subjected to Q2. With both transistors operated Class C mechanical pressure, it produces a minute (transistors cutoff for all but a small portion voltage and, conversely, when it is subjected of the input signal), Q2 is cut off for the to electrical pressure,it tends to vibrate majority of the time. This condition provides mechanically. This interrelation between the buffer action between the collector circuit of electrical and mechanical properties ofa Q2 and the crystal. When the output is taken crystal is termed the piezoelectric effect. The from the collector, the external load has very quartz is the most commonly used crystal for littleeffect on the crystal operation; this 229 'su VP/ eliminates the need for another circuit to discussingaspecificblockingoscillator provide buffer action. Remember, the FDD is circuit, several general considerations which the crystal and NOT Ll and C2. The Ll and apply to the blocking oscillator need to be C2 resonant frequency should be near that of discussed first. thecrystal.When bothtransistorsare 3-20. Pulse considerations. As you know operated Class A (transistor always from your previous training, the timing pulses conducting), Ll and C2 can be replaced by a used within computer circuitry have strict resistor. requirements in relation to rise time, fall time, 3.18. Nonsinusoidal Oscillators. An frequency,etc.Therefore, thecircuit oscillatorcircuitinwhichtheoutput parameters of blocking oscillators used in waveform is nonsinusoidal (other than a sine computer systems must be such as to provide wave) is generally classified as a relaxation therequiredpulsesforeffective system oscillator. Relaxationoscdlatorsusea operation. Figure 2-17 illustrates some of the regenerative circuit in conjunction with RC or basicrequirements of typical pulses used RL components to provide switching action. within computer systems. These requirements The charge and discharge times of the reactive include: elementsareused to produce sawtooth, Fast rise timethe leading edge of the square, or pulse output waveforms. Blocking pulse should be as steep as possible; that oscillat o rs , Miller integrators, and is, the rise time should be short. multivibrators are examples of relaxation Flat topthis is especially true when the oscillators. They generally use an RC or RL_ pulse width is relatively long. time constant for determination of the output Fast fall timethe trailing edge of the waveform and frequency. Also, these circuits pulse should also be as steep as possible; can be further classified as either free-running that is, the fall time should be short. ordriven(triggered).Thefree-running Specificandaccuratelycontrollable oscillator is a circuit in which the oscillations frequencythe pulse occurrence time begin once power is applied to the circuit. (PRT) must be stable and accurately The triggered oscillator is controlled by a controllable because it determines the synchronizing or triggering external signal. pulse recurrence frequency (PRF). 3-19. Blocking Oscillator. This is a special type of circuit which is normally used to 3-21. Circuitparameters. Recall that produce a narrow pulse, sometimes called a circuitparameters,such asresistance, trigger.Theoutputfromtheblocking ind uctance, mutual inductance, or oscillator has many uses, most of which are capacitance, directly control the PW (pulse concerned with the timing of various circuits. width), PRT, and PRF. In the blocking They areusedas frequency dividers,or oscillator we'll be discussing, a transformer is countercircuits,andfor switching other used to determine the duration and shape of circuits on and off at specific times. Before the output. Because of its importance, let's

FLAT PERCENT / TOP

-- FAST RISE TIME

M10 All-FALLFAST 30- TIME 40 30 10- 20=40 I I I Iiiii1 I 1 I 2 3 4 3 7 I 10 MICROSECONDS

1 P R T

1 NDA6 7 3 Figure 2-17. Timing pulses. 23

29,; /95"

zero. The time required for the current to reach maximum depends on the size of L and RE . If RE is small, then we have a long-time constant RL circuit. If we use only a small portion of curve 1 (from A to B), then the current rise would have maximum change ina small time period. Further, the smaller the time increment, the more nearly linear is the current rise. A constant current rise through the coil is a key factor in a blocking oscillator. Recall that a basic -principle of inductance is that if the rise of current through a coil is linear (that is, the rate of current riseis constant with respect totime), then the induced voltage will be constant. This fact is true in both the primary and secondary of a transformer. Figure 2-19,B, shows the voltage A across the coil when the current through it rises at a constant rate. Notice that this is very similar to the typical pulse used within a NDA6 -6 3 computer that was shown in figure 247. Figure 2-18. RL circuits. 3-24. Free-running blocking oscillator. The circuitillustratedinfigure2-204,isa simplifiedfree-runningblockingoscillator briefly review transformer action when used chosen for this explanation. When power is as part of a series RL (resistance, inductance) applied to the circuit, R1 provides forward circuit. bias and Q1 conducts. Current flow through 3-22. Series RL circuit.Figure 2484, Q1 and the primary of T1 induces a voltage in shows a transformer with series resistance in L2. Recall that phasing dots on a transformer both the primary and secondary circuits. If S1 indicate a 180° phase shift between Ll and is closed, current flows through R1 and L2. So, as the bottom side of Ll is going As the current increases, it induces a voltage negative,the bottom Fide of L2 is going into L2. With induced voltage in L2, a current positive. This positive is coupled to the base of flows through R2. The voltage across L2Q1 through Cl which causes Q1 to conduct depends on the turns ratio between Ll and harder. Thus, we have our regenerative feedback L2. The secondary load impedance, R2, and Q1 saturates. While Q1 is in saturation, the affectstheprimaryimpedancethrough voltage across Ll is a constant value as long as reflection from secondary to primary. If the the current rise through it is linear. Figure load on the secondaryisincreased(by 2-20,B, shows the ideal collector and base decreasing R2), the load on the primary also waveforms. At T1, Ll saturates. At this time, increases.Similarly,ifwe decreaseR1, thereis no change in the magnetic flux primary and secondarycurrentsincrease. coupled from Ll to L2. This results in Cl Since T1 has an effective inductance, and any (which charged from To to T1 ) to discharge change in R1 or R2 causes a change in through Rl. This places a negative voltage on cuirent, we can show T1 as an inductor and the base of Q1 which cuts it off. lc now stops R1/R2 as a combined or equivalent series and the voltage across Ll returns to zero. The resistance. This equivalent circuit is shown in figure 2-18,B, and it acts as a simple series RL circuit; we'll discuss it in those terms. 3-23. With S1 closed in figure 248,B, L acts as an open at the first instant, and the source voltage appears across it. As current begins to fiow, EL decreases and ER and I increase at an exponential rate. This action is shown by the curves in figure 2-19,A. That is, with S1 closed, circuit current follows curve 1 A a and EL follows curve 2. In a time equal to five time constants, the resistor voltage and NDA6 -57 current are maximum and EL is effectively Figure 219. Voltage acrou a coil.

24 14

+V CC

TO T 1 T2 T3 1

1 +V CC

COLLECTOR WAVEFORM

BASE WAVEFORM

NIIA6 -62

Figura 220. Blocking oscillator and waveforms.

206 \ /17

length of time between To and T1 is the PW commonly calledinductiveovershootor which depends mainly on the characteristics parasiticoscillation.Itiscaused by the of thc transformer, and the point at which it collapsing action of the magnetic field in the saturates. primary of T1 when Q1 cuts off. In most 3-25. From T.toT2(fig. 2-20,B), Q1 is computer applications, these oscillations are held at cutoff by Cl discharging. through Rl. not desirable, and some means to reduce or Q1 is now said to be blocked or resting, and dampen them out is required. Recall that this the time it is blocked determines the PRT. maybeaccomplished bythe useof a The PRT is controlled by the time constant of transformer whose primary has a high DC R1 and Cl. As Cl gradually loses its charge, resistance and thus a low Q. Also, recall that the voltage on the base of Q1 gradually Q is a quality factor of a coil or resonant returns to a forward-bias condition. AtT21 circuit that is equal to the inductive reactance Q1 is again in a forward-biased condition, and (XL )dividedby theresistance.In some the cycle repeats. applications,damping outtheseparasitic 3-26. Noteinfigure2-20,B,that the oscillationsisso critical that an external collector waveform indicates positive swamping or damping resistor is placed in overshoot at the end of the pulse. This is parallel with the coil (L1 in this case). Nhen

C C

TERTIARY 1.3 OUTPUT

INPUT TRIGGERS

rwl-PRT 400 MICROSECONDS-1mi INPUT TRIGGERS PRT 200 -44 MICROSECONDS

BASE w A V E F OR M 0

*0110. AM*

OUTPUT WAVEFORM

NDA6 -6 4

Figure 2-21. Synchronized blockingoscillator. 26 U /le +10

-...... 01 I

OV 0 I r ) 1

I- I1 - I CHARGE / ... PATH DISCHARGE PATH NDA6-53

Fignie 2-22. Miller integrator. an external damping resistor if placed across (this PRT is indicated in the figure by To, T1, the tank, its Q is then equal to R divided by and Ti). Note that the trigger occurring at T1 XL,where R is the equivalent total circuit is not of sufficient amplitude to overcome the resistance in parallel with L. positive cutoff bias on the base of the PNP 3-27. Synchronized blocking oscillator. If transistor and turn Q1 on. AtT2,capacitor a fixed PRF other than that established by Cl has nearly discharged and the input trigger the free-running oscillator isrequired, the does cause Qi. to conduct. This action results synchronized blocking oscillator illustrated in in the output frequency of the circuit to be figure2-21,A,would be used.Coupling one-half (or 2.5 kHz) of the input trigger capacitor C2 feedsinput synchronizationfrequency (5 kHz). A feature such as this (sync) triggers to the base of Ql, and the PRT could be used in a computer for frequency output of the circuit is now controlled by the division of clock pulses. PRT of the ,sync pulses. That is, if we make 3-28. Miller Integrator. Another type of the trigger frequency slightly higher than the nonsinusoidal oscillator circuit is the Miller free-running frequency, the oscillator locks on integrator. A common use for this circuit is to at the higher frequency. For example, indevelop a sawtooth wave that is used for figure2-21,B,assumethefree-running generating a sweep voltage; this sweep voltage frequency (not shown) is 2 kHz, thus a PRT is then used to move an electron beam across of 500 microseconds; and the sync pulsesthe face of a CRT (cathode-ray tube). This shown are occurring at a frequency of 2.5 circuit is illustrated in figure 2-22. Circuit kHz for a PRT of 400 microseconds (this PRT operation is as follows: If the base of QI is at is indicated in the figure by To and T2). The +10 volts, QI, conducts and Q2 is cut off. This oscillator will now lock on and run at 2.5 kHz action provides a low-resistance charge path instead of its free-running frequency of 2 for CI, through R3 and R2. When the input kHz. However, when the frequency of the gate goes to zero volts, QI cuts off and Q2 sync triggers istoo high, there is a goodstarts to conduct. Cl had charged to some chance that frequency division could take value less than +10 volts. With Q1 cut off, CI, place. For example, in figure 2-21,B,assume discharges as indicated in the figure; that is, the free-running frequency (not shown) is through R1, Q2, and R3. As Cl discharges, again 2 kHz, thus a PRT of 500 microseconds. the voltage on the base of Q2 becomes more Now we'll apply input triggers at a frequency positive and the transistor slowly increases of 5 kHz, thus a PRT of 200 microseconds conduction. This, in turn, causes the output 27

208 Figure 2-23. One-shot multivibrator.

at the collector to slowly decrease toward 3-30. Monostablemultivibrator. Recall zero volts as Cl discharges. When the input thatthis type of circuitisalso called a returns to +10 volts, Q1 conducts again and one-shot or single-shot multivibrator. The Q2 is cut off. Note that the output illustrated one-shotisusedincomputers for pulse at thm collector of Q2 is a sawtooth. stretching, pulse shaping, gate conditioning, 3-29. Multivibrators. A multivibrator is aand pulse delaying. Figure 2-23 illustrates a form of relaxation oscillator which comprises one-shot and its waveshapes; refer to this two stages, so coupled that the input of each figure for our discussion of its operation. In stage is derived from the output of the other. the quiescent state (power applied and no A multivibmtor can be free-running or driven, input signal), Q3 conducts and Q2 is cut off. i =cordingtowhetheritsfrequencyis Q1 is a switching transistor and conducts only determined by its own circuit constants or by when an input pulse is applied. Prior to time an external synchronizinginput. In Tothe circuit is in its quiescent state which computers,themultivibrators used most means the collector of Q3 is approximately often are the type which require an input - 0.3 volts. This is sufficient to keep Q2 cut signal to cause a particular stage to turn on or off. The collector of Q2 is, in turn, at the off.Recallthatmultivibratorsusedin regative Vc cvoltage. We will assume a computersarenormallycalledflip-flops negative 9-volt Vc c for our discussion. (F/Fs). Since a F/F circuit has two stable 3-31. At time To ,a negative pulseis states, it is used to represent the digits of the applied to the base of Ql. This negative pulse binary number system: 0 and 1. When the isifivertedat the collector of Ql, which F/Fisused toperformlogicalbinary means a positive pulse is coupled by Cl to the operations, suchasaddition,subtraction, baseofQ3.ThiscausesQ3tostop multiplication, division, or comparison, it is conducting. The collector of Q3 now starts called a logic F/F. going toward Vc c, and thisnegative-going

ss SS

MIIMM1 (OR) .....ip SECL jJUSEC L ... ONE OUTPUT TWO OUTPUT Nth16-74 Figure 2-24. Symbol for one-shot multivibrator. 28 ..;

1 Ado

OUTPUT

TO Ti rt OV INPUT

Vol

1 1

I 1 ov --r---- T "T1

VSI 1 I I I I 1 1 I I I I OV

Vs 2 1--

Var 2 NDA6 77

Figure 2-25. Bistable multivibrator. signal(Vc 3 )is directly coupled to the base of then through R3 and R4 to the other plate of Q2, causing it to go into conduction. Q2 Cl. conducts as long as Q3 remains cut off. As Q2 3-32. The voltage drop across R3 and R4 conducts, its collector voltage becomes less (due to Cl discharging) keeps Q3 cut off until negative. When this happens, there is nothing Cl discharges to the cutoff voltage of Q3. to keep the charge on Cl. Cl discharges from Referring to the waveshapes in figtire 2-23, collector to emitter of Q2, through Vc c and notice that the base voltage of Q3 (V33) 29

21 .2 /

and the basevoltage (VB1) is times To negative Vc c , follows the dischargeof Cl between volts. Also assumethat just prior to how near zero collector voltage and T1. Since thisvoltage determines time To , Q2 issaturated, the cutoff,the dischargetime volts, and thebase voltage long Q3 is pulse. At(Vc 2) is near zero negative determines the widthof the output (VB2) is negative.At time To, a time Ti , Q3starts toconduct andits applied to theinput. This starts to go lessnegative. trigger pulse is through C3 andC4 collector voltage negative triggeris coupled toward cutoff,and Cl is of Q1 and Q2.Q2 is already This drives Q2 of Q3. The to the base effect on the charged again bythe base current conducting, so thetrigger has no multivibrator is nowback in thequiescent Q1 is cut offand the the nextconduction of Q2. forward bias to a condition andready to receive negative triggerincreases the may betaken from either conducts. Vo 1then goes trigger. The output pulse is point where Q1 less collector. Thewidth of the output from nearnegative Vc ctoslightly determined by thevalues of R.1, R3,R4, and volts. This causesthe base the discharge negative than zero volts Cl, since thesevalues determine voltage of Q2 tochange toward zero logic symbols for aone-shot then changestowardthe time of Cl. Two (cutoff). Vc 2 is coupled multivibrator are shownin figure 2-24. negative Vc c . Thisnegative voltage multiuibrator.The most of Q1 anddrives Q1 tosaturation. 3-33. Bistablc computers is the to the base conducting and Q2 circuit used in Thus, a stablestate of Q1 common F/F Eccles-Jordan remains in this bistable(alsocalledan cutoff is reached.The flip-flop circuit of a basicbistable another negativetrigger is applied multivibrator). The in state until flipped multivibrator and itswaveforms are shown at time T1.At this time,the circuit is figure 2-25. Refertothis figure for ourback to its otherstable state. circuit operation.In either 3-35. You can nowsee thatthe flip-flop discussion of the and In one state,the stable state, onetransistor is conducting has two stablestates, switched high and thecollector of Q2 .. the other is cutoff. The states are collector of Q1 is for the other by applying the propertrigger pulse. Resistors is low. Theopposite is true R7 form thevoltage divider the output ofQ1 could represent R1, R3, and bias forstate. Thus, and the outputof network thatdevelops the forward yes, true,present, 1, etc., R5 develop theforward bias the oppositevalues; that Q2. R2, R4, and Q2 could represent This two-value for Ql. C1and C2 arecalled speedup is, no, false,absent, 0, etc. used to couplefast basis for digitalcomputer logic, capacitors, and they are the basesystem is the that the bistable changes in thecollector circuits to and itis for this reason increases the circuits'switching widely used incomputers. circuits which multivibrator is Eccles-Jordan F/F wehave speed. However, the basic prior to time To,Q1 is must undergocertain circuit 3-34. Assume that (Vc ) is nearjust discussed cut off, thecollector voltage

11:00

1.04IC looin 104[1

Figure 2-26A. I.,ogicflip-flop. 30 T T 2 T 3 T4 T 5 T 6 0 1

I I I I

i I

I I

CR5

CR 6

I I 1

I 1 I

I I 1

I I I

I I I 8 I I I 1

i i I I

I I I I

I I 1 I I I 1 I

I I I I

I 1 1 1 I

I I I I I I I i I I I I I I I I I II

I I I CRe --i I I I I I I I

CR9

" I " OUTPUT

"0" OU TPUT

NE013-50 Figure 2.268. Flipflop waveform.

31 changes to be uszd asa logic 'F/F within a computer. differentiated wave and permits CR7 and CR10 to perform their functtousas limiting 3-36. Logic flip-flop. Just how does the diodes, clipping the negati7e spikes. basic Eccles-Jordan multivibrator differ from Transistors Q1 and Q2 are emitter followcz.s. the logic flip-flop? Figure 2-26A illustratesa The outputs are taken from their emitters. version of the computer logic F/F with several CR1, CR2, CR3, and CR4 are limiting diodes circuitmodificationswhichrenderit that maintain the logic levels at 0 volts (logt1 compatible for use -with other logic circuits. and - 10 volts (logic 0). The outputsare These modifications consist of the following: connected to neon indicaton so that the state Logical switching circuits at the inputsof the flip-flop cam be determined by visual to insure the F/F triggers at the desired in..-peetion. These indicators are not shown in time. the figors. Circuits for presetting the F/F toa 3-39. At time To, the flip-flopis in the desired state. ONE state. This meani Q3 is conducting and Diffesentiating circuits to provide sharp Q4 is cut off. The ONE-side outpm is at 0 trigger pulses. vras and the ZERO-side output is at -10 Visual indicators of the F/F's state: 1or volts. At time Ta, signals are applied to CR5 0. and CR6, as shown in figtue 2-26B. The Limiting circuits to establish the desired signals identified as A, B, and C in figure logic levels. 2-26B are the signals at points A, B, and C in the circuit. Signal A is the output of the For the following circuit analysis of this AND-gate. Signal B isthe output of the particular logic F/F, positive logic is assumed. differentiating network. Signal C is the output That is, a relatively high voltage represents the of thelimitingdiode.Sinceboththe binary 1 and a low voltage representsa binary ONE-side and the_ZERO-side input circuits 0. and their waveshapes will be thesame, it is 3-37. Transistors Q3 and Q4 form the sufficient to explain only one input circuit. basicmultivibrator. Q3isthe ONE-side 3-40. The input signals (CR5 and CRS) to transistor and Q4 is the ZERO-side transistor. the circuit are both high during the time from El and R2 are collector-load resistors. R2, Ta tO T2. This iS the only time an output R6s, and R9 form the voltage divider network fromthe AND-gatewillbe present,as for forward-biasing Q3. R1, R5, and R10illustrated by signal A. Signal A isthen formthevoltagedividernetworkfor differentiated by C3 and R13 (signal B), and forward-biasing Q4. The important portion ofthe negative spike is clipped by CR7 (signal the forward bias for operation of this circuit C). The positive vike of the signal at C is is developed across R9 and R10. Cl and C2 applied to the base of Q3 at time T1 and will couple fast collector changes to the transistor cut off Q3. The collector voltage of Q3 goes bases in order to increase the switching speed to a negative potential. This negative change is of the flip-flop. The inputs to the flip-flop coupled by Cl to the base of Q4. Thiscauses consist of SET and CLEAR circuits and logic Q4 to conduct. The collector voltage of Q4 input circuits. The logic circuits in thiscase decreases toward zero volts. This decrease is are positive AND-gates. CR5, CR6, and R7 coupled by C2 to the base of Q3 and keeps form the AND-gate that feeds the ONE-side Q3 cut off. With Q3 cut off, the collector transistor and clocks the flip-flop to the voltage is at -10 volts because of the logic ZERO state. CR8, CR9, and R12 form the level establishing diode CR1. This voltage (a AND-gate that feeds the ZERO-side transistor low) is applied to the base of Ql, and the and clocks the flip-flop to the ONE state. The output of -10 volts is taken from the emitter CLEAR (ZERO) input is fed to C4 and the of Ql. This is the ONE-side output. SET (ONE) input is fed to CO. These inputs 3-41. After time T1, Q4 is saturated and make it possible to preset the flip-flop toa the collectcr is at zero volts because of the desired state. clamping action of CR4. This voltage (a high) 3-38. C3,R13,C5,andR14are is applied to the base of Q2, and the output differentiating networks that differentiate the of zero volts is taken from the emitter of Q2. outputs of the AND-gates. C4, R13, C6, and This is the ZERO-side output. The flip-flop is R14 form the differentiating networks for the now in the ZERO state, and remains in this CLEAR and SET inputs. R8, R13, Ell, and stable statethe ZERO stateuntil time T5. R14 form voltage divider networks that place At this time, the inputs to CR8 and CR9 (as negative potentials on the anodes of CR7 and shown in fig. 2-26B) activate the logic input CR10. This negative potential allows them to (ONE) gate.SignalsA', B, andC'are conduct only on the positive spike of the generated arid a positive trigger (C') is applied 32 2 I multiplication,anddivision.InBoolean algebra, there are only three operations or functions:AND, OR,andNOT.The multiplicationandadditionsymbolsin ordinary arithmetic indicate thefirst two OR operations. For example, A B means A AND B,and A + B means A OR B. The multiplication sign () means AND operation andtheadditionsign(+)means OR A 8 operation. The dot may be omitted in the tiri,46-80 AND operation, or parentheses may be used to indicate the AND operation. For example, Figure 2-27. Flip-flop logic symbols. A B = AB = (AB). To denote the NOT operation, a bar (called the vinculum)is placed over the letter. For example, A means to the base of Q4. Thiscuts off Q4 and NOT A and B means NPT B. clocks the flip-flop to the ONE state, with Q3 4-4. Boolean algebra is the algebra of true conducting and Q4 cut off. The multivibrator or false, on or off, and conducting or cut off. action is the same as was discussed in clocking Since this is true, the digits of the binary the F/F to the ZERO state. number system are well suited for Boolean 3-42. Two of the logic symbols that are representation.Sothereareonlytwo used for the logic F/F am shown in figure numerical values in Boolean algebra: 1 and 0. 2-27. The symbol in part A of the figure is Let's see how Boolean algebra applies to used when the logic input gates are physically computer operations. integral with F/F functions. The symbol in 4-5. ORFuuction.Anequationin part B is used when the logic gates are ordinary algebra such as A + B = C has an physically separated from the F/F. infinite number of possible values, since A 3-43. Up to this point, our discussion of and B can be assigned any value. On the other computer circuits has, with the exception of hand, an equation in Boolean algebra can have thelogicF/Fjustdiscussed,primarily only two possible values. The values are either centered around the operation of nonlogic 0 or 1. Therefore, in the Boolean equation "A circuits. Our next discussion in Section 4 OR B equals C," there are only four possible reviews the principles of Boolean algebra, numerical combinations. These are: whichisanaidtounderstandingthe operation and function of the logic switching A + B ag C gates that are discussed in detail in Section 5. 0 + 0.. 0 0 + 1= 1 1 + 0 ag1 1 + 1..1 4. Boolean Algebra 4-1. Booleanalgebra,thescienceof symbols and their combinations, is used to 4-6. Theseresultscouldrepresenta describe sod represent mathematical standard binary addition table, except for the functions according to the rules of logic. No last entry. When both A and B are 1, the practical use was made of this system of result is 1. The + symbol, therefore, does not translating the rules of formal logic into have the same meaning as in ordinary algebra mathematical terms until it was found that it but is a logic addition symbol. Also, from the could be used to indicate the logical functions equation 1 + 1 a 1, you can see that there is of telephone and computer switching circuits. no such quantity as 2 in Boolean algebra. The increasing use of computers hu created a 4-7. Any number of variables cen be rapid growth in the application of Boolean represented in an OR equation. For instance, algebra. in the equation W+ X+ Y +2 a A, if W, X, 4-2. Boolean algebra is very different from Y, Z all have the value of 1, the sum of the ordinary algebra and, for this reason, it may values, A, represents a 1. That is, if either one seem confuting at first. Actually, the part of or all of the quantities in the equation are 1, It that you need to know is not very difficult. the result is 1. Conversely, if all the quantities However, a good understanding of Boolean in the equation are 0, the result is O. algebra willhelp you to understand logic 4-8. Part A of figure 2-28 illustrates the circuits. OR function by the use of a simplified light 4-3. In ordinary algebra, there are four switching circuit. Figure 2-28,B, shows the basic operations: addition,subtraction, logic symbol for this circuit which is called a 33

0 ....,1 Aar

C1A+B ...E B I A+8=C A. SIMPLIFIED CIRCUIT B. LOGIC SYMBOL NE013-1 Figure 2.28. OR function and logic symbol. gate. Switches A and B are represented by a 1 number of values. However, since Boolean when they are in the closed position and by a algebra uses only the values 1 and 0, there are 0 when they are in the open position. Also, onlyfourpossiblecombinationsinthe light C is represented by a 1 when it is on and Boolean equation A AND B equal C. These by a 0 when it is off. are: 4-9. Let's see what conditions must exist for light C to be on. With switch A closed and A B C switch B open, light C will be on and the 0 0 0 circuit can be Lepresented by the equation 1 + 0 1.. 0 0 = 1. With switch A open and switch B 1 0.. 0 closed, light C will be on and the circuit can 1 1 a 1 be represented by the equation 0 + 1 = 1. With both switches closed, light C will be on 4-11. In the AND equation, the result is 1 and the circuit can be represented by the only when all the variables are 1. Here, again, equation 1 + 1 = 1. With both switches open, any number of variables can be represented in light C will be off and the equation for the the AND equation. However, as in ordinary circuit is 0 + 0 = 0. These four combinations multiplication, the product is 1 only if all the are thesameas thefourpossible factors are 1. combinations for the Boolean equation A + B 4-12. Figure 2-29,A, illustrates the AND = C. Therefore, this circuit performs the OR function by the use of a simplified light operation or function. The logic symbol in switching circuit. Figure 2-29,B, shows tne figure 2-28,B, represents the schematic shown logic symbol for this circuit. Switches A and in figure 2-28,A. B are represented by a 1 when they are in the 4-10. AND Function. In ordinary algebra, closed position and by a zero when they are the equation A B = C means A multiplied by intheopenposition.Also,light C is B equals C. Because A and B can be assigned represented by a 1 when it is on and by a zero any value, the equation can have an infinite when it is off.

,,,,''AB=C ± A B C=AB

=MOON WIN

A. SIMPLIFIED CIRCUIT B. LOGIC SYMBOL NE013-2 Figure 229. AND function and logic symbol. 34 215 244

E=AB+CD

AB+CD=E

A. SIMPLIFIED CIRCUIT B. LOGIC DIAGRAM NEO13-3 Figure 2-30. Combination AND-OR.

4-13. Let's see what conditions must exist functions. Figure 2-30,4, illustrates a circuit for light C to be on. With switch A closed and in which the light (E) is on when switches A switch 8 open, light C will be off and theand B or C and D are closed. This circuit circuit can be represented by the equation 1 illustrates an OR function combined with two 0 a 0. With switch A open and switch B AND functions. The Boolean equation for closed, light C will be off and the circuit can this circuit is AB + CD a E and is read A AND be represented by the equation 01 a 0. B OR C AND D equals E. Figure 2-30,B, With both switches closed, light C will be on shows the logic diagram for this circuit. Study and the circuit can be represented by the figure 2-30,A, to verb), the equation. equestion 11 a 1. With both switches open, 4-15. Figure 2-31,A, shows a simplified light C will 'be off. The equation for the lightswitchingcircuitin which two OR circuit now is0 0 a0. These four functionsarecombinedwithan AND combinationsarethesameasthe four function. The equation for this circuit is (A + possiblecombinationsfortheBoolean B) (C + D) E and is read A OR B AND C equation A B a C. Therefore, the circuit OR D equals E. The logic diagram for this performs the AND operation or function. circuit is shown in figure 2-31,B. Study figure Instead of drawing the schematic, the symbol 2-31,A, to verify the equation. in figure 2-29,B, is used to represent this 4-16. NOT Function. A basic concept circuit. foundinBooleanalgebrathathasiio 4-14. Combination AND-OR Functions. counterpart in ordinary algebra is the NOT Complex switching networks are frequently function. The NOT function denotes the requiredto do a combination of logical complement of a Boolean expression. A line

(A S)(C 0)

A. SIMPLIPIt0 :01CuIT I. LOGIC DIAGRAM NE013-4

Figure 2-31. Combination OR-AND. 35

216 o 7

A. SIMPLIFIED CIRCUIT B. LOGIC DIAGRAM NE013-5 Figure 2-32. NOT function. over an expression is used to indicatt the is represented by a 1, A= 1 and X = 0. When NOT function. For example,0 means.NOT 0 and switch 1 is in the DOWN position,it makes has a value of1,sinceI. is_thecontact with A, and since complement of 0. For the a closed circuit same reason, 1 hasrepresents 1, A = 1 and A = 0. Thesame can a valueof O. So, when A is 1, A is 0,and be applied to switch 2. When when A is 0, A is 1. B equals 1, B equals 0. When B equals 0, B equals1. 447. Figure 2-32,A, isa simplified light switching circuit that illustrates 4-19. There are two possible combinations a use of the of switch positions that turn the lighton and NOT function. In thiscase, the NOT function two that turn it off, as follows: is used to label alternate switchpositions so that switch action may be indicatedby a A and r Booleanequation.Thisisthe common Light on switching circuit used to turn thesame light A- and B on or off from two different switches. Itis A and B often used for a stairway light thatcan be 'Light off turned on or off from either upstairsor A and r downstairs. The logic diagram for thecircuit is shown in figure 2-32,B. 4-20. Therefore, if switch 1 is in the A 4-18. Switch 1 has two positions labeledA position and switch 2 is in the B positionor if and A. When switch 1 is in the UPposition, it switch 1 is in the A position and switch2 is in makes contact at A, and sincea closed circuit the B position, light C is on. The equation for this AND-OR combination is AB' + AB= C. 4-21. To show all possible combinationsof TABLE 2-2 values for A and B thatmay be placed into TRUTH TABLE FOR CIRCUIT IN FIGURE2-32 the equation, it is helpful to constmcta table

A --A. B 51 Ari 13 AT+ -Al

o 1 o 1 o o o C4,04.1.5 1 0 o 1 1 o 1

o 1 1 o o 1 1

1 o 1 o o o o liE013-6 Figure 2-33. Logic diagram illustratingstate NDA6-39 indicators. 36 2 I 7 L.All C L C/A

NE013-7 NE023-8

Figure 234. Logic diagram. Figure 235. Logic diagram. of possible values for the variables. This table quantity of A OR B equals NOT C. Looking is called a truth table. The trut.h table for the again at figure 2-28, you can see that C is not equation for the circuit in figure 2-32 is present when both A and B are not present. shown in table 2-2. Study figure 2-32 and From this, you can develop the equation A table 2-2 to verify the information in the B = C to represent the circuit. You now have truth table. two expressions which are equal to the same 4-22. The NOT function is important in quantity. This makes these two_expressions computerlogic,becauseitissometimes equal to each other. That is, A B = (A + B ). necessary to indicate that a circuit has an 4-24. Refer to the AND circuit in figure output of 1 only when a certain expression is 2-29. The equation which represents this not present, u in the equation C = AB. This is circuit when light C is on is A B = C. The the equation for part of the circuit shown in equation states that C is on when A is present figure 2-324, and states that C is 1 when A is and B is present. When liabt C is off, the 1 and NOT B is 1. In figure 2-33, the logic equation for the circuit is A B = C and is diagram is the same as in figure 2-32 except read: NOT the quantity of A AND B equals that small circles, called state indicaton, are NOT C. Looking again at figure 2-29, note drawn at the inputs to the AND circuits and B that C will not be present when either A or B is changed to B. The state indicator in figure is not present. From this, the equation A + B 2-33 shows that AND circuit 1 is inhibited = C represents the circuit. Again, wehave two when B is present and activated when theexpressions which are equal to the same NOT function of B is present along with the quantity. This makes these two quantities presence of A. Read this paragraphand study equal to each other. That is, A B + B. figure 2-33 again. 4-25. Application of Boolean Algebra. To 4-23. Equivalent Expressions. Refer again write the equation for a logic diagram, begin to figure 2-28. The equation that represents by writing the equation for the gate farthest this OR ciicuit when light C is on is A +B = from the final or output gate. Then, in a C. This equation states that C is present when step-by-step manner, write the equation for A is present OR. when B is present. Whenlight each gate, proceeding toward the final or C is off, the equation which represents the output gate. For example, look at the logic circuit is (A + B)C . This equation indicates diagram in figure 2-34. To write an equation that C is not present when the quantity (A + for the output (OR-gate 2), first writethe B)isnot present and isread: NOT the equation for AND-gate 1. This equation is

(C +Ali) 2

3 L- E15(C+ Ag)

NE013-9 Figure 236. Logic diagram.

2 A

NDA6-72 Figure 2-37. Logic diagram. Figure 2-38. Logic cliagrarr.

AB. The output of AND-gate 1 (AB) and C equation, reverse the steps for writing the are inputs to OR-gate2. The output of equation for the logic diagram. That is, start AND-gate 1 is OR'ed with input C in OR-gate with the diagram of the output gate and' 2. Then the output, L, is present when A proceed to draw the logic diagram for each AND B are present OR when C is present. The input. equation then is L = AB + C. 4-30. For example, the first gate to be 4-26. Figure 2-35 shows the output of an drawn for the Boolean expression F + [DE OR-gate (1) as an input to an AND-gate (2). (AB + C)]is the OR-gate shown in fiore The output from OR-gate 1 is AND'ed with 2-39. Now draw the OR-gate input ED (AB + input C to AND-gate 2. The equation for the C) shown in figure 2-39 as the output of the output of OR-gate 1 is A + B. Then the three-input AND-gate shown in figure 2-40. output of AND-gate 2, L, is present when A Next, draw the AND-gate input AB + C OR B is present AND when C is present. The shown in figure 2-40 as the output of the equation then is L = C (A + B). two-input OR-gate shown_in figure 2-41. Draw the OR-gate input AB shown in figure 4-27. Figure 2-36 illustrates how the NOT 241 as the output of the two-input AND-gate function is used. When gate 1 is activated, the shown in figure 2-42. Combine the gates equation for the output is AB. The inputs shown in figures 2-39 through 2-42, and you needed to activate gate 2 are the output of have the complete logic diagram for the gate 1 OR C; therefore, the equation for the Boolean expression F + [ED (AB + C)] as output of gate 2 is C + AB. The inputs needed to activate gate 3 are the output of gate 2 shown in figure 2-43. AND D AND E; therefore, the equation for 4-31. Simplifying Boolean Equations. the output of gate 3 is L = ED (C + AB). Sometimes, simplifying a Boolean equation results in the use of fewer gates in its logic 4-28. In figure 2-37, the state indicator at diagram. For example, the logic diagram for gate 2 shows that the output of AND-gate 1, the Boolean equation X = AC + AD + BC + AB,inhibitsOR-gate2.Therefore,for BD is shown in figure 2-44. Here you see that OR-gate 2 to be activated, C must be present 12 signal paths and five gates are required for OR the NOT function from AND-gate 1 must this equation. However, the equation X = AC be present. Thus, the equation for the output + AD + BC + BD can be factored as in of ORIgate 2 iaLAB + C. Substituting A + ordinary algebra, thus: B for 1113-, the equation becomes L A+B + C. This equation can be represented by a X "C+AD+BC+BD different logic diagram which is shown in .-t(C + D) + B(C + D) figure 2-38. (A+B) (C+D) 4-29. Drawing Logic Diagrams. To draw a logic diapam to represent a given Boolean The simplifed equation is X = (A + B) (C +

E5(Ae. +C) A5+C F+ [E6(Ali + C)] E6(A13+ C) 6

NE013-12 NE013-13 Figure 29. Logic diagram. Figure 240. Logic diagram. 38 21) NE013-14 +AC AO. IC ID Figure 241. Logic diagram.

D). The logic diagram for this equation is shown in figure 2-45. Now there are six signal paths and three gates. Compare figures 2-44 /1/013-17 and 2-45 and note that they are equivalent. You can usesimplificationof Boolean Figure 2-44. Logic diagram. equations to determine the most practical and you can see that to NOT or complement circuit. a Booleen equation or expression, changethe sign of operation and NOT or complement eachterm.For example,to NOT the expression A + B, change the operation (+) to (*Land NOT each tenn. This gves A + B = A Ai B. Remember that AB and A B are not the same. The bar over an equationorexpression means to NOT or complementthe entire NE013-15 expression.Let'stakeanother example. Simplify L = A + (B + Figure 242. Logic diagram.

L A+(r7C)+15 4-32. In the example just explained, we simplified the Boolean equation by factoring L A+415 asinordinary algebra.Also,justasin orclinary algebra, terms may be expanded in 5. Logic Gates Boolean algebra. For examale, expand the Boolean expression (A + B) (A + B): 5-1. In Boolean algebra, you studied basic logicalfunctions in terms of information only. The logic blocks used to diagram the (A+B)(X+W)-AA--+Aff+BA-+Blia functions actually represent physical circuits. Alf + (NA . 0 and a a 0) Now,let'ssee how physical (computer) circuits operate according to the rules of these 4.33. Now,let'ssee how to NOT an functions. Asinputsof these computer equation to simplify jt. We have already circuits,we useelectricalsignalswhich proved that AB a A + B. Study this equation,represent the facts that must be logically

(Ai + 2

4 ( El5 (Ai C) I

NE013-16

Figure 2-43. Logic diagram.

39 )....--.-x = (A + BHC +D)

NE013-18 Figure 2-45. Logic diagram.

processed. Each output is an electrical signal 5-5. Thesolid-statediode,likethe which represents the result of applying the vacuum-tube diode, has an anode anda rules of a particular logical function toa set cathode, as shown in figure 2-46. It offers of inputs. In other words, each output isa practically no forward resistance to the flow logical conclusion. of electrons from the cathode to the anode;in other words,it conducts easily when the 5-2. The switching devices commonly used anodeismade more positivethan the in logic circuits are determined by the state of cathode. However, when the cathode ismore the art and the job. Relays, semiconductor positive than the anode, the diode offersa diodes,vacuumtubes,transistors,and very high resistance and practically no current magnetic cores are used today. Tomorrow's can flow. devices may be different, for researchis constantlyseekingsmaller,faster,more 5-6. Diode positive AND-gateor negative efficient, and more reliable switching devices. OR-gate. Figure 2-47 shows a diode logic gate that may perform either the positive Arrpor 5-3. First, let's discuss the operation of the negative OR function. The inputsare logic switching circuits called gates. A gating connected in parallel, each througha separate circuitoperates in very much the same manner as its name implies. It acts as a valve or a swinging door that determines whether a pulse is passed or stopped. Gatescan perform AND, OR, and NOT functions. + VOLTAGE 54. Diode Logic Gates. Many computers use diode logic; that is, they perform most logical operations ,in circuits made up of diodes (usually semiconductor). Vacuum tube or transistor circuits are used primarily for building up weak or attenuated pulses.

ANODE

41111-- ELECTRON FLOW NE013-20 NEO13-19 Figure247.DiodepositiveAND- or negative Figure 2-46. So lidetate diode symbol. OR-gate. 40 221 .2/.1

--11110 -10y 6.1y

-60V OUTPUT I+ OUTPUT MOM, -10y -lov -10y SOV

50V

=NM

A. NE013-21

Figure 2-48. Diode gate with both inputs -10 volts. diode to the output. The operation of the remembered that different computers use circuit depends upon the voltage drop across differentlogiclevel voltages to represent load resistor RL which, inthis case,is information. connected to a positive voltage source. More 5-8. The circuit in figure 2-48,A, shows inputs can be added, although only' two are -10 volts being applied to both inputs. In this shown. circuit,both diodes are conducting; thus, 5-7. Let us assume, for the exrlanation of both act as a short circuit for cunent. The the circuit shown in figure 2-47, that the logic output is therefore10 volts with respect.t6 levels are 0 volts and -10 volts. It should be ground for this condition. Figure 2-48,B,

OUTPUT -10V 1r ACTS CR2 AS SHOR T

ACTS AS CR1 50V -10V OPEN

A NE013-22

Figure 2-49. Diode circuit with one input -10 volts and one input 0 volts.

22Z OUTPUT OV

-50V

50V

MIIIM10.0110 011101110 001110 A NE013-23 Figure MO. Diode circuit with both inputs 0 volts. shows the equivalent circuit with both diodes the conditions are reversed. That is, CR1 acting as shorts and both batteries replaced by conducts and puts the anode of CR2 at -10 one -10-volt battery. volts. This causes CR2 to act as an open. The 5-9. Figure 2494, shows the same circuit output is - 10 volts for this condition also. with one input at 0 volts and the other at -10 5-11. When the - 10 volts is applied to volts. The initial difference in potential across either input and 0 volts applied to the other, CR2 is 60 volts, since the 50-voltsource and the conducting diode shorts out theopen the 10-volt source are now connected in series circuit. The result is an output of- 10 volts in aiding. Thus, CR2 conduct, and puts the either case. anode of CR1 at -10 volts with respect to 5-12. Figure2-50,A,showsthe same ground. This causes CR1 to act asan open, circuit used in figure 249 with both inputs at and the dutput is -10 volts for this condition. 0 volts. Both diodes are conducting, thus Figure 2-49,B, shows the circuit in simpliEed acting as short circuits. For this condition, the form. output is 0 volts. 5-10. If the - 10-volt input is applied to 5-13. From the preceding discussion, it is CR1 and the 0-volt input Is applied to CR2, possible to set up the deuice actiuity states or TABLE 2-3 TABLE 2-4 DEVICE ACTIVITIES STATES FOR CIRCUIT IN ACTIVITY COMBINATIONS FOR CIRCUIT IN FIGURE 2-47 FIGURE 247

Inputs Outputs Inputs Outputs . . A B C A B C

-10v -10v -10v L L L

-10v Ov -10v L H L

Ov -10v -10v H L L

Ov Ov Ov H H H

NDA6-40 NDA6-38 42 TABLE 2-5

TRUTH TABLE FOR CIRCUIT IN FIGURE 2-47 A USING POSITIVE LOGIC

I Inputs Outputs NE013-24 A B C Figure 2-51. Symbol for positive AND-gate. 0 0 0 during the handling operation. This is not objectionable as long as the operation remains 0 1 0 logical and consistent, and the desired end result is obtained. If a relatively high-voltag . 0 1 0 levelrepresents a binary1, the logicis referred to as positive logic. If a relatively 1 1 1 low-voltage level represents a binary 1, the logic is referred to as negative logie. NDA6-37 5-16. For the diode logic gate in figure electrical truth table for the circuit in figure 2-47, the 0-volt level is assigned the binary 2-47. This is shown in table 2-3. Refer to value 1, and the - 10-volt level is assigned the figure 2-47 to verify the truth table. binary value 0. The circuit is using positive 1 4. In computer terminology, a high (H) logic, and it is now possible to write a truth r.the less negative, or more positive, logic table for the circuit by substituting 1 for 0 level. A low (L) is the more negative, or less volts and 0 for - 10 volts. Table 2-5 shows this positive,logiclevel. For example, in the truth table. preceding discussion of the diode logic gate, 0 5-17. From thith table 2-5, you can see volts is the high (H) and -10 volts is the low that the circuit in figure 2-47 performs the (L). In table 2-3, substitute H for the high (0 AND function. That is, all bf the inputs must volts) and L for the low (-10 volts); then the be 1 to obtain an output of 1. Since the activity combinations table for the circuit will high-voltage level represents a binary 1, the be shown in table 24. function performed is called the positive AND 5-15. Remember,inthediscussion of function,andthecircuitis apositive information signals, that a computer may use AND-gate. Thegateinfigure2-47is either extreme of the logic levels to represent symbolized by the standard logic symbol for a binary 1 or a binary 0. The voltage level the positive AND function, as shown in figure which represents oneof thedigits may 2-51. The Boolean equation for this gate is become reversedin some of the circuits AB = C. 5-18. Consider the same circuit when a -10-volt level is assigned the binary value 1 TABLE 2-6 and a 0-volt level is assigned the binary value TRUTH TABLE FOR CIRCUIT IN FIGURE 2-47 0, i.e., negative logic. The truth table for this USING NEGATIVE LOGIC condition is shown in table 2-6. 5-19. From truth table 2-6, you can see Gutputs thatthecircuitnow performsthe OR Inputs function. That is, the output is 1 if any input or all outputs are 1. Since the low-voltage A B C , representsbinary1,thefunction level performed is called the negative OR function 1 1 3.

1 0 1

0 1 1

0 0 0 NE013-25 NDA6-42 Figure 2-52. Symbol for negative OR-gate. 43 2 9 VOLTAGE side indicates that the output terminal of the activated function is relatively low (L). 5-21. From the foregoing discussion, you can see that a single circuit may be caused to perform either the AND function or the OR function.Thefunction thatitperforms depends upon the assignment of the logic levels. The circuit that you have just studied A may be used as a positive AND-gate or a negative OR-gate. INPUTS 5-22. Diode positive OR-gate or negative AND-gate. We have discussed a diode logic gate that is capable of performing both the positive AND and the negative OR function. In contrast, the gate shown in figure 2-53 NE013-.26 erforms both the positive OR and the Figure 2-53. Diode positive OR-gate or negative negative AND functions. AND-gate. 5-23. How does the circuit in figure 2-53 differ from the circuit in figure 2-47? First, in and the circuit is a negative OR-gate. The gate figure 2-53, load resistor RL is connected to a is symbolized by the standard logic symbol negative power source, and, second, the shown in figure 2-52. The Boolean equation cathodes of the diodes are connected to the for the gate is A + BC. load resistor. 5-20. The small circle(s) at the input to 5-24. Again, for explanation of the circuit any symbol element (logical or nonlogical) in figure 2-53, we assume that the logic levels indicate(s) that the relatively low (L) input are 0 volts and - 10 volts. Figure 2-54,A, signal activates the function. Conversely, the shows the circuit with -10 volts applied to absence of a small circle indicates that the both inputs. Both diodes are conducting, thus relatively high (H) input signal activates the acting as short circuits for current. Therefore, function. A small circle at the symbol output the output is -10 volts for this condition.

10y 10y OUTPUT OUTPUT

140V

7:7 ov .1=MM 150V

INNI111101 .111

A NE013-.27 Figure 2-54. Positive OR/negative AND circuit with both inputs -10 volts. 44

2 ' )t) A/6 OV OUTPUT

CR1 ACTS 140V AS OPEN CR2 ACTS AS SHORT 411 -10V ---7-- -150V

.11111111110 IIIIIMIIIMIND 011.110 MAIO.

A B NDA6-59 Figure 2-55. Positive OR/negative AND circuit with oneinput 0 volts and one input -.10 volts.

OUTPUT OV 4 i Ow

150V -

= -150V

41 40111 OEM

A B NE023-29 Figure 256. Positive OR/negative AND circuit with bothinputs 0 volts.

226 A/7

TABLE 2-7 TABLE 2-9 DEVICE ACTIVITY STATES FOR CIRCUIT IN TRUTH TABLE FOR CIRCUITIN FIGURE 2.53 FIGURE 2-53 USING POSITIVE LOGIC

Inputs Outputs - Inputs Outputs A 8 C A B C -10v -1.0v -10v 0 0 0 -10v Ov Ov 0 1. 1 Ov -10v Ov 1 0 1 Ov . Ov Ov 1 1 1 NDA6-43 NDA6-34 Figure 2-54,B, shows the equivalentcircuit with both diodes actingas shorts and both the anode, it does not conduct. Thus, CR1 inputbatteriesreplaced by one -10-volt acts as an open circuit and the output ofthe battery. circuit remains at 0 volts. This conditionis shown in figure 2-55,B. 5-25. Figure2-55,A,showsthe same circuit with one input at 0 voltsand the other 5-26. If the -10-volt input is appliedto at -10 volts. The anode of CR1has -10 volts CR2 and the 0-volt input is appliedto CR1, applied to it, and the anodeof CR2 has 0 the conditions are reversed. Thatis, CR1 volts applied to it. Thismeans that initially, conducts and puts the cathode of CR2at 0 across CR2, there is a 150-volt difference, volts, and again the output of thecircuit is 0 whileacrossCR1 thereisa140-volt volts. Figure 2-56,A and B, showsthe same difference. CR2 conducts andshorts the circuit with both input levelsat 0 volts. Both output to 0 volts. This shorting actioncauses diodes conduct, and the output is 0volts. 0 volts to be felton the cathode of CR1. The -10 volts in series with CR1 5-27. From the preceding discussion,it is causes it to be possible to set up the device activity biased in its high-impedance direction.Since states or the cathode of CR1 is positive withrespect to electrical truth table for the circuitin figure 2-53. This information is shownin table 2-7. Substituting the high (H) for 0 voltsand the low (L) for the -10 volts results inthe TABLE 2-8 activity combinations for this diodelogic ACTIVITY COMBINATIONS FORCIRCUITS IN circuit shown in table 2-8. FIGURE 2-53 5-28. Consider the diode circuit in figure 2-53 when the 0-volt ltvel is assigned the logic value 1 and activates the circuit,and the Inputs Outputs -10-volt level is assigned the logic value 0and - istheinactivelevel;i.e.,positivelogic. A 8 C Substitution of these values intable 2-8 results in the truth table shown in table 2-9. L L L

L li H A

H I L H B H H H ) ) NE013-30 NDA6-33 Figure 2.57. Symbol for positive OR-gate. 46 2?-4 3

TABLE 2-10 A TRUTH TABLE FOR CIRCUIT IN FIGURE 2-53 c USING NEGATIVE LOGIC 8 Inputs Outputs NE01 3-31 Figure 2-58. Symbol for negative AND-gate. A B C

1 1 1 level is assigned the logic valueof 0 and is the inactivelevel.The truthtable for this 1 0 0 condition is shown in table 2-10.

1 0 5-31. From table 2-10, you can see that 0 the circuit now performs the ANDfunction. 0 That is, all the inputs must be 1 to obtain an 0 0 output of 1.Since the low-voltage level represents binary 1, the functionperformed is NDA6-4.1 called the negative AND function andthe 5-29. From truth table 2-9, you can seecircuit is a negative AND-gate. Anegative that the circuit performs the ORfunction. AND-gate is symbolized by the standardlogic That is, the output is 1 if any orall of thesymbol shown in figure 2-58. The Boolean inputs are 1. Since the high-voltagelevel equation for the gate is AB = C. performs the represents binary 1, the circuit 5-32. Again, a single circuit mayperform positive OR' function and is called apositive function. OR-gate. The gateis symbolized by the either the OR function or the AND OR The function that it performsdepends upon standard logic symbol for the positive the assignment of logic levels. Thecircuit that function,asshown infigure 2-57. The be used as a Boolean equation for the gate is A + B =C. you have just studied may positive OR-gate or a negative AND-gate. 5-30. Consider the same circuit when the level is assigned the logic value of 1 5-33. Transistor Logic Gates. Computers - 10-volt perform andis the activating signal, and the 0-volt also use transistor gate circuits to

-VOLTAGE _A _. ...mom* _4"--L

B 1-11.- D

NE013-32

Figure 2.59. Diode-amItransistor logic(DTL) circuit. 47

2 C...,) 6 .2/9

From the input and output waveforms,you can see that the output of the logic network is low only, when all of the inputsare low and is high when one or all of the inputsare high. A Therefore,itis a positive OR-gateor a Alum 2-80. Logic symbols for circuit.in figure 2-59. negative AND-gate. Figure 2-60,A,is the symbol for the positive OR-gate,and figure 2-60,B,isthe symbol forthe negative logical functions. Transistors have the ability AND-gate. Figure 2-61 illustratesthe same to amplify and axe used to keep a signal type circuit used asa positive AND-gate or constant through several gates. Transistors negadve OR-gate. The logic symbolsfor this may be connected inseries,psrallel, or circuit are shown infigure 2-62. Figure series-parallel to provide the logical functions 2-624,is of a computer. the symbol for the positive AND-gate, and figure 2-62,B, is thesymbol 5-34. There are several types oftransistor for the negative OR-gate. logic circuits whichare used for logic gates. 5-36. Instead of using the emitter-follower The type used will depend'upon the power as the output stage, a common-emitter or requirements, switching speeds, and cost. inverter circuit may be used. This circuit is These are the basic txansistor logic circuits: shown infigure 2-63. The circuitis an Diode-and-transistor combination logic invertedpositive OR-gate or an inverted (DTL). negative AND-gate. The logic symbols for this Resistor-txansistor logic (RTL). gate are shown in figure 2-64. Figure 2-644, Direct-couples transistor logic (DCTL). isthe symbol for the inverted positive OR-gate, and figure 2-64,B, is the symbol for 5-35. Diode-and-transistor logic gates. As the inverted negative AND-gate. we stated before, the diode logic gate does 5-37. Figure 2-65 shows the same type not amplify the signal; therefore, to keep the circuit used is an inverted positive AND-gate amplitude constant, a transistor is added to or an inverted negative OR-gate. The logic the output ,of the diode gate. Figure 2-59 symbols for this gate are shown in figure 2-66. shows a transistor used for this purpose. The Figure 2-66,A, is the symbol for the inverted diode gate and the transistor circuit (an positive AND-gate, and figure 2-66,B, is the emitter-follower) make up the logic network. symbol for the inverted negative OR-gate.

+ VOLTAGE

MINOMMON, OM.

NE013-34 Figure 241. Positive AND-gate or negative OR-gate circuit (DTL). 4822D a resistor gate and an invertingamplifier. Figure2-67shows this type of circuit. Resistors R1, R2, and R3 are of equal value. The logic levels are assumed to be 0 volts and the upper A I - 2 volts. If all the inputs are at NE4A6-83 level,or 0volts, the transistor will not conduct. The resistor values are such that, if one input is at the lower level of -2 volts, the Figure 2-62. Logic symbols for circuits in figure 2-61. transistor is driven into the saturation region. If more than one input is at the lower level, the transistor is driven more into saturation. 5-38. An AND-gate whose output signal is The output is inverted through the transistor. inverted with respect to the input signals is Thiscircuitperformsthenegative OR called a NOT-AND-gate or NAND-gate. The function or the positive AND function with circuits shown in figures 2-63 and 2-65 are an inverted output. The logic symbols for the examples of NAND-gates. The logic symbols gate are shown in figure 2-66. Note that the for the NAND-gates are the same as those logic symbols are the same for this circuit as shown in figures 2-64,8, and 2-66,A. for the circuit in figure 2-65.

5-39. An OR-gate whose output signal is 5-41. To perform the positive OR function inverted with respect to the input signal is or negative AND function with inversion,the called a NOT-OR-gate or NOR-gate. The circuit shown in figure 2-68 may be used. If circuits shown in figures 2-63 and 2-65 are any of the inputs are at the upperlevel, the examples of NOR-gates. Notice that these are transistor conducts. The resistors perform the the same circuits as the NAND-gates. The OR function, while the_transistor amplifies function the circuit performs depends upon and inverts. The logic symbols for the circuit the logic level used to represent 1. The logic are shown in figure 2-64. Hereagain, we have symbols for the NOR-gates are the same as two different circuits, shown in figures 2-63 those shown in figures 2-64,A, and 2-66,B. and 2-68, with the same symbols.

5-40. Resistor-transistor logic (RTL)gates. 5-42. Some resistor-transistor logic circuits A resistor-transistor logic circuit is made up of require the addition of RL networks, speedup

-VOLTAGE

=11.

NE013-36

Figure2-63. Common-emitter diode-and-transistorcircuit. 49

2 3u A A A 11 D II D 11 0 C C C

A I A . N1146-86 ADA6 71 Figure 2-64. Logic symbols for circuits in figures Figure 266. Logic symbols for circuits in figures 2-63, 2-65, and 2-72. 2-65, 267, and 269. capacitors, and diodes to make them work at 5-44. A parallel DCTL gate is illustrated in high frequencies. Therefore, they are more figure 2-69, This gate has three transistors complicated,lesseconomical,andless connected in parallel in a common-emitter efficient than diode logic circuits at these configuration. If all three inputs (A, B, and C) frequencies. However, when used with good are high, the output at D is low. However. if high-frequency transistors, they are useful in any one of the three inputs b low, the output high-speed computers. becomes high. From these facts, you can see thatthegateiseithera positive input 5-43. Direct.coupled transistor logic AND-gate with inversion or a negative input (DCTL) gates. Direct-coupled transistor logic, OR-gate with inversion. The logic symbols for as its name implies, uses direct coupling to this gate are shown in figure 2-66. transferalogicvoltagelevelfrom one transistor to another. Since these circuits use only transistors and resistors, their frequency 5-45. Ifinversionisnotdesired,an response is excellent. Logical functions can be inverter-amplifier may be added to the circuit. performed with small voltage changes when More transistors can be placed in parallel to DCTL circuits are used. The voltage swings provide more inputs, but there is a limit to may be as low as 0.2 or 0.3 volt. No the number because the sum of the leakage level-restoringcircuitry,such as diode currents, Ic 0 ,will increase to a point where limiters, is needed since the DCTL circuit sets the output voltage remains too close to the the upper and lower voltage levels. high-logic level.

+ VOLTAGE I _LF-1 FL

411 B

ir C ri Fi . NDA6-60 ../ Figure 2.65.Inverted positiveAND or negative Oltlogic circuit.

50 2 3 .i.'

- + VI VCC 0 VOLTS A 2 VOLTS s 0 VOLTS

2 VOLTS

0 VOLTS 2 VOLTS C Wv

0 0 VOLTS

2 VOLTS NE013-40

Figure 2-67. Resistor-transistor logic (RTL) circuit.

8 1\AMer-41

NDA6-87 Figure 2-68. Positive OR/negative AND circuit with inversion.

51 , s s 3

-3v IIoc1::::)C

A NDA6-85 Figure 2-71. Logic syhiholi for series DCTL gate shown in figure 2-70.

5-48. The direct-coupled transistor logic 14,013.42 circuit is simpleandhaslow-power Figure 2-69. Parallel DCTL gate. consumption. It also has disadvantages. The transistors and resistors must be kept within close tolerances. Noise voltages increase as the 5-46. A series DCTL gate consisting of two number of transistorsincreases.If many transistors -in series is illustrated in figure 2-70. If the inputs (A and B) are relatively high, the output is low. If either input is low, the output is stS1 low. If both inputs are low, the output is high. From these facts, you can see that the series gate is either a positive input OR-gate with inversion or a negative input AND-gate with inversion. The logic symbols for this gate are shown in figure 2-71. Figure 2-72. Logic symbols for an inverter or NOT Figure 2-714, is the symbol for the positive circuit. input OR-gate withinversion, and figure 2-71,13, is the symbol for the negative input AND-gate with inversion. transistorsare used, noise voltages are a problem. Since the transistors are operated at saturation, the switching speed is limited. 547.-Again, if inversion isnot desired, an inverter-amplifier may be added to the circuit. 549. NOT Circuits. A circuit that inverts More transistors may be placed in series, but the logic of a pulse or group of pulses is called there is a limit to the number because the a NOT circuit and is usually a simple inverter. voltagedropsacrossthetransistors add A plate-loaded triode or a grounded emitter together and reduce the voltage swing of the transistor amplifier constitutes a NOT circuit. output. A NOT circuit is frequently used to advantage in conjunction with other switching gates to change the polarity of the signal. -3V 5-50. Refer to figures 2-63 and 2-65. These circuitsusegroundedemittertransistor amplifiers to invert the outputs of the diode gates. In these cases, the amplifier part of the circuit is the NOT circuit. T,he logic symbols for an inverter or NOT circuit are shown in figure 2-72.

11.1114M *MD NSW 3 4 3

4.11 Figure 2-70. Serie* DC11 gate. Figure 2-73. Exclusive OR circuit. 52 233 TABLE 2-11 TRUTH TABLE FOR EXCLUSIVE OR CIRCUIT

Inpu t a Outputs

NDA6-79 B C. r..1A Figure 2-74. Logic symbol for exclusive OR-gate. ....m 0 0 0

5-51. Exclusive OR. The OR function 0 1 1 produces a specified result when any one or all of the input conditions are satisfied. Since 1 0 1 the OR includes all combinations as well as one-at-a-time inputs, it is called an inclusive 1 1 0 OR.All of the circuitsthat have been discussed which perform the OR function havebeeninclusive OR-gates.In digital NDA6-32 computer logic circuits, the OR function is always "inclusive" unless otherwise specified:-shown in figure 2-73. The logic symbol for an exclusive OR-gate is shown in figure 2-74. 5-52. A logical operation that produces an output when either input is present, but not 5-53. TheBoolean eiationforan when both inputs are present, is called an exclusive OR-gate is AB + IVBC. This says exclusive OR. A combination of AND- and that C is present when A or B is present, but OR-gates may be arranged to perform this not when both are present. A truth table for logical- function. Such an arrangement is this gate is shown in table 2-11.

53 234 .2.5-

CHAPTER 3

Computer Components

AS A COMPUTER repairman, you can expect Counting and keeping track of program to be exposed to several types of computer steps. components-7such as counters, storage Counting time (seconds, minutes, and registers, shift registers, decoders, converters, hours). encoders, and comparators. A review of these Providing a means of timing various units components is presented in this chapter. The such as a memory or arithmetic unit. circuitsthatMakeupthecomputer components discusied here are not necessarily the same as those used in the computer 1-2. Classification of Counters. Counters systemyouarepresentlymaintaining. areclassified by both circuit design and However, you shoaldn't have any problem in function. The two classifications of circuit understandingtheirfunctionaloperation, designareserialandparallel.The two because the majority of these circuits are functional classifications are up-counters and similar to those you studied during your down-counters. Counters are composed of formal electxonic and computer fundamental F/Fs and gates connected so that each F/F training. represents one place positionin a binary number (20, 22, 22, etc.). Refer to figure 3-1 NOTE: Inour discussion of computer for a basic counter comprised of three F/Fs. components, the figures presented are drawn The number of pulses required to recycle a with -the -leastsignificantdigit(LSD) counter is referred to as its modulus and is cote-Paint ori eithit the 'lift -01 -right. You normally determined by the number of stages can easilydetermineitslocatiohby (flip-flops) in the counter. This number is 2N , identifying the component in the figure that where N is equal to the number of stages in is activated by the input first. However, the the counter. In our basic counter shown in binary number represented by a specific figure 3-1, its modulus is eight because 23 figure will always have the LSD written to the (2N) is equal to eight. In other words, if this extreme right of the number. threstage counter were cleared (each F/F in its cleared state), it would take eight pulses to recycle the counter from 0 back to 0. Also, 1. Counters the maximum count of a counter is equal to 1-1. Thebasiccircuitusedinmost 2N -1. In the case of a three-stage 11.nary counters is a modified Eccles-Jordan bistable counter, its maximum count is equal to 23 multivibrator. Recall in your previous studies I or 7. These facts hold true for both parallel of multivibrators that they were referred to as and serial counters. flip-flops (F/Fs). By connecting several F/Fs 1-3. Serial Counters. These are the simplest together and controlling the input signals with ofcounterconfigurations,and theyare gates, we can design a circuit that performs a further designated as serial up-counters or counting operation in the binary number serial down-counters. Each time the input is system. M such they are referred to as binary triggered (clocked) in a serial up-counter, the counters. A binary counter is a device capable count in the counter is raised by one. Each of counting according to the binary system timetheinputistriggeredina serial and recording the number of events which down-counter, the count is lowered by one. have occurred. They are used to facilitate The advantageofserialcountersisthat converting pulse information into a usable minimum circuitry is required. The formwithindigitaldataprocessors and disadvantageis that theyare slow when computers. Some of their many uses include: compared to parallel counters. 54 233-, .2.24

Fr-I FF-2

20 21 22

NDA6-91 Figure 3-1. Basic counter.

14. ThetypeofF/Fusedinthe has felt an up-clock from F/F-A. The overall construction of a counter is one of the factors result is F/F-A has changed to the ONE state thatdeterminestheuseof the leading while all other F/Fs remain in the ZERO (up-clock) or the lagging (down-Clock) edge of state. The binary count in the, counter at this the trigger input to the F/F. As each pulse is time is 0001 or 1. The second input pulse applied to the counter, the stage of one or causes F/F-A to return to the ZERO state. more F/Fs is changed in such a way that the F/F-B receives a down-clock from A and binaryconfiguration ,represented by the changes from the ZERO to the ONE state. counter indicates the number of input pulses The overall result of the application of the received. Refer to figure 3-2 for an illustration second pulse is F/F-B transitions to the ONE of input clock pulses. state, and all other F/Fs are in the ZERO state. The count in the counter is now 0010 1-5. Serial up-counter. In a basic four-stage or 2. serial up-counter as shown in figure 3-3, each F/F represents a power of two. The counter has16differentstates,andwiththe 1-7. Table 3-1 shows the state of each F/F application of each input pulse it makes aafter a given number of input pulses. Note progressive transition from state to state. The that the count in the counter corresponds to sixteenth input pulse resets the counter to its the number of input pulses. Thus, when seven originalstartingstate. These features are pulses are inputted to the counter, F/Fs-A, -B, easily recognized from the waveforms shown and -C are in the ONE state, while F/F-D in the figure. Note that- -the.-F/Fs. in this remains in the ZERO state. This is the binary particularcounteraretriggeredwitha representation of 0111 or 7. down-clock. 1-8. Serialdown-counter.Normally,a 1-6. The output from each F/F in figure serial down-counter is preset to a specific 3-3 is taken from the ONE side and fed to the count, and asitistriggered the counter trigger input of each succeeding F/F. Before counts down from this preset configvration. the applicadon of the first input, well assume Refertofigure3-4 and note how the that the counter is cleared (reset) to ZERO. down-counter is wired as compared to the When a down-clock is applied to F/F-A, it up-counter. That is, the output is taken off of causes a transition from the ZERO to the the ZERO side instead of the ONE side. The ONE state. F/F-B is not affected, because it waveforms (representing the SET-side output

DOWNlir UP UP t DOWN CLOCK CLOCK CLOCK CLOCK

NDA6 -9 2

Figure 3-2. Up-clocks and down-clocks. 55 2 , .2.2. 7

INPUT T A T T C T D

2 3 4 5 10 11 INPUT =Mill j 12 13 14 15 16 g FLIPFLOP A OUTPUT 0 1 0 1 0 0 I 0

I s I I I I ; s 1 1 I FLIPFLOP B g) I 1 I 1 0I OUTPUT 1 1 0 1 0 0 I 1 j 1 I 1 I I 1 FLIPFLOP C s 1 0 1 g 0I0 OUTPUT 010I 1 1 1 I 1 ;0 0 1 s I 1. 1 1 1 I 1 I g FLIPFLOP D0 OUTPUT 0 0 0 10 0 I0 1 1 1 I 8 I 8 1 1 1 1 1

I s I I 1 Is I Is 1 TACIMAL 0 1 2 3 4 5 7 COUNT 6 9 10 '11 12 13 14

NDA6 -9 3 Figure 3-3. Serial up-counter end waveshapes. of the counter's F/Fs) indicate that whena F/F causes a transition in the FJF to which it F/F makes a transition fronk the ZERO state is connec ted. to the ONE state,the ONE-side output up-clocks andtheZERO-sideoutput 1-9. Consider our down-counter in figure down-clocks.Inour down.counter,the 3-4 as being preset to a binary count of 1100 down-clock from the ZERO-side output ofa (12 decimal). The waveforms indicate F/Fs-A and -B are in the ZERO state, and F/Fs-C and -D are in the ONE state. On the down-clock TABLE 3-1 of the first input pulse, F/F-A transitions to EQUIVALENT NUMBERS IN DECIMAL AND BI- the ONE state, B transitions to the ONE state, NARY NOTATION C transitions to the ZERO state, and F/F-D remains in the ONE state. The counter now NEMER 0? STATE OF FLIPFLO? containsthe binary count of 1011 (11 INECT PULSES A S C D decimal). Since the original number was equal

0 0 0 to 12 decimal, it is obvious that the counter 1 WM.0 0 down-counted by ONE. Check the waveforms 2 MIMI0 for our down-counter and note that the ImillE1NMI!KJ 4 0 0 counter reaches a count of ZERO with the 5 1pin.0 reception of the twelfth trigger's down-clock. 11.1.1ffininiMUBAMolimmigomMi r MIMIlitilN1111111111= 1-10. Speed limitation of serial counters. imigotmomKBLIMI 111111MillinMillaRig You will ilnd many serial counters used in 10 KIRAMI=um equipment in your career ladder. For the nowin11111101UM 11111ManioMIglIgliLANS most part, they are used when a clock-pulse 13 MI10.1MIINUIIIIIIIIIIIIMMININ rateis relatively low. To count high-clock tilMININM11111 WS rates, the parallel counter is used, since the 13 1. 0311 1 1 0 KARIM caw parallel counter eliminates the problem of 1111111111E11MMMIeillailMilaiallem 1 1 , . COOT STARTS OVER propagation time (time delay through a series 1 of stages).

56 2374 2,24

INPUT T A B T C I....WW1 T o

0 .6

1 2 3 4 5 6 7 a 9 10 INPUT -

s 1 I 1 ; I

FLIPFLOP A 0 ONE SIDE OUTPUT i o i o 1 0 1 .2..i 1 L I 1 I I e i s I I i FLIPFLOP A ZERO SIDE OUTPUT

..wwWWISMWEINWI s HeLI1

FLIPFLOP B I 1 0 0 o o ONE SIDE OUTPUT CI 1 I I

1 1

1 FLIPFLOP B 1 ZERO SIDE OUTPUT 1 1 I I 1 I s 1 i FLIPFLOP C 1 0 0 I 0 0 I I 1 1 ONE SIDE OUTPUT I I I i I 8 e I I 1 I I FLIPFLOP C e I $ I ZERO SIDE OUTPUT 1 F-7 e I 1 1 1 1 I 1 FLIPFLOP D 8 I 1 i 0 I o 1 o o ONE SIDE OUTPUT 1 1 1 1 I I 1 I I I I I 1 I I 1 I FLIPFLOP 0 I 1 I I ; ZERO SIDE OUTPUT 1 1 1 I 1 I I I 1 DECIMAL COUNT 12 11 10 a a 7 6 5 4 3

NDA6-94 Mort 34. Serial dowel-counter.

2 :3 s 2:2-1

-00

INPUT T A T B T C T D

140-- 3us-01 .11

CP4 CP5 =sor

pSEC I uSEC PSEC I laSEC NDA6 -95

Figure 3-6. Count detection.

1-11. Tounderstandwhytheserial count from 3 to 4, causing F/Fs-A, -B, and -C counter is too slow, look at figures 3-3 and to change state. Since it requires 1 psec to 3-6.Infigure3-3,thewaveformsare change the state of F/F-A and 1 psec to idealized; that is, the F/Fs are shown changing change the state of F/F-B, F/F-C will receive state instantaneously. This is not true, since the down-clock from F/F-B 1 psec prior to some measurable time is required to flip a the arrival of:the next clock pulse (3 psec - 2 stagefrom onestatetoanother.For psec = 1 pset). These facts are illustrated by explanation purposes, assume that the time the hypothetical waveforms shown in figure between down-clocks of the input pulses is 3 3-5. psec, and that it takes 1 psec to change the 1-12. The computera.component illustrated state of a F/F. Locate input pulse 4 in figure in figure 3-5 shows how a count of 4 (AB CD) 3-3. The down-clock of this pulse changes the could be detected by a positive AND-gate. 58 2 33 2.3 0 The waveforms in the figure also show thatpropagation time. At the clock rate used in the HIGILoutput (E) from the AND-gate at this explanation, and with F/Fs that require 1 the count of 4 is extremely narrow. This ispsec to change state, itis apparent that a caused by the propagation time established limited number of F/F stages can be serially for our explanation. Note that the HIGH connected. The solution to this problem of output from the AND-gate occurs just as the propagation time isthe use of a parallel fifth input pulse down-clocks, and this same counter. down-clocksetsF/F-A which completely 1-14. Parallel Counters. An advantage of disablesthe AND-gate 1 gsec later. The parallel counters over serial counters is speed short-tune duration of the AND-gate's HIGH in operation. This speed is a direct result of output is not normally a desirable feature. applying input trigger pulses, through gates, 1-13. Continuing our discussion of to each stage of the counter simultaneously. propagation time, refer to the waveforms in Consequently, more circuitry is required and figure 3-3 again. At a count of 8, all F/Fs more power is consumed in a parallel counter change state. Since F/F-D does not receive a than in a serial counter. Parallel counters are down-clock until 3 psec after the clock pulse, also used as up-counters or down-counters. F/F-A could be triggered for count 9 (1001) 1-15. Parallel up-counter. A basic before count 8 (1000) could be performed by three-stage parallel up-counter is illustrated in .611nOr the counter. As a result, count 8 would be figure 3-6. For our discussion of its operation, missed.Again, thisiscausedbythe we'll assume the counter is cleared and each

INPUT A T 5 c

emalsi

2 TO NEXT STAGE 111 A., 1

1 2 3 4 5 6 INPUT -1_1-1_1'L..._ I i

FLIP-FLOP A 1 o 1 1.2_

I 1 t ----.:.. 1 1 FLIP-FLOP 51 0 i 1 I I I 1 FLIP-FLOP C 0 0 I r -...... t

5 6 DECIMAL COUNT 1 2 ND.A6 96 Figure 3-6. Parallel up-counter. 59

24,, F/F is triggered on the down-clock. The first causing itsoutputtoup-clock.The input pulse is applied to the input of F/F-A down-clock of this fourth input pulse clears and to one leg (input) of positive AND-gatei F/F-A, deconditions AND-gates 1 and 2, 1, 2, and 3. The other inputs to these gates causing their output to down-clock which, in are from the SET side of the counter's F/Fs. turn, clears F/F-B and sets F/F-C. The binary The end result Gf this first input pulse is that count in the counter is now 100 or 4. F/F-A gets set (ONE state), which, in turn, 1-16. Asthe number of input pulses places a HIGH on one leg ot the three increases, the count in the counter promsses AND-gates. The up-clock of the second input until a maximum count of seven (111) is pulse coneitions AND-gate 1 and causes its reached. The next pulse (the 8th) causes the output to up-clock. The down-clock of this same pulse clears F/F-A (ZERO state) and counter to clear all ZEROS. deconditions AND-gate 1, causing its output 1-17. Parallel down-counter. The function to dovm-clock; and this down-clock causes of this counter isthe same as the serial F/F-B to get set. The binary count in thedown-counter. That is,the count in the counter is now 010 or 2. The down-clock of counter is decreased by one each time an the third input pulse sets F/F-A. The binary input pulse is applied. However, t.he parallel count in the counter is now 011 or 3. The down-counter operates at a faster speed than up-clock of the fourth input pulse provides the serial down-counter, but it uses more the final conditioning level for AND-gate 2, circuitry to do so. Figure 3-7 illustrates a

2 TO NEXT STAGE

5 6

INPUT

FLIP-FLOTA 1

FLIP-FLOP B 1

FLIP-FLOP C 0

DECIMAL COUNT 4 3. 2 1 NDA6-97

Figure 3-7. Parallel down-counter. 60 24 TABLE parallel down-counter with theassociated OF waveforms for theinput pulses and the ADVANTAGES AND DISADVANTAGE:- SET-side outputs of the flip-flops. Noticethat SERIAL AND PARALLEL COUNTERS the difference between this counterand the up-counter in figure 3-5 is thatthe AND-gates TYPES OF COUNTS.RS j are conditioned by theCLEAR-side output of SERIAL PARALLEL the F/Fs. - 1-18. Advantages andDisadvantages of SPEED SLOW VAST SerialandParallelCounters.Table3-2 summarizes a comparison of serial andparallel PROPAGATION ME LONG SHORT standpointoftheir countersfromthe me LEX advantages and disadvantages.Basically, this CIRCUITRY SureLE table brings out the fact thatthe reaction time from one count toanother is much COST LOW HIGH than in a serial faster in a parallel counter POOR GOOD counter. However, thisadvantage is at the ECMIIII circuitry and high power expense of more POWER LOW requirements.Anotheradvantageofthe 11:01 parallel counter is that propagationtime is NDI16-09 F/F; equal to the transient time of one Example: A six-stage down-counter whereas, inserial counter, this time is equal contains a binary configuration of to the sum of the transienttime of all F/Fs input pulse. 0001000 or 4(10). After 75 input pulses that change state with a given are applied, what is the new countin the 1-19. DeterminingCountinCounter. counter, and how many times hasit There may be times on yourjob when it will become necessary for you todetermine the cycled completely through all c3unts? down-counter 4 71 count in an up-counter or a Solution.Is 75 1 cycle after a given number of inputpulses are 2N 2c 64 applied. Use of the formulasbelow should and R of 7. help you to perform this task. 2N R = 7 = 64 - 7 = 57. 1-20. Up-counters: Result: The new binary configurationin which is P the counter is equal to 111001 Cd number of counter cycles + ft (remainder). 57(io) Pa number of pulses to be applied. 1-22. Modulus Counters. Binarycounters C,a the original count in the counter. that are modified to have a modulusthat is 224 n the modulus of the counter.Recall not a power of 2 are calledmodulus counters, this is equal to the number of pulses mod counters. In this required to recycle the counter or simply referred to as (N number of stages in the counter). section, we will discuss twomod counters: Ra the new count in the counter. the mod 12 and the mod 10. 1-23. Mod-12 counter. Figure 3-8 Example: A five-stage up-counter illustrates a mod-12 counter. It is afour-stage contains a binary count of 10100 or series up-cotinter which has beenmodified to 20(10).After20inputpulsesare block F/F-C from receiving countsafter the applied, what is the new count in the count of 8. Since this F/F represents22 = 4, counter, and how many times hasit disabling it removes foUr countsfrom the cycled completely through all counts? maximum count capability of thecounter. We P + Cc 20 + 2040 know a four-stage binary counterhas a Solution: = =32= 1 cycle modulus of 24 = 16. Therefore,this modified 2N 25 4 = 12. Thus, and R of 8. counter has a modulus of 16 - it is named mod-12 counter. Result: The new binaryconfiguration in blocking gate. the counter is equal to01000 which is 1-24. AND-gate 2 is the AND-gate 1 permits F/F-C tobe bypassed 8(10) when it is no longer functioning as acounter 1-21. Down-counters: stage, thereby removing fourcounts from the maximum capability of the counter.Until the P - C, count of 8 is reached, F/F-Dis in the ZERO in number of countercycles + R. conditions one leg 2N state and its ZERO output down-clocks from 2N - R a the new count in the counter. of AND-gate 2; thus, all 61

2 r,1e F F -A

1 2 3 4 5 6 7 9 10 11 12

CP1111FLP CP COUNT 1 0 0 0 1 2 0 0 1 0 1 0 1 1 0 1 0 1 0 A...171 0 0 3 0 0 11 4 0 1 0 0 5 0 1 0 1 6 0 11 0 a 0 1 0 L 7 0 1 1 1 8 1 0 0 0 9 1 0 0 1 0 10 1 0 1 0 1 1 1 0 11 12 0 0 0 0

NDA6 -9 8 Figure 3-8. Mod-12 counter (count blocking).

F/F-B hre permitted to pass through the gate counter counts seven pulses exactly like a and trigger F/F-C. Also, up to the count of 8, serial up-counter. At the count of 7, it holds the ONE side of P/F-D is LOW, keeping the binary configuration 0111. When the 8th AND-gate 1 decoraditioned.Fromthe clock pulse arrives, the counter jumps to the waveforms and the table shown in figure 3-8, 1100 binary configuration, which is equal to you can s,.le that the counter functions as a decimal 12. Thus, only four more pulses are normal serialup-counter, up to count 8. required to reset the counter to ZERO. With Clock pulse (CP) 8 sets F/F-D to the ONE the reception of the 8th CP, the following state,deconditioningAND-gate2and actions take place: conditioning AND-gte 1.F/F-Cis now F/F-A flips to the ZERO state, sending a blocked and cannot count. F/F-A and F/F-B down-clock to F/F-B. change state to provide the counts of 9, 10, F/F-B flips to the ZERO state, sending a and11.Upon receipt of CP-12, F/F-A down-clock to F/F-C. down-clocks, triggering F/F-B to the ZERO F/F-C flips to the ZERO state, sending a state. The down-clock from F/F-B passes down-clock to F/F-D. through AND-gate 1 and triggers F/F-D to the F/F-D flips tc the ONE state, sending a ZERO stwTherefore, the counter is reset to down-clock from its ZERO side to the 0000 upon receipt of the 12th clock pulse. SET input of F/F-C. This resets F/F-C to The down-clock from the ONE side of F/F-D the ONE state. couldbefedtoothercircuitsinthe equipment to indicate that 12 pulses were 1-26. From this discussion, you can see counted. that the counter actually reaches the count of 1-25. Another method of mod:fying a 8 momentarily, but before another CP arrives, binary counter for a modulus of 12 is shown the counter is set to a count of 12. Thus, in figure 3-9. Instead of blocking four counts, count 8 becomes 12; count 9 becomes 13; this counter adds four counts. Notice that the count 10, 14; count 11, 15; and count 12 62 .23 1

FF-D F F -A F F -8 FF-C -- - OUTPUT CP 110--T

12 6 7 0 9 10 11 1 2 3 4 5 DECIMAL CP COUNT EQUIVALENT CP 1 1-11-111-1 1 0001 2 0010 2 1 1 0 3 0 1 0 1 0 0 5 0011 1 0 1 A 4 0100 4 5 0101 5 6 0110 6 1 1 0 0 1 1 0 a 1.0 7 15 0 1 1 7 0111 8 1100 12 9 1101 13 14 1 1 1 0 W 1110 1 1 1 1 C 0 0 0 1 11 1111 15 12 0000 0

0 1 1 1 1 [0._ 0 0 0 0 0 0 0 NDA6 9 9

Figure3.9. Mod12 counter (countadding). and the voltage from resetsthe countertoZERO. When the the ONE side up-clocks counter resets to ZERO, the ONE-sideoutput the ZERO side down-clocks.function as an of F/F-D down-clocks. This down-clockcould To make this circuit up-counter,thetriggerfor each F/Fis be fed to other circuits in the equipment to ZERO sideof the indicate that 12 pulses have been counted. obtainedfromthe 1-27. Mod-10 (decimal) counter. A preceding F/F. mod-10 counter is normally called adecimal 1-29. To clarify these facts,the waveforms counter since it counts to 9 and resets on the for both outputs of each stage areshown. The 10th count.The method of developing a waveforms A, B, C, and Drepresent the mod-10 counter is similar to thatdescribed ONE-side output of the F/Fs.AND-gate 2 is for a mod-12 counter. In the mod-10counter, the blocking gate. It passesthe trigger pulses either six counts must be blocked orsix from F/F-A as long as F/F-Dremains in the counts must be added. This is truebecause ZEROstate.However, when F/F-D is the basic counter itself is afour-stage binary triggered to the ONE state(with CP-8), its. counter which has a modulus of 16. ZERO-side output goesHIGH,which 1-28. Figure 3-10 shows a simplemod-10 deconditions AND-gate 2. WithAND-gate 2 counter using the pulseblocking method. In deconditioned, F/F-B and F/F-C areblocked this counter, F/F-B and F/F-C areblocked fromfurthercounting.AND-gate1 is from receiving counts afterthe count of 8 is abypass gate that enables F/F-Band F/F-C reached. This counter isdrawn in negative to be bypassed whenthey are blocked by logic. Before discussing howit counts, let us AND-gate 2. facts about the establish several pertinent 1-30. The counter counts thefirst seven circuit operation. trigger on the clock pulses as a simple serialup-counter. fil The counterflip-flops CP-8 triggers F/F-D to the ONEstate, which down-clock of the applied pulse. ONE; a deconditions one leg of AND-gate2 and A LOW voltage reprvsents a conditions one leg of AND-gate1. F/F-B and HIGH voltage represents a ZERO.Therefore, count. ONE state, F/F-C axe now blocked and cannot when a flip-flop switches to the CP-9 triggers F/F-A to the ONEstate. The the voltage from the ONEside down-clocks, the ZERO side binary configuration in the counteris now andthevoltagefrom 1001 or 9(10). CP-10 triggersF/F-A to the up-clocks.Conversely,whenaflip-flop down-clocks. switches to the ZERO state, thevoltage from ZERO state, and its output 63 2. 3.r 0 ANC, 1

FF-A FF-S FF-C FF -0

C 1

-0C 0 OUTPUT

21 22 23

6 7 jIO 11 12 13

CP OUNT 1 0 1 0 1 011101110 1 001 2 010 3 511 4 100 5 151 6 110 7 111 I 1000 a0 o 1 10 0 0 0 1 I to 9 1001 10 9000

c0 1 1 0 0 0 0 0 0 II

0 0 oo oo71 Iijo 0 0 0 0

NDA6-100 Figure 3-10. Mod-10 countkr (count blocking). Now, this LOW from the ZERO side of F/F-A F/F-A and see how it is designed to follow conditions the other leg of AND-gate 1, r.nd this pattern. its output down-clocks which, in turn, triggers 1-32. In order to make F/F-A change state F/F-D to the ZERO state. Since F/Fs-A, -B, every two counts, the basic CP is fed to the and -C are also in the ZERO state, the count control flip-flop, and that F/F develops the inthe counterisnow equaltozero. CP for F/F-A. Since a F/F divides by two, the Therefore, the counter is a mod-10 counter. control F/F triggers F/F-A every two pulses. 1-31. Gray Counter. This type of counter This means that F/F-A is forced to follow the counts pulses and provides outputs that are pattern indicated by the least significant coded in gray code. Figure 3-11 Wustratea acolumn of the code table in figure 3-11. gray counter, its associated waveforms, and a F/F-A changes state each time a down-clock is code table. The right-hand column of thisreceived from the control flip-flop. The table representsthepattern followed by control F/F is initially set to the ONE state F/F-A. Note that F/F-A is in the ONE state by a clear pulse. The first CP triggers the for two counts, then the ZERO state for two controlF/FtotheZEROstate;it counts, then returns to the ONE state for two down-clocks, which, in turn, triggers F/F-A to counts. This pattern is continued for as many the ONE state. This means F/F-A is set to the counts as the counter holds. Let's look at count of 1 with the first CP. 64 2 I 3- 2-34 CO911t0I. FF-0 FF-A Flr-11 FF-C TTL s ^

AND 3 ANO 1 ANO 2 ^

CLEAR

2 4 3 I 1O 11 12 u CP CODE 001 1 011 I I I I I I 2 ri I f1-11 3 010 110 5 I I I C00171101. 101 7 100 1100 0 0 1 1101 A 1 1 0 ItOolio 10 I 111 11 1110 12 1019 11 I I I 1 (0 0 0 I I 1 1 0 0 0 13 1011 14 1001 13 1000

I 1 1 I 0 0 0 0 11 00!II

0 0 0 0 0 0 O1 1 1 1 1 1 1 NDA6-101 Figure' 3-11. Bajc gray counter.

1-33. Now look at the next columnto the flip-flop) to pass through until the countof 3. the At the count of 3, the pulsefrom the ZERO left of the LSD column. It represents At the pattern followed by F/F-B.Notice that F/F 3 side of the control F/F is up-clocking. goes to the ONE state onthe second count count of 4, the conditions tothis AND-gate and remains in that state forfour counts. do not change, but the pulsefrom the control Then it goes to the ZERO statefor four F/F is a down-clock and F/F-C is setto the for fourONE state. The conditionthatsatisfies counts, then to the ONE state eightcounts; counts, and continues to repeatthispattern. AND-gate2occursevery designectto follow therefore, F/F-C changes state everyeight Let-us see how this F/F is counts. Now look at the timingwaveforms this pattern. until and note that F/FC cannot changestate at 1-34. F/F-B cannot change state is changing F/F-A isin the ONE state. Therefore,it the same time F/F-A or F/F-B cannot be set to the ONE state until thefirst state. pulse has been counted by F/F-A.Since 1-37. You should be able to figureout F/F-B is clocked by the ZERO-sideoutput of F/F-D's pattern and see how that patternis the control F/F, it cannot changestate at the accomplished by the counter. Look atthe same time F/F-A changesstate. Now look at waveforms; notice that only one stageof the the timing waveforms andnotice that F/F-B counter(disregardingthecontrolF/F) changesstateinthecenter of F/F-A's changes state from one count to thenext. positive-going waveform. This, of course, is the primaryadvantage of 1-35. Now look at the secondcolumn to gay code over binary.That is, from one the left of the LSD column.This represents count to another only one digit changes. the pattern followed by F/F-C. Noticethat F/F-C goes to the ONE state at thecount of 1-38. Ring Counters. A type of counter in four and remains in the ONE statefor eight which only one stage of the counter is in the counts. Then it goes to theZERO state for ONE state at any one time is called a ring repeat this counter. This type of counter doesnot eight counts, and continues to provide an output that is identifiable as a pattern.Let us see how this flip-flopis designed to follow this pattern. particular code, such as is provided by a 1-36. F/F-C cannot change stateuntil binary counter or a gray counter. Instead, a F/F-A is in the ZERQ. state and F/F-B is in ring counter provides a "one-shot"indication. the ONE state; therefore, AND-gate 2 doesn't Thatis,only one output line from the permita clock pulse(from the control counter is energized at any one time. 66 437

1-39. Figure 342 shows a simple ring 2. Storage Registers counter. It is designed in the fon-n of a closed 21. Inall computer systems, there -:.5a loop; that is, F/F-D (the last stage) feeds'6ack need to temporarily store information derived to the input stage to automatically start the from one functional block until it can be used count over. Not all ring counters function in by another functional block. This function is this manner. Some ring counters count from a performed by storageregisters. A storage preset point and must be reset before starting register is capable of storing one assembled over again. unit of information. This unit of information 1-40. Assume that F/F-D is in the ONE is known as a word, message, or character, state; thus, its output is HIGH, indicating that depending upon the vocabulary used with a four pulses have been counted. The next CP, particular equipment. The ability of a storage CP-1, on the start of a new count, passes register to store one unit of data is in contrast through AND-gate 4 and sets F/F-A to the to bulk storage systems. These systems are ONE state and F/FD to the ZERO state. Line normally referred to as memories and are A is now HIGH, indicating that the counter covered in Chapter 4 of this volume. holds a count of one. The pext clock pulse, 2-2. Functions of Storage Registers. The CP-2, passes through AND-gate 1 to set F/F-A functions performed by storage registers are to the ZERO state and F/F-B to the ONE as follows: state. Line B is now HIGH, indicating that the Temporarystorageof oneunitof counter holds a count of two. The next clock information. pulse, CP3, passes through AND-gate 2 to set Conversionof serialbinarydata to F/F-B to the ZERO state and F/F-C to the parallel binary data. ONE state. Line C is now HIGH, indicating Conversion of parallel binary data to that the counter holds a count of three. The serial binary data. nextclockpulse,CP-4,passesthrough Time buffering between two devices AND-gate 3 to set F/F-C to the ZERO state operating at different speeds. and F/F-D to the ONE state. Line D is now HIGH, indicating that the counter holds a count of four. 2-3. Devices Used as Storage Registers. Any two-stage device can be used to store one 1-41. The counter has now progressed bit of information. Thus, any storage register through a complete cycle. Only one stage was can be constructed simply by assembling the inthe ONE stateat any one time. This number of two-state devices needed to store four-stagecounterhasthe capabilityof the number of bits in the unit of data. Two counting only four pulses. Consequently, the types of these two-state devices discussed here counter stages do not represent the place are the flip-flop (F/F) and the bimag core. position of any number system; instead, each Our discussion will be confined to flip-flop stage represents a number. and bimag core registers.

I 2

A c

I-- 5 S I IL S - FF-A FF-B FF-C o --C 0 -C 0

rc .. re .11 4

2 ^ 3 4 1)- (

CP NDA6-122 Figure 3.12. Closed ring counter. 66 2 ..1, -,- .2 3

COUNTER TRIG. IN FF-A FF-C FF-B 0 0

3 STORAGE FF-F FF-E REGISTER

TRANSFER PULSE REGISTER OUTPUTS

8 5 6 7 2 3 4 TRIG... 0 0 0 FF-A 1 7 FF-8

FF-C

TRANSFER ri

FF-0 0

0 FF-E

FF-F 0 NDA6-102

Figure 3-13. Parallel-in/paralleloutregister. provided Register. This amount ofinterchangeability 2-4. Parallel-In/Parallel-Out between the register and counterF/Fs within is a register that provides temporarystorage a particularequipment. The register F/Fsin between twofunctional blocks that use at each input. parallel data and accepts data inparallel and figure 3-13 have an AND-gate This is typical of mostmultime F/Fs. In our transfers data out in parallel. Atypical use of consists of F/F-A, this type of register is shown infigure 3-13. In illustration, the counter F/F-B, and F/F-C; the storageregister consists this logic circuit, the content of thecounter is F/F-F. Notice that the sampled at the time the equipment generates of FIF-D, F/F-E, and ONE and ZERO side ofeach counter F/F is a transfer pulse.The register stores the count CLEAR input of and transfers it to using circuits whenneeded. connected to the SET and theirrespective register F/Fthrough 2-5. Thereare manyconfigurations of second input to F/Fs.and gates that are used tomake up this AND-gates 1 through 6. The each of these gates is thetransfer pulse. same type of register.The exact configuration just after the used depends to a large extent uponthe 2-6. If a transfer puise occurs 67 *V'

a a _

TRANSF ER _t__It I _1 ...... imp. 1 TRANSFER TRANSFER TRANSFER s 5 6 GATES GATES CA TES _ _.J

4 A _s - 2 1 - - 7 t FF-C FF-S _ F i A

C 3 s 0 $ 10

SHIFT fi , INPUT (FROM TRANSFER GATES1 RIGHT SHIFT

1 \ H HI I E3 ISR RSR V SERIAL OUT SR 13) I SERIAL OUT

NDA6-103

Figure 3-14. Parallel-in/serial-out register. N ) counter reaches a binary count of 101, the new count from the counter, it changes the outputs of the ONE side of F/F-A and F/F-C state of the register F/Fs to represent the new are HIGH, which conditions oneleg of count. Since the transfer gates sample both transfer AND-gates 1and5,respectively. sides of the counter F/Fs, no clear pulse is When the transfer pulse occurs,it passes needed to clear the register of old data prior through these transfer gates and sets F/F-D to the transfer in of new data. Note one other and F/F-Ftothe ONE state.Transfer feature of this circuit: The transfer pulse is AND-gate 4isconditioned by the HIGH delayed slightly with respect to the pulses output trom the ZERO side of F/F-B; counted by the counter. This allows the therefore, the transfer pulse passes through counter F/Fs to assume a stable state between this gate to set F/F-E to the ZERO state. The count states prior to transfer. binary. count of 101 has now been transferred 2-8. Parallel-In/SerialOutRegister. Most to the storage register without affecting the digital operations are carried out in parallel counting of the counter. The count stored in circuits.Therefore,whenallnecessary the storage register is now available for use by operations result in an answer that is in binary other circuits within a computer system. That form, that binary number of configuration is is, the voltage levels available at the ONE and normally in a parallel register awaiting use. If ZERO outputs of the storkge register could be this number is to be used to actuate print fed to count detection matrices, hammers to print out the informationit digital-to-analogconverters, or any circuit represents, or ifit is used to position the that needs this particular count to perform a beam of a CRT to display the data as a radar specific function. Note from the waveforms in picture, it is usually transferred in parallel to the figure that this count remains in the decoders or digital-to-analog converters. When storage register until another transfer pulse is the data must be transmitted over telephone generated to read in a new count. lines or microwave links to another computer 2.7. When another transfer pulse reads in a system, it must be converted from parallel to 68 24,; 240 finds AND-gate l I serialform. This conversionis made by c. The third shift pulse disabled(F/F-Ais now cleared) and the parallel-in/serial-out registers: third time illustrates a register output becomes ZERO for this 2-9. Figure 3-14,A, period. thatacceptsdatainparallelthrough AND-gates 1 through 6, and shifts it out serially, bit by bit, through AND-gate 11.The 2-12. The application of the three shift actual storage register is composed ofthree pulses has placed the binary configuration F/FsA, B, and CAND-gates.7 through 10, 011 onto the serial line. Note that theshifting and OR-gates 1through5. Normally,in process cleared the register toall ZEROS. practical circuits, these OR-gates are part of 2-13. Serial In/Parallel-Out Register. When the flip-flop and are not shown onfunctional data is to be transmitted over relatively long diagrams. By showing themasseparate distances, it is uneconomical to use a line for functional circuits, we hope to give you a eachbitina binary configuration asis clear picture of the oPeration of the register. requiredforparalleltransferofdata. Figure 3-14,B, depicts the register as itis Therefore, data beingsent away from a shown in simplified MIL-STD 806B logic. facility is normally transferred serially in a in paragraph operation. For an manner similar to that described 2-10. Transfer 2-11. The equipment that receives this serially explanationof thetransferaction,let's configuration 011 is transmitted data must accept it bit by bit as it assume that the binary and, once received, transferred to the storage register. This means comes in on the serial line, the transfer gate input lines A, B, andC are this serial data must be conv6rted to parallel data for use in parallel operations. To perform HIGH. When the transfer pulse is applied to conversion, a AND-gates 1through6, the output ofthis serial-to-parallel AND-gates 1, 4, and 6 goes HIGH. These serial-in/parallel-out register is normally used. HIGH levels are, in turn, applied to OR-gates A typical register of this type is illustrated in 1, 2, and 4. When the transfer pulseis figure 3-15. it is designed to accept a three-bit removed, a down-clock is felt at the CLEAR word in serial form and, when the total word (C) input of F/F-C and the SET (S) input of is in the register, transfer it to theparallel F/Fs-A and -B. Therefore, the storage register storage register. Circuits of this type normally now contains the binaryconfiguration 011. have more than three stages; however, if you Now let's shift this data out of the storage understand how three stages work, you'll understand the operation of registers with register. 2-11. Shifting operation. Three shift pulses many stages. are required toshift the binary configuration 2-14. Look at the waveforms in our figure, 011 out of our example register.The action and notice that the serial data inputconsists that occurs as a result of each shiftpulse will offivethree-bitwords,with each word be discussed separately. containing bits DO, D1, and D2. Serial data is applied to F/F-D2 via AND-gates 1 and 2. The a.First shift pulse: input to AND-gate 2 is inverted by inverter Passes through AND-gate 11 as the first ; thus, the output of theinverter is referred ONE bit in the serial data. to as DATA. DATA provides aconditioning Passes through AND-gate 9 and OR-gate level to AND:Late 1 whai the data bit is a 4 to keep F/F-A in the ONE state. ONE, and DATA provides a condition-level to Passes through AND-gate 8 and OR-gate AND-gate 2 when the data bit is a ZERO. A 3, which flips F/F-B to the ZERO state. shift pulse is applied simultaneously to all Passes through OR-gate 1 toinsure register input gates. The down-clock of the F/F-C is in the ZERO state. The shift shift pulse occurs in the middle of the data register now contains the binary number shift-intooccur. A 001, and a ONE has been shifted out of pulsewhich causes transfer pulse occurs following the AND-gate 11 onto the serial output line. down-clock of every third shift pulse. Now let's shift each bit of word 1 in serially and b. Second shift pulse: Passes through AND-gate 11, as F/F-A is then transfer the word to the storage register still in the ONE state, and becomes the in parallel. second ONE bit on the serial output line. 2-15. Shift-inoperation. Thefirstbit Passes throughAND-gate10and appliedisDO whichisalogic ZERO. OW-gate 5 which flips F/F-B to the AND-gate 2 is conditioned by DO and the ZERO state. SHIFT PULSE. At mid-clock time, the shift The shiftregister now containsthe pulse down-clocks, the oatput of AND-gate 2 binary number 000. goes negative, and F/F-D2is cleared (set to 69 SssiT GIST g

$1.111T 1CLOCK1

TTIL/0111111

TO OAT 111COCTUTION OATH

'3:10 110 f0:0 W0:0 -040-- .00 slew. 0*T CS 01 03 0 DI 03 DS 01 03 ochs* 00 1 II 11111 I1 (CI II 11) (0) tip (II

OlOci IS 11 I) Is IL 'MKT Ir (CLOCK) FY-- *no. 03

Tem111110 KuLSK O.

TT 1

IS *0:0 *0:0 *0:0 0:0 NDA6 10 4

Figure 3-15. Serial-in/parallel-out register. the ZERO state). Bit DO, a logic ZERO, is output of F/F-D2 and the third shift pulse. now storedinF/F-D2. AND-gate4is AND-gate 3's output also goes negative with conditioned by the ZERO-side output of the down-clock of the third shift pulse which F/F-D2 and the second shift pulse. At the sets F/F-D1 to the ONE state. The third data down-clock of this second shift pulse, the bit, D2, is a logic ZERO; therefore, F/F-D2 is output of AND-gate 4 goes negative which cleared to the ZERO state by the output of clears F/F-D1 to the ZERO state. AND/ate 1 AND/ate 2. The first word, 010, is now is conditioned by D1 which is a logical ONE stored in the shift register. and the SHIFT PULSE. At the down-clock of 2-17. Transfer operation.Transfer pulse thesecondshiftpulse,theoutput of number 1 isnowappliedtotransfer AND-gate 1 also goes negative, setting F/F-D2 AND-gates 7 through 12. Since the shift to the ONE state. The first two data bits (DO registercontains the binary configuration = 0, D1 = 1) are now stored in shift register 010,AND-gates 7, 10,and 11are F/Fs-D2 and D1, respectively. conditioned. At the down clock of the shift pulse, these gates are deconditioned, their 246. AND-gate 6 is conditioned 'by the outputgoesnegative,and the wordis ZERO side output of F/F-D1 and SHIFT transferred to the storage register. F/F-52 is PULSE. At the down-clock of the third shift cleared, F/F-S1 is set, and F/F-S0 is cleared. pulse, the output of AND-gate 6 goes negative Word number 1 is now in the storage register which clears F/F-DO to the ZERO state. where itis available for use until the next AND-gate 3 is conditioned by the ONE-side transfer pulse transfers in a new word. Circuit 70 2'; operation for serial input words 2, 3, 4, and5 is similar to that just explained for word1. SHIFT The waveforms for these remaining four words are shown in the figure. 2-18. Simplified representation of serial-in/parallel-out register. The shift DATA INPUT SR(3) register, transfer gates, and the storage register ofa serial-in/parallel-outregister ate represented in simplified form as shown in 3 figure 3-16. This form of logic representation is normally used where detail is no; needed TRANSFER and only basic logic functior3 d to be MULTILEAD GATE shown. Data input is shown coming into the left side of the block labeled SR. The SR (3) inside, this block identifies it as a thr t-stage shift register. The shift arrow .:,.ows that shifting is to the right The A.sh marks with RG(3) the number 3 at each output of the SR indicate three ONE-side outputs, and three ZERO-side outputs from the shift register are applied to the multilead gates. Presence of the transfer line indicates that all gates transfer when this pulse is applied. The remainder of the drawing is self-explanatory. Compare it with the drawing in figure 3-15, and note how NDA6-105 simple functions can be expressed when there Figure 3-16. Simplifiqd representations, shift/storage is no interest in the detail of how these register (serielin/parallel-out). functions are accomplished. 2-19. Serial-In/Serial-Out Magnetic Storage Register Considerations. In the output section of many computer systems,itisoften necessary to change fromthe fast data rate of the equipment to a slower rate acceptableby various devices such as landlines (telephone

_FL _EL

INPUT OUTPUT INPUT OUTPUT WINDING WINDING WINDING WINDING

0-Y-YYYY 5

_EL ¶.

SENSE OR TRANSFER WINDING N1146-106

Figure 3-17. Bimag core.

0L7 lines). In thcse instances, a magnetic shift rapidly from theONE totheZEROstate, a register (MSR) consisting of bimagnetic cores large flux change takes place. This change (referred to as bimag cores) is often used. The induces a positive polarity pulse into the purpoae of a magnetic shift register is to output winding. This positive pulse represents accept and store binary information. This a binaryONE.The read-out process described information is shifted in serially, stored, and here is also referred to as the transfer process. shifted out serially. A magnetic shift register 2-22.Birnag core shifting process. The consists of a series of bimag cores that are basic circuit for connecting two cores within a connected to transfer information in sequence magnetic shift register is called a single-diode ficr, one core to another. The birnagcores transfer loop. Figure3-18shows a typical used in circuits of this type consist of a transfer loop consisting of two bimags and a ferromagneticcoreandthreeormore crystal diode. The cores, M1 andM2,are windings. These windings are theinput represented by a circle. The three windings on winding, the transfer or sense winding, and the core are represented by the coil symbols the output winding. Figure 3-17 showsa placed around the circle. Assume thatM1and typical bimag core. The core is represented by M2 areintheZEROstate. A pulse the circle, and the windings are represented representing a binaryONE isapplied to the by the coil symbols. The dot denotes the input winding of Ml. The current flowing polarity of the windings. When current flows into the dot side of windingNicauses the into the dot side of the winding, the core is bimag core to change to theONEstate. The set to the ONE state; when current flows into rapid change of flux caused by the core the nondot side of the winding, the core is set switching from theZEROstate to theONE to the ZERO state. state induces a voltage of opposite polarity into the output and transfer windings. The 2-20. Bimag core read-in process. With a current flow through windingN2can be pulse causing current to flow into the dot side ignored; however, the current flow in winding of the input winding (refer to fig. 3-17), the N3would flow through the input winding of core flux increases rapidly to saturation, thus the second coreM2and set it to theZERO causing a voltage of opposite polarity to be state, if it were not for the crystal diode. The induced into the output winding. When the voltage induced in the output winding of M1 input pulse drops toZERO,the core remains is negative on the dot side and positive on the magnetized:Nocurrent is flowing and no nondot side. This applies a negative potential voltageis induced in the output winding; to the cathode of the diode. Due to the large however, the core remains magnetized to the backresistanceofthecrystaldiode, ONE state. insufficient current flows through the diode transfer loop to have any effect on the input 2-21.Bimag coreread-outprocess.In order to read a ONE out of a core, it must be winding of bimag M2. Therefore, after the changed to its other stable state (opposite pulse to the input of M1 passes, M1 is in the ONEstate andM2 is intheZEROstate. polarity): ZERO. To do this,. a pulseis applied that causes current to flow into the Before another bit of information can be read nondot side of the transfer winding. This into MI., theONEit holds niust-be.transferred current causes the core to become polarized to M2;the next step is the transfer step. in the opposite direction. As the core switches 2-23. Tota-ansfer information from one core to the next core, a transfer pulse is appliedtothe transfer winding. The polarity of this pulse is such that current flows into the nondot side ofN2, causingthe core to switch to theZEROstate. As core M1 is switched rapidly from theONEstate to the ZEROstate, a large change of flux takes 14 place. This change in flux induces a voltage errner into the output windingN3.The polarity of t47 the voltne induced in N3 causes a current to Co-: into the dot side of N4 back through the diodetothe dot side ofN3.This current sets

11 the coreM2to theONEstate. Thus, a binary NDA6-107 ONEhas been transferred fromM1 to M2. M1 isin the ZERO state and can now accept Figure 3-18. Single-diode transfer loop. another bit of information. 72 2.44

SERIAL 411R THREE CORES PER TITO BITS

INPUTk___k__k_jL__ i : : ; TI s s s 12 a t i

T3 1 I I CORE READ. I I . s MI r. OUT ; lir IN

OUTs..- 53 IN

OUTI. 54 IN

OUT MS IN : s us IN------V------OUT

Figure 3-19. Magnetic shift register.

(MSR). the first data pulse whichrepresents a binary 2-24. Basic Magnetic Shift Register following circuit A magnetic shift register canbe formed by ONE arrives at the input, the connecting a series of birnag coresand their actions take place: emaciated transfer loops together.Figure 3-19 a. The rust datapulse sets M1 to the ONE shows a magnetic shift registerwhich has a state. At the same time, a shiftpulse, T1, is total of six cores. The circlerepresents the applied to the tender windings ofM3 and core. The arrowsindicate the winding inputs M6. Since cores M3 and M6 are inthe ZERO and outputs. Each input windingis identified state, the shift pulse has no effect. by the number 1 inside the circle.The sensing b. At the trailing edge ofshift pulse T1, (transfer) and output windings areidentified the second shift pulse, T2, isapplied to the by a ZERO, since they areopposite in transfer windings of cores M2 andM3. Since polarityto the input winding.This is a these cores axe in the ZERO state,the shift register;thatis,it three-core-per-two-bit two bits of pulse has no effect. requires three cores to hold c. At the trailingedge of shift pulse T2, information. The operation ofthe MSR is and is applied storage, and the third shift pulse, T3, arrives divided into three steps: shift-in, to the transfer windings of coresM1 and M4. shift-out. In our explanationof the MSR, transferred to core and then shift The ONE in core M1 is we'll shift in four binary ONES M2. Since M4 is in the ZEROstate, the shift them out serially. pulse has no effect on it. data, 2-25. Shift-in. Before shifting in new d. The register nowholds the binary assume that all cores arein the ZERO state. in table 3-3. Now refer to figure 3-19 and table3-3. When configuration 010000, as shown 73

2'-,.3 .k TABLE 3-3 MAGNETIC SHIFT REGISTER ANALYSIS

SHIFT SHIFT-IN SHIFT-OUT PULSES MI M2 M3 M4 M5 M6 MIM2M3M4 MSMA OUT

First T1 1 0 0 0 0 0 0 1 0 1 1 0 1 data TZ 1 0 0 0 1 1 pulse 0 0 0 0 0 1

T3 0 1 0 0 0 0 0 0 1 0 1 1

Second T 1 1 1 0 0 0 0 0 0 0 1 1 0 1 data 1 0 1 1 pulse T2 0 0 0 0 0 0 0 1

T3 0 1 1 0 0 0 0 0 0 0 1 1

Third T 1 1 1 0 1 0 0 0 0 0 0 1 0 1 data pulse T2 1 0 1 1 0 0 0 0 0 0 0 1 T3 0 1 1 0 I 0 0 0 0 0 0 1

Fourth T 1 1 1 0 1 I 0 0 0 0 0 0 0 1 data pulse T2 1 0 1 1 0 I 0 0 0 0 0 0

T3 0 1 I 0 I 1 0 0 0 0 0 0 1 I NDA6 -9 0

2-26. When the second datapulseis c. Shift pulse T2 transfers the ONE from . applied to the input, the following circuit M2 to M3. actions take place: d.Shift pulse T3 transfers the ONE from a. The data pulse sets M1 to the ONE state M1 to M2 and also transfers the ONE and the shift pulse, Ti, senses M3 and M6. from M4 to M5. (The term "senses" is just another way of e. Theregister now holdsthebinary saying that a shift pulse is applied to the core configuration 011010. to cause a transfer of information.) Cores M3 and M6 contain a ZERO; the shift pulse has 2-28. When the fourth data pulse is applied no effect on them. to the input, the following circuit actions take b.At the trailing edge of T1, the second place: shift pulse senses cores M2 and M5, thus a. The data pulse sets M1 te the ONE state. transferring the ONE from M2 to M3 M5 b.Shift pulse T1 transfers the ONE from remains in the ZERO state. M3 to M4. c. At the trailing edge of shift pulse T2, c. Shift pulse T2 transfers the ONE from the third shift pulse, T3, senses cores M1 and M2 to M3 and also transfers the ONE M4, thus transferring the ONE from M1 to from M5 to M6. M2. M4 remains in the ZERO state. d.Shift pulse T3 transfers the ONE from d.The register now holdsthe binary M1 to M2 and also transfers the ONE configuration 011000, as shown in table 3-3. from M4 to M5. e. Theregister now holdsthebinary 2-27. When the third data pulse is applied configuration 011011. to the input, the following circuit actions take place: 2-29. Storage. With the shift-inprocess a. The data pulse sets M1 to the ONE state. complete,the binaryconfiguration is b. Shift pulse Tl. transfers the ONE from considered to be in storage. That is, if the M3 to M4. data is not shifted out, it will remain in the

" 2 v,.) ti 2. <4 of their switching circuits used to translatetwo or bimags indefinitely because code form to a selected nonvolatilecharacteristics. However,to more input signals in complete our discussion of the bimag, we (discrete) output signal. Some of thedevices include vacuum need to shift the binary configuration011011 usedindecodercircuits tubes, diodes, transistors, magnetic cores,and out. such functions 2-30. Shift-out.Whentheinformation relays. Decoders are used for stored in the MSR is needed, a series of shift as address, instruction,count, and character pulses are applied to the transfer windings of decoding. Our discussion of decodercircuits is the bimag cores. Referring to figure 3-19 and concerned with those decoders that employ table 3-3, note that the first T1 pulse causes a the use of diodes and relays.Decoders are ONE to be shifted out of the MSR, while T2 known by many other names that expressthe and T3 shift the data bits toward the output. type of data they decode. Someof the names The next T1 pulse causes the second ONE te associated with decoders include: be shifted out, and T2 and T3 will shift the Count decoder or detectordetectsthe remaining data bits toward the output. This presence or absence of a count orcounts bits are shifted in a counter. process continues until all data of out.Upon completionoftheshift-out Address decoder-decodes addresses MSR is in the memoiy locations. proness, each bimag of the Instructiondecoderdecodes ZE 1.0 state. circuit 1,-31. In our example of a basic MSR., three instructions that control cores were necessary to storetwo bits of data. operations. If one timing pulse were used per core, a Character decodersdecodes three-core register could store three bitsof alphanumeric characters. data. However, as registers increased insize, 3-2. AND/OR-Gate Decoders. Figure3-20 the number of individual timing pulses would illustrates a serial up-counter with a simple also increase, which would cause an increase AND-gate decoder which detects a specific in both the shift-in and shift-out time. count. Notice that this AND-gateproduces a positive pulse output only when a count of14 is present in the counter. This pulse output 3. Decoders could be used for any controlfunction that 3-1. A decoderisacombinationof must occur at a specific time, such aswhen 14

.--9111D

T F F-0 FF-E F F -A FF-8 FF-,C 0 0 0 0 C 0

KBcog - 14

1 2 3 4 5 6 7 S 9 I LT

NDA6 10 9

Figure 3.20. Count detection of 14. 75 2.7

1. FF-A 11 1111 FF-B FF-C F-D FF-E

0 C ° 0 0

- 10 I _rd X-a.E.o.E A + + C + + E NDA6-1.0 Figure 3-21. Count detection of 10 or 10. input pulses have been counted. Figure 3-21 notation as A13.-j. Notice that to decode the shows a serial up-counter with an AND-gate binary count 001, the plate of the diode and OR-gate being used to decode (or detect) connected to F/F-A is connected to its ONE specific counts. The AND-gate producesa side, and the plates of the other two diodes positive output when the count of 10 is are connected to the ZERO side of their present in the counter; the OR-gate produces respective flip-flops. From this illustration, a positive output at all counts except the you should be able to recognize that- the count of 10. Again, these outputs could be matrixrepresentseightseparate3-input used for any control function that must occur ANDgates. at a specific time. 3-5. Relay Decoders. Circuits that require 3-3. Diode Matrix Decoders. When a large more current at the output than can be number of AND- and OR-gates are used to developed bydiodesoften use relaysas detect a series of counts or a series of binary decoders. Some of the circuits that make use configurations, it is common practice to show of relay decoders are power controls, test them schematically as a diode matrix. This function selectors, and print selectors. form of circuit is shown in figure 3-22. A 3-6. Figure 3-23 shows a series of relays three-stageserial up-counter isshown interconnected to form a decoder. A similar connected to eight AND-gates. Each circuit is used in printers to select printer AND-gate produces a pulse of one count solenoids and,in turn, to determine what width when a particular count is present in character is to be printed. Assume that the the counter. binary configuration 101 is present in the F/F 3-4. Look at the first set of diodes. The register. The following circuit actions take anodes (plates) of the diodes are connected to place: the ZERO side of each F/F. This causes a The ONE in F/F-A causes relay A to positive output to appear on the first line energize, which switches its contacts and whe0 the binary count of 000 appears in the applies B+ to line A. counter. Now look at the second set of The ZERO in F/F-B allows the B relay diodes. They produce an output when the to remain in its deenergized state, leaving binary count of 001 is present in the counter. the B+ connected to the B line. The Recall that this count is expressed in Boolean output Is now AB. 76 2 4-2. Digital-to-Analog Converter. A The ONE in F/F-C energizes relayC. digital data This.switches relaycontactsand computer output consisting of ABC may be sent to adigital-to-analog converter connects B+ to the output line digital which represents 101. (called D to A) to change it from a form to an analog voltage. This analogvoltage selected may be used to control somemechanism; for 3-7. The end result is that the line position by the relay contacts has a high voltage onit, instance, it can drive an antenna or representing a ONE. If a printer solenoid is the electron beam in a CRT. connec ted to each line, the binary 4-3. There are several ways ofconverting configuration 101 selects line 5 whichwould digitaldatatoanalog. One of the most cause a specific character tobe printed. common ways is by the useof a resistor network. A typical digital-to-analogcircuit is showninfigure3-24. The converteris 4. Digital and Analog connected to a five-stage counterthat holds a Converters maximum decimal count of 31. Theresistor 4-1. There are many computer systems ladderis made up of two sections which that must handle both digital andanalog contain identical pairs of resistors ineach leg. voltages. This requirement results in a need Notice that the value of each resistor ishalved converting as the number increasesfrom the LSD to the for circuits that are capable of side of each onetoanother. MSD. The output from the ONE thesevoltagesfrom When any D igit al- t o -analog and analog-to-digital flip-flop is applied to a relay driver. converters perform these functions. one of the flip-flops isin the ONE state, the

T T T B+ FF-A FF-C FF-B o o o

000:0:: 15(IIICIII 45(11%1

00 I = 1= ,

415(111C1) 115*1 3*11

010:2=,BC \ 41>*11 011= 3=A BC 45(11% illt 41IY111%1 100=4=A

101=5=;5c 5filic \ 110::6=';sc

111 -': 7:: ,8 C

r NDA6-110

Figure 322. Diode matrix, decoder. 77 24 1

1 A i i

1 itA B C = 1 1 I I

NDA6-121 Figure 3-23. Count detection, relay pyramid. corresponding relay is energized. With this 11 1 1 1 arrangement, the count in the counter is R,, R/164. R/84 17 converted from its digital form toa voltage 1 16 8 1 thatisproportionaltothatcount. For example, if an output of 5 volts equalsa count of 1, then an output of 10 volts equals a count of 2. 4-4. With a binary count of 11001or decimal 25 in the counter in figure 3-24, relays K5, K4, and K1 are energized. This The total resistance, Rf, of the lower gives an equivalent network, as shown in ladder is: figure 3-25. Resistance and voltage computations for the count are as follows: 1 1 1 IN The total resistance, R., of theupper Rf R R ladder is: 7i' 78 2j 2, 50 8 2 1 16 1..1010 =111=

411.110. ) (""11779 INPUTC:=-9 i I VOLTAGE i 1

R 1 (STATE) 16

K 1 (4 K3 K2

OUTPUT 0 (STATE) .... Ni1A6-112

Figure 3-24. Relay ladder, 1) to A converter- + 155V

1 6 lill Ilt I-. R Ilt 6 The total resistance, Rt, of theentire resistor network is:

R R

6R + 25R 150 31R

The voltage Eou t is: at Et .Ft....t.. X 155V a 6 x 156 Eout". 31R =1.11 IN NDA6-113 R 150 Eou, . b-- x ER- x 155 Figure 3-25. Equivalent circuit for figure 3-24with a Eout a 125 volts count of 25. 79

2 6, 0 0 0 0 4-6. Analog-to-Digital Converter. Not all inputs to a computer are in digital form. Some of the inputs are in the form of analog voltagesthatrepresentquantities. Some analog quantities that are applied directly to a computerrepresent speed of zrovement, speedofrotation,positionofashaft, elevation, temperature, pressure, and humidity. Before this information can be used 0 by a digital computer, it must be converted to digital form. An analog-to-digital converter (called A to D) does this job. 4-7. A type of converter that converts a shaft position (this position determined by an analog voltage) to a digital number is shown in figure 3-26. There are many different types of converters used for this purpose. The one explainedistypical of some in use. The conducting material in the disk in figure 3-26 isshowninthedarkareas,andthe nonconducting material is shown in the light NDA6-114 areas. Contacts are arranged into as many channels as there are digits in the largest Figure 3-26. Analog-to-digital converter. binary number that is to be coded. A brush is in contact with each channel on the disk. A voltage source is used in the circuit so that if a The ratio between R and Rt is: brushisincontact with the conducting material, a binary 1 is detected. If the brush is in contact with the nonconducting material, a Rf 6 binary 0isdetected. The binary number !It 31R detected in the position shown in the figure is 150 0000. As the shaft rotates counterclockwise, RI ft 150 the brush in the outer channel makes contact Rt 6 31R with the conducting material. Now the binary 25 count detected is 0001. The analog voltage is Rt 31 controlling the shaft (therefore the disk's) movement. As the converter continues to rotate, the binary count detected increases, as 4-5. The ratio of Ft( and R., should have shown around the circumference of the disk. pointed out one thing to us. That is if we are This digital information may now be fed into only concerned with computing the voltage the computer. out of this D to A converter, all we have to do is the simple computation that follows: 5. Encoder EpUt 5-1. An encoder is a network in which one where input produces a combination of outputs. It is E.2 -applied voltage commonly found at the input of a computer at -count in counter and is used to convert information to a form 'maximum count of counter acceptable by the computer.Figure 3-27 illustrates an example of a simple encoder. The inputtothe encodermatrixisa Therefore, the problem just solved would be keyboard. As the keys are depressed, the simplified as follows: springcontactmovt.Ns down and makes contact with a bar N:.hich has a positive Rt Ea potential applied. The spring contact passes Rt this potential to the diode matrix. The matrix 25 is made up of eight OR-gates, each having 155 x -3-T four diodes. The outputs are signals that 125 volts representabinar.yconfigurationfor the

80 261 R I

1-2-- MSD D Figure 3-27.2--1 Encoder. I ---- C Oi L._ Oi B 11 NDA6-115 L SD A 53

A a 0

1 r3 2

UNLIKE SIGNS LIKE SIGNS NDA6-116 Figure 3-28. Sign comparator. decimal number represented by a key. The 6. Comparator output lines are grouped into four pairs, where each pair represents a binary digit. Pair 6-1. Acomparatorisadevicethat A generates the LSD, pair B generates the 21 compares two or more signals and supplies,an bits, pair C generates the 22 bits, and pair D indication of agreement or disagreement. The generates 23 bits. arithmetic element of a computer needs such o-2. To see how an output is obtained, a device to compare the signs of numbers so let'sseewhat happensifthe keythat that the numbers may be added algebraically. represents 5 isdepressed.The positive Also, in most computers, these devices are potential of the bar is felt on the anodes of used in other decisionmaking circuits. An the four diodes tied to' the 5 line (refer to fig. example of a sign comparator is shown in 3-27). With els potential applied, resistors figure 3-28. The two signs to be compared are R7, R6, R3, and R2 have current through stored in F/Fs-A and -B. In this circuit, if the them. This means that the activating potential F/F holds a plus sign, its ONE-side output will appear on the 0, 1, 0, and 1 of the D, C, B, voltageis HIGH and its ZERO-side output and A pairs of the output line, respectively. voltage is LOW. If it holds a minus sign, its This 0101 is the binary configuration for ONE-side output voltageis LOW andits decimal 5. Any one of the input lines putsan ZERO-side output voltage is HIGH. activating potential on a combination of four 6-2. There are only fourpossible diodes that is different from that of any other combinations of signs that can be stored in input line. Therefore, the encoder shown in the two F/Fs. These are: (1) F/Fs-A and -B figure 3-27 encodes 10 different inputs into both storing plus signs; (2) F/FsA and -B binary combinations that represent 0 through both storing minus signs; (3) F/F-A storing a 9. plus sign and F/F-B storing a minus sign; and

82 2 3 (4) F/F-A storing a minus sign and F/F-B stores a plus sign and F/F-Bstores a minus storing a plus sign. These four possible sign. AND-gate 4 has a HIGHoutput when combinations of outputs are applied to.four F/F-A stores a minus sign andF/F-B stores a AND-gates as shown in figure 3-28. AND-gate plus sign. OR-gates 5 and 6 providethe final 1 has a HIGH output when F/Fs-A and -B store output of this sign comparator.OR-gate 5's plus iigns. AND-gate 2 has aHIGH output output is HIGH only whenthe signs are alike. when F/Fs-A and -Bstore minus signs. OR-gate 6's output is HIGH onlywhen the AND-gate 3 has a HIGH output when F/F-A signs are not alike.

83 CHAPTER 4

Computer Units

COMPUTERS RANGE insize from small 1-3. In the sections that follow, we will units consisting of a few circuits to large describe th e function,operation,and complex units involving thousands of circuits. characteristicsofthethreecomputer In Chapters 2 and 3, you studied many of the unitsmemory,,arithmetic , and c ontro 1th at computer circuits that are used to make up are normally referred to as the computer various computer units. These computer units main-frameunits.The two remaining are designed to perform a specific function or unitsinput and outputare discussedin functions. Once made up, several computer greater detail in Chapter 5. units are interfaced (interconnected) to form a computer system. Regardless of its size, a computer system is made up of five basic 2. Memory units. Our main objective in this chapter is to discuss the function,operation, and 2-1. Instructions are required to direct the characteristics of the three basic computer processing of the data feeding into and out of units which are normally located within the the computer. Some of the data, and all the computer main frame. Our first discussioninstructions, must be stored for later use. centers around a typical computer system Storingthisdataisthe functionof the comprised of five basic computer units. memory. Let us now discuss the data to be stored in memory and some memories that are used. 1. Typical Computer Systems 2-2. Types of Data Stored. Operations in a digitalcomputerarecarriedoutina step-by-stepfashionutilizinginformation 1-1. A block diagram of a typical digital stored in the computer. For this reason; some computer system is shown in figure 4-1.. The of the information fed into the computer five units (elements) that make up this system must be stored for indefmite periods prior to include the following: actual usage. The facilities required for storing Memory. information in a computer are included in the Arithmetic. internalstorage (memory) elements. The Control. information normally fed into the computer Input. is of three types: Output.

Allitwmf f 1-2. Figure 4-2 showsthe general organization of the above units within a typical computer system, along with the

interfacing of each unit which indicates the 1,00 wfw0.1, flow of information and confrol signals. The eLim14, ILI.I., heavy linesare information transfer lines. These lines indicate the information data flow

within the system; note that all data flow is '1.001, ,from and to the storage unit. The light lines arethesystem'scontrollines.Notein particular that all control signals originate in the control unit. Figure 4.1. Block diagram, computer units. 84 2 12 zst ...... CONTROL UNIT '...... wr

4.1. ILNo. 1111. Mow minim. 4111.mli 11 WINNIO .111.1 INEWSMIRO =11 IIIIMIN 1 1 1 I +i ...... 1.0I siammowirr410 I I I CRT DISPLAY 1 CARD READER I 1 I

1 STORAGE UNI T I I 1 0~40 I 1 I 1 1 PAPER TAPE READER PRINTER 1 1 1 i I

1 I I I ...... INFORMATION DATA LINES I ~Iwo v....miPCONTROL LINES I 1"...nr I I I I I 1 1 UNIT FOR RECEIVING I 1 1 CARD PUNCH DATA OVER I I ITELEPHONE LINES 1

111111MIN II.IIIIIIID 4.1411111 ....1 .....1 L. L-- - - OUTPUT INPUT UNIT UNIT NDA6-124

Figure 4-2. Organization of a typical digital computer.

(1) Reference data (constants). boundaries, and math tables. Such data is (2) Instructions for performing the used over and over for successive computer particularoperationsrequired(the calculations. It would be impractical to feed .0 program). this same information into the computer for (3) Particularitemstobeprocessed each new calculation. If the storage element (variable input data). of the computer retains such data indefinitely 2-3. Reference data. This type of data is and quickly presents individual items each stored for future use. For example, if the time they are needed, problems are solved computer is used in arrair defense system, the much faster. A second example of a constant reference data would probably include such would be a supply system's custodian account items as radar site locations, aircraft locations, number. This numberisassigned to the 85

266 25'7

account by subtracting the cost of the part AOORtil CONTINTS from the account. Also, it notes the number of transistors remaining in stock, and, if the siclunum supplyis down to the reorder point, the In computer initiates a reorder action. DINT OUTPUT 2-7. Memory Unit Considerations. In order s;LICTS C11111C11101111 CONN," 001110 OP 00TA Rie WONTED thethreetypes of information AOORIUS 11011111111111Z tostore unnuEICIOCIMIE discussed above, in binary form, the storage WiElE11111:111111: (memory) media must have at least two stable 11111111111111111 states. A memory unit must also be capable of "remembering"(storing) a greatmany program words and data words, and these CONTROL 100 RUM° IN words must be made available to the other OR OUT 11DA6-142 computercomponents almost instantaneously. Indeed, without fast, Figure 4-3. Storage unit. automatic, and reliable processing of data into and out of the storage element, problem supply custodian of a section, and it allows solving with a computer would be little more only that person or his representative to efficient than working with hand-operated withdraw supplies for the section's account. calculators andreferencetables. Let's 2-4. Computer program. Also stored in the consider some of theserequirements memoryisthe computer's program. The individually. program is the set of instructions (repertoire) 2-8. Addressablememory. Allstorage forperformingtheparticular computer elements have some basic characteristics that system's tasks. With a common program, and are siMilar. They always contain a number of common reference data in advance, the only storage locations, each of which stores a additionaldatarequired to perform the specificamount ofdata. Each of these computer's tasks are the variable data to be locations is assigned a specific number called operated upon. an "address," so that it may be selected by 2-5. Variable input data. This is the data thecomputereitherforinsertionor that is continuously changing. An example of extraction of data.Forinstance,in the this type of data isa jet fighter flying at diagram of the 8-location memory shown in 40,000 feet heading west at 1200 miles per figure 4-3, the addresses are shown on the hour.If the aircraft does not change its left, opposite their actual contents. To refer heading, only the speed changes the input to the number 10,121, the computer would data (the aircraft location will change at a rate select the location whose address is 003. of approximately 1 mile every 3 seconds). 2-9. Memory capacity.. Another important The program must use the reference data to requirement of the memory is capacity. In setupaninterceptpoint under these large-scale computers, it may not be feasible conditions; then it must check each new input to include all the required storage area in the to see if the point is still valid. Should the mainmemory.Therefore,anauxiliary fighter change directions or reduce its speed, a (additional)storagedeviceis provided in new intercept point must be calculated. The addition to the main memory. This releases input data may then be stored in the memory the main memory for storage of the most for a short time and also stored in some important programinstructions and data external storage device for later use as a required for specific computer tasks. record of the intercept. 2-10. Memory access time. Another very 2-6. Another example of variable input important requirement of the memory unit is data would be the information for an account thespeed(time)withwhichprogram number in a supply system's computer. Each instructions words and data words can be read time a part is used, the computer must update all the information related to the part and the Oui.tli 10'4 SO account number. For example, in a given +AGM, AOS work center, each section is allotted a given 1..0 CO... amount of money for parts, and the money is tO placed in the section's account (similar to a Oti366- checking account). A particular section needs ,011?(.111C10If/ I a 2N404 transistor, which is ordered by the (JO.: supply custodian. The supply computer issues thepart and chargesitto the section's Figure 4-4. Magnetostrictive delay line. 86 267 2.57 2-21. Magnetostrictive Delay Lines. from and written into the storagemedia. This the time, called access time, limits thespeed of Magnetostrictive delay lines were one of computer system can first devices used as a memory.It operates on operationthata the principle that certain materialschange perform its assigned tasks. lengths when placed in a magneticfield. This 2-11. Types of Memory Devices. There are phenomenon is called magnetostriction,and it provide various types of memory devices that ispronouncedinnickel which becomes a reasonable accesstime and storage capacity. shorter in the presence of a magneticfield. Because of the many types in usetoday, our Another material called permalloygets longer discussion islimitedtothe four most when it is placed in a magneticfield. common types usedin Air Force computer 2-13. Construction. The basicconstruction systems. The four to be discussedinclude: of a magnetostrictive delay line(MDL) is shown in figure 4-4. It isconstructed by (1) Magnetostrictive Delay Lines. (wire) (2) Ferrite Core Memory. wrapping coils around the ends of a bar offettous material.Theinputcoil (3) Thin-Film Memory. field that (4) Solid-State Memories. (transmitter) creates a magnetic

PERMANENT RUBBER RUBBER MAGNETS DAMPING DAMPING PADS PADS b. INPUT COIL aTiraTAIi MOM *Iplp OUTPUT COIL aMAINOID .1111

MAGNETOSTRICTIVE PULSES WIRE

SHAPER AND AMP.

READOUT PULSE

NEW DA TA BIT FURTHER PROCESSING

CONTROL FLIPFLOP

RESET R EWRITE NDA6-128

Figure 4-5. Magnetostrictive delay line operation. 87

0L.' .- 4, S" ?

causes magnetostriction (shock waves) in the input coil. Clearing the loop is usually done to material. As this shock wave travels through prepare the, delaylineforentering new the line, it is detected by the output coil. The inform atio n. MDL delay is determined by the location of 2-18. Write operation. Let us start with a the output coil assembly. The output coil clear loop and write a data bit into the delay assembly is moved along the length of the line line memory. We first clear the contiol F/F to to adjust the storage time. When the shock the ZERO state. The ZERO side of the wave has been detected by the output coil, it control F/F conditions one leg of AND-gate is necessary to ebsorb the shock wave to 3. The data bit is now applied to the other leg prevent reflection. This is accomplished by of gate 3. The output of gate 3 feeds one leg clamping rubber pada to the ends of the line of the OR-gate, and the OR-gate feeds one leg toabaorbthewaves,thuspreventing of gate 4. When the clock pulse arrives at the reflection of the shock wave back down the other leg of gate 4, the data bit is then gated line. into the input coil. The data bit is now 2-14. When the input coil is pulsed, it represented by a shock wave that travels the produces a magnetic field which causes the length of the delay line. portion of the nickel wire within the coil to 2-19. If the data bit is to be stored, there become shorter. This change in length is are two other ihings to be done to complete teensmitted through the wire as a shock wave the write operation. The fust is to SET the which travels the length of the delay line at control F/F to the ONE state. The second is the speed of sound. This shock wave is that the data bit must arrive back at the input accompanied by a change inreluctante. of gate 4 at the same time a clock prase Recall that reluctance is a measure of the arrives on the other leg. There is no problem opposition a material offers to magnetic lines with only one bit; the delay line can be of force. The permanent magnet at the output adjusted so that it well be rewritten with any coil provides a magnetic field through the coil clock pulse. However, a stomp device that which is varied by thc change in reluctance stores only one data bit is of little value ix a that accompanies the shock wave. As a result, computer system. Now let us store more a voltage is induced in the coil. This action information in the delay line and see how the produces an output pulse which is sent to a operation compares with the CM bit stored. pulse amplifier and shaper. 2-20. Let us say that the delay line has a 2-15. Clearing the loop. Now that we have 2048-microsecond delay. How many words the basic construction of a MDL, let us see (or bits)willthe delay line store? What how itis put to practical use. Figure 4-5 determines the number of bits it will store? shows a MDL and the representive external Thestoragecapacityofthedelayline circuitry required to make it function as a memory is determined by two things. First is recirculating memory device. the length of the delay line; second is the 2-16. A data bit in the delay line continues pulse repetition rate of the clock pulse. The to recirculate through the line for as loniris it delay time of the delay line we are going to is desired to store this bit. The bit can be read use is 2048 microseconds. Let us use a clock out without destroying it; thus, the line has pulse with a pulse repetition time of 1 nondestructive readout characteristics. When microsecond. This will allow the delay line to new information is to be stored, or when it is store 2048 bits of information. The word desired to destroy the old information, the length may be 4, 8, 16, or 32 bits long. data in the line is prevented from recirculating However, the total number of words should and disappears. This action b refereed to as not include more than a total of 2048 bits. "clearing the loop" or "resetting to ZERO." 2-21. Recall that with the one bit we could The circuit that controls this function is the use any clock pulse to rewrite that bit in control flip-flop. memory,the only requirement being the 2-17. Notice that the ONE-side output of delay of the delay line being equal to the the control F/F is fed to AND-gate 2, and the pulse repetition time or multiple of the pulse ZERO-side output isfed to AND-gate 3. time. Using the full storage capacity changes When the control F/F is SET and a data bit is this requirement. We are now going to store present in the delay line, the pulse from the 2048 bits, and the delay must be 2048 output coil is fed back through the line again. microseconds from the time the data bit This recirculation continues as long 83 the leaves the output of gate 4 (see fig. 4-5) until control F/F remains in the SET state. When it returns to the input of gate 4 in order to be the control F/F is reset (placed in the ZERO rewritten. state), AND-gate 2 is deconditioned and the 2-22. The start of the write operation is data bit is lost, since it cannot get back to the the same as storing the one bit (refer to fig. 88 III,. he Mil

4-5). The control F/F is RESE'r ('/..ERO state) 1,061 11 which conditions gate 3. The first data bit will produce an output from gate 3, through the OR-gate to condition gate 4, out of gate 4 to the input coil, and on to the magnetostrictive wire. This same operation continues until bit 2048 isreached. After bit 2048 is gated uGoi(lIZING crURIENT1 through gates 3 and 4, and into the delay line, ,13.ct the control F/F must be SET (to the ONE state) before the first data bit arrives at gate 2. If the control FIF is not SET in time, the data is considered destroyed because it has not passed through gate 2. A second problem

that might occur, and the most likely,is 1110 SIAS( timing.Letussaythe timingis2047 NDAS-141 microseconds. What would result? The first Figure 46. Ferrite core hysteresis l000p. data bit would be lost because it is not at gate 2 ready for rewrite when bit 2048 is being stored. The result is that the first data bit is most important advantage of the lost because the delay line now stores 2047 magnetostrictivedelayiineisthatitis bit.s, not 2048. relatively inexpensive when compared to the 2-23. From the above discussion, we see ferritecore andthethin-film memories. that timingiscriticalinthe delay line Excessive access time and volatile storage are memory. This is why t.heoutput coilis two disadvantages of the delay line memory. adjustable along the length of the wire. If the Recall that access time is the time required timing is off, as in the above example, the coil foracomputertolocatedataor an is moved to correct the timing error, so long instruction word in its storage section and as the error is not excessive. In this case, the transfer it to its arithmetic section where the output coil would be moved away from the required computations are to be performed. input coil to increase the delay time. This Reckllalsothatvolatile memoryisany completes the write operation. Let us now memory that can Tetain (or store) information discuss the read operation. only as long as energizing power is applied. 2-24. Read operation. The read operation The fethte core, our next subject, is one requires only the data and the readout pulse. means of overcoming the disadvantages of the The clock pulses may be used to gate the data delay line. through gate 1 (fig. 4.5) or a "gate pulse" the 2-28. Ferrite Core Memory. The ferrite same width as the data word may be used. Let core memory enjoys wide use in present-thy, us see what is required to read out one word high-speed computers. In fact, the ferrite core from memory. isprobablythe most satisfactory storage 2-25. One method might be to count the deviceforuseas an internal computer clock pulses, starting with data bit one and memory.Ithasafastaccesstime,is going to bit 2048. Let us say that 2048 bits addressable either sequentially or at random are equal to 256 eight-bit words. If the second (any sequence), and has a high order of word is to be read out, the counter would reliability. The systems in which ferrite cores count the first eight clock pulses, then send are used are referred to as coincident-cuxrent the next eight pulses to gate 1. The second memories. method might be to use a "gate pulse." The 2-29. Ferritecoreprinciples.Since the gate pulse would go active at the end of the ferritecore is themainpartofa 3th clock pulse and stay active until the end coincident-current memory system, let us of the 16th clock pulse. The timing here is brieflyreviewthe characteristicsofthis critical just as it is in the write operation. storage device. The familiar hysteresis loop 2-26. Magnetostrictive delay line for a ferrite core is shown in figure 4-6. From configuration. The use of the delay line it, you can see two characteristics of the core determines its configuration. Serial operation that make it a useful binary storage device: can be provided by a single delay line, and a (1) its ability to remain in one of two stable serial parallel operation can be provided by states, and (2) the rapid switching action from stackingseveral delay linestogether. The one state to the other with the application of controlling and addressing of the delay line a magnetizing force. Notice that the slope of also depends on the operation desired. the top and bottom line of the curve is 2-27. Advantages and disadvantages. The gradual; this indicates that the core holds 89 2.4 /

DRIVE WINDING

NDA6-249 Figure 4-7. ONE writing. most of its magnetism after the magnetizing residual magnetism that is almost equal to the force is removed. Also, notice how steep the saturationflux. The core remains in this sides are; this indicates that the core switches condition until it is pulsed again. If the core rapidly from ONE to ZER.O (b to c) and from had contained a ONE and you attempted to ZERO to ONE (d to a). write a ONE into it, the flux would have 2-30. Look again at figure 4-6 and locate changed from point b to point a and then point a on the hysteresis loop. This point back topoint b, a very slight change in represents the flux density of the core when a magnetic flux. magnetizing force of +I is applied. When this 2-32. Now assume that you wish to set the fome is removed, the flux density drops to core back to the ZERO state. To do this, pass the value indicated by point b. Throughout current through the drive winding in the our discussion, this action is referred to as opposite direction as shown in figure 4-8. This having placed the core in the ONE state. drives the core to saturation in the opposite When a force equal to -1 is applied to the direction, causing the flux to change from b core, it becomes magnetized in the opposite to c. Upon reinoval of the drive current, the direction. The flux density is indicated by flux drops from c to d and remains there. The point c on the curve. If this force is removed, core is now in the ZERO state. the density drops very little to point d on the 2-33. Addressing. Ferritecoresina curve. In our discussion, this actidn is referred memory are normally arranged as shown in to as having placed the core in the ZERO figure 4-9. This type of arrangement is called state. a matrix; however, in common terminology it 2-31. Assume that the core contains a is referred to as a plane. Note that there are ZERO and you wish to switch it to a ONE. four rows (X direction) and four columns (Y To do this, it is necessary to pass enough direction). Therefore, the number of cores in current through the core's drive windings to this plane is 42 or 16. Memories may be cause the flux to reverse direction. This is described as 162 or 642 memory, etc., to shown on the loop in figure 4-7 as a change indicate the number of cores in a plane. Since from point d to point a. Current flowing in each core is capable of storing one bit of the direction necessary to write a ONE into information, a 162 plane can Store 256 bits. the core is also illustrated in this figure. While As each core represents an address location, current is flowing in this direction, the core is some method for selecting a single address saturated; that is, further increase in current must be used. will not cause a change in flux in the core 2-34. To address a core, two drive lines are point a. When the current is removed, the flux used. Each line carries one-half the current drops back to point b and the core retains required to switch a core. Reference X and Y

90 f 242...

DRIVE WINDING

N1146-147

Figure 4.8. ZERO writing. lines in figure 4-9; neither current (X orY) flip-flopsisfed to the X and Y address alone is of sufficient amplitude toswitch any decoders (10 to the X deCoder and 10 to the core it posses through.When the currents Y decoder).Thesedecodersarediode applied to the X and Y windings are inthe matrixes which decode the address register proper directionthat is,when they aid each output. The output of the X and Y decoders otherthen the intersected core becomes a determines which X and Y lines are pulsed by lay selected core. The two half currents the current drivers. In this case, since a 10 is flowing through the windings (X and Y) fed to the X and Y current drivers, lines X-2 produce the amount of current required to and Y-2 are pulsed. When these selected lines switch the selected core. Figure4-9 shows arepulsed,theselected coreisat the current being applied to the X-2and Y-2 windings. Assume that the two lines ale pulsedinthe proper direction with half YwiRDIRGS currents; the selected core (thedarkened one in figure 4-9) is at the intersection ofthe two windings and will be selected. 2-35. Addressing circuits, within an address selection section, select thedesired X and Y lines. This section usuallyconsists of a number of flip-flops(called the memory addressregister), anaddressdecoding Figure 4-10 4 network, and current drivers. SCL ECM shows an address selection sectionconnected ADDRESS OR to a memory plane. One-half ofthe flip-flops CORE and an address decoder control theX part of the selection section. The rest ofthe flip-flops and a second address decoder controlthe Y part of the selection section.The two parts operate exactly the same and arecontrolled together to select one X line and oneY line simultaneously. The seleetion of Xand Y lines determines which core isfully selected. 2-36. In figure 4-10, assume that abinary ND/16-148 1010 is fed to the memory addressregister. The output from the memoryaddress register Figure 4-9. territe core matrix. 91

2 :',.., 2-ip 3

intersectionofthe twopulsedlinesas connected in series to form one Y-2 line for indicated in figure 440. the memory. 2-39. Read operation. The operation of 2-37. The addressing process for either any core memory involves reading out of and writing or reading is the same except for the writing into the core memory array. Reading direction of current flow in the X and Y means sensing the flux state of a core to windings. During the read cycle, current flows determine if it holds a ONE or a ZERO. This in the opposite directionto that of the is done by driving the core to its ZERO state. current during the write cycle. This method This is also referred to as "writing" a ZERO. of addressing is not the oruy one in use within 2-40. The flux of a core is sensed by the computers.Thedesignoftheaddress use of a winding, as shown in figure 4-11. selection section and the memory address Appropriately, it is called the sense winding. register flip-flops varies according to the type Its primary purpose is to detect the presence of addressing desired, such as consecutive, of a ONE in a selected core. We stated that up-down, and random. addressing for readingis the same as for 2-38. A coincident-current memOry array writing, except that current flowsin the is constructed by stacking a number of ferrite opposite direction through the selected X and core planes to form a stack. The addressing is Y lines. With this in mind, look at figuie 4-11 the same as that for one plane, and all planes to see how thereadingprocess is in the stack are addressed simultaneously. accomplished. Assume that the X-0 and Y-0 This is accomplished by connecting similar lines have been selected and pulsed in the coordinate lines of all planes in series. For proper direction (write current flows with the example, the X-2 coordinate lines of all planes arrows, read current against the arrows). The are connected in series to form one X-2 line core intersected by these two linesis the for the memory. The Y-2 linesarealso selected core. If the core contairs a ONE, it is

htE#AORY ADDR E SS REDISTE R

SEL EC TED ADDR ESS OR CORE

wRITE

NDA6-139

Figure 410. Addressing. 92 at

yesthe same core attempt to write a ONE in theselected core; first plane? The answer is in each plane is pulsed. but at the same time theselines are pulsed, a further with this winding, causing 2-50. Before we go any pulse is applied to the inhibit explanation, let us put a binaryword into the current to flow in thedirection of the arrow. inhibit winding is selectedcorelocationsinorder to have The current through the something to read out. This is necessaryto see opposite to the flow throughthe Y line. This Assume that line. As a result, how the sense windings operate. cancels the effect of the Y the binary word 1101isin the selected the selected core feels onlythe half-select in plane does not switch. location. Therefore, the selected core current of the X line and 1 contains a ONE (1);plane 2, a ZERO (0); Thus, the core remains in theZERO state. Core Memory. plane 3, a ONE (1); andplane 4, a ONE (1). 2-46. Four-Plane Ferrite the current Now that we have discussed theprinciples of 2-51. Since this is a read cycle, individual flow from the decodersthrough the cores is reading, writing, and addressing the cores within a plane,let us stack four planes opposite tothe direction shown by together to make a memory.Then, let us arrows. The arrowsshow the direction of the circuits necessary current flow for writing aONE, and reading is connect this memory to ZEROs in all cores. to performthe memory cyclefunction. the process of writing insert in the Therefore, when the selected coreof each Foldout 1, included as a separate is switched back ofthisvolume, shows a simplified plane feels full-select currents, it four planes; therefore, to the ZERO state.Looking at foldout 1 and memory. It contains configuration of this memory can store afour-bit word. Also, keeping in mind the binary the planes are 42; that is,there are four X our selected word(1101), you can see that that there the sense (green) windings forplanes 1, 3, and lines and four Y lines. This means The selected core in are 16 cores perplane, and a total storage 4 feel an induced voitage. four-bit words. plane 2 contained a ZERO;hence, it does not capacity of the memory is 16 no before that one memory switch and, for all practical purposes, 2-47. We said voltage is induced into the sensewinding. cycleis composed of a readand a write ZERO, causing will go through Actually, the core is driven to portion. With this in mind, we a change in fluxthat is so slight that the the read portion firstand then the write winding is not which they occur voltage induced in the sense portion. This is the order in amplified by the sense amplifier. within a memory cycle. beginning of each 2-52. The sense windingfor each plane is 2-48. Read. At the toa senseamplifier whichis memory cycle,the memory registerand connected cleared cleared prior to each readcycle. The purpose memory addressregister (MAR) are amplify the voltage pulse (set to ZERO). At thistime, the read portion of the amplifier is to begins,and new address induced in the sensewinding when a core of the memory cycle switches from the ONE tothe ZERO state. informationistransferredto MAR. The gated; that is, during outputs from both theONE and ZERO sides The sense amplifier is applied to the X and the time the amplifier ispulsed by the sense of the four flip-flops are also be applied in Y lines that are to bepulsed by the read winding, a gating pulse must that X-3 and Y-3 are order for the amplified sensewinding pulse to current. Let us assume be passed on to the memoryregister. This the selected lines andthe read current pulse "read-sample pulse" on has begun. The readpulse is normally present pulse is labeled the cycle. For foldout 1. This read-samplepulse occurs at for the first half of the memory the same time as theread-current pulse. Any exampin,if your equipment has a6-esec time, the duration of theread time the read portion ofthe memory cycle memory cycle theread-samplepulsegatesthe cycle is approximately 3 usec. occurs, 2-49. Now follow theX-3 and Y-3 lines amplifiers. through plane 1 of 2-53. Since the selected corein plane 2 from the diode decoders not switched, the foldout 1. Notice thatthe two windings contained a ZERO and was left corner of sense winding forthat plane felt noinduced intersect the core in the upper voltage. From this, you can seethat one of plane 1. This is theselected core. The two amplifier 2 is half-currents flowing in X-3and Y-3 are in the the required inputs to sense in missing, and no outputispresent to set same direction,and they aid each other register. The other producing a full-select currentthrough the flip-flop 2 of the memory the current path of three amplifiers have bothinputs present; selected core. Now follow thus, they produce outputsthat set flip-flops the two pulsed linesthrough the remaining regi:.te: to the three planes. Which corein each plane is 1, 3, and 4 of the memory in the remaining ONE state. pulsed? Is the selected core 2-54. In summary, duringthe reading, the three planes identicallylocated to that of the 94 27.; it held a ONE or a ZERO. Writing is the reverse of reading;theselectedlines are always pulsed in such a direction as to write a ONE in the core. Since you do not always want to write a ONE, it is necessary that some means be used to prevent the writingof a ONE. This is accomplished by the use of an inhibit winding (reference fig. 4-12). Notice that the inhibit winding parallels the Y drive lines. 2-43. Complete memory cycle. A typical core memory cycle consists of a readportion followed by a write portion. Taken together, these operations are referred to as a nu.mory cycle. The memory cycle is arranged so that the data word which has been read may be reinserted in the same location during the write portion of the cycle. 2-44. Assume that you wish to write a ONE in core X-0, 1-0. The core is in the ZERO state, sinceithas just been read (remember that a write is always preceded by a read). To write the ONE, the X-0 andY-0 lines are pulsed, and current flows in the direction of the arrows. This switches the core NDA6-135 to the ONE state. 2-45. Now assume that you wish to write a Figure 4-11. Sense winding. ZERO in a selected core. Assume that the core is already in the ZERO state.Again, the switched to the ZERO state by the read X-0 and 1-0 lines are pulsed, and current ctment. The switching of 1he selected core flowsinthe direction of the arrows to induces a voltage into the sense winding. This voltage is then amplified and used to SET that core's associated memory register (MR) to the Y B1140040$ ONE state, indicating that the core contained a ONE. If the selected corecontained a MCVEY/ ZERO, no core switching action would take CCM place. A very slight voltage would be induced in the sanse winding, but the amplitude of the /.) voltage would not be enough to SET the core's memory register. The indication would then that the core contained a ZERO. 241. Theconstruction,orthreading 3 pattern, of sense windings through a ferrite array varies with engineeringdesign of the manufacturer'schoice, butthe basic operation is the same. One method can be seen in figure 4-11. Normally,there is one sense amplifier (SA) and sensewinding for each digit plane. The sense winding passes through each core of its associated plane in such a manner as to minimize capacitive and i inductive coupling between itself and other windings of the plane. c----1 242. Write operation. Writing consists of -I either driving a selected core to the ONE state INHIBIT or inhibiting the driving of a core tothe ONE WINOHNT statewhen a ZEROistobe written. NDA6-134 Remember that reading consisted of driving a core to the ZERO state to determinewhether Figure 4-12. Inhibit winding. 93 r), A- ; information at the selected address was read previously stated, the data in t'e MR is 1101. out and transferred to the memory register. This means that the output of L.L.e MR. ZERO At the end oftheread portion of this side is 0010 to the inhibit gates. Inhibit gate 2 memory cycle, the data(1101;isin the is the only gate that produces an output to an memcry register awaitingfurther processing, inhibit driver. All other gates have one leg and the selected cores are in the ZERO state. disabled by the ZERO (low) outputs of the seen how MR. The output of inhibit gate 2 is fed to 2-55. Write. You have plane 2's inhibit driver. The output of that informationisselectedand read from a specific location in the core memory array. inhibit driver is then fed to pia...? 2's inhibit Also, you learned that when information is winding (red line). Follow the cuaent flow of read from a core memory location, the this winding, and note that the current flows selected cores are switched to the ZERO from bottom to top in the left-hand column state. It should now be evident to you that a of plane 2 and parallel to the Y-3 winding. ferrite core array operates on the principle of Note also that the write current for Y-3 flows destructive readout; that is, the information from the top to bottom in the same column; in the selected core locations is destroyed thus, the write current through Y-3 and the isnot a desirable inhibit current oppose each other. Since these when readout.This same c haracteristic, and some type of currents are approximatelythe compensation must be made forit.This amplitude andoppositeindirection, the destructive characteristic is compensated for magneticfieldscaused by these currents throughtheuseof awritecycle.As cancel each other, and the selected core of previously stated, the read portion uses the plane 2 feels only half-select current (X-3). first half of the memory cycle. The second This half-select current does not switch the half of the memory cycle is used to write the core; consequently, it remains in theZERO previously read information back into the state. Planes 1, 3, and 4 do not receive the selected memory location, thus preserving it. inhibit current; therefore, a ONE is written The write cycleis also used to write new into the selected core on these planes. We information into a specified memory bcation. have now placed the wiginal information, This function is discussed later. 1101, back into the selected location we read 2-56. Referagaintofoldout1.The itout of during the read portion of this memory cycle. information transferred to the MR, during the 2-58. Now that you have seen how a read portion of the memory cycle, placed typical core memory cycle works during its ONEs in F/Fs 1, 3, and 4, and a ZERO in F/F read and write portion, one question has 2. Since the memory address register isn't new steppeduntil afterthe memory cycleis likelyenteredyour mind: How is complete, the same address (X and Y lines) is informationwrittenintomemory? The question is a good one. First of all, any time still selected. This means the information just new information is to be written into core readwill be written back into the same address it was read from. The write portion of memory, a store class instruction isinitiated. the memory cycle is now initiated by a write Recallthattheoperationofcomputer pulse applied simultaneously to the address systems must be controlled. This controlling drivers and the inhibit driver gates. The write is done through the use of control programs current pulsesthe same lines as the read that tellthe equipment to add, multiply, current (X-3 and Y-3). Now current flows in subtract, store, etc. A store instruction is one the opposite direction to that of the read that controls the storing of new or revised information into a memory. Let us see how current(inthe direction of the arrows). Remember, the selected core of each plane is this is accomplished during a memory cycle. located in the left-hand column, top row. 2-59. We know that the MR is cleared (set With write current applied, the selected cores to ZERO) at the beginning of a memory now feel full-select current in thedirection cycle. Also, we know that the first portion of opposite to that of the read cycle; therefore, the cycle (read) reads out the contents of the these cores shouldall switch to the ONE selected coresby switching them tothe state. But, is this what we want? No,since the ZEROstate.Inordertowritenew original information read was 1101, we don't information (other than that just read) back want the core in plane 2 to switch tothe ONE into the selected cores, it is necessary to keep state. the information ;ust read from entering the 2-57. TopreventwritingONEs,the cleared MR. Refer arlain to foldout 1. Recall ZERO-side output of each MR F/F is fed to that during the read portion of a memory one leg of the inhibit gates.The other input cycle, a read sample pulse is used to gate the to the inhibit gates is the wr,tepulse. As outputs from the sense windings through the 95 technology is just one phase of the growing field of microminiaturization;. other phases are integrated circuits (ICs) and high-density packing of components. A thin-film is a layer of material usually several thousand angstrom units in thickness (1 angstrom unit equals 10- 8centimeters),placed on a glassor ceramic substrate. A thin film can be made from materials such as metal, semiconductors, dielectrics, or ferrites. By use of thin-film techniques,avarietyofelementsand

A electronic devices such as capacitors, resistors, B-H CURVE 4-11 CURVE and magnetic storage elements can be formed. FOR EASY" FOR "'MARV DIRECTION DIRECTION Compared to magnetic core memories and NCH6-133 manyothermemorymethods,thin-film Figure 4-13. B-H curves. magnetic storage memories operate at higher speeds and are less expensive to manufacture. 2-64. Construction of thin-film memories. sense amplifiers and into the memory register. Thin-film memory devices are produced by What would happen if this read sample pulse depositing nickel-iron thin films on a glass were missing or inhibited during the read substratewhile under the influence of a portion? You can readily see that information magnetic field. The film thickness of a typical Peed would not enter the MR. At the same unit is approximately 20001angstrom units. time this inhibit action was taking place, new The resultant thin film has a preferred, or information could be transferred into the MR easy, direction of magnetization and a reverse, to awaittheupcoming portion of this or hard, direction of magnetization. For the memory cycle. easy direction, the B-H characteristic curve is 2-60. Now, assume that a store instruction rectangular; for the hard direction, the B-H is programmed and a memory cycle started. curve is linear. Both of these curves are shown This store instruction will inhibit the read in figure 4-13. Recall that information can be sample pulse and, at the same time, cause new stored in a device that possesses a B-H curve information to be transferred. into the MR. such as the one displayed by the thin-film 'Dee,during the write portion of this same material for the easy direction (part A of memory cycle, the new information setting in figure 4-13). the MR will be written into the selected 2-65. A magnetic thin-film memory cirQ,lit memory location. is constructed of a plate of nancenducting 2-61. The method of reading and writing material; an array of small, thin.disks discussed here is but one meth9d. It has been magnetic material is attached to4Iiist40. A described in general terms so* that you can separate winding is laid across the length and apply the same principles to your specific width of each disk. Each diSli then becomes a equipment. The terminology used here may binarycellof the memory, and current be different from that with which you are through the respective windings appropriately familiar. Your equipment may sequentially magnetizes each cell. This memory cell may address each location by means of a counter is constructed as a printed circuit. Deposited circuit. The store instruction may be called a nickel-iron alloy films compose the magnetic load pulse. The read sample pulse may be cell material. The cells, in the presence of a termed en unload pulse. If you thoroughly assumeadirectionof ofaddressing, magneticfield, understandtheprinciples direction of reading,andwritingasappliedinthis magnetization. This particular coincident current memory, you magnetization, as previously discussed, has should have no difficulty understanding how two stable binary states: the ONE state and the ZERO state. An applied magnetic field (in the core memory in your equipment or any causes the cells to other equipment functions. a prescribed direction) 2-62. A memory systemthatoperates switch to the opposite state and remain in much the same as the ferrite-core memory is that state when the magnetizing forceis the thin-film memory. While the operation of removed. In short, thin-film memories operate the ferrite-core memory is still fresh in our inamannersimilartomagneticcore mind, let us cover the thin-film memory and memories. its operation. 2-66. Typicalthin-film memory.Figure 2-63. Thin-Film Memory. Thin-film 4-14 illustrates a portion of a typical thin-film 96 2 7 .2 t WORD WINDING /1. % WORD NO. 1 WORD NO. 2 WORD NO. 3

DIRECTION OF ,MAGNETIZATION

SENSE WINDINGS

Al. = ONE CURRENT

ZERO CURRENT

NDA6 - 132

Figure 414. Magnetic thin-fihn memory. memory. Three printed wires designated bit, word winding currents switches the cell to the word, and sense windings are required to write position; the direction of the currents operate the cells. We should note here that determines the ONE or ZERO state of the thin-film memory cells do not have holes for cell.Readoutisinitiated by applying a threading winding wires, as is the case with currentwithinthe wordwindingina magnetic core memories. Note that the bit direction opposite to the write direction. This and word windings are parallel to each other typical thin-film memory is characterized by within each cell. A coincidence of the bit and destructive readout; therefore, each memory 97 .24

cycle includes a write portion to rewrite the total). The sameistrue of an 8 X256 information back into memory. solid-state RAM. The RAM requires eight 2-67. Inanothertypeof thin-film chips of 256 cells each for a total of 2048 memory,bufferregistersandassociated cells(or 2048 bits).Ifthisisso, what circuitry may be eliminated through the use advantage does the RAM have over the core ofa nondestructiveandsimultaneous memory? Why change from the core memory construction method memory. Every cell is to the chip when they have the same sequence composed of a storage film spot and a readout of operation? Let us see what the advantages spot for each bit. The storage film spot is and disadvantages are when compared to tile made of highcoeicivity material, while the core memory. readout film spot is made of low-coercivity 2-71. Advantagesanddisadvantagesof material. The two spots are spaced closely RAM. First, It us discuss the advantages of together with their preferred direction of the RAM over the ferrite core. The core magnetization at write angles, The permanent memory has current drivers for the "X," "Y," state of the storage spot is sensed without a and inhibit lines. Also, the core memory must changeinitsmagnetic .state(therefore have sense amplifiers because of the low-level assuming nondestructive properties) through signal on the sense line. This all requires the proper switching of the readout spot. power supplies that supply the memory with Currents for reading and resetting are lower the high current needed for its operation. The than the writing current. This difference in RAM alsouses "X" and "Y" linesfor currents is derived from the coercivity values addressing; however, no current drivers are of the two types of film spots. requiredfortheiroperation.Nosense 2-68. The size and cost of magnetic devices amplifiers are required as the "cells" in some in recent years have been reduced with new solid-state memories have the ability to feed processes and materials used in constructing up to 10 circuits without additional buffers. them. However, the use of magnetic storage The RAM'saccesstimeisabout50 devicesisbeing challenged by solid-state nanoseconds with power dissipation of about memories. Following is a brief discussion of 0.5 watts. From this, you can see that a much solid-state memories. smaller power supply will do the job for the 2-69. Solid-State Memories. A few years RAM. Its relatively small sizeisalso an ago, the computer was a large vacuum-tube advantage for the RAM. An example is a unit using many different types of storage 1024-bit RAM on a chip 91 mills by 125 devices. The ferrite-core memory reduced the mills. You might ask, "With all this going for size and access time of the storage unit. it, why not use the RAM in all computers?" Transistorsreplacedthevacuumtube, The answer to this question brings us to the reducing the size, cost, and power required by one main disadvantage of the RAM: It is the computer. Then came the integrated volatile. circuits (ICs) replacing the transistors, and 2-72. Recallthestatement"Thecore now we have large-scaleintegration (LSI) memory is the best overall storage device for replacing the IC. LSI reduced the size, cost, use as eomputer main memory." The reason and power requirements drastically. With the for this statement is the ability of the core arnvai of LSI, new solid-state memories have memory toretain stored data indefinitely been developed that are Jmall, cheap, and withorwithoutpowerapplied.The require powerinthemilliwatt range. A solid-state RAM must have pcwer to retain common item in wide use today, and a good data.If the RAM solid-state memory loses example of the size and cost of the LSI power, data is lost. This is a big disadvantage circuits and memory, is the battery-powered, whencriticaldatamustbestored. A hand-held calculator with memory storage. solid-statememorythatovercomesthis Let us discuss briefly two of the solid-state disadvantage is the read-only memory (ROM). memories that evolved from LSI. 2- 73. Solid-state read-only memory 2-70. Solid-state random access memory (ROM). The read-only memory (ROM) is a (RAM). The RAM and the ferrite core are storage device that stores data which is not identical in operation. The ferrite core and alteredby computerinstructions;itis RAM use "X" and "Y" lines to select one sometimesreferredto asa 'hard-wired location. In the ferrite-core memory, only one program. Three examples of ROM storage core per plane is selected at a time with a devices are (1) magnetic core memory with a given address. The same is true for the RAM; write lockout feature,(2) punched paper that is, only one "cell" per chip is selected at tape, and (3) solid-state ROM which we will a time with a given address. An 8 X 256 bit discuss below. These storage devices are used memory stores 256 eight-bit words (2048 hits for data that isfixedor not changed often. 982" segment of the not, must be l's activate the corresponding All memories, whether ROM or seven-segment LED illustratedin figure 446. programmed. This example LEDdisplays one of the digits 0 2-74. Programming thesolid-state ROM. through 9, depending onwhat segments are The solid-state ROM isconstructed with all activated by a selectedaddress of the ROM. locations either in the ONE orZERO state Once the segments areselected and activated dependent upon the manufacture.Each bit fora particulardigit,theyglowa location must then be set tothe desired state predetermined color that is acharacteristic of by applying excessive current orvoltage. With the particular LED beingused. Now, e.3lect an the punched paper tape, ahole punched in address in figure 4-15 andapply its output to the wrong location meansthe .tape is no the LED segment infigure 4-16; you should longer useful and must bethrown away. The be able to visualizethe digit*. (pattern) to be solid-state ROM is programmedbit by bit displayed by the LED.For t"tample, if you (location by location) muchthe same as the select input address0101(2) in figure 4-15, paper tape; thatis,anerror cannot be LED segments A, C, D,E, and G of figure changed. Because of thisfeature, solid-state 4-16 are selected fordisplay. Now, if you ROM programming is oftenreferred to as draw out each segmentselected, connecting up-the-creek programming.Since the program each to one another,you'll see that the digit 5 must be error free thefirst time it is written, a wouldbedisplayed.Now, try another truth table is constructedpriorto selection. programming. There are somesolid-state 2-76. Themostimportantpoint you ROMs that can be erasedand reprogrammed, should keep in mindabout the ROM (just but they are expensiveand not widely used. discussed) is that the preprogrammust not table have any errors. Thisfact revealed itself when 2-75. Anexampleofatruth output from figure4-15 to the constructed for a ROMthat functions to we applied an 4-16. That is, if a 1 a seven-segment LED segment of figure activatethe segment of had shown up insteadof a 0 in an output light-emitting diode (LED) isshown in figure digit of each input position of figure4-15, the intended 4-15. Note that the output would not have beendisplayed correctly. address location consistsof l's and O's. The

INPUT OUTPUT PATTERN ADDRESS

A GH D CB A BCDEE 0 1 1 1 0 0 0 0 0 0 1 1 1 0 0 0 0 0 1 0 0 0 1 0 1 1 2 0 1 1 0 1 0 0 0 1 0 1 1 3 1 1 0 0 1 0 0 0 1 1 1 1 4 1 0 0 1 1 0 0 1 0 0 0 1 5 1 1 0 1 1 0 0 1 0 1 1 0 1 1 1 1 0 6 0 1 1 0 1 0 1 0 0 0 0 0 7 0 1 1 1 1 1 1 8 1 1 1 1 1 0 1 0 0 0 1 1 0 9 1 1 1 0 1 1 1 0 0 1 1 Nil; .6-1 31

Figure 4-15. ROM programmingtruth table. 99 .2/

A Chapter 2 are a necessity to understanding the functioning of the arithmetic unit. Another very important circuit that is used within the arithmetic unit is the adder. There are two tves of adders: half-adder and full-adder. 3-3. Adders. The circuit requirements for binary addition can be found by examining the rules for addition of any two bits. Recall thatthereareonlyfourpossiblesum coinbinations of two bits:

0 1 0 1 Augend bit +0 +0 +1 +1 Addend bit 0 1 1 0 Sum bit (0) (0)(0) (1) Carry bit

From the above, you can see a need for an arrangementoflogiccircuitsthatadds combinations of any two bits and produces proper sum and carry outputs for each. The circuits that are needed must be based upon the individual requirements for the sum bit and the carry bit. If the augend bit is called A and the addend bit B, then the sum bit is 1 when: (A OR B) AND NOT (A AND B) 2. 1 (Sum) The carry bit is (1) when: (A AND B)(1) (Carry)

NDA6-129 3-4. Half-adder. It is possible to use one AND-circuit for (A AND B) and take the Figure 4-16. LED display (seven segment). carry output directly from it. An inverter and a second AND-gate takes care of the AND NOT term, while an OR-gate handles the (A 3. Arithmetic Unit OR B) term. The composite logic diagram is showninpart A offigure4-17.This 34. The arithmetic unit is the functional arrangement for adding two binary bits and heart of the computer. It is that portion of producing the proper sum and carry bits is thecomputerhardwareinwhich all arithmetic and most logical operations are performed.Thisunitusuallyhasthe capabilitiesof performing the arithmetic o perations of addition, subtraction, SUM multiplication, and division. Most of these operations can be broken down into the simple arithmetic process of addition. Recall that subtraction can be carried out by adding the complement of the subtrahend to the CARRY minuend, multiplication by repeated addition andshifts,anddivision byrepeated subtraction and-shifts. The arithmetic unit (A) LOGIC DIAGRAM must alsobe capable of recognizing both positive and negative numbers and modifying its operations accordingly. Another important requirement of this unit is to gen3rate specific signals needed to perform specific operations (within the arithmetic unit) when anthmetic operational instructions are decoded. On &LOCK DIAGRAM 3-2. A knowledge and an understanding of NDA6-137 thecountersandregistersdiscussedin Chapter 3 and the logic gates discussed in Figure 4-17. Halfadder circuit. 100 atsii called a half-adder. A common block symbol for this circuit appears in part B of figure 4-17;it should be remembered thatthis symbol may represent any of several possible circuit arrangements as well as the one in part A of figure 4-17. 3-5. In operation, if only one input is 1, the output 1 from the OR-circuit is applied to one input of AND-gate2.Inthiscase, AND-gate 1 cannot produce an output with only one input present, so the carry is (0). This carry is inverted to 1 and applied to the other input of AND-gate 2, resulting in a sum bit of 1. If A and B are both l's, AND-gate 1 produces a carry of 1 which is inverted to 0 and applied to the other input of AND-gate 2. With a 0 on one input, this AND-gate cannot YOAA-2:i provide an output even though a 1 comes from the OR-circuit, so the-..sum bit is 0. Figure 4-19. Sample computer. Finally, if A and B are O's, both the sum and carry bits are O's. 3-6. An arrangement of this type (called a 3-7. Full-adder. Firstofall,itwas half-adder) cannot add two binary numbers, necessary to establish a fixed anddefinite pattern that would cover all possible addition although it can add two bits. The reason can problems. The example just given for the beseen by performing 'asample binary addition,showingthecarriesfrom one half-adder used five-bit words, but in an column to the next: actual computer the words might be of any length and carries could occur in any column. (1)(1)(1) Column carry Recall when the l's complement system is 0 0 1 1 1 Augend used to represent negative numbers, the end 0 0 0 1 1 Addend carry (if it occurs) must be taken aroundand 1 0 1 0 Sum entered into the least significant column. To maketheadditionpatternregular,the Although only two numbers are being added, practical thing to do is to consider that there some columns requirethat threebits be will always be a carry into each column, but summed becall. n of the carries fromother that the carry might be 1 or 0. Thus, the columns. A single :alf-adder cannotdo this, example becomes: but a means for doing it has beendevised: a full-adder. (0)(1) (1)(1) (0) Column carry 0 0 1 1 1 Augend 0 0 0 1 1 Addend 0 1 0 1 0 Sum

3-8. The carryintheleastsignificant COLUMNCMINYOuy column is always (0) at the beginning of an addition, although an end carry may have to be entered there later. There are nowthree bits to be added in every column. The first 140 CANNY COLLomm %Or SIT half-adder adds two of them, but a second (Al LOGIC DIVCIA half-adder is needed to add the third bit to

I I I the sum of the first two. Since there is a carry of (0) or (1) from each half-adder, some additional logic circuitry is needed to handle c the carry out of the column. Probablythe l I most common method of accomplishingthis, (i) SLOCI OIANNAN as shown in part A offigure 4-18, is to add the augend and addend bits (A and B) in the NDA6-144 first half-adder which produces a temporary Figure 4.18. Full.adder circuit. sum bit and a first carry: 101 2.73

1 Augend bit the generation of the STORE command and 1 Addend bit its appropriate control signals. Also, to cause 0 Sum bit the computer to stop functioning requires the (0) First carry (out) generation of a HALT anditsassociated control signals. 3-9. In the second half-adder, the carry-in 3-13. That portion of the block diagram in from a less significant column is added to the figure 4-19 in the enclosed area shows the tcmporary sumbit,which producesthe general organization of a typical arithmetic column sum bit and a second carry. unit. It consists primarily of three registers, an addercircuit,andcontrollogic.For 0 Temporary sum bit convenience,thevariousregistersof the (1) Column carry (in) arithmetic unit are generally given 1 Sum bit designations such as "A-register," (0) Second carry (out) "B-register," "X-register," and "MQ-register." 3-14. Accumulator. The basic register of If either the first or the second carry is 1, it the arithmetic unit is generally referred to as must be the column carry-out. Since any the accumulator register. As its name suggests, carryresulting from additionina given an accumulator keeps a running total of the column must be sentto the next, some arithmetic operations. The adumulator also additionalcircuitryisneeded. Notice, provides storage for one of the operands however, that both carries cannot be l's; if (numberstobe operated on) during the the first is a 1, as in the preceding example, arithmetic operation. The operands handled the second can only be (0). Thus, all that is by the accumulator are the augend, minuend, necessary to produce the column carry-out is multiplier, and dividend. The multiplier and to feed both first and second carries to an dividend are found in this register at the start OR-circuit, as shown in part A of figure 4-18. of the multiplication and division operations, 3-10. The arrangement shown in this figure and_a_s.these operations proceed, this register isafull-adder;so-calledbecausertcan provides temporary storage of the partial properly handle all of the addition4hat might products and quotients as they are developed. occur ina column, including the carries Results of an arithmetic operation may be between columns. Part A of figure 4-18 stored into memory from this register through represents only one of a number of possible the memory information register (MIR). circuit arrangements. The usual block symbol 315. MQregister. This register acts as an is shown in part B of figure 4-18. extension of the accumulator, and it is used 3-11. Sample Computer. The simplified during the multiply and divide operations. block diagram illustrated in figure 4-19 shows During these operations, the final product or the arithmetic unitin relationship to the quotientisdevelopedhere.inorderto memory unit and a portion of the control perform these operations, this register must circuitry. Recall that the memory stores both be capable of arithmetic shifts in conjunction the program (instruction words) and the with thelredifiiulator. operands(datawords).Eachofthese 3-16. X-register. Like the accumulator, this computer words is of vital importance to the register is used to temporarily store one of the operationofthearithmeticunit.The operands during an arithmetic operation. This instructionwordsuppliesthe command operand may be the addend, subtrahend, (ADD, SUB, etc.) to the instruction control divisor, or multiplicand, depending on the logic which, in turn, sequences the arithmetic operation to be performed. It should be noted unit through an arithmetical operation. The thatthisis theonlyarithmeticregister data word, as its name implies, supplies the capable of receiving data from memory that is data to be manipulated during the operation. going into the arithmetic unit. 3-12. The instruction, control circuits are 3-17, Adders. To be functional, the adders considered a part of the control unit and must be capable of handling both positive and contain the command decoders and the order negative numbers during add and subtract matrix. Command decoders simply detect the operations. Often, the adder circuits are used contents of the operations register to identify as comparators to compare the equality or what operation is to be performed. The order inequalityoftheoperands storedin the matrix logic circuits control the operation of X-register and the accumulator. This logical the cromputer once the command has been operation is madepossiblebysimply detected. At the conclusion of an arithmetic inhibiting the carry input to each full-adder operation, the results are in the accumulator. stage and monitoring the sum outputs. In To write this data into memory necessitates effect, with the carry input inhibited, the 102 SW 00 SW ... MCI NDA6-138

Figure 4-20. Simplified arithmeticcircuit.

with the 3-19.Arithmetic Unit Operational full-adder functions as a half-adder arerequired to sum output beingtheequivalent of the Instructions.Instructions that is, command and direct the operationof the exclusive OR (comparator) circuits; arithmetic unit. They are part ofthe program AB or AB C. Within this which is usually stored in memory.A few of 3-18. Arithmetic control logic. the most importantinstructions and the portion of the arithmetic unit arefound: the arithmetic Circuits to translate and carry outthe actions that take place within subcommands received from the order unit, when they are received inthe instruction control Circuits, are as follows. matrix. 3-20. GET. TheGET (or FETCH) Arithmetic pause timing circuits which instruction first applies a clearpulse to the control the operation of thearithmetic adds toit the themultiplicationand accumulator register, then unitduring contents of the speCified memorylocation. It division operations. instruction is control, should be easy to see why this Sign bit control circuits' which instructioninmost to some extent, the overflowcircuits and usuallytheinitial arithmetic programs. determine the sign of the results of an instrwAion adds arithmetic operation. 3-21. Addition. The ADD 103 215

the contents of the specified location to the adders, and accumulator. This figure shows contents of the accumulator register. The only those gates and registers necessary for resultant sum is found in the accumulator at explanation of these two basic functions. the end of the operation. It should be noted Your reference to this figure should make it that when a computer has the capabilities of easier to follow the explanations. handling both positive and negative numbers, 3-27. In working any problem on paper, as is usually the case, this sum will be the we usually start with a clean sheet. The same "algebraic sum" as follows: effect is achieved in a machine by clearing the registers. Looking at figure 4-20, we see that a Addend +3 -3-3 +3 clear pulse is sent to each register of the Augend +2 -2 +2 -2 arithmetic unit and resets all registers to the Sum +5 -5 -1 +1 ZERO state. We now have our "clean paper" in the machine and are now ready to start 3-22. Subtraction. The SUB instruction bringing in the data words that are to be subtractsthecontentsofthespecified worked on.Jriour example, we add the memory location from the contents of the numbers 0 1 1 1(2,(augend) to 0 1 0 1(2) accumulator. This instruction differs from the (addend). These small numbers do not exceed ADD instruction only insofar as the contents thebitcapacityoftheaccumulator; of the specified memory location therefore, the MQ-register is not required. (subtrahend) are complemented before being This keeps the operation simple and makes added to the accumulator. Again, due to the the explanation easier to follow. As each step signed quantities, the resultant difference is of the operation is discussed, the resultant the "algebraic difference." An example is as status of the registers in the arithmetic unit is follows: indicated. STEP1. Apply CLEAR pulsetoall Minuend +3 +3 -3 -3 registers. Subtrahend -2 +2 -2 +3 Difference +5 +1 -1 -6 0 0 0 0X-register 0 0 0 0adding register 3-23. Multiplication. The MULT 0 0 0 0accumulator ) instruction multipliesthe contents of the specified memory location by the contents of the accumulator. When multiplying signed STEP2. Entertheaugendintothe quantities, the arithmetic unit must determine X-register. The information that we are now the sign of each of the operands and assign putting into the X-register is coming from the proper sign to the product. The rules for memory in parallel form. Looking again at the multiplication of signed quantities are figure 4-20, you can see that the information that like signs produce a positive product inputistothe SET (ONE) side of the while unlike signs produce a negative product. X-register flip-flops (F/Fs). In this case, a F/F isset only when its corresponding place 3-24. Division. The DIV instruction divides position within the number contains a ONE. the contents of the accumulator (dividend) by Thus, we now have: the contents of the specified memory location (divisor). When dividing signal quantities, the rules are the same as for multiplication; that 0 1 1 1Xregister is, a negative quantity divided into a negative 0 0 0 0adding register quantity results in a positive quotient. 0 0 0 0accumulator 3-25 Analysis of Arithmetic Functions. Now that we have discussed the makeup of a 3-28. Now, because the X-register is our typicalarithmeticunit,thefunctionsit receiving register by which all numbers enter performs,andsomeofthearithmetic the arithmetic unit,it is necessary to move instructions required to perform its function, the augend to the accumulator so that we can letusanalyzetwoofthese functions: transferinthe addend. Looking at figure addition and subtraction. To make it easy to 4-20, you can see that the only way to understand these functions, a comparison is transfer from theX-registerto the made between the computer functions and accumulator isto combine (using the add pencil-and-paper functions for each operation. pulse) the contents of the X-register and the 3-26. Addition. This function is discussed adding register, and then transfer (using the first since itis the basic operation of the transfer pulse) the resultant from the adding arithmetic unit. Figure 4-20 is a simplified register tothe accumulator. When thisis version of the arithmetic unit's X-register, done, we have: a 104 2',--.0 _ 2.76 0 1 1 1X-register STEP5. Cleartheaccumulatorand 0 1 1 1adding register transfer the contents of the adding register to 0 1 1 1accumulator the accumulator. The command lines for the transfer-and-clearofthe accumulator are shown infigure 4-20. This completes the Sincethe machine does not destroy the actual arithmetic operation. The final action information in a register .when it transfers is to transfer the contents of the accumulator from one register to another, it is necessary to to storage, where it remains for later use. The clear (using the clear pulse) the X- and adding computer now halts or proceeds with ale next registers before bringing in the second part of problem, dependent on the next instruction. our problem. When this isdone, we have: 3-29. Subtraction, Remember thatearlier 0000 X-register we made the statementthat an arithmetic 0 0 0 0adding register unit performs all operations byaddition. We accumulator 0 1 1 1 willnowseehowthemachinedoes subtraction through the use of addition.This intothe explanation is brief, since a detailed analysis STEP3. Entertheaddend of the machine action was givenduring the X-register. explanation of addition. The discussionis based upon the circuit shown infigure 4-20. 0 1 0 1X-register toall 0 0 0 0adding register STEP1. Apply CLEAR pulse 0 1 1 1accumulator registers.

0 C 0 0X-register STEP 4. Add the contents of the X-register 0 0 0 0adding register and accumulator. A pulse representingthe 0 6 0 0accdtmlator command to ADD comes from the control unit and enters the circuit shown infigure STEP 2. Enter the minuend 0 1 1 1 into 4-20 on-a line labeled ADD. Tracing this line to the left, we see that itis connected to the X-register. AND-gates. We also see that the other input to each of these gates is from theONE-side 0 1 1 1X-register output of a F/F in the X-register.Therefore, 0 0 0 0adding register when the ADD pulse is present, there is a 0 0 0 0' :accumulator conditioning output from each AND-gate that has a oNg on its other input line from the STEP 3. Now, as we didin addition, X-register. The output from these AND-gates combine the contents of the X-registerand is coupled through an OR-gate to theadder accumulator in the adding register. circuits. Looking at these adder circuits, we find that their other input comes from the ONE-side output of the accumulator F/Fs 0 1 1 1X-register 0 1 1 1adding regu,ter through additional AND-gates that are also accumulator conditioned by the ADD pulse. Therefore, 0 0 0 0 when the ADD pulse is present, there is an output from each AND-gate having a ONE on STEP 4. Our next operation is to transfer its input line from the accumulator. This is the contents of the adding register tothe how the contents of the accumulator and accumulator and then clear the X-register and X-register are transferred simultaneously to adding register. the ADDERS in order to accomplishthe adding function. The adders, in turn, are 0 0 0 0X-register connected directly to the ONE-side outputs 0 0 0 0adding register of the adding register which now holds the 0 11 accumulator SUM. The adding register holds the sum until itis commandedtotransferittothe accumulator. We now have the following STEP 5. Enter the subtrahend 0 1 0 1 into configuration in the arithmetic unit: the X-register.

01 01 X-regiater 1 X-regiater 0 1 0 adding register 1 1 00adding register 00 00 01 11 accumulator 0 1 11 accumulator 105 2.77

STEP 6. Subtract the contents of the c. Clear the adding register. X-register from that of the accumulator. This d. The contents of the accumulator may be isaccomplishedby takingtheONE's sent to memory for storage, or retained complement of the subtrahend. When the in the accumulator to be used in the ONE's complement of a number is required, next operation. as in operations involving subtraction and division, itis taken from the ZERO side of 3-31. With the exchanging of information the register F/Fs. Also, in order to simplify between theinput, output, memory. and machine operations, the ONE's complement is arithmetic units, there must be some means of changed to the TWO's complement. This is control. This is where the eontrol unit fits done by adding 1 to the ONE's complement into the computer operation, and itisthe of the number. Keep these things in mind as next subject to be discussed. we proceed with the explanation. To illustrate the procedure, a pencil-and-paper presentation of the problem is rust given. 4. Control Unit 4-1. In all the arithmetic arrangements, the 0 1 0 1subtrahend need is clear for control pulses and signals. 1 01 0 ONE's complement of the subtrahend These must be fed to the proper places at the 1 add one proper times in order to oper. or close gates, 1 0 11 TWO's complement of subtrahend start or stop operations, transfer numbers 0 1 1 1 minuend from one place to another, and control other I0 0 1 0 difference (obtained by addition) functions of the computer. 4-2. The circuitry that generates, times, NOTE: When the TWO's complement of and distributes the control signals,usually the subtrahend is added to the minuend, there called commands, may be as complex as the is a carry generated in the most significant actualarithmetic circuitryespecially in a position. This carry is indicated as L There is large-scale computer. The generating, timing, no register stage to store this cany, and it is and majordistributingcircuits,taken thereforelost.This carry from the most together, make up the control unit. This unit significant position is disregarded; therefore, must provide commands not only tothe it is not considered as part of the answer. Is arithmetic portion of the computer but also this correct? To be sure, write the binary tothe mainstorage,input,andoutput numbers with their decimal equivalents next portions as well. to them and subtract. 4-3. For a complete understanding of the role played by the control unit, it is necessary to recall some of what you have learned about Example: 31 1 1 7 minuend 0101= 5 subtrahend the manner in which the program governs the operationoftheentirecomputer. The 00 1 0=2 difference program, of course, is a set of instructions, coded in the form of numbers (words) that 3-30. Now let us proceed with the machine are stored within the computer's memory. operation by pulsing the SUB line shown in 4-4. Regardless of where the program is figure 4-20. The result of this is to add the stored, each instruction word is taken in a complement of the number (subtrahend) in separate stepin the proper sequenceby the the X-register and the number (minuend) in control unit and decoded to See what major the accumulator. Notice that the SUB pulse is operationmust beperformednext. The fed to the first adder stage. Addition of this c3ntrol circuitry then develops the complete SUB pulse gives the TWO's complement. The setof commands or controlsignals that register configuration is now: enables all the parts of that operation to be carried out by the other units of the machine. 1 0 1 0 X-register (complemented subtrahend) 4-5. An instruction, for example, gives the 1 subtract pulse to udder order add; it also gives the storage address of 0111 accumulator the number to he added to the contents of 0 0 1 0 resultant in the adding register the accumulator. The control unit must then put out a series of commands which may be STEP 7. The remaining steps are shifting single pulses, signal levels, a series of pulses, or and clearing steps. They are as follows: any combination of these. There are as many a. Clear the accumulator and X-register. possible variations in ;I set of commands to b. Shift the content of the adding register perform the addition operation as tere are to the accumulator. variations in adder.accumulator circuitry.

106 2 2.7 it

ADDRESS SELECTION MEMORY CIRCUITS

.TO INPUT TO ALL 3UT P UT ELEMENTS41111-----. OEVICES

=MO ,111 Ommiloora. ammo Om.

[OPERATION ADDRESS

s .. s TO ALL CONTROL INSTRUCTION ELEMENTS CIRCUITS COUNTER

COKTROL ELEMENT 011, NDA6-145

Figure 4-21. Instruction control.

address part of the instructionand arrange 4-6. The operation portion of an circuitrytoformanactualelectrical instruction may, of course,callfor any location so number of jobs tp .be done inthe computer connection to the correct memory operation. The that information can be put in ortaken out. instead of an arithmetic 4-9. Ordinarily, a blockof the lowest varietyof operationsdepends upon, the Examples of numbered memory address is setaside for the capabilities of the computer. addresses 00 through these jobs found in nearly everycomputer are program. Assuming that 99were reservedforthispurpose, any the transferring of numbersfrom place to first devices. program wouldbestoredwithits place and the control of input-output instruction in address 00, its secondin address 4-7 .Program Control. After one Thus, a 67-step instruction (program step) hasbeen carried 01, Rs third in address 02, etc. obtain the next progam would bestoredin sequence in out, the contzol unit must address 00 through 66. one from storage.But how does it know the shown in location of the next instruction?There are 4-10. The instruction counter problem. One figure 4-21iscleared before the program several pouible solutions to this begins. Its indication of 000. . .000is sent to of the easiestisto set aside a blockof causing them to which the program is the address selection circuits, memory addresses in make a connection to memoryaddress 00. alwayskept,anduse an instruction or The first instruction is taken outof memory program co un terusually a binary through counterto keep track ofthe progress of the and sentto the ,control circuits address. An switchingcircuitsoperated by commands program and theinstruction issued for this purpose. The time spentin the arrangement for doing thisin the stored the instruction is called in figure 4-21. process of obtaining program computer appears program cycle time orinstruction cycle. 4-8. In this arrangement, the memoryor of storing 4-11. Oncein thecontrolunit,the main storage unit must be capable storage including the input instruction is placed in a temporary many numbers, register called either the instructionregister or information (data words) withwhich the The control computer is to work, the partialroults to be the operation-address register. results, and the circuitsissue commands to carryout' the held for later use, the final operation called for by this firstinstruction programitself.Each memory locationis during whatiscalledthe executionor identified by an address. Therefore,there of the must be selection circuitry totranslate the operation cycle. The address part 107

0 t' a 7 7 instruction goes tothe address selection 4-16. Operation Control. The commands circuits causing memory to be addressed, thus necessary to carry out an instruction have obtaining the number representing the data to been described as a set of pulses (sometimes be operated upon. The address may, in other types of signals) sent to the proper another instance, call for a connection toone placesat the proper times. Different sets of the input or output devices to obtainor (pulses) are needed, of course, to carry out send out information.' different operations, although certain 4-12. Toward the end of the operation individual commands may well be used in a being performed, a pulse is sent from the number of operations. control circuits to advance the instruction 4-17. There are two basic approaches to counter by 1. When the operation cycle ends, theproblemofhandlingoperationsin control is turned over again to the instruction sequence. First, it is possible to use a timing counter and a new instruction cycle begins. arrangement (oscillator) and rigidly control The counter now sends 000.. .001 to the each separate .operation, issuing each address-selection circuits. This second command at the proper time. The timing instruction of the program is taken from arrangement is called the clock, and it is a memory address 1 and sent to the operation synchronous controlmethod becauseall address register to be executed. operations performed in the computer are 4-13. Theprocessofbringingeach synchronized by the clock. The device which instruction in sequence from the memory, produces the clock pulseisan accurate executingit, and stepping the instruction oscillator, generally crystal-controlled, counter by 1, continues in this manner until followed by amplifying and pulse-shaping the entire program has been performed or circuits. until a branch instruction, sometimes called 4-18. ln the second method of control, transfer or jump, makes it possible to change calledasynchronous, no clock is used for a program or repeat parts of it,either timing operations, although there may be a unconditionallyor under control of the clock for other purposes. As soon as one resultsthathavebeencomputed.For operation is finished, a signal is provided to example, the programmer may choose to start the next. The timing of commands is order a branch only if the number left in the done by starting a pulse through a long delay accumulator is negative. If sensing (checking line (when each operation begins) and tapping its state) shows it to be positive, the branch is off commands at the proper time intervals. not accomplished. 4-19. Some computers use the 4-14. When a branch is to be made, the synchronous system, others the asynchronous address part of the instruction is taken from system, and quite a number use combinations the instruction register and loaded directly of the twowith synchronous control for intotheinstructioncounter,replacing short operations and asynchronous control to whatevernumberwaspreviouslythere. simplifyhandlingofthelongerones. Therefore, the next instruction taken from Althoughitistruethat operationsare memory is not from the next address in the performed faster under asynchronous control sequence that was being followed but is from because no fixed time intervals (cycles of the the address given by the branch instruction. clockdevice)areused,the circuitryis From this point on, the instruction counter is generally more complex than the synchronous again pulsed once for each instruction carried control. out,soafreshnumericalsequence of 4-20. Synchronous control. The first item instructions is followed until another branch of interest in this system is the clock and the can be made to either a higher or lower method of timing. There are certain time numbered step of the program. limitations in any computer, one of which is 4-15. In other types of computer, those the period required to transmit a single bit of not storing the program instruction in the information and allow the circuits to recover memoryelements,differentmethods of from transients. This period sets the minimum instructioncontrolmay beused. These limit of one bit time. depend to a geat extent, of course, upon the 4-21. In a serial-mode computer, the bits nature of the device or arrangement used to of a word follow each other on a single wire, hold the program. Uzually, the instructions and exact timing is so essential (at the inputs are made available in sequence, and, when to an AND-circuit, for example) that a clock eachoperationiscompleted, the control must be used to set the basic pulse repetition element senses the next instruction. This frequency or bit-time interval. If pulse-type procedure is somewhat similar to that used by signalsare used, clock pulses atbit-time a stored-program computer. intervals .musrbe distributed throughout the 108

2 ..) clockinterValsarerequiredtoperform r--caliirOt. um? additionordivision? How many for an instructioncycle,orfortransferringa CLOCK number? It is obviously impractical to run a continuous count of the clock pulses, because in 10 seconds of operation the count would !!!! be between 5 and 20 million for most OPERATION GATING computers. A cycling count, on the other RISC. hand, proves to be very practical. By counting

COrmAMOS a given number of clockpulses and then ...... - .... -...... -.. - - ..... - ...... --/ beginning the count over again, the passage of START TRAMSFU NUINCR time in the computer is divided into intervals of useful length that can be called clock IIARITHMETIC *WRY ELEMENT KAISERS cycles or machine cycles. A simple ring counter can do this and provide adifferent NDA6-13C active output for each step of the count. 4-25. A factor that must be considered in Figure 4-22. Synchronous control of operations. all machines, parallel or serial, is the time required (access time) to transfer numbers circuitry to provide the frequent reshaping into or out of memory. This puts a limitation and retiming of information pulses. Thisholds on the speed of operation,because each true even if the controlelement itselfis number to be used.in computation and each asynchronous inoperation and does not result must go through this transfer. The depend on the clock. access time in some computers issomewhat 4-22. Inparallel-modeoperations,the longer than the time needed for the shorter bit-titheintervalisusuallylessvitalto operations, such as addition. By making the successful operation, so the clock pulses need length of the clock interval equal to the access not occur every bit time. Instead,they may time, the all-important transfer or numbers be producedat some longer or shorter and the shorter operations can be performed interval, which is more useful in in one clock interval. When one of the longer synchronizing the operationsofthe operations such as multiplication or division computer. However, since the bit time isthe must bedone, the required number of basicmeasure of the speed withwhich complete clock intervals is allowed. numbers can follow one anotherinthe itis not often that a different 4-26. Using an arrangement of this sort, circuitry, illustrated in figure 4-22, two complete clock interval is selected. out 4-23. Whatever the basic interval selected, cycles are the minimum required to carry any instruction. The first mustbe a program the clock-pulse intervals bear some relationship to real time (time in the "real or instruction cycle to getthe instruction out world"). Many types of problems solvedby of memory and load it into the operation computers involve keeping track of real time. address register. The active (true) signals from for the various stages of the clock-ring counter Militaryweapons controlcomputers, switched to provide instance,must solvetime-speed-distance are gated or otherwise problems in order to cope with an incoming commands controlling the address selection enemy, while computersoperating various and other circuits to obtain theinstruction types of input-output devices must timetheir from memory. When this instruction cycleis nearly done, a command sets a flip-flop or operations. It is frequently valuable to select a the clock-pulseintervalthatcanbeeasily switch to start the operation cycle. Now, converted to real time. A fairly common rate circuit gating the clock-ring counter outputs representing is1 megacycle, which means pulses are at comes under control of the signal 1-microsecond intervals. Using decimal the operation called for, and the result is a set countersor other circuitsfor frequency of commands necessary to performthat is possible to obtain pulses at operation. The commands must be timed to division, it of 1-second intervals for useful time provide the maximum time for each part measurements within the computer. an operation plus a safetyfactor. In binary 4-24. Itbecomesapparentthatthe addition, for example, time must be allotted continuous stream of clock pulses cannot be for the propagation of a possible carryfrom used in this form. Some method must be used each place, even though no carries occurin to keep track of the pulses. This isusually some problems.If more than one clock done by a counter. For example, how many interval is required, a simple counterkeeps 109

r.) .... A. %_,I. / Ccite7ROZ 7NIT 1 201/2, 21, 223/4, and 24 bit times,as shown at NEXT INSTRUCTION A of figur.e 4-24.

4-29. A pulse is inserted in the delayline where the operation signalappears. One bit OPERATION time later, it emerges from thefirst delay circuit, goes on the first commandline, and also enters the next delay section.Perhaps this LONG DELAY first command might cleara storage registerandstarttheaddressselection circuitry throughtheprocess of taking a number out of memory. The pulseemerges 4 from the second section 8% bit times COMMANDS I after the -.--.. -. -...... --- - -.. J first operation was started and issent out on another command line to performsome other START STOP 'TRANSFER control function. In this fashion, the pulse NUMBER travels through the entire lengthof the delay line and is tapped off at intervalsto form the ARITHMETIC NUMBERS ELEMENT MEMORY commands. From the ond of the line,the pulse goes to an OR-gate fromwhich it ,mmowill emerges as a command calling for the next NDA6-140 instruction. Figure 4-23. Asynchronous control of operations. 4-30. Although it might seemnecessary to haveone delaylinefortheprocess of obtaininginstructions track of them and stops the executionof the andonefoxeach instruction when theproper number of differentoperation, this would requirean intervals has occurred. unnecessary amount of circuitry. Actually, 4-27. When many operations are quite similar and the theoperation is almost parts of longer ones are often repeated; it is completed, the switching is reset foranothe: instruction possible to use one long delay line with from memory. In this switchingcircuits, arrangement, all program or instruction cycles alternatepaths,and are identical, but the operation cycles depend feedback loops to produce commandsfor all operations. One small portion of sucha line is upon the operation to be performed. All shown in part B of figure 4-24. The heavy, commands are provided by the timedpulses downward pointing arrows are commands, fromtheclock-ringcounter. Theyare and the operations called for control theleads switched through the gating circuitryunder labeled X. Some, but not all, of the X-leads control of either the operation signalor are energized when a given operation is to be various miscellaneous signals, such as the one performed. The operation of the circuitryis that determines whether an instructionor straightforward and should be clear enough, operation cycle is required. The operation except possiblyforthe signal is translated (usually ina matrix) from feedbackloop the operation involving the counter. If a pulseenters this portion of the instruction loop through the OR-gata and findsthat which is contained in the operationaddress register (see fig. 4-20). operation signal X2 is present, the feedback loop through INH is inoperativewhile the 4-28. Asynchronous control. Thereare a AND-gateisabtivated, numberofpossible letting thesignal variationsofthe through without additional delay. If X2 isnot asynchronouscontrolmethod. The basic present, however, the pulse does not get approach appears in figure 4-23. It shows how through the AND-gate but doesenter the thetiming of commands is accomplished feedback loop through the INH circuit. The through the use of a long delay line instead of pulseisdelayed eachtime itcirculates a clock. This delay line consists of a number through the loop. Each time the pulsereturns of delay paths and switching circuits where to the OR-gate, italso steps the counter. necessary. Commands are tapped off between When a predetermined count is reached, circuits at the required intervals. An operation meaning the pulse has circulated and been which requires 24 bit times for its operation delayed this many timed, the counter output cycle, for example, can be handled bya string opens the loop by generating a signal similar of delays totaling 24 bit times. Commands to X2 and enables the pulse to exit through may be taken off at the end of 1, 91A, 16, the AND-gate. NEXT INSTRUCTION rap FROM OTHER --.---11110 OR DELA)* LINES

1..... ovEISoo =lpwo -411--- E40 $'40 A 61iD 4/51) INNOMII11

22% 111 16 20% 21 COMMANDS

NEXT INSTRUCTION

ANO INN OR

=1 AHO PULSE wig

OR INN ANO

ICONNANDI

A 0 INN 10 )4NP

[ COUNTER

N1116-143 Figure 4-24. Delay lines for asynchronous control.

performed. An asynchronousadder,for 4-31. Thus, one long delay line with many control possiblepathsandloopsenablesthe example, can be built to allow the commands for any operation to be produced. pulse to run with the carries. As soon as carry delay propagation is completed, the controlpulse is A common path at the beginning of the next produces thecommandsnecessary for returned to the control element as a procuring each instruction. The timing for instruction command. each operation is exactly what is requires, not 4-32. Multiplication can be handledin a number of fixed lengthcycles with the similar fashion. In this type of arrangement, possibilityof wasted timeifthe actual thecontrolelementtellsthe arithmetic operation ends before the end of the last element "start" and then waits for asignal to cycle. This idea of asynchronous control can come back, saying "finished." be extended in some types of circuitryby letting the controlpulse run through the 4-33. Arithmetic Control Operation.To circuits themselves as the operation is being illustrate the action of a typicalarithmetic 111 MEMORY MEMORY PROGRAM READ H. SELEC- COUNTER PROGRAM OPERATION oaf- TION .10TRANSFER COUNTER ----..-- CIRCUITS GATES OM REGISTER .4

i * TRANSFER PROGRAM INSTRUCTION COUNTER IR EAD-IN ACCUMULATOR REGISTER GATES TO SELECTION GATES H CIRCUITS READ-IN A REGISTER i GATES STEP PROGRAM OPERATION COUNTER REGISTER ADORESS AND REGISTER A REGISTER DECODER *

ADDERS

TRANSFER ADDRESS i GATES - PROGRAM _ - CARRY ACCUMULATOR 0. TIME GAT ES PULSE r- DISTRIOUTOR i i i * ACCUMULATOR 1 1 SHIFT REGISTER 4 II REGISTER i I 1 I i I I 1 ACCUMULATOR IP OPERATION COMMANDS READ-OUT GATES 1 TO ARITHMETIC UNIT

OPERATE 1 TIME 4. PULSE DISTRIBUTOR i 1

1 COMMAND I GENERATOR GATES NDA6-146 Figure 4-25. Arithmetic control circuit.

0?93 ` 291_3:i control circuit, we will follow the execution.active.Thetransferaddressgatesare of an instruction in the circuit shown infigure activated, transferring the address part of the 4-25. Assume that the instruction ADD36 instruction to the Memory selection circuits, occurs in a program. Thisinstruction means whereitisdecoded, and thisresults in that the number in memory location36 addressing of the memory. The same signal should be added to the number which is which activated the transfer address gates also already in the accumulator. Assume also that pulses the memory to cause a read operation this instruction is Step 20 of the program. and transfers the selected operand to the The following summarizes what happens as memory register. The operand whichis now the instruction is executed: in memory register conditions the read in the a. Atthe completion of the previous A-register gates. instruction, the computer automatically goes f. Command lines are now pulsed to cause thearithmeticunittoadd.Thisis into program time. Therefore, the program accomplished as follows: The read in the time pulse distributorqs active. havebeen A-register gates is activated to cause a transfer b.Since..., 19 instructions of the operand from the memory register to executed,thecontents of the program counter is 019, which is the address of the the A-register.Thus, the contents of the A-register and the accumulator are applied as 20thinstruction.Theprogramcounter transfer gates are conditioned by the program inputs to the adders where they combine to count to the memory selection circuits. Here, generate a sum which conditions the carry the program count is decoded to activate accumulator gates.These gates are now memory addressing circuits,resulting in a activated to cause the sum to be transferred transfer of the memory location contents to from the adders to the accumulator register. the memory register. c. The instruction wordwhich is now in 4-34. Any instruction which exercises the the memory register conditions the arithmetic unit follows the same basic pattern instruction register gates. A pulse from the describedinthe ADD instruction. The program time pulsedistributor activates the program counter is steppedandthe instructionregistergates,transferringthe instructionselectedfrom memory. The instruction word to the operation and address instruction, in turn, addresses the memory to registers. Here, the instruction is decoded. select the operand. The arithmetic unit is now The operation part conditions the command commanded to accepttheoperand and generatorgates,andtheaddresspart execute the instruction. conditions the transfer address gates. 4-35. In this chapter, we have discussed d. The program counter is stepped by 1 so three of the five basic units of a typical thatitcontains the address of the next computer system;thatis,the memory, instruction to be executed. arithmetic,and contiolunits.The next e. The computer goes into operatetime so chapter presents a discussion of the two that the operate time pulse distributor is now remaining computer units: input and output.

113 CHAPTER 5

...11ww.....104

Inpiit-Output Units

THE INPUT AND output components of atherefore,includes a buffer device which computer system play an important role in greatly decreases the computer waiting time. interfacingthecomputerwithvarious An input buffer is a storage unit which is input-output devices. Without these written into at the pace of the input device components, computer communication with and read from, by the computer, at the an input or output device would be difficult computer's pace. An output buffer performs and time-consuming. In this chapter, we'll the same function in reverse between the discuss the primary functions of the input and computer and an output device. That is, the output components and the basic operating output buffer is written into at the fast pace principles of several input-output devices. of the computer and read from at the slower pace of the output device. 1-4. Translating Incoming and Outgoing 1. Input and Output Components Data to a Usable Form. In order for us to 1-1. There are many othernames communicatewithpeoplewho speak a associated with these two components. For different language, we need an interpreter. example, in some computer systems they are The same holds true when an input device referred to as input-output control, and in communicates withthe computer or the other systems they are called input-output computer communicateswithanoutput buffers.Normally,the input and output device. The interpreter in this case is the input components of a computer system consist of or output control and interface circuitry the -control, interface, and buffer circuitry which translates one language to another that that performs two primary functiont: isusable by the computer or an output (1) Decrease computer waiting time. devic e. (2) Translate incoming and outgoing data 15. There are several types of to a usable form. input-output (I/O)devices associated with computer systems. Recall that an I/0 device is 1-2. In many older computer systems, the also referred to as a peripheral device. The input control and output control circuitry are typeofperipheraldevicesthatwill' be separate entities in that they are in separate discussed in the remainder of this chapter are cabinets.This type of input and output indicated below. It is not the intention in our control functions to provide communication discussion of these peripherals to present the with the computer on a device priority basis. completetheoryofoperationforeach In laterEomputer systems, the input anddevicethiswouldjustaboutrequirea output control circuitry is a physical part of complete CDC volume for each device. Our an individual input or output device. Device intentionhereis todiscussthemore priority in these systems is provided by the important basic operating characteristics of computer. the devices and, in some instances, illustrate 1-3. Decreasing Computer Waiting Time. theirbasic,mechanical,andelectronic As we know, computers work at very high features. speeds. This is understandable, since there is Paper tape. much work to be done in a minimum amount Magnetic tape. of time. Ifthecomputer demands Card ch. information from an input deyice and then Card reader. has .to wait until the input device can deliver Keyboard. it, computer time is lost. The input system, Printer. 114 2 9 B PAPER TAPE READER A PAPER TAPE PUNCH

''.6-. .< 3------M, . 0 0 q 9? ,, o o o o o o 0 o0 o 00 o 00 o o o o o 0 o0 o/ 0 a I 0 SPROCKET.--/ LCODE HOLE HOLE C5-HOLE CODE PAPER TAPE Figure 54. Paper feed with associated readerand punch.

electrical impulses forinput into a printout Magnetic drum. device or computer unit.This is .done by Magnetic disk. sensing -a pattern ofhole-no-hole with a photoelectric system or asystem of metallic brushes. The reader circuitryis also used to 2. Tape-Handling Devices verify the correctness of akeyboard-prepared 24. There are two types oftapes available tape before the tape isprocessed as I. out systems: paper and for use with computer information. magnetic. Both types canbe used for either 24. A paper-tape system isrelatively slow input or output functions.Each type of tape for processing information.It is, however, :s. has its own distinctiveprocessing equipment, expensive than a magnetic tapesystem and is interchangeable. A and the tapes are not generallyusedwith aspecial-purpose paper tape must beused with a paper punch computer solving scientificproblems of a and reader, and a magnetictape must be used fixed type. with a tape transport unit. 2-6. Magnetic Tape.Magnetic tape is a 2-2. Paper Tape. Paper tape isnormally thin, flexibleplastictape with a uniform used as an I/O device, but it canalso be used coating of ferrous oxide on oneside similar to as a memorydevice for storing computer the tape used in home-styletape recorders. outputs. Information iscoded on the basis of The coatingvarieswith the commercial a hole-no-holecode. In a typical system, the processes used tomanufacture the tape and is holes are punched in the tapeby using a composed of magnetic propertiesthat enable manual keyboard-type paper-tapepunch or it to be magnetized indiscrete units (very byacomputer-controlledpaperpunch. small' magnetized spota).Different patterns of Normally, a computer-preparedtape is an magnetized spots representinformation. In output function and akeyboard-prepared one form of taperecording, a magnetized spot tape is an input functdon.A paper tape, with (bit) mayrepresentabinary 1;a the associated paper-tape punchand reader, is nonmagnetizedspotonthetapemay shown in figure 5-1. represent a binary 0. A more commonsystem interprets and of recording on tape requiresthat both 1 's 2-3. The paper-tape reader and O's be expressed asmagnetized bits. This convertsthepunchedpapertapeinto 115

2 y 2 87

card machmes, from a magnetic drum, or directly from a computer. Once information IBM COMM is transferred to magnetic tape, the reel of tape can either be stored for future use or placed in a tape transport unit. If placed in a tape transport unit, the information on the tape is then read by the read-write head(s) of this unit and the pulse pattern transferred to thecomputer. A typicalmagnetictape transport unit is illustrated in figure 5-2. 2-7. Tapes are also used to receive and record computer outputs. The outputs are processed from the computer to the tape unit. Generally, the information is left on the tape for future use. But if a hard-copy printout of thetapeisdesired,thenthiscanbe accomplished through the use of an auxiliary device (connected separate fromthe computer),therebymaintaining the high speed of the computer outputs. 2-8. Tapes are slow-access memory-type storage units. They are normally classified as an I/0 device, since they are used initially to - load information into the computer and then to record computer outputs. 2-9. Write operation. Writing on magnetic tape occuis as the tape is moving across the magnetic gap of a recording or write head. Electricalpulsesaresentthroughthe recording head coils at desired intervals, and the oxide coatingis magnetized by these pulses. These magnetized areas may be later sensed as a 0 or 1. The number of recording tracks in a write head is determined by the code that is used to represent alphabetic and numeric characters. a 2-10. Magnetic tape moves at high speed duringwrite and read functions. Typical speeds are 75 inches per second and 112.5 inches .per second. The write pulses to the

re..7111. .0... PLASTIC BASE

Figure 52. Magnetic tape transport unit. MAGNETIC OXIDE isaccomplished byrecording 1'switha north-south magnetic alignment and O's with a south-north alignment. A large amountof information can be stored on a length of tape. A typical tape is. about 2000 feet in length and has a word density of 40 or more computer words per inch.

2.6. Information may be transferred to READWRITE COILS magnetic tape through various means such as special typewriters, card-to-tape converters, Figure 5.2A. One-gap read-write head. 116 2 the TAPE MOTION READ GAP writeheadsarefastenoughthat WRITE GAP magnetized spots are almost the same asif the tape were stopped for thetime that the pulse is present. 2-11. Figure5.2A shows one typeof read-write head used with tape.This head has a single gap foreach channel. The headshown in figure 5-2B has twomagnetic gaps. One gap is used for writing andthe other is used for reading. The principles ofreading and writing are the same forboth type heads. However, the two-gap head has theadvantage of being able to read the dataimmediately after it is written. This allows data tobe immediately checked for errors. 2-12. If it is vital thatinformation on a Figure 528. Two-gap read-write head. tape remain unalteredwhile on line (not

Figure 5-3. Computer entrypunch. 117

2 9 .; - S. 3'. * 4. , , *` t 4.44 4, - - ^ - " r 4' Re C. . z , -1 11.70' - . 4 Y3' ''444)40 .4, X ; , r ' 1 f_f along the top of the cards. written on), there is a meansof protecting it. same information, is a circular groove An operator performs thepunching operation On many tape reels, there similar to a standard typewriter on the back ofthe reel. A pawl mustride in at a keyboard writing operation. keyboard. A typical example of amanual card this groove to inhibit the infigure5-3. This There isa plastic ringthat fits into this punchisillustxated particularcard punch also performsthe groove; it is calledthe file protection ring. the punched When installed, it keepsthe pawl depressed, additional function of reading the tape to take cards and converting the.informationinto a which allows writing on pulse-no-pulse pattern for directcomputer place. called a 2-13. Read operation.Dazing the read input.Thistypeof punchis the magnetized computer-entry punch.First,thecard is operation from magnetic tape, automatically sent spots pass the gaps in theread head and small punched; then the card is pulses which represent data areinduced in the to the reading station. At thereading station, hole-no-hole ofthe read head and sentto the mechanical contacts sense the coil pattern and generate voltagescorresponding computer. fed to the 2-14. Duringthewriting operation on to this pattern which, in turn, are magnetic tape, old informationis erased from c omputer. the tape 3-3. A card punch for transferringoutputs the tape. Reading does not erase, so illustrated in can be read overand over. from the computer to cards is figure 5-4. This card punch is operatedby the computer through circuits controlledby the voltages 3. Card-Handling Devices program. The computer generates which operate punch-selectelectromagnets 3-1. The term cardmachines includes all which activate the punch dies thatactually units of a card-handlingsystem that use holes punch the hole in the card. Whenthe punches punchedinpapercardstorepresent card-hole pattern be capable operate, they punch out a information. Such a system must correspondingtothecomputeroutput of punching informationcards, reading the of this cards, and information. No manual operation information from the punched machine is required. Thecomputer-operated printing .% in a form that canbe directly read card punch is faster than themanual-operated withoutfurtherdecoding. A complete 100 cards per card punch punch. It processes about card-handliag system includes a minute while the manual-operatedpunch is and a card reader/printer. operator. A used to limited to theskillof the 3-2. Card Punch. The equipment processing of about three cards perminute is manually punch information onto acard is a card punch is an within an operator's capability. card punch. A manual 3-4. Punched cards. Practic ally all electromechanicaldevicewhichpunches punched cards information holes in the cardsand prints the computer systems today use

4 432to I. 4 11 ZONE 11 ZONE 0 ZONE (CM

Iocloomoommootiouommoommoomoomoommoomommoomoomoo ttimIllimmtimilitillitillitimmitimmmittimmittitti jzzzzuzzzazzzzazaazzuzzzzazzuzzuzzzzzazzazzzzzuzuzzazzazzuzzzzzz 13333333333333333333333333333313333333333;3333333333313333333333333333333 44444444444444444444444444444444444444444444444444444444444444444444444444 555555555555555555555155555555555555555555555555555555555555555555555555555 6661Ao6666600qop6660o6666o660066666666666666o6666666666666666666666o6otio6boo 177771777777777777777777777777777777777777777777777777777777777777777777777777

888888888888H88m88888888888814886R888888888888888888888888888868888888888888888 199999940.19999994999999999999999999999999999999999999999999999999999999999999999

10 COLUNHO NDA4-154

Figure 5-5. A Hollerith coded card. 119

39.4: 4.1

TABLE 5-1 HOLLERITH CODE

NUMERIC NO PUNCH ZON E ZON E ZONE ZONE

NONE (BLANK) &

1 1 A J

2 2 a K 3 3 c L

4 4 D M 5 5 E N 6 6 F o 7 7 G P a a H Q

9 9 I R 8-3 # $ .8-4 Q LI .

.-WDA6-152

printed for data input, output, and storage functions. punching positions normally are not Punched cards are very common; in fact, your on thecard, since this area is generally Government payroll check is one form of this reserved forprintedheadingsorfor interpreting punched information. card. The information contained on the card ina isinthe form of holes.Itiseasy to 3-7. Since one or more punches understand this system. A hole represents a column represent a character, thenumber of YES state, or a ONE; and the absence of acolumns used depends on the amountof data hole represents the NO state, or ZERO. to be punched. If a recordrequires more than 80 columns to hold its data, two or more 3-5. A standard punched card is illustrated cards may be used.However, continuity in figure 5-5. Cards often contain acut betweencardsof one record must be corner, usually at the topleft or right corner established by punching identifying of the card. These corner cuts are normally information in a particular columnof each used to identify a type of card visually, or to card. insure that all cards in a group are facingthe 3-8. The top edge of the card isknown 1,t; same direction and are rightside up. the "12" EDGE, and the bottomedge as the U. The card in figure 5-6 is divided into "9" EDGE. The manner in whichcards are 80 vertical columns, called card columns. placedin machinesis governed by their These are numbered 1 to 80 from left to respective feeding requirements.Therefore, cards are fed either 12 edge first or9 edge right. Each column is then divided into 12 the punching positions which form 12 horizontal first, and either FACE UP, which means printed side of the card is facing up, orFACE ROWSacrouthecard.Thepunching positions are designated from the top to the DOWN, meaning the opposite. Cards areread bottom of the card by 12, 11, 0, 1, 2, 3, 4, 5, and punched by machines, either rowby row 6, 7, 8, and 9. The 0 through 9 punching or column by column. positions correspond to the numbers printed 3-9. Hollerithcode. The standard card asthe on the stanthrd stockcard. The 12 and 11 language, commonlyreferredto 120 31)A, C) ,tsif 4.4 0 0,) 13 W il)at r-4 .0 5.; ,,,... 0 0 ..0 g2 .s 0.c 0 7-1 E" ml X 0 wcA 0 .2 0e 145 W .r "' = O. ' ) .°,N = 75_.... --f cN 0...=

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3-11. Reading brushes. In the brush-type READ HOPPER card reader, cards pass betweena set of FIRST READ reading brushes and a contact roller. The brushes electrically sense thepresence or SECOND READ absence of holes in each column of the card, as illustrated in figure 5-7. The card reader circuitry utilizes the electrical impulses that are converted from the electrical sensing and stores them as data. 3-12. After the cards have been read, they are passed onto the card stacker and stacked in the same sequence as they were read. Some card readers have two sets of reading brushes, as illustrated in figure 5-7. This enables each NDA6-156 card to be read twice as it moves through the Figure 5-7. Brush reading. card feed unit. Two sets of brushes sem as a check on the validity of the reading process. 3-1 3.Photoelec tric cells. The indicates that the character in that column photoeleciFic-t-Re card reader performs the lies in the first group of nine letters of the itund functiOn as the brush type; the only alphabet. A punch in any of the 1 through 9 difference isin the method of sensing the rows of the same column specifies which holes. Photoelectric card reading is performed letter of the nine is represented. (Thus, 12 by 12 photoelectric cells, one for each of the and 1 represent A, 12 and 2 represent B, etc.) 12 rows of the card. Cards are passed between The second group of nine letters, J through R, the photoelectric cells and the light source. If use the 11-zone punch and a numeric punch 1 the cards are punched, the light penetrates the through9,respectively. (Thus, 11 and 1 holes and activates the photoelectric cells; represent J, 11 and 2 represent K, etc.) Since thus, a ONE is detected. only eight letters axe left for the 0zone, 3-14. Another use for a card reader is to letters S through Z are represented by the 0 provide a medium for transcribing punched zone punch and a numeric punch 2 through 9, card data onto magnetic tape for use in respectively. magnetic tape systems. The magnetic tape can c.SpecialCharactersThesecharacters then be used as direct input to the computer. provideprintedsymbols,causecertain machine operations to occur, and identify various cards. Standard specialcharacters 4. Keyboards consist of one, two, or three punches in a card column but differ from the configurations 4-1. A keyboard is basically a typewriter. usedtorepresent numericor., alphabetic However, there is a difference in the primary characters.Figure5-5shoifa-- the special functionof thetwo. As you know, a character + represented by a 12-zone punch. typewriter's primary function is to produce a Normally (depending on the type keyboard), hard copy of the keys depressed by an 11specialcharactersareavailablefor operator;whereasakeyboard'sprimary punching. Refer to Table 5-1 for the complete function is to input information to or output Hollerith code. information from a computer. 4-2. Keyboard as an Input Device. Many computer systems utilize a keyboard with a 3-10. CardReader.Therearemany digital encoder as an input device. When a key different types of card readers available for is depressed, the encoder converts the action use with a computer system, and from system of depressing that particular key to a digital to system the type used might be different. A code. By this means, it is possible to insert typical card reader is illustrated in figure 5-6. data into a digital computer in the computer's Regardless of the type of reader youare languagedigital code.Inthiscase,the familiarwith,itsprimary functionis to keyboard andits encoder function as an convert the hole-no-hole data on punched interpreter between man and machine. At ihe cards into electronic form for input intoa same time you are inputting data into the computer. Two common methods of reading computer, a hard copy is being produced this data from punched cardsare reading which allows you to verify the keys you brushes and photoelectric eggs; depressed.

1223 I) 4-3. As an input device,the keyboard is very useful. It canbe used to select otherI/0 devices for reading orwriting, and it causes the actual reading orwriting of that device to occur. This is a veryuseful feature in that it is a simple matterto initialize a computer system for its primarymission through the use of thekeyboard. ATCH SHIFT..00W14 4-4. Keyboard as anOutput Device. As an HEMISPHERI output device, thekeyboard is under control of the computer.The computer canthen informtheoperatorof program actions required. A hard copyof maintenance program resultsis provided by thekeyboard facility under computercontrol. One of the features of the keyboard -TYPHAD most useful output of system istheinstantidentification SHIFT...UP ei integrity. Thatis,allfailures,including HEMISPHERE :;) pertinent failingdata,are madeavailable NDA-168 under computer controltomaintenance personnel. Figure 5-8. Typehead and platen. 4-5. One of tin mostdifficult problems that you might encounterwith a keyboard is strikes the ribbon when akey is depressed. intheactualtypingof charactersthe Our typewriterthen hasthe characters mechanics of the keyboard.For this rizii:san, imprinted on a typehead ball, asillustrated in we will present adiscussion of the typing figure 5-8. This is the actionthat we want to principles associated with atypical keyboard. discuss then: What causesthe ball to rotate forward, 4-6. Typing Principles.Since we have and tilt to a desired character, move compared the keyboard to atypewriter, let us and strike the ribbonwhen a keyboard key is the actual depressed? Now look at figure5-9; it shows discuss how the keyboard causes arrangement of the typing of characters totake place. The way it the typehead character types is a clue to howit generates digital typehead ball illustrated infigure 5-8. and types from digital codes (input device) typehead ball in figure codes (output device). 4-8. Note that the 5-8 is divided into two character 4-7. The typewriterportion of our typical hemispheresshift-up andshift-down. Now keyboard is not aconventional typewriter. look at figure 5-9. Itshows the character Instead of a hammer(with a character onit) shift-down hemisphere of ribbon, a ball (with arrangement for the flying up and striking a the typehead ball.In order to simplifythis many characters onit) rotates, tilts, andthen

HOME PO SI TION

TIL T N V 3 ;

. , M

L 2

I< 3 L 2 3 4 5 RO T A TE --OP 5 4 3 2 I

NDA6-153

Figure 5-9. Typehead character arrangement. 123 15

tMP. SALL LICttl' TILT RING SPACER UPPER SALL SOCKET

\. ot."'s TILT MAO - PP/OT PIN NOTATE TAPE ROTATE INAPT SALL JOINT TILT MINT SPRMO TILT SECTOR GEARS ROTATE PULLEY es4 \\*N TILT TAP TILT SECTOR TUNE

MT SECTOR PutIA' LOWER SALL SOCKET

111141.1°1° TILT PULLET SPRING OA6-163 NOM,169 Figure 5-11. Rocker portion of rotate mechanism. Figure 5-10. Rocker portion of tilt mechanism. - 5, moves forward to discussion, we'll use only characters in the strikeribbon,moves shift-down hemisphere. back, andreturnsto 4-9.Character selection. From the home position. typehead character arrangement in figure 5-9, Depress key R Typehead tilts 0, rotates itshould be apparent that selection of a 3, moves forward to character is done by two different movements strikeribbon,moves of the typehead: rotate and tilt. For example, back, andreturnsto to select the letter M, the typehead must be home position. tilted 1 row and rotated 2 columns in the Depress key E. Typehead tilts 1, rotates positive direction. This is expressed as tilt 1, +1, moves forward to rotate +2. All movements are with respect to strikeribbon,moves the tilt 0, rotate 0 (home) position of the back, andreturnsto typehead. The typeheadreturnstothis home position. position aftertyping each character. For example, typ;ng the word "ARE" causes the 4-10. Tiltand rotatemechanism.The following action to take place: typehead is tilted and rotated by gears, tapes, Depress key A - Typehead tats 1, rotates and pulleys.First,let us examine thetilt

TILT ARM

TILT TAPE

TILT SECTOR PULLEY

TILT BELLCRANK FIXED PULLEY iLT 1 LATCH

TILT 2 LATCH FASTENER

NDA6-164

Figure 5-12. Tilt tape system. 124 3u, .2 9 7

BALANCE LEVER ROTATE TAPE ROTATE BELLCRANK

STOP LUG

,10,011~4

-5

ROTATE ARM damE ROTATE LINK LATCHES migignittat41'0,11111111110111110)

NDA6-160

Figure 5-14. Rotate differentialat rest.

5-15. When figure 5-9. Combining the actionof the - 5 selector lug, illustrated in figure latches, pushed down, it rotates thetypehead to the latch, in figure 5-14, with the positive labeled +2 is the R2 results in a negative rotate operationof the +1 column. The latch 5-14 and latch; it causes the typehead torotate to the typeball. For example (refer to figs. +2 column. When both R1and R2 are pushed 5-15): +3 column. down, the typehead rotates to the Typeball Rotation Latch R2A (labeled +2A) is neverused alone; Interposer Lug (Selector Latch) - it adds with R2 to provide+4 rotation. R2A, R6(-6)+R2(+2)+R2A(+2) 11. -1 rotation. R5(-6)+R2(+2)+R1(+1) -2 R2. and R1 add to provide +5 116(-6)+R2(+2) -3 4-15. The latch labeled - 5 is calledthe R5 116(-6)+R1(+1) us -4 latch; it functions in conjunction withthe 11.5 R6(-6) -6 interposer.Thislatchonly lugofthe 4-16. Latch selection. Nowwe'll see how functions during negative rotateoperation; latches to be that is, columns -5, - 4, - 3,2, and - 1 in depressing a key selects the

LATCHING SURFACE KEY LEVER PAWLCONTACT SURFACE

SELECTOR INTERPOSER

T2 CHECX T1R2A

içiu CONTACT SURFACE FILTER SHAFT LUG NDA6-.Z67 SELECTOR LUG CYCLE CLUTCH REUEASE Figur. 5-15. Interposer.

126 307 fita -2.1 LEFTHAND ROTATE PULLEY

ROTATE TAPE

ROTATE PULLEY

RIGHTHAND ROTATE PULLEY

ROTATE LINK

ROTATE DIFFERENTIAL ROTATE SPRING

SHIFT ARM NDA6-161

Figure 513. Rotate tape system. mechanism which is shown in figure 5-10. The 4-12. Tilttapesystem.This system is typehead fits over the upper ball socket. The shown in figure 5-12. One end of the tilt tape typehead has been removed in the illustration is fastened to the tilt sector pulley. The other in order to show the tilt mechanism. Rotating end passes over a pulley on the tilt arm, over a the tilt sector pulley rotates the bottom tilt fixed pulley, and then to a fastener. The tilt sector gear. This rotating motion is translated arm pivots at the bottom, and, in doing so, it into a tilting motion by the gears and causes pulls the tape, rotating the tilt sector pulley. the tilt ring and upper ball socket to tilt. How much pull and how much the typehead Notice the arrows on the figure. Pulling the tilts is controlled by two latches: tilt latch 1 tape in the direction of the arrow causes the and tilt latch 2. These tilt latches are in effect tilt ring to tilt up. Since the typehead is mechanical adders that have four positions: fastened to the ball sockets, the typehead tilts tilt position 0 through tilt position 3. The in the same direction as the tilt ring. When the important thing to note here is that these four tape is released, the spring pulls the pulley tilt positions correspond to the four rows of back toitsoriginal position, setting the characters illustrated in figure 5-9. typehead back to the 0-tilt position. 4-13. Rotate tape system. This system is 4-11. Now let us see how the typehead is illustrated in figure 5-13. Again, a rotate arm rotated. Look at figure 5-11; it shows the is tilted by a mechanical linkage to position upper ball socket connected to a rotate shaft. therotatepulley.Forourexplanation, The two ball joints between the shaft and the consider the right-hand pulley as fixed, since upper ball socket allow the typehead to be we stated earlier that for simplicity we would moved in both the rotate and tilt directions. not discussthe shift-up.Therotate Notice that the rotate pulley is also moved by differential that tilts the left-hand pulley is pulling on a tape attached to the pulley. Now shown in figure 5-14. that you understand that pulling on a tilt tape 4-14. Because the rotate differential must tilts the typehead and pulling on a rotate tape positionthetypeheadin10different rotates the typehead, the next step is to take positions other than 0 rotate (these positions a look at the mechanical linkages that pull the correspond to the 11 columns shown in figure tapes. We are progressing from the motion of 5-9), it has a more complicated linkage. Note the typehead to the motion of the typekey. that the latches are all at rest in figure 5-14. This may seem like going backward, but it is The latch labeled +1 is called the R1 latch, the easiest way to see this action. because itis selected by the R1 interposer 125

308 A99

SELECTOR LATCH EXTENSION 4-20. Let us lie together the mechanical rotate-tilt mechanism, the latch selection, and the binary ftekl data code associated with our SELECTOR LATCHES typical keyboard. figure 5-19 is a simplified NOT schematic of switches associated with the SELECTED field data code. These switches are arranged SELECTED in the order of our field data code excluding CATCH BAIL the control bit (D6) and the patity bit (D7). CONTACT ACTUATORS Negative logic levels of 12V (logic 1) and OV (logic 0) are used for our explanation. Notice that each data bit (DO through D5) is lr controlled by the operation of interposer lugs T1, T2, R5, R1, R2, and R2A. Recall that theselugscontroltheoperationof corresponding selector latches as explained CROSSBARS above. Now refer to figure 5-9 and locate the letter A; itisselected by rotating the ' CONTACTS typehead5 units and tilting it 1 Unit. To obtainthismechanicalmovement,the MIMS-159 following latches must be selected: Irigtan 548. Control actuator. Rotate latches:

R2A R2 R1 R5 selector bails that are contacted are forced Rotation 0 0 0 -5 forward to engage the latch interposers. The latch interposer' move forward, pulling the selector latches back. Tilt latches: 4-18. Look at figure 5-18 and note the T2 T1 latch bail. The same mechanism (cycle clutch ilt 0 1 bail) that allows the filter shaft to rotate canes a downward movement of this latch 4-21. Noticeinfigure5-19that the ball. If a selector latch is selected, it is pulled following contactsaretransferred by its back and, as the latch bail moves down, it doesn't make contact with the contact asaociated latch. actuator. Therefore, the normally closed (NC) Contacts: 05 134 lj302D1 DO contact points associated with that particular Transferred:yrsyesyeayesyesno selector latch remain closed. If a selector latch Voltage: OV OV OV - 1 2y -12V OV is not selected, it is not pulled back and, as a Binary: 0 0 0 1 1 0 result, the following actions occur: The latch bail pulls down on the selector The resultant field code for character A is latch. 000110(2)which is equal to 06(5). The selectorlatchextension moves down. The contact actuator arm moves down. 5. Printers The contact actuator crossban open the 5-1. A printer provides another means of NC contacts. When the selector latch bail restores, the contact actuator rises under the spring tension of the opened contacts. 01

4-19. The above action is true for all the selector lugs on esch interposer (fig. 5-16) except lug R5 (- 5 rotate). Its point contacts are normally opened (NO) and remain opened for all positive (including 0) column rotate 121 positions. These were illustated in figure 5-9. When a negative column rotate position is NDA-.155 required, the 11.5 contacts are closed. Figure 519. Digital coding switches. 128 309 KEY KEY LEVER PAWL FULCRUM ROD

KEY LEVERS

FILTER SHAFT

SELECTIVE INTERPOSER

CYCLE CLUTCH BAIL FLATSPR1NG FINGERS NDA6-163 Figure 516. Key and Interposer tnechannm. operated and at the same time generates a 4-17. Note in figure 5-16 that there are digital code. Figure 5-16 shows a key attached seven lug positions on each interposer in toitskeylever pawl anditsselective additiontotheclutch-releaselug.A interposer mechanism. When the keyis combination of these lugs determines the depressed, the key lever pawl strikes the character to be printed and a particular code selective interposer. This action causes the te be transmitted. Each key has its own interposer to move down in front of the filter selecthre interposer. When a key is depressed, shaft. The large-cycle clutch-release lug of the the key lever pushes its selective interposer interposer, shown in figure 5-15, releases a downsothateachselectorlugrests clutch that allows the filter shaft (fig. 5-16), immedtely behind the selectorbail,as which is geared to an electric motor, to rotate shown in figure 5-17. The cycle clutch is 1800 and forcing the interposer forward. released, the filtershaft rotates, and the

SELECTOR LATCH

ADJUSTED LINK FULCRUM ROD

LATCH INTERPOSER

KEY LEVER PAWL

FILTER SHAFT

CYCLE BAIL

SELECTOR BAIL

SELECTOR LUGS

SELECTIVE INTERPOSER

KEY LEVER NDA6-166

Figure 5-17. Selection. 127

310 3 o o outputting data from a computer. Datafrom printing a line of characters at a time. Impact printers vary in speed of prinamt from about thecomputersystemareprovidedin permanent visualrecords,at rates ranging 100 lines per minute to over 1000 lines per several hundred minute. The number of characters perline from a few characters to also varies from one type of impact printerto charactersper second. Asoutput units, receivedatafromthe another. printingdevices The computer systemissymbolized electronic 5-3. Mecnanical description. form. Once these electronicsignals enter the mechanical parts that do the work ofprinting appropriate circuits and actuate theprinting in a typical line printer are shownin figure elements, printing takes place. Thetwo types 5-20. The printing operation isaccomplished the impact by theprint hammer striking the of printers discussed here include araised and electrographic printer. paper-and-ink ribbon against characterontheprintwheel,thereby 5-2. Impact Printer. The impact printer impressing the character on paper inthe same is an manner as on a typewriter.An advantage of (sometimes referred to as a line printer) carbon outgrowth of the typewriter. The termline this type of printing is that multiple designatesthat the printer is capable of copies may be produced.

CON4A

011.044 OeCIMAI. #11WIINft 0 J im ROT ATiON ZERO WART) i$4017 MINNA X MAINCOI PULSE ZONt OHL GENERATOR

CHARACTER I NU! I GENERATOR PRINT ROLL NOTOR "CI PRINT 541 h,4'44! \*.°04:714itictiatA.I'l:'441

PRINT HAAGER INSOULE

5054$ HAJIA1111 1T541P7C-Z.1111NI ZING UR COLUMN) PAINT ROLL PUI.11 DATA ARON - GENERATOR

RICI311S INDEX PULSE

COS. COL INOEX co, II, 57$

CHARACTER PULSE ST UN STAGE

STORAGE *ATM

STAGS is

RINT PAPER tUCTIKINIG HAANIR PUO GISTRISUTOR MTV! PULft CIRCUIT

Figure 6.20. Impact printer diagram. 129 3 o /

5-4. The hammersare mountedin the character pulse stream. The character modules. A typical impact printer has four pulse sequence is repeated as the print roll hammers per module. There is a print hammer makes each revolution. for each vertical column of print; or, to put it 5-10. The electronic distributor another way, there is a hammer for each accomplishes several functions.Its primary possible character in a line of print. Each function during the print cycle is to channel hammer has its own driving electromagnet each individual pulse of the pulse stream into which is activated with an electrical pulse. separate lines that connect to the storage 5-5, The print roll consists of a number of matrix in accordance with the number of the individual wheels (as many as 120) mounted pulse (with reference to the index pulse). on a common shaft. Each of these print Also, it is the circuit that recognizes the index wheels has raised characters around its outer pulse and is reset by it. edge, as shown on the insert of figure 5-20. When these print wheeLs are mounted to form 5-11. Upon identifying the first pulse, the the fullprint roll,alllike characters are distributor does two things: (1) it selects a aligned with a selected notch'on a timing disk. line to the storage matrix that corresponds to These notches cause electrical pulses to berow 1 on the print roll, and (2) it sends an generated as they pass the pole pieces of aelectric pulse through this line to the storage magnet. Since each puLse represents a certain matrix. When the second pulse is detected, character, this disk iscalled the character the distributor selects a second line and pulses pulse generator. Its functidn is to identify the itthe No. 3 pulse if channeled through a row of a character. A second disk with a third line. Thus, each% character pulse is sent single notch, is provided to identify the first to the storage matrix on a separate line, and character on the roll. eachofthese lines is pulsedasa 5-6. The print roll is driven directly by a corresponding character row passes under the print hammers. Each line, therefore, motor. Speeds up to 2000 rpm have been represents a separate character. attained; however, 1000 rpmisa more common operating speed. Itis not always 5-12. After allcharactersina line are possible to print a line 'per revolution of the printed (end of print cycle), the paper must print wheel due to delays in feeding paper, be moved up one space for the next line of but speeds of 1800 lines per minute have been print. It is then ready to begin another print attained. cycle.Anadditionalfunctionof.the 5-7. Electricalcircuits. Theelectrical electronic distributor is to produce the. pulse circuits of major importance in the printing that initates the paper-feed mechanism. cycle are hated and discussed below. These 5-13. It is important for you to remember circuits are shown hi block form in figure thefollowing:The electronicdistributor 5-20. receives the character puLse stream; it uses Synchronizing ptlise generator. thesepulsestoenergize specific linesin Character generator. accordance with the character row count; Electronic distributor. then, at the end of the print cycle, produces a Storage matrix. pulse that triggers the paper-feed mechanism. Hammer drivers. 5-14. The storage matrix serves as a data storagebuffer and hammer triggerpuLse 5-8. The function of the synchronizinggenerator. Data from an external register is pulse generator is to produce pulses thatare stored in this matrix at desired locations. For synchronized to the rows of characters on the example, let us assume that AN is the first print roll and identify these characters. The word in the line to be printed; also, that row index pulse identifies the No. 1 characteron 1 on the print roll is all N's and xow 2 is all the print roll by resetting a counter in the A's. We use this example to point out that the electronic distributor to zero. characters need not be in alphabetical and/or 5-9. Thecharactergeneratorsimply numerical order. produces a pulse stream at the rate ofone 5-15. Fortheletter A, the computer pulse per character row on the print roll. would write a binary 1 in the stonige matrix When the No. 1 (first) character rowon the at the intersection of the column 1 line and print roll passes under the print hammers, the row 2. For the letter N, it would write a first character pulse after the index pulse is binary 1 at the intersection of the column 2 generated; the No. 2 row is under the print line and row 1. Nothing would be written in hammer at the generation of character puLse any of the rows for column 3 since it is to be 2; row 3 matches pulse 3,.etc., through pulse a space. All of the other words would be 165. This series of character pulses is called written in the storage matrix in this manner. 130 30-Z 5-16. The matrix enters into the printing 0 process as follows: When theNo. 1 row of characters (N's) is about to pass underthe I 00 print hammers, the first pulse cf theprint 0 I cycle(T1)isreceivedfrom thesignal distributoronline 1.The T1pulse 0 simultaneously reads all N characters for all words of the line being printed. It isthe I function of the storage matrix duringT1 0 pulse time to produce an output hammer trigger pulse for all columns that have a 5 binary 1 written into the Ws row.In our example, the N (column 2) of the word A "AN," therefore, would be written during the T1 pulse. The A (column 1) will beprinted during the second pulse (T2), along with all I other A's that appear in the line. Column 3 has no data written in it since it is to be a space; therefore, no printhammer trigger pulse is generated from the storage matrix for this column. As the print cycle progresses, all I characters and spaces are printed inthis manner until the print cycle iscompleted. 5-17. The pulses from the storage matrix I I I are not of the proper powerand shape to B drive the hammers; therefore, they are shaped and amplified in the print hammer driver Figure 5-22. Dot matrix character format. circuits.A power driver and shaperis provided for each hammer. t.hat the character is notsmudged by the 5-18. Mechanical action of printing.The raised character on the printwheel as it method of printing discussed here isreferred passes. to in some textbooks as printing"on-the-fly," into each because the print roll does not stop asthe 5-19. Adjustmentsarebuilt must hammer circuit for individualadjustment of print hammer strikes. The hammer character. All strike quickly (with a short dwelltime) so the darkness of the printed hammers are adjusted for the sameforce of print. Also, there is a lineadjustment for setting the darkness of theprint for the full line. 5-20. A high-speed lineprinter with the cabinet doors removed isshown in figure 5-21. The paper is stored in thebin below the print roll. During printing,the paper passes through the printer and onto ashelf behind the machine. The modulesthat make up part of the electrical circuits,including the matrix, are shown at theright of the figure. 5-21. ElectrographicPrinter.Insome ways, the electrographicprinter is similar to the usual typewriter or printer,but in other respects it is quite different.Its description here emphasizes how it differs. 5-22. Character format. The electrographic printer is sometimes referred to asthe wire matrix burn printer, because itbums the imprint of a wire matrix characteronto a Upon close Figure 521. Impact printer. specially prepared paper. 131

1 3 03

SEVEN INPUT CONTACTS (FROM PRINT AMPLIFIERS) 410;:a"."S

PRINTING PRINT HEAD (*kW'

.4.6*

PRINT MEAD BELT

Figure 5-23. Electrographic printer. inspection, the printed character looks like a rate ot rise of the print head is the same as group of dots.Figure5-22,A, shows an that of the paper. These actions result in example of two such characters, an E and M. parallel, horizontal lines of print. As one print Of course, the sztual print is smaller than head completes a line, the following head on shown in the Bgure. If every dot of the print the belt is drawn into position to start the code was printed, it would appear as shown in next line. Since there are three print heads on figure5-22,a. Looking at Egure 5-22,B, the belt, a given head prints every third line. observe that the dots are arranged in five columns and seven rows to form a 5 by 7 5-24. Each print head, as shown in figure matrix. By proper selection of dots in this 5-24,containsseven stylusesarranged matsix, any desired character can be printed. vertically. These styluses makeelectrical contacttothePrintamplifiersthrough 5-23. Print heads. Messages are printeda "fingers" which slide along a commutator. character at a time on continuously moving The dots which make up a characterare electrosenaltive paper by three continuously formed by burning away a thin white coating moving print heads, shown in figure 5-23. The on the surface of the electrosensitive paper, print heads axe transported on a belt which is exposing a black underlayer. The styluses skewed (slanted) at an angle so that the print print the selected dots a column at a time. As head rises as it travels across the page. The theprint head movesacrossthepage, 132 additIonal cohunns are printeduntil a total of five whims has been used tocomplete a character. A one-column letter spaceis left between character; (see insert on fig.5-23).

6. ' Magnetic Drumm 6-1. A magnetic drum storagesystem provides both an input and an outputdevice feature. A magnetic drum can havebinary data written onto its drumsurface.and read from the same surface. In today'scomputer system, magnetic chums provide twoprimary functions:nuoliarystorageandbuffer storage. 6-2. Auzaliary Storage Device. Whenused asauxiliarystorage,thedrumstores Figure 5-25. Read/write heed. information that is needed only periodically; therefore, it is not economical to use storage rate. This permits theslow-speed equipment spaceinmain memorytostorethe and the high-speed equipment tofunction at information. Also, the information is ofsuch their own rates independently.Since the a nature that themedium access time of the drum system perfomu no computations,data drum does not slow down the useof the data enters and leaves the drumwithout alteration. in a processing problem. drum is a used as 6-4. Physicad Characteristics. The 6-3. Buffer Storage Device. When metalcylinderofnonmagneticmetaL buffer storage, the drum is effectively atime Aluminum iswidely used, because itis buffer between slow-apeed equipmentand a paramagnetic and dissipates heatreadily. A high-speed computer. As a time buffer,the thin layer of ferromagaeticmaterial is alied drum receives datafrom slow-speed to the surface of the basiccylinder to provide equipment and transfersthis data to the the recording surface. Themost common higher speed computer. Thistransfer also methodofapplyingthesurface is works in reverse. That is, transfers aremade electroplating. from a high-speed computer system tothe 6-5. The magnetic drum maybe mounted slow-epeed equipment through thedrum. either vertically or horizontally on ashaft Thus, data processed by the computeris throughitscenter. The shaftiseither stored on the drum at a rapid rateand is belt-driven from a drive motor orthe drive delivered to the output system at aslower motor is connected directly tothe shaft. 6-6. Read/write heads.Theactual reading from or writing on a drumis done through the use of one or moreelectromagnets, called PMNTING 7 FINGERS GOANNLITATOR PAPER read/write heads. The samehead can be Used PRINT HEAD to read and write. In some cases,two sets of heads are used, one for readingand another for writing. 64. A typkal read/write head iscompoaed of a ferromagnetic alloy core whichis usually made up in two sections with anairgap at each end; see figure 5-25. Each coreis wound with seventurns of fine wire which is pulsed 7 STYLUSES when reading or writing. These coresmust have a low retentivity (ability of amaterial to hold its magnetism); if not, thehead would continue to magnetize the drumafter write cuirent is removed. The cores aremounted with one airgap placed close to themagnetic surface of the drum. When the coreis pulsed PAPER to write a binary digit, this gsppermits a flux IDLER leakage that magnetizes the surfaceof the aparamagnetic Figure 5-24. Print bead. drum.Insomecases, 133

3 I 5 30s--

made with the drum cold, the drum could expand as it heated and cause the heads to drag on the drum. 3-10.Drum surface layout.Consider the surface of the drum as a rectangle. In other words, visualizeitasif the surface were unwrapped from the cylinder and laid out flat. This visualization is illustrated in figure 5-26, A. You would find that the area passing wider a drum head is called achannel.Also, a row of data bits grouped into areas in which a single drum word is written in parallel is called aregister.Finally, you would find a set of registers that extend in columns around the 6 FIELDS ------111111 drum iscalled afield.A drum isnot necessarily dividedinto specific field RL 115 CHANNELS CHANNELS separations as shown in figure 5-26, A. The AZIMUTH V fieldsare actuallyinterleaved -CHANNELS CHANNELS around the :.i.i._;.:_.'Zr''' '' -,::::::::.:;.. drum surface. 6-11. Figure 5-26, B, shows the layout of a dmm surfacewithdifferent terminology ILT:11121113,CICICICIIIEM EZIRCICS 1=1=1112:1113 =IC= grii ri lEfral-R el CROCE ICJ el CIES CI In applied. Each bit position is called asegment. A row of segments across the drum is called a track, and, as in part A of the figure, the area that passes under one head is called achannel. In addition, this drum groups the channels DD 0C31 SEGMENTS I0.0I 0110 1 1010 3 OM 4 A '1,161,111,1,1,ill!

3 2 *010 I 040 NDA6-171 MEM Figure 5-26. Drum surface layout. ennaommunna 0 050 shimusually silver-is placed between the MEM ME poles in the airgap. This increases the amount OlUAILMFACI of flux leakage and increases the induced flux density on the surface of the drum. The airgapat the opposite end of the core prevents saturation of the core during a write or readout pulse. 6-8. Notice that the heads in figure 5-25 do not touch the recording surface. This is becausethefrictiongenerated by direct contact would wear away the surface and reduce the life of the dmm. Direct contact would allow a binary digit to be stored with a minimum write current, would provide a higheramplitudereadpulse,and would at reduce the area required to store a binary bit. 113011 But since the advantages are offset by the disadvantages, the heads are normally brought as close as possible to the drum without touching. 6-9. Heads are usually adjusted to within 0.001 to 0.002 inches of the drum surface. The adjustment is made with the drum at operating temperature. If the adjustmentwere Figure 5-27. Read/write bar positions. 134 3 1 together and titles themaccording to the type of information writteninto that group. For A ./ example, the azimuthinformation contains 12 bits of information;thus, the 12 channels that store azimuthinformation are called the azimuth channels. The drumsurface layouts shown in the figure arefor drums which are written into and read out ofin parallel. 6-12. Mounting bars.Mounting bars are devices used for mountingread/write heads a over the drumsurface. To understand how B .: heads are physically arranged on amounting bar, you must first understandhow words are arranged on the drum. Figure5-27, A, shows four words, labeled WI, W2,W3, mid W4. Note that t.he words are sittingin a 12-bit register. The drum, shown in partC of the C...:j figure, has 12 channels; thus,if the segments IIRO lined up in a row across thedrum's surface are considered a register, the drumrepresents a 12-bit register. It is natural to assumethat the bits would be transferred tothe drum in the SO.1417$ they appear in the register. same order as Figure 528. R.Z and NRZ writevoltage. However,thisis not the case, sincethe drunIchannels are close together onthe drum surface and the headsaresolargein enough together on a bar towrite on every comparisonthatadjacent channel heads other channel. by side. This leads to cannot be located side 6-13. With this arrangement,bit 1 of word various arrangements ofheads to permit the 1, bit 2 on channel3, four words to be written inparallel and to be 1 is placed on channel is called B and C of figure bit3 on channel5,etc. This read out in parallel. Parts interleauing The fourwords are written on 5-27 show one method ofarranging heads. It time, but notice that placed close the drum at the same WSUI:1103that the heads can be

0-5

NDA6-162

Figure 529. Write operation (RZmethod). 135

3 As 307

they do not appear in a straight line across the most drum systems operate on the RZ drum surface, as shown in part B of the method. figure. Instead, words 3 and 4 are displaced 6-18. Look at figure 5-29 and assume that 90° from words 1 and 2. If the write heads this drum is using the RZ method. Therefore, are displaced 90° from one another and it is a write pulse is sent whenever a ONE is to be desiredtoread allfourwordsoff recorded. Assuming that flip-flops 1, 3, and 4 simultaneously,the drum must have two contain ONEs that are to be written, you can mounting bars of read heads. Part C of the see that the ONE-side output of the flip-flops figure illustrates a drum with two write bars is fed to the AND-gates. Since flip-flops 1, 3, and two readbars. The wordk are being and 4 are in the ONE state, three of the five written on the drum surface ihterleaved. gates will have one of the required input levels When the drum rotates:180°, :he bits placed present. A write pulse is now sent to each of on the drum by write bar 1 pass under read the five gates, fully conditioning three of bar 1, and the bits placed on the drum by them. The output from the three conditioned write bar 2 pass under read bar 2, allowing all gates causes current to flow through the coils four words to be read off simultaneously. wound around heads 1, 3, and 4. This current 6-14. Writing. There are two methods in sets up a magnetic field adross the head gap which the binary digits (ONE or ZERO) are and magnetizes a spot on the drum. Each written on the dnun surface. They are the magnetized spot represents a binary ONE bit nonretum-to-zero (NRZ) method and the oftheword.Notethattheflip-flops return-to-zero (RZ) methods. Figure 5-28 containing ZEROs did not condition their shows representative waveforms for these two respective gates and the spot that heads 2 and methods. The same binary configuration of 5 pass over is not magnetized. 10110 is used for all three waveforms. 6-19. Reading. Readouts are obtained by 6-15. Return-to-zeromethod.The RZ using either a read head or a combination method may use a write pulse for each digit read/write head. If a single head is used for being recorded; that is, the drum surface is bothoperations,itcontainstwocoils magnetized in one direction for ZERO and in wrapped around the same headone for the opposite direction for a ONE. This is reading and one for writing. shown in part A of figure 5-28. Flom this, 6-20. The read heads detect magnetized you can see that a write pulse must be sent to spots or segments on the drum surface. The the drum head for either a ONE or a ZERO. rotation of the drum surface past the read The RZ method shown in part B of the figure Leads induces a voltage into the windings for is different in that a write pulse is necessary each magnetized segment that passes under only when a ONE is to be written. When using theheads. The induced voltageisthen this RZ method, the drum must be erased amplified and shaped to produce a pulse at before new information is written; whereas the read amplifier output. with the method shown in part A of the 6-21. If the RZ method which uses a write figure, it is not necessary to erase prior to pulsefor botha ONE and a ZERO is employed, a voltage is induced into the read writing new information. heads for either a ONE or a ZERO. The 6-16. Nonreturn-to-zero method. The NRZ directionofthefluxlinesfromthe method changes flux only when data being magnetized segments determines direction of written changes from ONE to ZERO or current flow through the read head coils. This ZERO to ONE. Part C of figure 5-28 shows direction determines if the segment the binary word 10110 in the NRZ method. represented a ONE or a ZERO. Note that flux remains constant for the two 6-22. When the other RZ method is used, adjacent ONE bits. If this configuration had onlyONEsarewrittenonthedrum. two adjacent ZERO bits,the flux would Therefore, a voltage is induced in the read remain in the opposite state. heads ONLY when the segment contains a 6-17. Each method has its own advantages ONE. Since ZEROs are not written, the and disadvantages. For instance, the NRZ absence of a voltage indicates a ZERO. method requires more complex circuitry to 6-23. Addressing and Timing. The method convert the recorded voltages to a usable form by which information is written into or read but has the advantage of a greater bit density from a storage system usually falls into one of on the drum system; that is, more bits can be twocategories: random orsequential recorded on the drum surface,since no addresoing. Random addressing means that allowance has to be made for spaces between the storage system provides access to any bits as is required in the RZ method. Since desiredaddresswithoutregardtoorder. elaborate circuitry is normally very expensive, Sequentialaddressing means followingin 136

',o ISSOAMSTION TO It SITTImis

sAITE PULig

MOM sits

NDA6-258

Figure 5.30. Random addressing.

index channel order; that is, you start reading orwriting used, it is necessary to have an from a given place or "indexpoint." This and a thming channe!. reading or writing then proceedsthrough all 6-25. The index channel,as shown in locations, in order, back to theindex point figure5-30, provides a reset pulse tothe starting wherethecyclestartsagain. This type address counter, insuring the same addressing is also called cyclicaddressing. location for every rotation of thedrum. The index pulse may be etched onpermanently or system can writtenon inthe same manner as the 6-24. As you can see, a drum information channels. be addressed either at random orsequentially. 6-26. Thereisone timing bit foreach Figure 5-30 is a typicalrandom addressed The timing drum. When this method ofaddressing is address, or location, on the drum. 137 3_ 3 9 channelbits apply stepping pulses to the 6-29. We now have to locate the desired address counter. In this manner, the counter address. When the index bit passes under the determines which address is passing under the index channel head, it induces a voltage into read or write heads at any time. the head. This voltage is fed to AND-gate 1, 6-27. Let us look at figure 5-30 and see fully conditioning it. The output of AND-gate how an address is selected. You can see that 1 is sent to OR-gate 13 and on to the address the drum contains 2048 addresses or locations counter where it resets the counter to ZERO. (0 through 2047). You can also see that the Since there is a timing bit corresponding to index bit corresponds to address zero (0) and eaCh address, a voltage is induced into the that there is a timing bit for each address. timing channel head as each address passes 6-28. Assumethat you wishtowrite under it. This voltage is sent to the address information into a given address. The desired counter and used as a stepping pulse; that ia, addressis placed into the address register. as each timing bit passes Under the timing Four of its outputs are sentto the comparator channel head, the address counter is stepped and the fifth is sent to condition AND-gates 7 up one. This signifies which address is under and 8. This fifth output partially determines the heads. When the address counter reaches whether the read or write heads are selected. the same count as that contained in the Let us now initiate a write Oulse since we wish address register, an output is produced by the to write inforthation. The presence of t.he comparator. This output is sent to AND-gates write pulse partially conditions AND-gate 1 3 through 6 and 9 through 12. You can see and fully conditions AND-gate 8 which, in thatAND-gates3through6arenot turn,partiallyconditionsAND-gates9 conditioned, since we are not reading and the through 12. output from AND-gate 7 is not present. Since

TOre:mtvm

Ars1--a. Irt171 6 GINUATII

7 10

INDEX 'VLSI

trIPONmAtive CIAO 71.17

NDA41...13;^

Figure 531. Sequential addreuing. 138

3 3/0 AND-gates 9 through 12 have the information levels present and the write heads havebeen selected, the output from the comparator, which says the desired location is under the write head, fully conditions them andthe informationisthen placed in the desired location. 6-30. Now that you see how random addressing works during the writing process, let us look at the reading process and seehow it is done. Notice in figure 5-30 thatthe read heads are mounted 3800 away from thewrite heads. This, then, necessitates an additional index channel head to insure that thereading process starts at address zero, asin the writing process. If dual read-writeheads were used, an additional index channel head would notbe required. 6-31. The reading process is identical to that of writing, except thatAND-gates 2 through 7 are conditioned by the presence of AIDA S-151 theread pulse,andthe AND-gates conditioned during writing are deconditioned Figure 5-33. Magnetic cak. by the absence of the write pulse. 6-32. *Figure 5-32 shows how sequential or conditions AND:gates 7 through 10for the cyclic reading and writAng is done. Notice that ofonedrumrotation.The in this method a timing channel is notneeded, duration read information is then written on the drum. since the complete drum is written on or 6-34. The read operation is identical tothe from before either operation is terminated. through 5 are 6-33. Let us see how a write operation is write except that AND-gates 1 5-31). We have conditioned by initiating the readpulse. The accomplished(seefig. output from AND-gate 1triggers the read information to be written present at the input output write pulse is generator.Thereadgenerator's of AND-gates 7 through 10. A conditions AND-gates 2 through 5.When the now initiated to bring up oneleg of AND-gate drum, the data 6. When the index bit passes underthe index read heads sense data on the channel head, it induces a voltage intothe passes through gates 2through 5. head. This voltage .is fed to AND-gate6, fully conditioning it. The ,utput from AND-gate6 triggers the write generator which, in turn, 7. Magnetic Disks 7-1. Magneticdiskstoragedevicesare similar in basic principles ofoperation to magnetic tapes and drums. Onefeature of the magnetic disk which has led to itspopularity is That it becomes a simplematter to add additionaldisk packstoa system when additional storage space is requized.Another feature of the disk pack is that they canbe stored for future use once they arewritten on. 7-2. Physical Appearance. One typeof disk system arrangement has the disksstacked in a disk pack as illustrated in figure 5-32.There are various types of diskpacks in use today. The one we have illustrated isrepresentative of many now in use. 7-3. Dish pack. The disk packin figure 5-32 is composed of several disksmounted on a vertical shaft. Circularprotective plates are mounted above the top disk andbelow the there Figure 5-32. Disk pack. bottom disk to protect the assembly. If 139 3//

READ/WRITE HEADS

ACCESS ARM

NDA6-170

Fpware 5-34. Magnetic disk access arm and read/write heads. were 11 disks in this assembly, only 20 information. Access to this information is surfaces (top and bottom of *a disk) could berandom by disk and record number. Recall written on and read from. This is because a that a record consists of all data treated as an protective plate is used for the upper and individual unit of information. A record could lower disk. The disk pack is removable and consist of one machine word or several words. interchangeable between the modules that Access to therecords is normally house disk packs. A dust cover is provided as accomplished randomly. an integral part of the removal handle. When inserting a disk pack into a module, the 7-7. Random Access- Disk storage makes it handle locks the disk pack to its spindle possibletoprocessinformation without which frees the dust cover from:the pack. The having the source data in sequence. This is drawer of the disk pack module must be called random access processing (as contrasted closed immediately after removing the dust with sequential).For example, if a card or cover in order to prevent dust from getting on tape record is entered into the system as the disks. input, the stored recorddesired can be 7-4. Magnetic disk layout. A typical disk is located without having to search through all illustrated in figure 5-33. Note that this disk disks. To illustrate further, assume that 10 contains track numbers 100 through 199. magnetic disks are used for storing all matenal Another disk in the same pack would contain (inventory records) by stock number. All tracks 200 through 299, etc. The actual size stock numbers starting with 0 are placed on of the disks vanes from system to system. one disk, those starting with 1 on another disk, those starting with 2 on a third disk, and 7-5.Read/Write Operation.Aead/write so on through stock numbers starting with 9, functionsareaccomplishedbyseveral which are placed on the tenth disk. If an issue magnetic heads, each mounted on an arm card with a stock number starting with a 4 is which is mechanically independent of the disk fed into the system, the disk which has all pack.Figure5-34illustratesasetof stock numbers starting with 4 is selected and read/write heads associated with the top and spun around until the particular stock number bottom surface of a sinee disk. Each access which the machine is looking for is reached. arm has accessto, and may be directed individually to, any track on its disk. Reading 7-8. Random accessprocessinghasa and writing the disk surface is very similar to decided advantage over sequential processing the reading and writing process on the surface if master files have to be updated on a of a magnetic drum. continuousbasis.Continuousprocessing usually results in a small percentage of the 7-6. The upper read/write head shown in master records being affected. In sequential figure 5-34 reads or writes the upper surface processing, each master record must be read of the disk. Access to any of the disks is and written for esch processing cycle, even program controlled. Each of the tracks on the though only a few records may have to be diskcontainsacircularseries of binary updated. In random access processing, only 140 3 2 Z transactions and transports it to the read/writestation. A those master records affected by read/write head, mounted on a transport arm, needbe readandwritten,thus saving time. readsorwritesasthediskrevolves considerable reading and writing Reading or 7-9. StorageBasket Disk Arrangement. horizontallyonaturntable. Another disk arrangement has the disks writing is performed only on the upperside with while the disk is at the read/writestation. To mounted side by side in a storage basket, side, the eachdiskinaverticalposition. When read from or write on the reverse information is to be written on or read from a disk must be returned to the storagebasket disk, a transfer arm selects the properdisk and reselected.

141 CHAPTER 6

Computer Power Supplies

ELECTRONIC computerpower supplies are commercial power. A DC power supply does the units that supply thenecessary voltage, not always have an input transformer; the power, and current for the operation of input could be taken directly from the AC computers and peripheral equipment. source. An obvious advantage of an input Whether you are workinKon a solid-state or transformer is that the AC sourcecan be electron-tube computer, ypu will End that its isolated from the load and either steppedep reliable operation depends upon a or down within the transformer secondary. well-regulated source of power. 1-4. You recall that rectification is the 2. You will receive ample trainingon the process of converting AC to pulsating DC. computer'spowersystemduringthe job-knowledge portion of your on-the-job Therefore, within the rectifier unit there must training. be some type of rectifying device. Because the Therefore, we do not intend to output of the rectifier is pulsating DC,you expound on any specific computerpower will normally find some type of filtering system in this chapter. Our objective is to within this unit. Recall that filtering is the review the operation of the solid-state circuits process of removing the pulses (ripple) from associated with converting ACpower to DC the DC output. power. After this review, we will present and 1-5. Although the unregulated output ofa discuss the operation of a typical computer power supply may be satisfactory for some solid-state power supply. Also, sincepower applications, a regulated output is necessary supply troubles can cause serious computer for the majority of computer circuits. The malfunctions, we will present typical trouble function of the regulating unit is to prevent symptoms and testing procedures associated output voltage variations. with DC power supplies. 1-6. Practical Considerations of Computer Power Supplies. Although the principles of rectification,filtering,and regulation are 1. Obtaining DC Power for relativelysimple,manyfactorsdeserve Computer Circuits consideration regarding the type of circuits 1-1. Think back to your training in basic and components that go intoa DC power electronics and recall that there supply. The complexity of the power supply are various depends upon the load requirements, i.e., the methods of generating a DC voltage. Foran electronic computer, however, most of demands of the circuits which it is designed to the support. Some of the factors to be considered DC voltages are obtained by rectifyingAC. Thus, the AC to DC power supply is, andwill in designing a computer power supplyare likely remain, the principalsource of DC listed below. power for computers. 1-7. What voltages must be supplied for the load? This brings up the need for eitheran 1-2. AC to DC Power Supplies.Let's input transformer or an output voltage divider quickly review the basic units of the ACto or both. How many amperes or milliamperes DC power supply. In figure 6-1,we have will the load draw? The rectifying device and conveniently divided a DC power supply into other components within the power supply fourbasicunits:(1)AC source,(2) will have to be of the correct type and value transformer unit, (3) rectifier unit, and (4) to support the required current. regulator Unit. 1-8. What percent of ripple and voltage 1-3. Depending on the particular variation can be tolerated in the output? Four computer, the AC source !ray be the output factors that affect the quality of the DC ofthemotor-generatorsetor60-Hz outputare:thc ACinput,typeof 142 324 3 /1/. / OSCILLOSCOPE/ PRESENTATIONS\

SOURCE AC TRANSFORMER UNREGULATED REGULA' eOUTPUT @OUTPUT pDC DC \\\\\ \\\ POWER TRANSFORMER ...... _p/1RECiTNIIFTIER/i \ REGULATOR --11. UNIT - SOURCE UNIT //it/1 Figure 64. Basic units of a power supply.

A a POSITIVE OUTPUT NEGATIVE OUTPUT TRANSFORMER SUPPLY TRANSFORMER SUPPLY

C D POSITIVE OUTPUT NEGATIVE OUTPUT TRANSFORMERLESS SUPPLY TRANSFORMERLESS SUPPLY NDA6-31

Figure 6.2. Basic half.wave rectifier circuits. 143 3/Se

operation of the power supplies within your computer's power system,

2. Rectifying AC 2-1. Therectifyingcircuitsthatuse A solid-state devices (crystalormetallic POSITIVE Al E RNA 1 ION NEGAlIvE AL TI.RNATION rectifiers) are basically the same as those that 12 use electron tubes. An obvious distinction, however, is the absence of filament or heater

AC INRU1 circuitswithinsolid-staterectifiers.The VOLTAGE simplest type of rectifier is the half-wave rectifier. 2-2. Half-Wave Rectifier. The name "half-wave" refers to the operation of this F OPWARD CURRENT circuit. It operates either on the positive or negative alternation of the applied AC to provide one pulsationof current in the RECTIFIER output. This type of rectifier circuit may be CURRENT used to convert single-phase or polyphase RE 4ERSE CURRENT (more than one phase) AC to DC. 2-3. The single-phase half-wave rectifier consists of a rectifying device in series with the alternating source and the load. The manner in which the rectifying deviceis OC LOAO connected within the circuit will determine VOLTAGE whether forward conduction occurs on the positive or negative alternation of the applied AC. This type of rectifier is commonly found WAVEFORMS inelectronic businessmachines,relay NOA6- 30 supplies, and test equipment. Flgure 6.3. Half.wave operation and waveforma. 2-4. Let'stakea lookat some basic single-phase half-wave rectifiers. Parts A and B of figure 6-2 illustrate two variations of a rectification, type of filtering, and the load half-wave rectifier utilizing aninput requirements.Recall from your previous transformer. The two circuit variations shown studies of power suppliesthat half-wave in parts C and D operate directly from the AC rectifiers require better low-frequency source. The position of the rectifier diode filtering rind better regulation than full-wave CR1 in the circuits dirtFts the current flow as rectifiers. Remember that we can reduce the indicated by the arrows adjacent to the load. output ripple by either using large inductors Note that each circuit contains resistor RS in in series with the load or large capacitors in series with the rectifier. This resistor, called parallel with the load. Also, recall that thethe surge resistor,limits the peak current choke-Input filtergives a better regulated through the rectifier to a safe value; its use, as output than the capacitor-Input filter. Of well as its value, depends on circuit design. course, if the load is constant and draws little current, the problems of ripple and regulation Normally, it is not used if there is a sufficient are slight. On the other hand, varying loads are troublesome to the extent that they cause fluctuating demands on the power supply. P I V = 2.8 E2 When the load draws more current, the ripple tends to ircrease and DC output voltage tends to decreue. r.010111i 1 4 E 1-9. Rom this discussion, you can see that 2 1.4 E2 the types ofcircuitswithin a particular computer will dictate the required output from the power supplies. The functions of rectification, filtering, and regulation will be 1VDA6 -11 4 covered ftirther to help you coruprehend the Figure 64. Half-wave rectifiers in series. 144 3 / .1 4 311-.77171 .:(PT'..14. rsre 2 f :0 R :tiRL: t-tASE AC SOURCE

.1.2.6.3 ::DA6 8

Figure 6-5. Basic three-phase half-wave rectifiers. amount of resistance within the input source-direction opposite to thatin which the or if a choke-input filteris used as the rectifier is designed to pass current. Recall filtering device. that if this voltage is exceeded, the reverse 25. Operation of the single-phase resistance of the rectifier will break down and half-wave rectifier can be understood from current will flow within the circuit. How can the simplified circuits shown in parts Aand B we prevent the P1V from beingexceeded? of figure 6-3 and the waveforms shown in part Couldn't the reverse resistancetherefore, the C. We will assume that the AC voltage applied P1Vof the rectifying device be increased by to the input terminals during theinitial stacking (placing in series) more than one half-cycle has the polarity indicated in part A. rectifier? You can see this in figure 6-4. The Electrons flow in the direction indicated by circuitillustrated shows three rectifiers in the arrows. By following these arrows, you series, which triples the reverse resistance. The can see that current flowis from the lower use of the capacitor inputfilter shown in the (negative) input terminal, through the load, circuit is the reason the rectifiers had to be through rectifier CR, through surge-resistor stacked. Notice that the secondary RS, and tothe upper (positive)input transformer voltage and the voltage across the terminal. In other words, when the rectifier capacitor are series-aiding. This is the voltage diode conducts, electrons pats throughthe that will be dropped across the rectifiers in load to develop a corresponding output the reverse directions; therefore, the PIVof voltage pulse, as indicated in part C of the this circuit is equal to twice the input voltage. figure- What would have happened it only one 2-6. Duringthenexthalf-cycle,the rectifier had been used in this Same circuit? polarity of the applied AC is negative. Except 2-8. The simple hall-wave rectifier we have for possibly a very small value of reversepresented does not have high output cuuent current, the rectifier does not conduct, and capabilities, but you can see in figure 6-4 that the smallcurrentwhich flowscanbe it does offer a high-voltage output. The peak neglected. Normally, the reverse resistance ofsecondary voltageisfeltat the output the rectifier is extremely high as compared terminals However, this high-voltage output with the circuit load resistance; therefore, is vulnerable to loading (changes in current during the secondhalf-cycle, very little requirements within the load). For example, voltage is developed across the comparatively if the load draws more current, the amplitude low-load resistance. You can see this in part B of the output ripple increases; consequently, of the figure. the amplitude of the DC output voltage 2-7. What do you think would happen if decreases. the reverse resistance of the rectifier was not 2-9. Using a three-phaseinputgreatly high enough to prevent current flow on increases the quality of the output from a alternate half-cycles? The rectifier could not half-waverectifier.Abasicthree-phase convert the AC to DC if this condition half-wave rectifier is illustrated in figure 6-5. existed.Do you remember what PIV If you trace out any one phase, you will see represents? Peak inverse voltage (PIV) is tlfe the circuit is that of a single-phase half-wave IllaStirliUM instantaneousvoltageinthe rectifier. Therefore, a three-phase half-wave is 145 - / 7

RIPPLE AC INPUT UNFILTERED DC OUTPUT rs FREQ.

io Alk 121 f 11/ V'

km-0 T = 1 'T V\r\r\(Y\r 30 AM All TOTOTIV 18 3f

NDA6-14

Figure 6-6. Waveform comparison of single- and threephase half-wave rectifiers.

nothing more than a combination of three 2-11. You can see in figure 6-6 why a single-phase units, each operating fromone three-phaseinput to a half-waverectifier phase of a three-phase source. The circuit greatly increases the quality of the output. illustrated uses a three-phase transformer to Notice that the unfiltered output waveform step up the alternating source voltage to a cleazly shows why the amplitude of the ripple high value in the wye-connected secondaries is greatly reduced when a three-phase unit is (a wye-connected secondary is also referred to employed. Note the marked decrease in the as a star-connected). The primary windings of percent of ripple. Observe also that the ripple the transformer are shown delta-connected. frequency istripled, which makes filtering 2-10. Looking at figure 6-5, you can see easier and improves the regulation of the thateachrectifier isconnectedtoa output. high-voltage secondary winding, and the load 2-12. We have spoken only of a single- and is connected between the junction point of three-phase unit, but a polyphase half-wave thewye-connectedsecondaryandthe rectifier may consist of any number of phases. common connection of the three rectifiers. It standsto reason that the greater the Current flow is indicated by the arrows. The number of phases, the less the percent of voltages induced in the transformer secondary rippleandthebettertheregulation. windings differ in phase by 120°.This means Regardless of the number of phases, the that each rectifier section conducts for 120° operation ofthe polyphaseunit is of the complete input cycle; therefore, each fundamentallythatofsingle-phaseunits rectifier contributes one-third of the current feeding a common load in time sequence. supplied to the load. The circuit we have 2-13. In summa..7, there are many ways of illustrated delivers a positive DC output to the increasingthe output capabilitiesof the load. What changes would be necessary to get half-wave rectifier. Applicationswithin a negative DC output from this same circuit? computer systems of today must take into If you answered, "Change the ground to the consideration the cost,weight,size, and opposite output terminal," you would be efficiency of the power supplies, as well as the correct; however, the common practice is to load requirements. The inclusion of keepthe junctionof the wye-connected series-limitingresistorstoreducesurge secondaries at ground potential and reverse c urren s decreases efficiency; Using the connections to the rectifiers. chokednptit filtem will add `NOW d §j;9 tc) 146 328 3/8; the unit. Increasing the number of phases and rectifiers may be too costly. In other words, half-wave rectification is not likely to be as feasible as full-wave rectificationfor applications that require tigh-power output. 2-14. Full-WaveRectifiers.The name "full-wave" identifies the operation of this type of rectifier circuit. It uses boththe positive and negativealternationsof the applied AC, and it provides two pulsations of current in the output. Because this typeof circuit uses, a greater percentage of the input cycle, the output ripple amplitude is easier to filter and voltage regulation is easier to attain. A. CENTER-TAPPEDWYE SECONDARIES 2-15. One wayofobtainingfull-wave rectificationisby using a center-tapped s 4101

RI,... PIV

DC OUTPUT .,.. = 0.7 E 2

A. FULL-WAVE RECTIFIER

E 2

8.SEPARATE Y SECONDARIES (PHASES ARE IN EFFECTCENTER-TAPPED) NDA6-13 rectifier. CURRENT Figure 6-8. Buic fun-wave three-phue CRI

transformer(alsocalleda conventional rectifier), as illustrated in part A offigure 6-7. CURRENT The circuit arrangement shown istypical of CR2 many low-voltage supplies.As shown by the waveforms in part B of the figure, rectifier CR1 conducts II and CR2 conducts12 on alternate half-cycles of the input.This results Eo in rectified current being supplied tothe filter capacitor twice each cycle.Actually, this arrangement can be thought of astwo B. WAVEFORMS half-wave rectifiersoperating 180° out of 104;6-5 phase. It yields a higher ripplefrequency (twicetheinputfrequency),whichis Figure 6-7. Basic fullwave single-phase rectifier. desirable for filtering. Although the output 147 INPUT FREQUENCY =I= 1T in figure 6-8. Notice that any one phase is identicaltothe single-phasecircuit. The AC UNFILTERED R IPPLE improvemait realized by, using a three-phase INPUT OC OUTPUT % FREQ. input can be seeninfigure6-9. These improvements are similar to those noted for 10 ..nn.. 48 V the three-phasehalf-wave rectifier,i.e., a 14 T el _.. decrease in the percent of ripple and an _a increaseintheripplefrequency erv-rovv, which 30 4 6f facilitates filtering and improves regulation. 10T --14 2-17. For loads that require high voltage NDA6-11 and high current, a full-wave bridge rectifier is most often used. This type of rectifier gives Figure 6-9. Waveform comparison of single- and full-wave rectification and applies the full three-phase full-wave rectifiers. secondary peak voltage to the output. The culTent is doubled, the DC output voltage is main advantage of this circuit is that the only half the secondary peak voltage. secondary of the transformer does not have to becenter-tapped;therefore,theoutput 2-16. As with half-wave rectifiers, wecan voltage is twice as great as it would be if the improve the DC output of the full-wave same transformer was used in the center-tap center-tapped rectifier by using a polyphase full-wave circuit. Another desirable feature is input Two three-phase circuits are illustrated that the bridge rectifier can be placed directly

A.BRIDGE CIRCUIT

L l' 1.4 E2 0 2ECR2 CR4 A

B.PIV AND OUTPUT VOLTAGE REPRESENTATION NDA6-12 Figure 6-10. Ful1-wave bridge rectifier, single-phase. 148 33 0 1 NCR CR2 T1 CR3

TH122E- / PHASE SOURCE

14CR4

CR5

)4,CR6 NDA6-9

Figure 6-11. Full-wave bridgerectifier,three-phase.

This is shown in part Bof figure 6-10, which across a single-phaseor three-phaseline, center-tapped illustratesthatthe PIV and the voltage because it does not require a applied across the load areequal to the full transformer. secondary peak voltage. Whenthe secondary 2-18. Lookingatthefull-wavebridge voltage reverses, CR2 and CR4will conduct in rfctifier illustrated in part Aof figure 6-10, the forward direction andCR1 and CR-3 -*ill you can see thatthe circuit is characterized be reverse-biased and inparallel across the by having unlike electrodesconnected at each transformer secondary. endoftheinputandlikeelectrodes 2-20. We can also improvethe output of connected at each end of theoutput. Also, the bridge rectifier byusing a three-phase you will note thattwo rectifiers conductI2 input.A transformerdesignedfora duringthepositivealternationofthe three-phasebridgerectifiercanhave its secondary, and theother tworectifiers primary and secondaryconnected wye-wye, conduct ,12 during the negativealternation. delta-wye, wye-delta, ordelta-delta. This, plus Because both currents, Iand 12 , flow in the the fact that the bridgerectifier can be fed same directionthrough the load, the bridge directly from a three-phase powerline, makes circuit produces full-waverectification. a highdeirreeof flexibilitypossible. A bridgerectifieris CR1-and CR3 three-phasefull-wave 2-19. Whenrectifiers- infigure6-11. Note that the conduct in the forwarddirection, rectifiers illustrated input reverse-biased and in primaryandsecondaryofthe CR2 and CR4 are transformer are delta-connected. Each parallelacross the transformersecondary.

THRE E-PHASE SINGLE-PHASE FULL-WA vi FULL-WAVE HA LF-WA vE HALF-WAVE CENTER-TAP BRIDGE CENTER-TAP BRIDGE ,...... ~. "...ft...-. 11\(_\* l.--%49-%we.\ UNFILTEREDII_ DC VOLTAGE OUTPUT WAVEFORM

4 48 48 18 4 ' ' ;RIPPLE 121

61 61 RIPPLE f 2f 21 31 FREQUENCY NrwarAr...... NDA6-16 rectifiers. Figure 6-12. Waveform comparisonof single- and three-phue 149

3 31 rectifying circuits that produce a DC output voltage which is about twice the peak AC input viiltage; then we will explain how higher multiples of voltage can be developed from a given source. 2- 24. Conventional voltage doubler. Referring to figure 6-13, you will fmd a voltage doubler circuit that is essentially a full-waverecliner; both the positive and negative alternations feed power to the load. During thepositivealternationsof the secondaryvoltage, CR1 conduCts IIand Figure 6-13. Conventional voltage doubler. capacitor Cl charges to the peak secondary voltage E. During the negative alternations of secondary winding is connected to the other the secondary voltage, CR2 conducts 12 and in proper phaserelationship so that the C2 also charges to the peak secondary voltage currents through the windings P..te balanced. E. Since the polarity of the charge on C2 is The operation of the delta secondaryis series-aiding to the charge on Cl, the voltage similar to that of a wye secondary; however, across the output terminals is twice the value the voltage across an individual of the peak secondary voltage (2E). Inasmuch delta-connected secondary winding is greateras both the charging (via the rectifier) and than the voltage across an individual wyedischarging (via the load) of Cl and C2 connection for equal DC output voltages. constitute the ripple, the ripple frequency of this circuit is twice the frequency of the input 2-21. Eachpositiveand negative peak AC. developed inthe three phases produces a 2-25. Cascade voltagemultipliers. A current pulse in the output; therefore, at any cascade voltage doubler circuit is illustrated in given instant of time, one rectifier, the load, part A of figure 6-14. We can obtain any and a second rectifier are in series across two desired multiple of voltage by adding sections terminals of the delta-connected secondaries. Earl of the six rectifiers conducts for 1200 of an input cycle. In figure 6-11, two rectifiers f are conducting at any instant ,af time with conduction occurring in the following order: C R 2 2E1 'C CR1 and CR6, CR6 and CR2, CR2 and CR4, AC OUTPUT CR4 and CR3, CR3 and CR5, CR5 and CR1, INPUT CR1-7:and CR6,etc. The improvements CR1 realized by using this type of input to the bridge rectifier are similar to those noted for thethree-phasehalf-waveandfull-wave A.DOUBLER center-tapped rectifiercircuitsi.e.,a &trease in the percent of ripple and an increaseintheripplefrequencywhich facilitates filtering and improves regulation. 2-22. When we compare the output of the bridge rectifier with the other types we have discussed, we can see that the bridge rectifier 2E affords the advintages of full-wave rectification at a high. DC output. You should refer to figure 6-12 for this comparison. CR2 2-23. Voltage Multipliers. We know that one way of obtaining a DC output voltage a C2 ,.. that is a multiple of the peak AC source CR 1 SOURCE voltage is by using a step-up transformer. AC INPUT There are other ways, however, which do not "Or require an increase in the secondary voltage of B.OUADRUP LER the transformer. In fact, voltage NDA6-20 multiplicationcan be achieved without a transformer at all. Let's consider two types of Figure 6-14. Cucade voltage multiplier. 150 AC DC A INPUT -" RECTIFIER 0

A. RECTIFIER CIRCUIT WITH FILTERCAPACITOR OUTPUT

VOLTAGE ACROSS C1 VOLTAGE ACROSS C1 WITH LARGE LOAD WITH SMA LL LOAD CIRCUIT CIRCUIT

B. EFFECT OF CAPACITOR ON HALF-WAVEAND FULL-WAVE RECTIFIERS NDA6-6

Figure 6-15.Capacitor used az a filter. as illustrated in part B of thefigure. After we circuit is that of a half-wave rectifier, equal to analyze the operation of the cascade doubler, the AC input frequency. This means that,like is we can readily explain howhigher degrees of the half-wave rectifier, the cascade doubler multiplication are acquired. not suited for heavy current loads.Regulation is poor and filtering is difficult. 2-26. First, consider the negative 2-27. For light loads that require a high these alternationof theinput.During DC voltage,the cascade circuitisquite alternations, you. can see that CR1 keeps Cl popular, since it can be built up to provide charged to E with a polarity as indicated. On the desired level of output. Refer to part Bof the positive alternations, C2 is kept charged lined by the conduction of CR2. When CR2figure 6-14, 'and note that the heavily conducts in the forward direction, C2 feels circuitry is a replica of the cascade doubler. It is is,therefore,possible to increase the DC thepeak ACinputvoltagewhich voltage in multiples of two by adding doubler series-aiding the voltage across Cl; therefore, the input peak E plus the voltage E on Cl circuits. chargesC2to2E.Althoughfull-wave 2-28. The lightly lined circuit is identical rectification occurs, the output capacitor C2 to that in part A of the figure. The heavily is charged only during the positive half-cycle. lined circuit differs only in that the voltage Consequently, the ripple frequency of this across the input capacitor C3 is2E rather 151

33 3.13

L I must withstand twice the peak input AC in the reverse direction; therefore, regardless of the amount of multiplication, the maximum PIV on any single rectifier is 2E. 2-30. You have seen that the primary function of a rectifier circuit within an AC to DC power supply IS to change AC voltage to DC voltage. However, as we discussed the different types of rectifier circuits, it was CR2 pointed out to you that the output voltage OUTPUT was pulsating DC; that is,it has pulses or ripples. We have also pointed out and briefly discussedthat removing or reducing the output rippleoftherectifiercircuitis NDA6-19 accomplished by filters. Now, let's find out about some of the different methods of Figure 6.16. Inductor used u a filter. filtering. than E. Capacitor C3 is kept charged to 2E by 3. Filters theaction of CR1 and iCR3. These two 3-1. We know that the variations in the rectifiers effectively place C3 in parallel with output voltage of a rectifier are called ripple C2. Whenever the charge on C3 is less than voltage. Do you recall just what this ripple that of C2, CR3 is forward-biased. So when voltageconsistsof?Let'srefreshour CR1 becomes forward-biasedduring the memories. Ripple voltage may be thought of negative half-cycle of the source AC input, C3 as an alternating voltage superimposed upon is charged by C2. We can see, therefore, that direct voltage. Actually, the ripple voltage is theoutput capacitor C2 feeds the input composed of a fundamental frequency and a capacitor C3. Note that the DC voltage with number of harmonic frequencies (harmonic respect to ground (or common) at point "a" frequencies are multiples of the fundamental is E; at point "b," it is 2E; and at point "d," frequency). The fundamental frequency is it is 4E. Additional sections could give 5E and equal to the input frequency if the rectifier is 6E, and so on. half-wave or twice the input frequency if the 2-29. The cascade voltagemultiplieris rectifier is full-Wfve. For power purposes, this particularlyusefulasatransformerless ripple voltage must be removed or reduced to high-voltage low-current supply. Each rectifier a low percent of the DC output voltage; a

ngure 6.17. LC filter sections. 152 3

4 4 2 -0 NDA6 15

Figure 6-18. Filters of two sections. device that performs this function is called a figure 6-16. Note that the inductor Ll is in filter. series with the load. 3-5. The value of L1 is such that it offers a 3-2. IndividualReactanceasFilters. A reactance which opposes a change in voltage high impedance to the AC ripple voltage and a tothe DC component. (orcurrent) bystoring energy and then lowimpedance releasing this energy back to the circuit may Therefore, for the AC ripple, a very large voltage drop occurs across the inductor and a be used as a filter. very small voltage drop across the Aoad. For 3-3. Effect of Capacitance. Recall that a the DC component, however, a very small capacitance opposes a voltage change across voltage drop occurs across the inductor and a itsterminalsbystoringenergyinits very large voltage drop across the load. Note electrostatic field. Whenever the voltage tends how the ripple has been attenuated in the to rise, the capacitor converts this voltage output voltage shown in the figure. change to stored energy; and when the voltage tends to fall, the capacitor converts itvtored 3-6. LC Filters. Capacitors and inductors energy back to voltage. We have illustrated a are combined in various ways to provide more capacitor used for filtering the output of a satisfactoryfiltering than can be obtained rectifier in part A of figure 6-15. Note that with a single capacitor or inductor. Refer to figure6-17andyouwillseeseveral the capacitor Cl is connected in parallel with combinations. Because they resemble the load. The value of Cl is such that it offers schematically the letters of the alphabet, part a very low impedance tothe AC ripple A of the figure is sometimes referred to as an frequency and a very high impedance to the L-type filter section; part B as-an -inverted DC component.Theripplevoltage is L-type, and part C as a T-type filter section. therefore bypassed to ground through the Part D 'of the figure is called a pi-type filter low-impedance path, while the DC voltage is section, because it resembles schematically applied unchanged to the load. You can see the Greek letter pi (a) . the effect of the capacitor on the output of a 3-7. Note that each filter section shown in half-waveandfull-waverectifierinthe figure 6-17 is similb: in that the inductances waveshapes illustratedin part B of figure parallel 6-15. Dotted lines show the rectifier output; are in series and the capacitances in solid lines show the effect of the capacitor. with the load. The inductor must, therefore, thefilter offer a very high impedance to the ripple Thesewaveshapes showthat frequency. Sincetheripple frequencyis capacitor, Cl,charges when the rectifier low,theinductancesare tendstoincreaseand comparatively voltageoutput iron-corecoilshavinglargevaluesof discharges when the voltage output tends to inductance (several henries). Because they decrease. In this manner, the voltage across offer suchhigh impedance tothe ripple the load is kept fairly constant. frequency, these coils are called chokes. The 3-4. Effect of Inductance. Recall that an capacitorsmustalsobelarge(several inductor opposes a changeincurrent by microfarads) to offer very little impedance to storing energyinits electromagnetic field the ripplefrequency. Because the voltage whenever the current tends to increase. If the acrossthecapacitorisDC,electrolytic current tends to decrease,it supplies the capacitorsarefrequentlyusedasfilter energy to maintain the flow of current. We capacitors. One thing you should remember have illustrated the use of an inductor for about electrolyticcapacitors isto observe filtering the output of a full-wave rectifier in correct polarity when replacing them in a 153

335 3

SOURCE I I

ND116-28

Figure 6-19. Half-wave rectifier with capacitor-input filter. circuit. More than one section of a given type between cycles. In addition to decreasing the of filter may be combined to improve the output voltage,this teicds tó iiicrease the filtering action. Some two-section filters are amplitude of the ripple voltage. If a full-wave shown in figure 6-18. rectifier is used with this type of filter, there 3-8. LC filters are also classified according is a slight improvement in thelltering action; to the position of the capacitor and inductor. however, the voltage regulation ,is A capacitor4nput filter is one in which the 3-12. Choke-Input Filters. This type of capacitor is connected directly across the filteris used when we must draw heavy outputterminalsof therectifier.Filter current or when good voltage regulation is sections A and D of figure 6-17 are examples demanded. With the same AC input voltage, of capacitor-input filters. A choke-input filter its output voltage is lower than that of the is one in which a choke precedes the filter capacitor-input filter. A choke-input filter capacitor. Filter sections B and C of figure requires full-wave rectification in order to 6-17 are exampres of choke-input filters. keep current supplied to the choke. 3.-9. Capacitor-Input- Filters. A 3-13. Wehaveillustrated.a.full-wave capacitor-inputfilterischaracterizedby rectifier utilizing a choke-input filter in figure high-output voltage at low-current drain. The 6-20. The pulsating current from the full-wave most common type of LC filter used with rectifierflows through the load and the half-waverectifiersisthe capacitor-input choke. The choke opposes the changes in pi-type filter that we have illustrated in figure current and reduces the magnitude of the 6-19. When the electrons Eow in the path ripple.ThecapacitorfilterstheAC shown by the solid arrows, the capacitors are component further. When a small amount of charged as shown. During the alternation ofcurrent is drawn, the voltage drops rapidly the input that prevents current Eow-through and then remains fairly constant. This type of the rectifier, the capacitors diacharge thiviigh filter gives good regulation under changing the load as shown by the dotted arrows. The load conditions or heavy current drain. extent towhich the capacitors discharge 3-14. When the current demands of the depends upon the value of the load. The load vary over a wide range, you will find that voltage Ms rapidly as the current drain of the a "swinging choke" will be used as the filter. load increases. For low values of current, their inductance 3-10. An important feature of this filter is values are quite high. For high values of the bleeder resistor, which is used chiefly to current, their inductance values are low since discharge the capacitors vihen,the equipmentits core has become saturated. The airgap in is turned off. In figure 6-19, this resistor is the swinging choke is much smaller than in represented by R. Normally, this resistor will the ordinary filter-choke; consequently, the draw 10 percent or less of the rated current totalreluctancesoroppositiontothe output of the power supply. It could have an magnetic lines of force through the core are adverse effect on power supply operation if it small. This permits the choke to become drew more than 10 percent of the cunent. saturated for high values of current. Swinging 3-11. A capacitor-input filter gives poorchokes have special applications in circuits regulation, because as the load increases, the where the DC variations are quite large, since capacitor is able to discharge more rapidly it has been found that they give better direct 154 336 FROM RECTIFIER

NDA6-26 Figure 6-20. Full-wave rectifier with choke-input filter.

circuitrequirements. Althoughsolid-state voltage regulation with varying amounts of to currenti.e.,the voltageremainsnearly regulators are functionallysimilar constant even though the amount ofcurrent electron-tube regulators, they can be utilized wide in more different ways. The factthat either demanded by the load varies over a permits range. NPN or PNP transistors can be used 3-15. RC Filters. If a resistor is used inthe considerablediversityin design. We will same location as the inductorin an LC filter, progess from the simple tothe more complex it is called an RC filter. You will seethis regulator circuits by reviewing theoperation particular filter being used wherever possible of representative shunt-type andseries-type because it is compact in size and low in cost. regulators. Two disadvantages of the RC filter are:(1) 4-2. Shunt Voltage Regulators. Thistype the resistor offers the same impedance tothe of regulator consists of a limitingresistor in DC voltage as to the AC component,which series with the load and a variable resistance results in a large change in the outputvoltage component in parallel (shunt) with theload. when the load current changes; and(2) You can readily see this in the basicshunt current flow through the resistor causesregulator we have illustrated in figure6-21. power tc be dissipated inthe form of heat, The variable resistance component which results in a loss of power withinthe automatiailly draws more current when the filter circuit. load current decreases and draws lesscurrent 3-16. We have seenthat the primary when the load current increases. function of the filter is to reduce or eliminate Consequently,thecurrentthroughthe the ripple from the output of the rectifier series-limiting resistor remains nearly circuit. Although a certain amount of voltage constant, whereas the voltageapplied across regulation can be attained with some of these the variable resistance and theload remains filters, it is not sufficient for the majorityof steady even though the load currentchanges. computer circuit applications. Therefore,the computerpower supplywillrequirea voltage-regulatingcircuitaswellasthe SERIES LIMITING filtering circuit. RESISTOR

4. Regulating DC DC INPUT REGULATING FROM DEVICE 4-1. Keeping the output of a DC power RECTIFIER UNIT supply constant is critically important for the majority of computer circuit applications. Some regulator circuits may be quite simple through the use of a single thermistor or SHUNT REGULATOR Zener diode. On the other hand, complicated NDA6-18 units will use an array of solid-state devices to attain proper regulation for various computer Figure 6-21. Basic shunt regulator. 155

, under varying input conditions, as well as varying output conditions. 4-4. Now, au we need to find is a device that will automatically adjust its resistance to providethesame output voltageunder varying load or input conditions. There are thermistors designed to meet these requirements. A thermistor is a thermally dependentresistor;thus,itsname.Its Vu = UNREGULATED OC VOLTAGE INPUT1 usefulnessasatemperature-compensating VR = REGULAT ED DC VOLTAGE OUT PUT device stems from the fact that its resistance decreases with heat.In other words, this thermistorhas a negative temperature coefficient;i.e.,ifcurrehtthroughit increases,temperatureincreases,butits RANGE OF OPERATION resistance decreases in a nonlinear manner. In figure 6-22, you can see the difference in the voltage dropacrossa thermistor and an TH ERMIST OR + ordinaryresistor,Rs,with a change in current. By combining the characteristics of both, we can get nearly constant voltage over a desired current range. This is indicated in the figure by the line thermistor + Rs. 4-5. Now let's take a look at a simple shuntregulatorcircuitthatutilizesa -CURR ENT-40- thermistor. Refer tofigure 6-22 for this NDA6-24 observation. In this particular shunt regulator, we are using the combination of resistor Rs Figure 6-22. Thermistor shunt regulator. and the thermistor as the variable resistance that parallels the load. This circuit is capable This explains how it regulates under varying of stabilizing the DC output voltage against load conditions, - variations of input voltage-and-load-(ett:trent 4-3. What happens, though, if the input drain) over comparatively wide ranges. voltage from the rectifier rises or falls? To 4-6. Another typeof shunt regulator prevent the output from changing with the utilizes the Zener diode as the regulating input voltage, thevariableresistance device. Recall from your previous studies of component must increase or decrease in value the 7.ner diode that it behaves similar to a so that the entire change appears across the rP.alar diode when forward-biased. But let's series-limiting resistor. This, of course,means consider the condition of reverse bias. Only a that when the input voltage increases, the very small amount of current flows when a variable resistance decreases in value. The,normal diode is reverse-biased. What happens result is an increase in current through the variableresistor,causing the voltage drop R across the series-limiting resistor to increase. + If the de_crease in the variable resistance is filt---1~1---1,--- proper, the product of its adjusted resistance and the increased current will yield thesame voltage output as that prior to the input voltage increase. Assuming a decrease in the input voltage, the action of the variable resistor is just the opposite; i.e., it inexeases in resistance value and less current flow3 through the series-limiting resistor, causing less voltage drop across it. Again, the voltage drop across the variableresistor (which is the output - voltage) is maintained constant. Essentially, then, the shunt regulator,circuit functionsas a NDA6-2.Z voltage divider that automatically adjusts its ratio to firovide the same output voltage Figure 6.23. Zoner diode shunt regulator. 156 4- 3 when a Zen& is reverse-biased?As the reverse f voltage is increased across theZener, a point. isreached where current startsto flow through the Zener. Thevoltage at which this action occurs is calledbreakdown or Zener region, and itisat this point thatthe highback resistance of theZener vanishes and the current flow is limitedonly by circuit resistance. The current throughthe Zener increasesproportionatelywithincreasing voltage beyond the breakdownpoint, but its junction- voltage remainsalmost constant. Can you see how thischaracteristic of the Zener can be used forvoltage regulation? 4-7. Figure 6-23 illustrates aZener diode used as a shuntregulator. This circuit is comparable to a VR (voltageregulator) tube NDI46 2 2 circuit. From our discussionin the preceding Figure 6-24. NPN transistor snuntreguiator. paragraph,you knowthatoncethe breakdown voltageis reached, the voltage across the Zeneris virtually constant andis tapped off of R3. The biasdetermines the independent of furtherChanges in current transistor's quiescent (operating)point and its flow. To insure correctbreakdown voltage DC resistance. In otherwords, by changing across the diode,series-limiting resistor R is the bias setting, you changethe transistor's computed for the conditionof minimum resistance so that a greater orlesser amount of unregulated input, V u , andmaximum load the input voltage appears acrossthe output current. To preventexceeding the maximum terminals. For instance, toincrease the DC allowable power dissipationof the Zener output voltage, the movablecontact to R3 diode, the computed valueof R must also be must be moved downward.This will decrease sufficientlylargefortheconditionof the forward bias on the NPNtransistor. Since maximum Vu and minimumload current. thetransistor conductslesscurrent,less This latter conditionexists when the Zener current flows throughR1, which means that draws its maximum current.The operation of the voltage drop acrossR1 is decreased. the circuit is very simple,since the regulated Consequently, the output voltageis increased. voltageoutput, Vrt remainspractically From the viewpoint of voltagedivision, we constantsolong as the input andload have simply increased outputresistance by variations stay within the'brilikdb-wn region decreasingthetransistor'sforiivardbias. of the Zener diode. Zenerdiodes are available Proportionately, more of theapplied input in numerous voltage and powerratings to voltageisthereforefeltatthe output meet the different circuit deegn terminals. To obtainalower value of requirements. regulated voltage, the movablecontact on R3 4-8. If the Zener dioderegulator is not is moved upward (morepositive) to increase satisfactory, we can use an arrangementlike the transistor's forwardbias. that shown in figure 6-24.Here, we see an 4-10. One of the morenoted advantages of the output the shunt regulator is thatit is self-protected NPN transistor connected across the to regulate the voltage.The emitter is kept at againstshortsoroverloads.Since a constant potentialby the Zener diode. regulatingdeviceisinparallel with the Therefore, any voltage variationappearing output, the current throughit decreases as the across the outputterminal is detected by the load draws more current.This accounts for transistor's base as an input signal,and the the self-protection. Onthe other hand, a current through the transistorchanges to drawback of any shuntregulatorisits regulate V. small-load inefficiencies. We canappreciate is that the this when we realize thatthe output power is 4-9. An advantage of this circuit and the shunting output loOltage can beadjusted to a desired divided between the load makes it possible to circuit;atno-load,the shuntingcircuit fixed level. This feature the full output power. V it at a higher or lowervalue to dissipates set Consequently, proportionatelylarge amounts compensateforaging ordifferentload R4 establish of output power are,wasted, particularly requirements. Resistors R2 and For this reason, the the range of voltage forbias that can be when the loads are small. 157 3A.,

Input Current would increase, causing the voltagedropacrossthethermistor to decrease. This is just the opposite of whatwe want. The drop across the regulating device should increase to prevent a rise in the output voltage. If the series voltage regulator must regulate output voltage under changing input conditions, it is apparent that we will need some type of circuit improvement. 4-14. You can see this improvement in the circuit we have illustrated in figure 6-26. Note that Ql is a PNP transistor, whereas Q2 is an NPN transistor. Inasmuch as each transistor AIDA 6 23 amplifies, this arrangement is quite sensitive and can give excellent output voltage stability Figure 6-25. Thermistor series regulator. over the designed range. Obeerve also that the output of this circuit can be adjusted by R3. small-load efficiencies of shunt regulatorsare After we go through one condition of change, notably low. you should be able to analyze the circuit to 4-11. Series Voltage Regulator. A determine its behavior for the other three series-type regulator has comparatively high conditions. We will describe the behavior of efficiency under small-load conditions. This is the circuit for the condition of increased load. because, as its name implies, the regulating This leaves the conditions of decreased load, device is in series with the load. When the increased input, and decreased input for you load draws little current, the current that to go through. passes through the regulating device is also 4-15. To prevent VE from dropping with small; therefore, the power wasted is not an increase in load, Vc E of Q1 must decrease. nearly as fpreat as that wasted bya shunt Let's keep this in mind and see if it will occur. regulator. Full-load efficiencies are about the Any decrease in Vit is fully felt at the.emitter same for the series and shunt regulators. of Q2, but it is only partially felt at the base Unliketheshuntregulatorwhich is of Q2. Here is why: Since the drop across the self-protected against shorts or overloads, a Zener diode is constant, any voltage change poorly designed series let iilittor can have appears entifely across RI, -from the emitter every solid-state device destroyed by even a of Q2 to the ground. However, this is not so brief overload. Despite this disadvantage, the for the base of Q2. It feels only a fractional series regulatorisoften used because 'its amount of the change which is tapped off of small-load efficiency far surpasses that of the R3 in the voltage divider circuit (R2, R3, and shunt regulator. 4-12. In figure 6-25, we have illustrated a thermiator being used as a series regulator to prevent voltage changes caused by variations }*.vcE.1 in load. It acts as a variable resistor in a voltage divider circuit. If the load resistance decreases tending to lower VIt, the resistance of the thermistor decreases as a result of the additional heating caused by the increased load current. Thia action keeps the ratio of the thermistor's resistance and load rekistance about-the same. Since the voltage division of the inputisvirtually unchanged, VI%is regulated. When a decrease iii load occurs, the thermistor's resistance increases to regulate VII. 4-13. A thermistorusedasaseries regulator regulates fairly well under changing load conditions, but it will not regulate input variations. In fact, it makes regulation worse OXON. instead-Of better. What would happen if the NDA6-25 input voltage, Vc, increased in figure 6-25? Figure 6-26. PNP transistor series regulator. 168 340 3 3 R4). Now recall that if the bane of anNPN transistor becomes more positive thanits emitter, the transistor will conduct more. Therefore, if the emitter. of Q2 drops more (becomes less positive) than does the base, the biasincreases. Such being the case,Q2 conductsmoreheavily.Note thatthe collector current of Q2 is actually thebase current, Is, of Ql. We knowthen that an increase in Is of Q1 causes Qi toconduct more heavily, and its Vc tdrops accordingly. Isn't this what we wanted to happen? 4-16. From the standpoint of bias on Ql, its base becomes more positive (lessnegative with respect to its emitter) because Q2 conducts more heavily. Since Q1 is a PNP transistor, the bias decreases and causesthe voltage V E across Q1 to decrease. When you analyzethecircuitforthedifferent con :itions of changingload and input, you NDA6-27 will find that good regulation is the outcome. 4-17. So far in our discussion of regulators, Figure 6-27. Constant-current regulatorwith PNP we have only discussedthe voltage regulator. transistor. However, youwillfindthatwithina computer system there are variouscircuits 5. Typical Computer Solid-State that require a conistant source of currentfor Power Supply their operation. Providing this constant source 5-1. One of the advantages ofsolid-state is the job of the constant-current regulator. power suppliesiscompactness, whichis Regulator. In chiefly important in computers today.As a 4-18. Constant-Current module contrastwiththevoltage ' regulator,the rule, you will fmd that a computer current regulator stabilizes outputcurrent, containing a solid-state supply is compactand IR ,rather than output voltages, Va .Its reaflily accessible to facilitate maintenance. primary function is to supply a constant We have illustrated a schematic of atypical current to the load. To do this, theregulating power supply module in figure6-28. This device must prevent a change in output particularmodule produces three DC current. voltages: - 12, -3, and +3 volts. Thesevoltages would be utilized within the solid-statelogic 4-19. A circuitthat can be used for circuits of the computer. Section Aof the regulating current is illustrated in figure6-27. schematiccontainsthechtuitryofthe Instead of detecting the voltage acrossthe -12-volt supply, section B isthe +3-volt output terminals, the transistordetects the supply, and section C is the-3-volt supply. current through RI. Any currentchange Input power is 115 volts I: 10 percent,GO-Hz, develops a 'yoltage change across R1, which single-phase AC. alters the bias of the PNP transistor.The 5-2. The -12-volt portion of the power transistor resista the current changes.For supply shown in section A is aseries-regulated example, ad increase in current willincrease supply. With circuit breaker CB1turned on, the voltage acrosi R1 and inake theemitter of AC power is applied to transformerT1 and the transiskir leirFaiticie. Thisdecreases the power-on light DS1 lights.The AC voltage at bsse-to-emitterforwardbiasof the PNP the secondary of T1 is full-waverectified by transistor and decreases the currentflow diodes CR7 and CR8 and filtered by anLC through it. Therefore, because the transistor filter circuit consisting of inductor L1and action opposes any change in IR , the output capacitor C7. Resistor R25 serves mainlyto current remains constant. discharge the filter capacitor when poweris understand the turned off. A negative DC voltageis also 4-20. Now that we better of functionsofrectification,'altering,and developed by an RC filter circuit consisting supply, resistor R10, diode CR3, and capacitorC2. regulation within the AC to DC power that let'stake a look at a typicalcomputer Thisvoltageismore negative than solid-state power supply. developed by the LC filter; it insures proper 159

341 ONINIMIMMONO = a II=

III R6 RI 110 IX 31C

c ea

SECTION C

LMM., MeMIND SIMMS MON. INNI11 .11ONO WM. MIII. ONNIII 01110 11011M. 001.1,

il Cal T I e"--____/ A \

BM SECTION A I AMP FUSE

11 Dal

1/11 11111 dna...IMMO 0././6 110 11 ONO 11111011. =10 OINIIIIIIIIN =1,..110 OINOIMB. 010111NO MOM.

CS 22 UF

1 NOTES' 1 El I. UNE E SS OTHERWISE SPECIFIED' RESISTANCE VALUES ARE IN OtITAS 1. UNL (SS OTHERWISE SPECIFIED ALL RESISTORS ARE KW. 1 SECTION IS

1 01 MVO 1 R11

1 CRS CR6 1.2X 14 44 L______.111=1111. 1111=1 11=11, Figure 628. Typical solickstate power supply. 1_i 342 343 biasing .ivithin the - 12-volt supply, Transistors current to protect diodes CR1 and CR2. The Q10 and Q4 are the series regulator transistors base of Q7 is connected to ground. The base and may be considered as a single equivalent. voltage of Q8 is set at 0 volts by the voltage transistor with a current gain equal to the dividers R21 and R22 which are between +3 product of thecurrentgainsofboth and 12 volts.To analyzethecircuit transistors. Transistors Q5 and Q6 form a operation under changing output conditions, differential amplifier circuit which compares a let's assume that the output voltage goes more sample of the output voltage with a reference positive. The base voltage of Q8 increases, voltage set by Zener diode VR1 to provide whichincreasesthe current throughthe feedback control of series transistors Q10 and common-emitter resistor R18, causing Q7 to Q4 to insureregulationofthe - 12-volt conduct less. The voltage at the collector of output In other words, if the ontput voltage Q7 increases, causingseries regulator increasesordecreases,thedifferential transistor Q11 to conduct less. The voltage amplifier senses this change and provides across Q11 increases, causing the output line feedback to the series-regulating transistors. voltage to go more negative to compensate for 5-3. To investigatehowthecircuit the initial positive voltage rise. regulates the - 12-volt output, let's, assume 5-6. The function of capacitor C6 is to that the voltage changes. If the voltage of the provide greater circuit response to 12-volt line were to go more positive, the high-frequency line variations. Diodes CR5 base voltage of transistor Q6 would go more and CR6 prevent the base of transistor Q8 positive, since it is derived from the - 12 volts from going more positive than about 1 volt; through the voltagedivider consisting of this insures adequate circuit operation when it resistors R23,R26, and R24.(The is initially turned on. Diode CR11 prevents potentiometer R26 is initially adjusted to set the +3-volt output line from going negative. the output voltage at the desired - 12 volts.) Capacitor C5 provides filtering of The base voltage of transistor Q5 is fixed at high-frequencynoise on the +3-volt line. - 5.6 volts by Zener diodeVR1 which then Resistor R12 provides a short-circuit current fixes the common-emitter voltage of Q5 and limit if the output +3-volt line is shorted. Q6. at about - 5 volts. Since the base voltage Zener diode VR2 providesthe reference of Q6 went positive for an assumed rise in voltage for the regulator circuit. voltage at the input line and with the emitter 5-7. The third power supply shown in voltage of Q6 fixed, the collector voltage of section C provides- 3volts. This circuit Q6 will go more negative. Transistor Q4 will employs a shunt regulator circuit consisting of conduct more heavily due to the increased transistors Q3 and Q9. This particular circuit negative voltage at its base, and the voltage at arrangement does not need a filter circuit, the emitter of Q4 win go more negative since because it derives voltage from the -12-volt it must follow the base voltage. Therefore, the and +3-volt supplies. The base voltage of effect of the positive-going voltage change is transistor Ql is set at - 3 volts by the voltage compensated for by an increase in conduction dividers R1 and R2 which are between - 12 of Q4. Since the base voltage of Q4 went volts and ground. Transistors Q1 and Q2 form more negative, the collector voltage of Q4will adifferentialamplifier.With the emitter go more positive, causing Q10 to also conduct voltage of Q1 and Q2 at the same potential, more heavily. The voltage drop across'Q10 the base voltage of Q2 will be -3 volts, which will decrease, thereby bringing the -12-volt is the same potential as the base of Ql. If the line more negative to compensate for the - 3-volt line voltage were to go morepositive, assumed positive increase in voltage. transistor Q2 would conduct more and the 5-4. The function of diode CR4 isto voltage at the common emitter of Q1 and Q2 prevent the - 12-volt line from going positive. would rise, causing Q1 to conduct less and its Capacitor C4 provides filtering of collector voltage to increase. This increase in high-frequencylinenoise.ResistorR20 Q1's collector voltage would be detected at provides a minimum load for the choke filter the base of Q3; therefore, Q3 would conduct when the external load is light so that current less, and the voltage drop across it would is alwayr flowing through the choke. increase. The increase in voltage across Q3 5-5. A second series regulator circuit which wouldcausethe output linevoltageto provides-1-3voltsis shown in section B. become more negative. The voltage at the TransistorQ11istheseriesregulator base of Q9 would also go more positive, transistor and transistors Q7 and Q8 form a causing it to conduct less. This would allow differential amplifier. A full-wave rectifier the - 3-volt line to go more negative, thereby consisting of diodes CR1 and CR2 feed into a compensatingfortheinitialincreasein capacitor filter, C8. Resistor Ria limits the voltage. 161 5-8. The function of capacitor Cl is to rectification ratio is reduced accordingly and filter the high-frequency noise on the- 3-volt likewise the efficiency of the rectifier. line.Resistor R6 provides a light load 6-6. An overheated rectifier may be caused between the - 3-volt and -12-volt lines. The byfaults(2),(3),or(4)mentioned current capacity of this - 3-volt supply is previously, andalsocan becaused by adeqbate, because it is the type of aupply that excessiveloadingorinadequatecooling. is normally used to supply a bias or reference Regardless of the cause, the rectifier that is voltage for clamping logic circuit outputs (in heatedbeyonditssafelimitswillbe this cue, negative logic). In this particular short-lived or completely destroyed. When the circuit, the clamp current actually flows from source of the trouble is the rectifier itself, the - 3-volt line through the clamping diode replacement of the rectifier will return the and resistor of the load to the -12-volt circuit to normal operation. However, when tinnily; therefore, the -12-volt supply must the overheating is the result of loading or handle the current. improper heat dissipation, the trouble will persist after the rectifier has been replaced, unless corrective measures are taken to insure 6. Analyzing Power Supply' proper loading and cooling. Malfunctions 6-7. When a power supply hes a regulator 6-1. Regardlessofwhetheryouare unit, a defective solid-state device (thermistor, troubleshooting a solid-state or electron-tube Zener diode, transistor,etc.) may be the power supply, the troubleahooting procedures source of trouble. The symptoms will range arepracticallythe same with regard to from an increased or reduced DC output circuitry. We will confine tour analysis to (regulated or not) to no DC output. The several common troubles and symptoms that symptoms and troubles are dependent upon may be caused by defectivesolid-state the complexity of the circuitry as well as the devices. We willalsobrieflydiscuss the type of regulator unit employed. We cannot, checking of these devices and consider some therefore, speak on this subject in a general matters pertinent to their replacement. manner. For any particular unit, you will have 6-2. Symptoms and Troubles. Often, the to depend on your basic knowledges and malfunction of a power supply is the fault of reasoning ability to determine whether or not the rectifying device. Crystal and metallic a solid-state device could be at fault. If you rectifierdiodesfail,as do electron-tube think that's where the fault is, you will have diodes.Certainfaultscanbe attributed to test the suspected device. directly to the solid-state rectifier. They are 6-8. Checking and Testing. You can detect (1) open-circuited rectifier, (2) short-circuited symptoms in a number of ways. You will rectifier, (3) high-forward-voltage drop, (4) readily discover overheating that produces high-leakagecurrent,and(5)overheated smoke or an odor. A faulty selenium rectifier, rectifier. The symptoms associated with these for instance, smells like rotten eggs. You can faults can be readfly detected, since they quickly find abnormal voltages and currents cause obvious and soniltimes serious trouble. by taking voltmeter and ammeter readings. 6-3. An open-circuited rectifier causes a You can see ripple in the output withan lower DC output. If the rectifier unit is a oscilloscope or perhaps even hear it in an full-wave or polyphase type, the DC output audio system. The frequency of the ripple would be reduced when one rectiZer le may reveal the trouble; for example, a 60-Hz open-circuited. It it is a single-phase half-wave ripple from a single-phasefull-wave unit rectifier, there will be no DC output. indicates that you are getting only half-wave 8-4. The symptoms just mentioned for the rectification. More likely than not, a rectifier open-circuited rectifier are the same for a is defective. short-circuitecl rectifier. In addition, there will 6-9. You can detect some troubles by a be excessive heating and AC will appear at the visual inspection. Broken connections and output. Unless short-circuit protection is built damagedcomponentsareusuallyvery intothepowersupply,othercircuit obvious. Over-heating often causes components can be permanently damaged. discoloration of circuit components. You may 6-5. Either a high-forwanl-voltage drop or see dark spots on the plates of a faulty a high-leakage current will cause lowered DC metallicrectifier. A dark spot indicates a output and increase heating. A physical rupture of the barrier layee caused by high-forward-voltage dropis caused by an high temperature. If the spot is small, there is increasedforwardresistance,whereasa probably no permanent damage, because the high-leakage current is caused by a decreased plates of the metallic rectifier are self-healing. reverse resistance. Whichever fault occurs, the Nevertheless, the effective rectifying area is 162 345 reduced, and furtker heating will ultimately parameters, you can tell from thereadings of cause failure. Although a spotcovering less the test set whether the device issubstandard. than 20 percent of the plate area is considered 6-12. Itisquitepossiblethatthe within allowable limits, replacement ofthe solid-state device may test good and yet be rectifier is recommended whenever spotting the source of trouble. The only way to find appears. A faulty metallic rectifier mayshow out is by replacing it. As for electron tubes, burned spots around its contact washer and you can use an identical devicethat is known surrounding area as a result of poor contact tooperateproperlyinplaceofthe with the front electrode. Solder-like blotches questionableone. The timerequired to seen beneath a rectifier stack arealso caused changeatubeisnormallysmall when by excessive heating. In this case, the alloyof compared to the time required to replace a which the rectifier is made has melted and run defective solid-state device. off the bottom edge of the cells. Thus, faulty 6-13. Replacements. You should always metallic rectifiers can frequently be detected replace a faulty circuit component with one by visual means. This is not true, however,for exactly like it. When this is not possible, and crystal rectifiers; tests must be made to check you have been authorized tosubstitute an their electrical characteristics. unlike item, it might be necessary to make 6-10. Checking with an ohmmeter is an some circuit modifications toprotect the easy and practical way of testing acrystal or circuit or device itself. metallic rectifier to determine whether it is be open or shorted. A high resistance(several 6-14. Sincesolid-statedevicescan thousand ohms) measured in both directions instantly damaged and are adversely affected byoverheating,acasualapproachto indicates that the rectifier is open; a relatively replacement of circuit components can be lowresistance(afewhundredohms) measured in both directions indicates that itis costly. Give particular attention to inserting limiting resistors when itisnecessary to shorted. A good rectifier has a low-forward prevent excess current flow or surges.For resistance and a high-reverse resistance.Since a 'larger inputtilter an ohmmeter applies voltageto the rectifier example,if you use under test, it is not a reliable instrumentfor capacitor in place of a defective one, turn-on testing quality. Remember that the forward and recurrent surge currents may increase resistance of a solid-state rectifier is not linear beyond rated limits. but varies as a function of t.he applied voltage. 6-15. Stacking and paralleling solid-state Therefore,therectifier must be checked rectifiers is a common practice which makes it under rated conditions to obtain a conclusive possible to rectify high voltages and high indication of its quality. currents, respectively. Although we showed for stacking in only one circuit (fig. 6-4), you 6-11. There are many test sets available rectifiers can be testing solid-statedevices. Instructions are should understandthat provided with the set to enable you to test series-connected in all the rectifier circuits properly. Solid-state devices are identified by discuseed and illustrated in this chapter. The prefix letter(s) and a number on thedevice. rated PIV of the stack is the sum of the rated Common prefixes are as follows: 1N for PIVs of the individual rectifiers. To get a crystaldiodes, MR or SR formetallic desired current-handling capacity, you can use rectifiers, Z (also HZ or MZ) for Zener diodes, crystal or metallic rectifiers in parallel.. You and 2N for transistors. Once you've identified can use a combination of series orparallel the device, you can find its specificationsin a rectifiers to replace a rectifier of almost any bookletor manual.Knowing the rated rating.

411U S GOVERNMENT PRINTING OFFICE: 1975-640.052419

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163 30554 01A 21 WORKBOOK Computer Principles - 641=-MIC.ANG AM I CKE v1. "°41116-0111' SRG

This workbook places the :;..atenals you need where youneed them while you are studying. In it, you will Ud theStudy Reference Guide, the Chapter Review Exercises and their answers, and the Volume ReviewExercise. You can easily compare textual references with chapterexercise items without flipping pages back and forth in your text. You will not misplace any oneof these essential study materials. You will have a single referencepamphlet in the proper sequence for llaxning. These devices in your workbook are autoinstructionalaids. They take the place of the teacher who would be directing your progressif. you were in a classroom. The workbook puts these self-teachersinto one booklet. If you will follow the study plan given in "Your Key toCareer Development," which is in your course packet, you will be leadingyourself by easily learned steps to mastery of your text. If you have any questions which you cannot answerby referring to "Your Key to Career Development!' or your coursematerial, use ECIT'orm 17, "Student Request for Assistance," identify yourself and yourinquiry fully and send it to ECL Keep the rest of this workbook in your files.Do not return any other part of it to ECL

EXTENSION COURSE INSTITUTE Air University 33G

TABLE OF CONTENTS

Study Reference Guide

Chapter Review Exercises

Answers for Chapter Review Exercises

Volume Review Exercise Ea Form No. 17

348 33 7 STUDY REFERENCE GUIDE

1. Use this Guide as a Study Aid. It emphasizes all important study areas of this volume. Use the Guide for review before you take the closed-book Course Examination. 2. Use the Guide for Folloiv-uP after you complete the Course Examination. The CE results will be sent to you on a postcard, which will indicate "Satisfactory" or "Unsatisfactory" comple- don. The card will list Guide Numbers relating to the items missed. Locate these numbers in the Guide and draw a line under. the Guide Number, topic, and reference. Review these areas to insure your mastery of the course.

Guide Guide Numbers Numbers Guide Numbers 001 through 020

001Introduction to Number Systems; Number 011IntroductiontoComputer Units; Typical System Features; Basic Numbering System; Computer Systems; Memory: Types of Data pages 1-6 Stored, ... FerriteCoreMemory;pages 84-94 002 Number System Conversions; Binary Arith- metic; pages 6-10 012 Memory: Four-Plane Ferrite Core Memory, Thin-Film Memory, Solid-State Memories; 003Introduction to Computer Circuits; Wave- pages 94-99 shaping andReferencingCircuits;Basic Amplifier Circuits; pages 11.18 013Arithmetic Unit; pages 100-106

014Control Unit ; pages 106-113 004Oscillator Circuits: Functional Parts of an Oscillator, Inductance-Capacitance(LC), 015Introduction to Input-Output Units; Input Nonsinusoidal Oscillators; pages 19-23 and Output Components; Tape-Handling De- vices; Card-Handling Devices; pages 114-122 005OscillatorCircuits:BlockingOscillator, Miller Integrator; pages 23-33 016 Keyboard; Printers; pages 122-133

017 MagneticDrums; MagneticDisks;pages 006 Boolean Algebra; pages 33-39 133-141

007Logic Gates; pages 39-53 018Introduction to Computer Power Supplies; Obtaining DC Power for Computer Circuits; toComputer Components; 008Introduction Rectifying AC; pages 142-152 Counters; pages 54-66 019Filters; Regulating DC; pages 152-159 009Storage Registers; pages 66-75 020 Typical Computer Solid-State Power Supply; 010Decoders; Digital and Analog Converters; Analyzing Power Supply Malfunctions; pages Encoder; Comparator; pages 75-83 159-163

1 349 CHAFFER REVIEW EXERCISES

The following ecercises are study akis. Write your answers in pencil in the spaceprovided after each exercise. Immediately after completing each set of exercises, check your responsesagainst the answers for that set. Do not submit your answers to Erl for grading.

CHAFFER 1

Objectives: To convert numbers from one system to another and to calculate the sum,difference, product, or quotient of given numbers.

1. What is the place-value of the two (2) in the following number? 1,246.789 (I-2)

2.What was the primary purpose of developing the hero (0) for use in the decimaLnumbersystem? (1-3)

3.What does the radix or base of a number system indicate? (1-4)

4.Which of the following number systems use alpha characters as symbols?(I) decimal (2) binary (3) octal (4) hexadecimal (1-7)

5.What is the purpose of the point as used in number systems? (1-8)

6.The least significant digit (LSD) of a number is normally located on whichside of the number? (1-9)

7.In the following decimal number, which number is the most significantdigit (MSD)? 2,876w (1-10)

8.What is the decimal value of the three (3) in the decimal number28731? (2-2)

9.What is the radix of the binary number system? (2-3)

laList two variations of the binary number system. (2-4)

2 330 1,* , 33 7

11. Name an application of the gray code. (2-5)

12. What is another name for the binary-coded decimal system? (2-8)

13. Write the decimal number 22 in binary-coded decimal form. (2-9)

14. What is the radix of the octalinumber system? (2-10)

15.What is the radix of the hexadecimal system? (2-11)

16.Convert the decimal number 246 to binary, octal, and hexadecimal. (3-2-5)

17. Using the double.dabble method, convert the following numbers to a decimal number. 1011(2) 2.264(8) 142A(16) (3-7-9)

18. Convert the following decimal fractions to the specified system: .625(10) to binary, .384 (10) to octal, and .275825(10) to hex. (3-10.14)

19. Using the inspection method, convert the following numbers to a specified equivalent number: 4227(8) to binary, 111011100110(2) to octal, and 3ACF(16) to (BCD). (3-15-18)

20.Solve the following binary arithmetic problems. (4-1-12)

a. 1011/2) b. 1111(2) e. 1 11. 1 1 1 ( 2) +1101(2) +1111(2) + 101.101(2)

d. 110(2) e. 1011(2) f. 111.111(2) -01(2) -110(2) -101.101(2)

g. 111001(2) h.11011(2) i. 1101111(2) X 11(2) X 01100(2) X 1100(2)

j.11(2)/111001(2) k. 1100(2)111011(2) 1. 1100(2)11101111(2)

3 3

CHAPTER 2

Objectives: fo identify circuits, circuit outputs with specified inputs, and circuit outputs when given specified faulty components; to determine truth tables from given logic gates and write Boolean equations to represent given logic diagrams.

1. In the following circuit, CI is shorted. Select the output of the circuit. (1-2)

TO TI 12 13 Ci OUTPUT RI Ov

to. TO TI 12 13 5V

A. ..

8. OV

TO TI 12 13 SV

C. OV

TO 11 72 13 OV 0. -3V I r NDA6-51

CRE figure I. For exercise 1, Chapter 2

2.Why are differentiators used as part of the input circuitry of flip-flops? (1.2)

3.List one use for an integrating circuit. (14)

4 3 52 4.In the following circuit, the output is incorrect. Vihat is the most probable cause for the incorrect output? (I-7)

ov ...... R I I I I I I I I I I I I TO TI Ta

CRE figure 2. For exercise 4, Chapter 2

5. Circle the correct output for the following circuit. (1-7-9)

A. OV

I I I I OV I I TO TI T2

0. Ov D. V.A....7

1 1 1 - I 1 1 1 1 1 1 I I I I I I TO TI T2 TO TI T2

SHUNT POSITIVE LIMITER NDA6-55

CRE figure 3. For exercise 5, Chapter 2

353 3qA.

6. Label the following circuits. (1-141)

INPUT

- -

INPUT -..- OUTPUT

C. P

14DA6-58

CRE figure 4. For exercise 6, Chapter 2

. 354 343 7,What is the identifying feature of a negative damper? (1-12)

8.List three basic amplifier circuits. (2-1)

9.What is the primary difference between an NPN and a PNP amplifier configuration? (2-5)

10. What is another name for the common-collector amplifier? (2-6)

355 3 4 1

11. Label the following circuits as CB, CC, or CE. (2-140)

-vcc 5.

OV -vCrk,

t.V vOv

NDA6-65

CRE figure 5. For exercise 11, Chaptcr 2

12.Which of the following amplifier circuits has a current gain of less than one: a common emitter, a common collector, or a common base? (Table 2-1)

13. The common.collector amplifier has a large current gain and a large voltagegain. Inte/False (Table 2-1)

35 6 8 14.What arc the basic requirements for oscillation within an oscillator? (3-2)

15. What is the identifying feature of a Colpitts oscillator? (3-13)

16. Refer to figure 2-15, A. What is the purpose of C2? (3-14; fig. 2-15)

17.What is one desirable characteristic of a crystal-controlled oscillator?(3-15)

18. What is the function of Cl in figure 2-16? (3-16; fig. 2-16)

357 3q4

19.Label the following circuits. (3-147)

REP4-1416

B REP4-1424

REP4-1420

C 0

CRE figure 6. For exercise 19, Chapter 2

1 358 3'47 20. Another name for the reluation oscillator is .(3-18)

21. List two uses for blocking oscillators. (3-19)

22.List three basic requirements of pulses used within computer systems. (3-20)

23.Refer to figure 2-20, A. Which component provides forward bias for Ql? (3-24; fig. 2-20)

24.Refer to figure 2-20. What controls the PRT of the circuit? (3-25; fig. 2.20)

25. R2 is open in the following circuit. Which of the outputs is likely to occur? (3-26)

4,`-' cc

OUTPUT

c7AT------NDA6 -47

CR.E figure 7. For exercise 25, Chapter 2

26. In a synchronized blocking oscillator, the sync pulse (input trigger) frequency will be slightly lower than the free-running frequency of the oscillator. True/False (3-27)

27. What is a common use for the Miller integrator? (3-28)

35D 28.Label the following circuit and select the proper output.(3-28; fig. 2-22)

OUTPUT

+5 -

MEOW +5

0 V NW-4 6

CRE figure 8. For exercise 28, Chapter 2

29.Why is the flip-flop a valuable circuit for computeruse? (3-29)

30. What determines the otitput frequency of theone-shot multivibrator? (3-30)

3 G 0

12 31.Refer to figure 3-23. Assume that the multivibrator is in the quiescent state. Q2 is cut off, Q3 is conducting, and ()I is conducting. True/False (3-30)

32. Refer to figure 2-23. There is no output, Vc Q1 is low, and Vc Q2 is low. What is the probable cause? (3-30; rig. 2-23)

33. Refer to figure 2-25. What is the function of C3 and C4? (3-34; fig. 2-25)

34. Label the following circuits and select the circuits' output. (3-33-36; fig. 2-25)

Ts it ev it moo

Ou Try, OuTIut er t .I vt2

tt ImPur a 1 t 'CI

I I I

mago.44

CRE figure 9. For exercise 34, Chapter 2

13 : 35.Refer to figure 2-26. What is the function of CR5, CR6, and CR7? (3-37; fig. 2-26)

36. Refer to figure 2-26. What is the function of CR1, CR2, CR3, and CR4? (3-38; fig. 2-26)

37.What is the basic application of Boolean algebra? (4-1)

38.What are the basic functions used in Boolean algebra? (4-3)

39.What does the sign (+) mean in Boolean algebra? (4-9)

40.What does the sign 0 mean in Boolean algebra? (4-13)

41. What does the sign (-) mean in Boolean algebra? (4-16)

42.What is a truth table? (4-21)

43.a. Write the Boolean equation for the circuit in CRE figure 10. b. Simplify the expression found in step a. c. Draw the logic diagram for the expression found in step b. (4-23-28)

NDA6 -8.1

CRE figure 10. For exercise 43, Chapter 2 3.C1 44.a. Draw the logic diagram for the expression X = (A + B) (A + C). b. Expand the expression (A +;B) (A + C) = X. c. Simplify the result obtained when the expression (A + B) (A + C) was expanded. ri. Draw the logic diagram for the result obtained in step c. (4-29-33)

45.Draw a three-input diode logic gate that performs the positive AND or the negative OR function. (5-6)

46.Draw a three-input diode logic gate that performs the negative AND or the positive OR function. (5-22)

47.Draw the logic symbol or symbols for the circuit in CRE figure 11. (5-35-39)

-=.-- NDA6-66 CRE figure 11. For exercise 47, Chapter 2

363 48.Draw the logic symbol or symbols for the circuit in CRE figure 12. (540.42)

C----JVAr...-. 1 Nam NE013-41

CRE figure-12. For exercise 48, Chapter 2 , 49.Draw the logic symbol or symbols for a three-input parallel DCTI, gate.(544, 45)

50. Draw the logic symbol or symbols for the circuit irt CRE figure13. (54648)

Ole

.111M. /III& NDA6 8 2

CRE figure 13. For exercise SO, Chapter 2

3 16 3 3-3

51. Draw the logic symbol for an inverter or NOT circuit. (5-49, 50)

52. Draw the logic symbol for an exclusive OR-gate. (5-51-53)

CHAPTER 3

Objective: To identify different types of counting circuits and determine their outputs.

1. What is the basic function of a binary cuunter? (1-1)

2. How are counters classified? (1-2)

3. Define the term "modulus." (1-2)

4. Compare a serial cuunter to a parallel counter as to advantage and disadvantage. (1-3)

17 NOTE: Refer to CRE figure 14, A, to answer questions 5 through 9. (1-10, 21)

i,---111110

INPUT T A T B TC T O

T 0 INPUT T A T B -T C 0--IP

B. NDA6-117 CRE figure 14. For exercises 5 through 11, Chapter 3

5. Identify the circuit shown.

6.What is the maximum count the counter can hold?

7.What is the modulus of the counter?

8.With a count of 12 in the counter, which F/Fs are set?

pulses applied, what will be the final count in the 9. With a count of 8 in the counter and 11 more input counter?

366 18 NOTE: Refer to CRE figure 14, B, to answer questions 10 and 1 1. (1-20, 21)

10. identify thc circuit shown.

11. With a count of 8 in the counter and 37 more input pulses applied, determine the rmal count.

12. A four-stage up-counter is made up of flip-flops A, B, C, and D, with A representing the LSD. Flip-flops A, C, and D are in the ONE state, and flip-flop B is in the ZERO state. What is the count in the counter? (1-20, 21)

13. A down-counter is made up of' four flip-flopsA, B, C, and D, with A representing the LSD. Flip-flops A and B are in the ONE state, and flip-flops C and D are in the ZERO state. On the next input pulse, which flip-flop(s) will change states? (1-20, 21)

NOTE: Refer to CRE figure 15 to answer questions 14 through 17. (1-23, 24, 25) 4

AND-1 FF-0 FF-A ,-..----,FF-6 FF-C OUTPUT --IP % 1 - ----\ AND-2 T -PmT

-) C 0

N1116-118

CRE figure 15. Fcr exercises 14 through 17 in Chapter 3

14. Identify the circuit shown.

15. Is this circuit count blocking or count adding?

16. At what count is AND-gate 2 disabled?

367 17. Flip-flops A, B, and D are in the ONE state and flip-flop C is in the ZERO state. After the next input pulse, what would be the count in the counter if the output of AND-gate 1 is opined?

18. What characteristic of a ring counter separates it from any other type counter? (1-38)

19. What is the maximum count that a four-stage ring counter can count? (1-41)

NOTE: Refer to figure 3-14 of the text for questions 20 through 22.

20. Identify the circuit shown. (2-8)

21. Which ANDgates would have a high output with a count of 101(2)? (2-10, 11)

22. How many shift pulses does it take to shift out a counter of 101(2)? (2-10, 11)

23. Which state would a Winn core be in if the current entered the dot side of the input winding? The nondot side? (2-19)

24. Refer to figure 3-18 in the text. What is the purpose of the diode? (2-22)

NOTE: Refer to CRE figure 16 for questions 25 through 27.

OUTPUT ...,...... 90

13 12

T 1 NDA6-119

CRE figure 16. For exercises 25 through 27 in Chapter 3

25. Identify the circuit shown. (2-24)

366 20 357 26.What is the binary configuration of the shift mgister when full? (2-25-28)

27. Starting at time TI, how many shift pulses are required to shift a bit from core MI toM6? (2-25-28)

NOTE: Refer to CRE figure 17 for questions 28 and 29.

s S - 0-,T .....m.T T 0-.T FF-A F F-8 FF-C 0- FF-0 FF-E

0 C 0^ 0 C C 0

111 ...."4-.--...-....fr"-..--.'

v ?IDA 6 -2 20

CRE figure 17. For exercises 28 and 29 in Chapter 3

28. Identify the circuit shown. (3.2)

29. Write the Boolean equation for the AND-gate output and theOR-gate output. (3-2) NOTE: Refer to CRE figure 18 for question 30.

4 T T T FF-C FF-8 FF-A9.] 0

CRI 000=0=; \C11:4 3*.CR6 415*CR5 001=1=A V

\CR7 fiPNrisCR8 54cCR9 0 1 0 = 2= , -1\ V 41/44/cCRIO NtRIIII CR12 0 11= 3= )BE

CR15 CR13 CR14 1 0 0 = 4= iE c

IIR16 4154c_CR17 CR18 1 0 1= 5= AE c

.>*:19 lbyipC.R20 11/4C,R21 1 1 0= 6 = ;B C -/VV`V CR22 CR23 CR24 1 1 1=7= AB C

NDA6-121

CRE figure 18. For exercise 30 in Chapter 3

30.If CR24 opened, what count would be detected? (14)

NOTE: Refer to figure 3-24 in the text for questions 31 and 32.

31.With a count of 27 in the counter, what is the output voltage? (4-4)

32.With an Ent of 105 volts, what is the count in the counter? (4-4)

33. Refer to figure 3-26 in the text. What do the dark areas of the converter represent? Light areas? (47)

3 .1..) 22 35-7

34. Refer to figure 3-27 in the text. If the key that represents 8 is depiessed, what resistors -e current through them? (5-2)

NOTE: Refer to figure 3-28 in the text for question 35.

35. With a minus (-) stored in F/F-A (F/F cleared) and a plus (+) stored in F/F-B (F/F set), w' ch AND-gates and OR-gates are activated? (6-2)

CHAPTER 4

Objective: To recognize different types of memory, arithmetic, and control unit operations.

I. List the basic units that make up a computer. (1-1)

2. The control unit has control of all computer units. True/False (1-2-3)

. Give an example of variable data. (2.5, 6)

4.What are the controlling factors that limit the amount of data that can be stored in the magnetostrictive delay line memory? (2-20)

5. How many data bits can be stored in a 15-millisecond delay line memory if the clock rate is 30 kHz? (2-20)

6. List two disadvantages uf the delay line memory. (2-26-27)

7.. How many cores per plane and how many planes are necessary for a system that must store all the following data? (2-33-62) a. 550 nine-bit words of raw data. b. 450 nine-bit words of processed data. c.24 nine-bit instruction words.

.1, 1

371 8.Flow many X, Y, inhibit, and sense lines are necessary for the core array of question7? (2-33-62)

9. When reading a core memory location, the sense windings and amplifier sensethe flux change of the coze as it switches from the to the state. (2-40)

NOTE: Refer to foldout 1 for questions 10 and 11. Note that the cores are numbered 0-15 onplane No. 1 (LSD), starting at the top left.

10. The memory illustrated stores bits per plane, bits total, or bit words. (2-46)

11. A data word 1011 (LSD) is to be stored in address 12 (8) of the memory.(2-53-62) a. What is the X and Y count in binary? b. What cores are fully selected? c. What will be the state of theselected cores in each plane?

12. A thin film memory has a state known as a (hard/zero) direction.(2-64)

(2.73-75) 13. The , onceprogrammed, cannot be changed. 14. Refer to CRE figure 19, Word No. Iis 0101, and word No. 2 is 0011. Identify the circuit and give the output of gate 2. (3-7)

WORD NO. 1 1 ---...s.\ 3 4 GA

WORD NO. 2 \\ GATE 1 GAT3)3 )

.--(ONEBIT DELAY)--

NDA6-130

CRE figure 19. For exercise 14 in Chapter 4

operation. (3-25-31) 15. The operation performed by the following steps isa/an 1. Clear all registers. 2. Enter word in X-register. 3. Transfer C-register to adding register. 4. Transfer adding register to accumulator. 5. Clear X. and adding registers. 6. Transfer second word to X-register. 7. Add X-register and accumulator. 8. Store result in the adding register. ,....

16. The subunit witlun the L.ontrol unit responsible for keeping trackof the instruction address is the .(4-7)

17 Of the two types of control units studied in thischapter, which is faster? Why? (4-17-19)

.(4-17) 18. A control unit operating at a fixed clock rate is said to be

25 3 73 CHAPTER 5

Objective: To identify the characteristics, functions, and methods of reading and writing spedfied input-output devices.

1. What are the two primary functions of the input and output control circuitry? (1-1)

2.What device writes into and reads from the input buffer? (1-3)

3 Name the two types of tapes used in a computer system. (2-1)

4.What tape system would be used to sense a pattern of holes with a photoelectric system? (2-3)

5.What is the common method of recording on magnetic tape? (2-5)

6.Writing occurs on magnetic tape while tape is stopped. True/False (2-9)

7.What is the function of the file protection ring used with a tape reel? (2-12)

8.Describe the computer entry punch operations. (3-2)

9.What letter does a 12-zone punch and a numeric punch 2 represent in Hollerith code? (3-9)

10.What type of device (input or output) is a keyboard? (4-1)

11. How is a character selected for typing on a typehead ball? (4-7)

12.Refer to figure 5-9 of the text. Describe the different positions of the typehead ball when the word AND is typed. (4-12, 14, 15; fig. 5-9) 363 13. Describe the difference between the D6 and D7 bit used in the'lleld data code. (4-20)

14.Sometimes the impact printer is referred to as a line printer. What does the term "line" mean?(5-2)

15.Describe the function of the synchronizing pulse generator that is used in the impact printer.(5-8)

16. What is another name for the electrographic printer, and why was it given this name? (5-22)

17. What is the purpose of the drum when used as a buffer storage device? (6-3)

18. Why is aluminum used instead of some other material in making magnetic drums? (6-4)

19. How are the read/write heads usually adjusted in reference to the magnetic drum's surface?(6-9)

20.The area of the drum's surface that passes under one read/write head is called a (6-10, 11)

21. Name two ways in which binary digits can be represented on the drum surface.(6-14)

22.What are the two modes of access used with magnetic drums? (6-23,24)

23. Refer to figure 5-30 of the text. How is the address counter reset to zero?(6-25; fig. 5-30)

24. Refer to figure 5-32 of the text. If the disk pack illustrated had 15 disks,how many disk surfaces would be available for writing and reading? (7-3; fig. 5-32)

25. What type of access is normally used with magnetic disks? (7-7)

17 3411

CHAPTER 6

Objectives: To identify the types of rectification, the devices used in voltage regulating, and the filtering systems used in power supplies; to calculate circuit outputs when given specific inputs.

1. Give the function of each of the units shown in figure 6-1. (1-1-5)

2. Name some practical considerations that should be given to an AC to DC power supply that is to be utilized within a computer. (1-6-9)

3. if the ripple frequency of a three-phase half-wave rectifier is 120 Hz for an input of 60 Hz, what is likely to be the trouble? Why? (2-10)

4. What are the advantages and disadvantages of half-wave rectifiers? (2-1-13)

5. Why is a polyphase input to a DC supply used instead of a single-phase input? (2-16)

6. For applications requiring high voltage and high current, what type of rectifier circuit should be used? (2-17)

7. What would be the DC output of the circuit shown in CRE figure 20 with a 12volt peak-to-peak AC input? (2-26)

CR2 1 DC C2 2E OUTPUT AC INPUT CR1

CRE figure 20. For exercise 7 in Chapter 6 4 8. What type of filtering is used in the half-wave rectifier shown in CRE figure 21? (3-9-1 1)

?cC)----1 SOURCE

NDA6-28

CRE figure 21. For exercise 8 in Chapter 6

9. What type of filter should be used for a power supply if the current :equirements of the load are high and voltage regulation is criti.:2" (3-1 2)

10. From the following list of electronic devices, select those that can be used for voltage regulating. (4-4-7) a.Capacitor. b. Coil. c. Thermistor. a Zener diode.

11. Why is a shunt voltage regulator self-protecting? Why is its small-load efficiency low? (4-10)

12. Name two types of volt-ze regulations. (4-2, 11)

13. Describe the sequence of events when there is an increase in DC voltage input, Vu, to the regulator circuit shown in figure 6-2 6. (4-14-1 6)

14. What is the basic operational difference between a voltage regulator and a constant-currentregulator' (4-18)

15. Refer to figure 6.28. What is the purpose of R 10, CR3, and C2? (5.2; fig. 6.28)

11.1fail. 3

16.Refer to figure 6-28. If the voltage of the12-volt line goes more positive, what will happen to the voltage c rop across Q10? (5-3; fig. 6-28)

17.Refer to figure 6-28. What is the purpose of R12? (5-6; fig. 6-28)

18.Refer to figure 6-28. What type of regulating circuit is used in the 3-volt portion of the power supply? (5-7; fig. 6-28)

19. The output of a DC power supply is low and the temperature of the power supply is normal. What is the most probable cause? (6-3)

20.A very high resistance is measured in both directions across a metallic rectifier. What is the trouble? (6-10)

21.What is the rated peakinversevoltage of a stack of rectifiers? (6-15)

, 376

30 -

MS, ANSWERS FOR CHAPTER REVIEW EXERCISES

CHAPTER 1

1. Hundreds.

2. For use as a place.holder.

3. The number of different digits used in a number system.

4. Hexadecimal.

5. The point is used to separate the fractional part of a number from the whole part.

6. The extreme right.

7. The two (2) is the MSD.

8. 30.

9. 2.

10. Gray code and binary coded decimal.

11. The code is used in some types of analog.to-digital and digitako-analog conversion equiprnent.

i 12. The 8421 code.

13. 0010 0010.

14. 8.

15. 16.

16. 11110110(2), 366(8), F6(16).

17. 11(10) 1204(10) 5162(10)

18. . 1. ...n 1 . (2 ) .3044(8)469C( 16 )

19. 4227(8) = 100010010111(2) 111011100110(2) = 7346(8) 3ACF(16) = 0011 1010 1100 1111 (BCD)

20. a.11000(2) h. lowooloom b. 11110(2) i. 10100110100(1) C. 1101.1(2) j.10011(2) d.101(2) k.10.01(2) e.101(2) I. 1001.01(2) f10.01(2) g.10101011(2)

379 1

.1...r11...... J.WVMI.V.A.ILIAIW.1111.1/1%.1. AN ul dm a...a.m. i a I AI e h li a 1 o komov ahml di is MA. d Im II1.1.11111.11110111111111 CHAPTER 2

I.The correct choice is A.

2.To produce a sharp spike.

3.Used as an input to a Schmitt trigger.

4.CR I is shorted, allowing the positive portion of the input signal to bedeveloped across RI.

5.Choice B is the correct output.

6.a. Differentiator. A., Shunt negative limiter. c. Negative damper. d.Positive damper. e. Series positive limiter. fIntegrator.

7.The diode's anode is connected to the capacitor.

8.Common emitter (CE), common base (CB), and common collector(CC).

9.The primary difference is the polarity of Vcc.

10. Another name is emitter follower.

11.a. CE. b.CB. c. CC.

12. The common-base amplifier has a current gainof less than one. gair and less than one voltage gain. It also has 13. False. The common-collector amplifier has a large current the lowest power gain.

device, amplification, and regenerative feedback. 14. The basic requirements are a frequency-determining

15. The identifying feature is split capacitors in the tankcircuit.

16. C2 is a decoupling capacitor for the power source.

17. The crystal-controlled oscillator has very goodfrequency stability.

18. Coupling capac itor.

19. a. Crystal-controlledButler oscillator. h.Armstrong oscillator. oscillator. 4t c. Shunt-fed Hartley d.Colpitts oscillator. 3 4 7 20. Nonsinusoidal oscillator.

21. Some uses of blocking oscillators are frequency dividers, counter circuits, and switching of other circuits.

22. The requirements are fast rise time, flat top, fast fall time, and accurately controllable frequency.

23. RI provides forward bias for Ql.

24.The time constant of RI and CI controls the PRT of the circuit.

25. A is the correct option.

26. False. The frequency is slightly higher.

27.The Miller integrator is commonly used as a sawtooth generator.

28. Miller integrator. Output is A.

29. Because it has two stable states, it can be used to represent binary 1 and 0.

30.Output frequency is determined by the input frequency (one pulse in, one pulse out).

31. False. Note that Q1 is a switching transistor and conducts only when an input is applied.

32. RI is open, CI shorted, or Q2 shorted.

33. C3 and C4 are coupling capacitors.

34. The circuit is a bistable multivibrator, and the proper output is represented in option A,.

35. The diodes form an input AND-gate.

36. To maintain the logic levels at 0 volts and10 volts.

37. The basic application of Boolean algebra is to express logic functions mathematically.

38. The basic functions are the OR function, the AND function, and the NG- function.

39. The sign (49 in Boolean algebra indicateslogical addition or OR.

40.The sign () in Boolean algebra indicates multiplication or AND.

41.The sign (-) in Boolean algebra indicates the NOT function as is used to indicate the complement of a term.

42. The truth table is a tabulation of the possible values of the variables in a speak Boolean expression.

3 Si 43.a. X = AB + CDE b. AB +CDE= A+ If+ CDE C. X = I + B COE

NAA6-52

ACRE figure 1. Answer to exercise 43c, Chapter 2.

44. a.

ACRE figure 2. Answer td exercise 44a, Chapter 2. b. (A+B)(A+C)=A A+AC+A B+BC. c. AA+AC+AB+BC=A+BC d.

X = A+ BC

NID.A6-44

ACRE figure 3. Answer to exercise 44c1, Chapter 2

45.

+ V OL T AG E

ACRE figure 4. Answer to exercise 45, Chapter 2 46.

tiD46 -6 7

ACRE figure 5. Answer to exercise 46, Chapter 2

47.

A A C OR B s

ACRE figure 6. Answer to exercise 47, Chapter 2

48.

A B ''Ir.:t 0 B C .---...---} C DNDA6--61

ACRE figure 7. Answer to exercise 48, Chapter 2

49.

B C _Da

ACRE figure 8. Answer to exercise 49, Chapter 2 37z

50.

SDA(5-85

ACRE figure 9. Answer to exercise 50, Chapter 2

51.

---C>------r7)C---NDA6-48

ACRE figure 10. Answer to exercise 51, Chapter 2

52. A

C Et ED

NDA6-56 ACRE figure 11. Answer to exercise 52, Chapter 2

CHAPTER 3

L Counts according to the binary system and records the number of events which have occurred.

2.Circuit design and function.

3. The number of pulses required to recycle a counter.

4.Advantage is: serial counters require less circuitry; disadvantage is: they are slow.

5. Serial upcounter.

6. 15.

7. 16.

8. F/Fs A, C, D.

9. CC would be 3 (1 cycle and remainder of 3).

10. Serial down.counter.

384 36 11. CC would be 13 (1 cycle and remainder of 13).

12. 1101(2) or 13 decimal.

13. A.

14. Mod-12 counter.

15. Count blocking.

16. 8.

17. 8.

18. Only one stage can be in the ONE state at any given time.

19. Four.

20. Parallel-in/serial-out.

21.AND-gates 2,4, and 6.

22. 3.

23. The ONE state; ZERO state. MI switches to the ONE state, preventing M2 from 24.The diode provides a back resistance when prematurely switching to the ONE state.

25. Threecore-per-two-bit magnetic shift register.

26. 011011(2).

27. 11.

28. Count detection circuit. is -ABCD.g. For the OR-gate output it isA+13-+C+15+E. 29. The Boolean equation for the AND-gate output

30. 6 and 7.

31. 135V.

32. 10101(2).

33. Conducting material; nonconducting material.

34. R8, R5, R3, and RI,

35. They are unlike signs, so AND-gate 4 andOR-gate 6 are activated.

37 CHAPTER 4

1. Arithmetic, control, memory, input, andoutput.

2. True.

3. An intercept point, or information foran account number in a supply system's computer.

4.The physical length of the delay line and the clockrate.

5. 450 bits.

6. Volatile storage and serial data.

7. 1024 cores per plane, 9 planes.

8. 32 X, 32 Y, 9 inhibit, and 9 sense lines.

9. ONE; ZERO.

10. 16; 64; 16,4.

11. a. 01(Y), 10(V). b. Core 13 in each plane. c. Core 13 in planes 1, 2, and 4 are in the ONE state; core 13 in plane 3 is ZERO.

12. Hard.

13. Solid-state ROM.

14. Full-adder, 1000(2)-

15. ADD.

16. Program control.

17 The asynchronous control. It is faster becauseone pulse sent into the delay line wdl generate a number of commands from the one pulse, and the timing is not lockedas it is in the synchronous control unit. The pulses in the synchronous control are at a set rate with eachstep following the last.

18. Synchronous.

CHAPTER 5

I. Decrease computer waiting time, and translate incoming andoutgoing data to a usable form.

2. Input device writes into the buffer; the computer reads thebuffer.

3. Paper tape and magnetic tape.

38 3 8 6 4.Paper tape system.

5. l's and O's are both written.

6. False. The "tape is moving.

7. To prevent writing when removed and allow writing when installed in the tape reel.

8. Punches a card; reads the card, and converts information read to voltages that are fed to the computer.

9. B.

10. Input and output.

11. The typehead ball is tilted and rotated.

12. A = tilt 1, rotate -5; N = tilt 0, rotate 2;D = tilt 2, rotate 1.

13. 1)6 is the control bit; D7 is the parity bit.

14. It means that when printing, the printer prints a line at a time.

15. To produce pulses that are synchronized to the rows of characters on the print row and identify these characters.

16. Wire matrix printer; it is given this name because it burns the imprint of a wire matrix character onto a specially prepared paper.

17. It acts as a time buffer between slow-speed equipment and the high-speed computer.

18. Because it is paramagnetic and dissipates heat rapidly.

19. At operating temperature, to within 0.001 to 0.002 inches of the drum surface.

20. Channel.

21. Return-to-zero (RZ) and nonreturn-to-zero (NRZ).

21. Random and sequential.

23. By the index pulse for the drum's index channel.

24.28.

25. Random access.

3 8 7 CHAPTER 6

I.The power source provides the AC input to the transformer unit. The function of the transformer unit is to step up or step down the AC to the desired level for rectification. The rectifier unit converts the AC into raw (unregulated) DC and filters out thejipple frequency. The function of the regulator unit is to maintain a constant DC output to the load.

2.Sonie practical considerations that should be given to an AC to DC power supply are: voltage and current requirements of the computer circuits; source and load variations; and percent oi regulation required in the output.

3. If the ripple frequency of a three-phase half-wave rectifier is 120 Hz with a 60-Hz input, one of its rectifiers is most probably open-circuited. Since the filter is designed for 180 kHz, a 120-Hz ripple may appear in the output when one phase is not being rectified.

4. The principal advantages of the half-wave rectifiers are simplicity and high DC output voltage (nearly peak secondary AC voltage). Because its ripple frequency is comparatively low (same as input frequency), :ts output has poor quality for heavy or varying loads. Another disadvantage is that the iectifier must withstand twice the peak AC voltage as PIV when a capacitor-input filter is used.

5. A polyphase input yields higher ripple frequencies and a lower percent of ripple in the output. This facilitates filtering and regulation.

6. The full-wave bridge rectifier should be used for applications requiring high voltage and high current.

7. 12 volts DC.

8. Capacitor input filtering.

9.When the current requirements of the load are high and the output regulation is critical, a choke-input filter should be used.

10. Thermistor and Zener diode.

11. Since the regulating device is in parallel with the output, any load short or overload cannot damage a shunt regulator. For a shunt regulator, current through the regulating device decreases as the load current increases. This accounts for the self-protection and also for its low small-load efficiency Since the current through the repliting device increases as load decreases to maintain the input current consunt. me ratio of output power to input power necessarily decreases. Thus, its small-load efficicncy is low.

12. Shunt and series.

13. In the circuit in figure 6-26, if Vu increases, the voltage across RI increases more than the increase from R3 to ground. Thus, the base-emitter forward bias decreases and current through Q2 decreases. Since the current through Q2 is the base current of Q1, when it decreases, Ql conducts less. Consequently, the drop across Ql increases by almost the full amount of the input rise, which means VR stays practically the same.

14. A constant-current regulator is designed to sense current changes and to automatically oppose the change, thereby maintaining a steady current flow. It differs from a voltage regulator which senses voltage changes and acts to keep its DC voltage output constant. dr4

3 ,Y,c, 40 s- 15. They form a filter network which develops a negative DC voltage.

16. It will decrease.

17. Provides current limiting for the +3-volt output line.

18. Shunt regulation.

19. An open-circuited rectifier is the most probable cause.

20.The rectifier is open.

21. It is the sum of the rated PI Vs of the individual rectifiers. 1.MATCH ANSWER 2. USE NUMBER 1 OR SHEET TO THIS NUMBER 2 PENCIL. STOP- EXERCISE NUM- BER. 30554 01A 21 EXTENSION COURSE INSTITUTE VOLUME REVIEW EXERCISE

Carefully read the following: DO'S: i I.Check the "course," "volume," and "form" numbers from the answer sheet address tab against the "VRE answer sheet identification number" in the righthand column of the shipping list. If numbers do not match, take action to return the answer sheet and the shipping list to ECI immediatelywith a note of explanation. 2.Note that numerical sequence on answer sheet alternates across from column to column. 3.Use a medium sharp #1 or #2 black lead pencil for marking answer sheet. 4.Circle the correct answer in this test booklet. After you are sure of your answers, transfer them to the answer sheet. If youhave to change an answer on the answer sheet, be sure that the erasure iscomplete. Use a clean eraser. But try to avoid any erasure on the answer sheet if at all possible.

5.Take action-to return entire answer sheet to ECI. 6.Keep Volume Review Exercise booklet for review and reference. 7.If mandalorily enrolled student, process questions or comments through your unit trainer or OJT supervisor. If voluntarily enrolled student, send questions or comments toECI on ECI Form 17. DON'TS: I.Don't use answer sheets other than one furnished specificallyfor each review exercise. 2.Don't mark on the answer sheet except to fillin marking blocks. Double marks or excessive markings which overflow markingblocks will register as errors. 3.Don't fold, spindle, staple, tape, or mutilate the answersheet. 4.Don't use ink or any marking other than a #1 or #2black lead pencil. NOTE: TEXT PAGE REFERENCES ARE USEDON THE VOLUME REVIEW EXERCISE. In parenthesis after each item number onthe VRE is the Text Page Number where the answer to thatitem can be located. When answering the items on the VRE, refer to the TextPages indicated by these Numbers. The VRE results will be sent to you ona postcard which will list the actual VRE items you missed. Go to theVRE booklet and locate the Text Page Numbers for the itemsmissed. Go to the text and carefully review the areas covered by these references.Review the entire VRE again before you take the closed-bookCoursc Examination. 43

330 3 7

Multiple Choice

1. (001) The radix of the octal number system is

a. 2. c.10. b. 8. d. 16.

2.(003) In the decimal number 42,671, which digit is the MSD?

I a. 2. c. 7. b.1. d. 4.

3.(007) The octal equivalent of 1210 is

a.17. C.1 I. b. 14. d. 7.

4.(007) The decimal equivalent of 139 8(16) is

a. 5017. c. 5019. b. 5018. d. 5000.

5.(008) The octal equivalent of .750(10) is

a. 0.2. c. 0.5. b. 0.3. d. 0.6.

6.(008) The binary equivalent of 5672(8) is

a. 101110111010. c.III 1101 01111. b. 110110111010. d. 101110101010.

7. (009) The sum of 11 01(2) and 1011(2) is

a.10110. C.101 11. b. 11000. d. III 00.

8.(010) Multiply 11101(2) by 10(2). The answer is

a.111011. c. 1001011. b. 111010. d. 101 0001.

9.(011) In computer circuits, a differentiator produces an output signal that is a

a. negative.going square wave. c. pulse with slow rise time. b. positive.going square wave. d. sharp spike.

391

44 A. OV C. OV RI I I 1 I I 1 1 CRI E0 I Ov I I I I I TO TI T2 TO TI T2

5. Ov 0, 1 _ 1 1 1 I I I I TO TO TI T:

Nwts-55 SHUNT POSITIVE LIMITER \

Figure 1 for Volume Review Exercise Question 10

Select the option that represents the 10. (013) Refer to the circuit and options illustrated in VRE Figure 1. correct output waveform for the input illustrated.

a. c. b. d.

11. (016) In a common emitter amplifier circuit, the

a. input is applied between thebasespd collector. b. input is applied between the base and emitter. c. output is taken between thecollector and base. d. output is taken between the emitter and ground.

12. (017) The emitter follower uses the

a. common emitter configuration. c. common base configuration. b. grounded emitter configuration. d. common collector configuration.

13. (018) In a PNP common base amplifier circuit, a positive inputsignal will cause

a. a negative-going output signal. b. the voltage drop acrosslhe load resistor to decrease. c. emitter and collector current todecrease. d. a positive-going output signal.

14. (018) The common emitter amplifier has

a. low-current gain,high-voltage gain. c. high-current gain, high-voltagegain. b. high-current gain, low-voltage gain. d. low-current gain, low-voltage gain.

3 92 3 ki

IS. (019) Some uses for oscillators in computer systems include

a. clock-pulse generation, timing generation, and gating. b. timing generation, gating, and signal generation. c. timing generation. clock-pulse generation, and signal generation. d. clock-pulse generation, signal generation, and decoding.

16. (019) The frequency of an LC oscillator is determined by the

a. physical size of the components. c. swamping resistor. b. Vcc voltage of the oscillator. d. resonant frequency of the tuned circuit.

+V CC: REP4-1416

Figure 2 for Volume Review Exercise Question 17

17.(019) Refer to VRE Figure 2. Select the components that makeup the frequency determining device.

a. LI and L2 of Tl. c. L2 of TI and C I. b. LI of T1, C2, and Cl. d. L3 and L4 of T2.

18. (020) The regenerative feedback in an Armstrong oscillator is controlled by the variable

a. capacitor. c. b. indicator. d. resistor.

19. (021) Which of the following oscillator circuits is most commonly used incomputer circuits?

a. Colpitts. c. Hartley. b. Armstrong. d. Butler.

20.(023) A blocking oscillator is normally used to producea

a. square wave. c. narrow pulse. b. sine wave. d. wide pulse.

46 3 ?a. 21.(023) Some basic requirements for pulses used within computer systems are

a.fast rise time, flat top, and slow fall time. c. slow rise time, rounded top, and fast fall time. b. fast rise time, flat top, and fast fall time. d. fast rise time, rounded top, and slow fall time.

1 73 73 I I I I I

INPUT I I

I I Vb3 iV.'.T -r

Vg I V.

VIO

I y.. , I

NDA6 -69

Figure 3 for Volume Review Exercise Question 22 and 23

21.(028) Refer to VRE Figure 3. The circuit represented in the illustration is a

a. single-shot multivibrator. c. flip-flop circuit. b. relaxation oscillator. d. Miller integrator.

23.(028) Refer to VRE Figure 3. With power applied and no input signal applied,

a. Q2 is conducting, Q3 is cut off. b. Q1 is conducting, Q2 is cut off. c. Q3 is conducting, Q2 is cut off. d. Ql is conducting, Q2 is conducting.

394 I

1 OV *-- -

VII "".-*-- I I I OV -.a - r "'"'-- 1 --. --i 1 r------7 VtI I 1 i 1

1 I

1 1 0.., -r- -r

vet L I I i OV I VI I I / I NZIA6 77 I

Figure 4 for Volume Review Exercise Question 24

24.(029.030) Refer to VRE Figure 4. The circuit in the illustration is a

a. monostable multivibrator. c. single.shot multivibrator. b. Miller integrator. d. bistable multivibrator.

48 25. (030-032) A neon indicator usually represents the output of

a. a flip-flop. c, an OR-gate. b. a NOR.gate. d. an AND-gate.

26. (033) Three basic functions of Boolean algebra are

a. addi''on, subtraction, multiplication. c. ONE, ZERO, NOT. b. AND, OR, EXCLUSIVE OR. d. AND, OR, NOT.

27. (033) Boolean algebra differs from algebra in that it

a. uses only two values. c. has two states, TRUE and HIGH. b. is used by computers. d. can be used with a number of variables.

28. (037) In Boolean algebra, the wntmg of an equation for a logic diagram is begun by writing the output for

a. the total diagram. c. one branch from the output gate. b. the input gate or gates. d. either the output or input gate (or gates).

29. (038) Which of the following is the basic re Ison for applying ordinary algebra theorems to Boolean algebra equations?

a. Complementation. c. Simplification. b. Logical addition. d. Rearrangement.

30. (039) The basic purpose of the logic diagram is to

a. illustrate the interconnection of indicated circuits. b. aid in the simplification of the Boolean equation. c. aid in construction of the truth table. d. illustrate the Boolean equation.

31. (040) The output of a logic circuit is an electrical signal which represents a

a. logical conclusion. c. 0. b. complement. d.I.

32. (043) In computer terminology, a HIGH is always

a. true. b. equal to ONE. c. the more positive voltage. d. subject to change with positive or negative logic.

3 9 6 3 i?-s-

+ VOLTAGE

OUTPUT

NE013-20

Figure 5 for Volume Review Exercise Question 33.

33.(043.044) Refer to VRE Figure 5. The Boolean equation for this circuit is

a.ABC.= c. T+F=T. b. A+B=C. d. -AT= c.

34. (044) The small circle at the input to any symbol indicates a

a. relatively LOW is required to activate the circuit. b. HIGH is required in negative logic. c. LOW required in positive logic only. d. signal must be noted.

35.(048) The Boolean equation for a three input negative AND-gate is

a. A+B+C=D. c. AB =C. b. A+BC=D. d. ABC = D,

36.(049) An OR.gate whose output signal is inverted with respect to the input signal is

a. a NOR circuit. c. an EXCLUSIVE OR circuit. b. A NAND circuit. d. an INCLUSIVE OR circuit.

37. (054) What is the basic circuit used in most counters?

a. Schmitt trigger. c. Eccles-Jordan bistable multivibrator. b, EXCLUSIVE OR. d. Monostable multivibrator.

38. (055-056) In a four-stage serial up-counter made up of flip-flops i613, C, and D with F/F-A as the LSD,

a. flip-flop C changes state on every other input pulse. b. flip-flop C' changes state when flip-flop B changes from the one to the zero state . e. flip-flop B changes state when flip-flop A changes from the zero to the one state. d. flip.Ilop D changes state when flip.flop C changes state.

50 397 39.(055) In an up-counter, the outpitt from eact F/F is taken off

a. the one side. c. both one and zero side. b. the zero side. d. reset side.

40.(059) What is a disadvantage of connecting too many flip-flops in series?

a. A count may be missed when the flip-flops are changing states. b. It would involve too much wiring. c. Short propagation time. d. Delay in operation.

41.(059) As opposed to serial counters, parallel counters

a. use less circuitry. c. use less wiring. b. consume more power. d. are slower.

51 '14 3 8'7

1 - 1 INPUT A I _

2 TO NEXT STAGE

2 : 3 A s 6 INPUT -

FLIP-FLOP A

I I 1 FLIP-FLOP a I 0 o 0

I FLIP-FLOr C I e o I 0 1

DECIMAL COUNT 2 I 5 4 11DA6-96

Figure 6 for Volume Review Exercise Question 42

42.(059) Refer to VRE Figure 6. The conditioning levels to activate AND-gate 3 are

a. F/F-A set, F/F-B reset, F/F-C set. c. F/F-A set, F/F-B set, F/F-C set. b. F/F-A reset, F/F-13 set, F/F-C reset. d. F/F-A set, F/F-13 set, F/F-C reset.

43.(061) A four-stage up-counter contaias a binary count of 1101(2). What count ls in the counter after five additional pulses?

a. 0000. c.1111. b. 0001. d. 0010. AND- 1 FF-0 F F-C FE.4. F F -I N

1 .--0--110 OUTPuT 1 -41.-- 1 -S------\ AND-2 cp...... 7

4 7 I 1 10 11 12 2 3 4 5

CP CP OUNT 1 0 0 1 2 0 1 0 1 0 10 3 0 1 1 0 1 I Il A 4 1 0 0 5 1 0 1 ( 1 1 0 1 o 1 o I 7 III 5 0 1 o 4 1 0 0 0 9 I 0 0 1 10 1010 o C 0 11 1011 12 0000

0 0 UDA6 9 8

Figure 7 for Volume Review Exercise Question 44

block(s) counts of 13, 14, and I S to makethis a 44.(061-062) Refer to VRE Figure 7. Which gate(s) modulus 12 counter?

a. OR-1. c. AND-2. b. AND-1. d. AND-I and AND-2. blocking), what would be the count in the counterafter 45. (063) In a four-stage mod-10 counter (count 13 clock pulses?

a. 0. c.2. b.1. d. 3.

46.(066) Which of the following is a function of a storageregister?

a. Temporary storage of multipleunits of information. b. Conversion of binary data to octal data. c. Temporary storage of oneunit of information. d. Conversion of octal data to binary data.

4 u 0 3 k I

-..---I...-6--1- I-

I TRANSPES TRANS/ ER TRANS, IR GATES GTIS CMS ..)...J

-s A S I s F R-C )it A , c s

SAP T 1I, INPUT MINA TRANSFER 0 TED

1 1 1 1 1 1 B SIN SERIAI. OUT

SLR I. OUT

NDA6-103

Figure 8 for Volume Review Exercise Question 47

47.(068-069) Refer to VRE Figure 8. Witha binary configuration of 101 at the transfer gate inputs, which of the following is true?

a. Transfer gate inputs A, B, and-t- are high. b. Transfer gate inputs A, B, and C are high. c. Transfer gate inputs A, B, and C are high. d. Transfer gate inputs A, B, and C are high.

48.(068-069) What type of storage register is usually usedto transfer data to a telephone line?

a. Serial-in/parallel-out register. b. Serial-in/serial-out register. c. Parallel-in/parallel-out register. d. Parallel-in/serial-out register. -

4 u_i

54 ...... SERIAL mUt - THREE CORES PER TWO SITS

tour ____L_____L__

T21.11-1--n----,171---1n-----.

T3.

CORE REPO

MI OUT ' Im .

, M2 OUT IN .

OUT . "3 Im

M, OUT Im

OuT lis m M, IONUT V---- NDA6-108

Figure 9 for Volume Review Exercise Question 49

49. (073-074) Refer to VRE Figure 9, What is the confieuration of the register when it is full?

a. 0110H. c. 111111. b. 100100. d. 110110. .37/

o 0

.s ^ s 1 --41.s - s CO....ls IF F A C 0

--*-41. --.-16--111.C 0 ---.-40---410C 0 1,...4141PC 0 ''0P C 0 h-

;

; 0c o C 14 2 2 5 4 4 7 11 11 10 1 I 12 13 14 IS

NDA6-109

Figure 10 for Volume Review Exercise Question 50

50. (075) Refer to VRE Figure 10. What count is detected by the circuit?

a. 01101. c. 10000. b. 01110. d. 10001.

51. (078-079) A resistive ladder digital-to-analog converter is connected to a six-stage counter, and the voltage applied to the ladder is 126 volts. What is the output voltage of the network when the count in the counter is 47?

a. 95. c.102. b. 94. d. 101.

52.(080) An encoder is most commonly found at the

a. input to a computer. c. input to a card reader. b. output to a computer. d. output of a card reader.

53. (084) Control voltages are transferred from the control unit to

a. all units. c. the storage unit. b. the input unit. d. the arithmetic unit.

54. (084) Three basic unitsnormallylocated in the computer main frame are

a. input, control. and memory. c. control, memory, and arithmetic units. b. input, output, and control units. d. control, memory. and input/output units.

56 4u3 55.(085) Data most likely to be stored in main memorywould be

a. instructions and input data. c. reference data and instructions. b. reference and variable data. d. data to be processed and reference data.

56. (086) In real-time applications of a digital computer, afast access time is essential to the

a. input unit. c. control unit. b. output unit. d. storage unit.

57.(086) Two important requirements of memory are

a. low capacity and high access time. c. nonvolatile and rugged construction. b. large capacity and low access time. d. ferromagnetic core and high capacity.

58. (089) Two disadvantages of the delay line memory are

a. temperature stability and long delay. c. energy loss and construction cost. b. the adjustments and standing waves. d. access time and volatile storage.

59. (089) A magnetic core makes a good bistable device forstoring binary information because it

a. has low retentivity. c. can be magnetized in either of twodirections. b. has a slow switching time. d. takes two half-eurrents to ehange its state.

60. (089) The memory least likely to lose data during a powerfailure would be the

a, volatile memory. c. solid-state memory. b. delay line memory. d. magnetic core memory. second ONE is written in the core, the flux will 61. (090) If a ferrite core memory is in the ONE state, and a

a. remain the same. b. increase to maximum. c. increase to a point just belowmaximum. d. increase to maximum and return to the residual point.

62.(090-091) When a Y line in a core memory plane isselected, it will supply

a.all cores with half-current. b. only one core per plane with half-current. c. only the cores throughwhich it passes with half-current. d. only the cores through which it passes on theselected plane with half-currevt. *iP

63. (090-093) A 42 ferrite core memory array has

aone sense winding and oneamplifier. b. one sense amplifier and one sense line per plane. c. one sense amplifier andfour sense lines per plane. d. four sense amplifiers and 16 sense windings perplane.

4 0 4 3 93

64. (693) The process of putting informationinto a storage location is referred to as

a. writing ONEs. c. a program cycle. b. a memory cycle. d. executing address.

65.(098) The solidstate RAM is addressed by

a. bit and word lines. c. X and Y lines and current drivers. b. X and Y lines and no current drivers. d. current drivers and bit and word lines.

66.(098) One advantage of the solid-state RAM is

a.size. c. small current drivers. b. high-bit capacity. d. small sense amplifiers.

67. (099) To program a solidstate ROM, the first step is to

a. clear all locations. c. set all locations to ZERO. b. construct a truth table. d. apply an excessive current or voltage.

68.(100) The computer main frame unit that performs most logical operations is the

a. control unit. c. program unit. b. memory unit. d. arithmetic unit.

69.(102) Data from memory is received in the arithmetic unit by the

a. X register. c. M0, register. b. accumulator. d. adding register.

70.(106) The computer unit which determines the sequence of operations within thecomputer is the

a. control unit. C. input/output unit. b. arithmetic unit. d. message selection unit.

71.(108) A high-speed computer would most likely use

a. synchronous control. c. a fixed clock and jump program. b. asynchronous control. d. synchronous clock and hdecimal counters.

72.(114) In I/0 components, the device which decreases computer waiting time is

a.printer. c. keyboard. b. transmitter. d. buffer.

73. (116) What is the primary advantage of tape storage over internal computer storage?

aSpeed. c. Access time. b. Cost. d. Large capacity. 74. (117) In reference tu magnent, tape reading, what is the advantage of having d two-gap head as opposed to a one-gap head?

a.It decreases the hysteresis loss. b. It can read data immediately after it is written. c. It makes reading easier. d. It induces smaller pulses in the head.

75.(119) A complete card-handling system includes

a. tape unit, card punch, and card reader. e. card punch, card reader, and printer. b. tape unit, keyboard, and card reader. d. printer, card punch, and keyboard.

76. (120) Punched cards which are to be used with mechanical computing equipment are coded in

a. Hollerith code. c. binary code. b gray code. d. decimal code.

77. (122) Which of the following ls the reason some card readers have two sets of reading brushes?

a. In case one set fails to function, the other set can take over. b. To check the validity of the reading process. c. To permit faster reading. d. One is used to stack cards.

78. (122) As an input device, the keyboard can function as

a. a parity generator. c. a digital encoder. b. an analog-to-digital converter. d. a digital decoder.

79. (125) The tilt latches on a computer keyboard act as mechanical

a. adders. c. stops. b. links. d. subtractors.

80.(127) In the computer keyboard, what determines the character to be printed?

a. Cycle clutch release lug. c. Position of the filter shaft. b. Position of the cycle shaft. d. Presence or absence of the interposer lugs.

81.(130) In the impact pnnter, providing pulses that are synchronized to the rowsof characters on the print roll is a function of the

a. character pulse generator. c. electronic distributor. b. synchronizing pulse generator. (1. storage matrix.

4 o 6 37r

82. (130) In an impact printer, what is the primary function of the electronic distributor dunng the print cycle?

a. To produce pulses that are synchronized to the rows of characters on the print roll. b. To produce a pulse.that generates the paper-feed mechanism. c. To initiate the first timing pulse. d. To channel individual pulses into separate lines that connect to the storage matrix.

83.(133) When used as buffer storage, the magnetic drum is effectively

a. a time buffer between high-speed equipment and the low-speed central processor. b. a timing generator for central processor. c. used to store information permanently. d. a time buffer between slow-speed equipment and the high-speed control processor.

84. (134) Magnetic drum head adjustment must be performed when the drum is

a. at operating temperature. c. nut 'tinning and cold. b. in low-speed operation. d. running at not more than 150 RPM.

85.(136) Random addressing of a magnetic drum means

a. the system provides access to addresses in sequence. b. the system provides access to an address without regard to sequence. c. combination read-write heads must be used. d. separate read-write heads must be used.

86. (140) A disk pack with 13 disks would have

a.11 recording surfaces. c. 24 recording surfaces. b. 13 recording surfaces. d. 20 recording surfaces.

87. (144) What is the primary function of a surge resistor in a rectifier circuit?

a. To protect the input transformer. b. To provide filtering in the output. c. To limit the peak current through the rectifying device. d. To increase the peak current through the rectifying device.

88. (145) A simple half-wave rectifier normally provides a

a. high current and low-voltage output. c. low current and low-voltage output. b. high current and high-voltage output. d. low current and high-voltage output.

89. (147) The ripple frequency of a basic full-wave rectifier is

a. equal to the input frequency. c. thiee times the input frequency. b. twice the input frequency. d. four times the input frequency.

4 Iy7 00 90.(148) The main advantage of a full-wave bridge-type rectifier is that it

a. has high current and low voltage. c.is center tapped for better rectification. b. has low voltage and low current. d. does not have a center-tapped transformer.

91.(152-153) When an inductor is used for filtering the output of a rectifier circuit, it

a. is connected in series with the load. c. offers a low impedance to the AC component. b. is connected in parallel with the load, d. offers a high irnpedance to the DC component.

92.(154) A capacitor-input filter in a rectifier circuit normally provides a

a. high-output voltage at low-current drain. c. high-output voltage at high-current drain. b. low-output voltage at low-current drain. d. low-output voltage at medium-current drain.

93.(153) One advantage of the RC filter is that

a. the resistor offers the same impedance to the DC voltage as tothe AC voltage. b. current flow through the resistor causes power to be dissipated in the form of heat. c. it is compact in size. d. the resistor offers better voltage regulation than a choke.

94.(157) One advantage of a shunt voltage regulator is

a. its small-load efficiency. b. that n wastes very little power with small loads. c. that it is self-protecting against shorts oroverloads. d. that the output power is divided between the load and the shunting circuit.

95.(158) In a DC power supply, a series voltage regulator is often used because of its

a. high-load efficiency. b. small-load efficiency. c. self-protecting capability against shorts oroverloads. d. current limiting capability.

61 397

WI 510,0e C

Ott, ON , ....LISS 02..1.$1 ItC,tttO atiltfNICI .40.4t1 2 4.,1110Iel11 SetC,.10ALI. et$4120,21Aet .t

Figure 11 for Volume Review Exercise Question 96 and 97

96.(159-160) Refer to VRE Figure 11. The AC voltage from the secondary of T1 is

a. rdtered by Ll and R25. e. full-wave rectified by diodes CR7 and CR8. b. is regulated by Q10 and C7. d. full-wave rectified by diodes CR3 and CR7.

97.(161) Refer to VRE Figure 11. Transistors Q7 and Q8 form a part of a

a. series regulator. e. voltage divider network. b. differential amplifier. d. rdter network for the +3V power supply.

62 40J 3-1 zr . . 98. (162) An open-circuited rectifier in a single-phasehalf-wave rectifier circuit will cause

a. no output voltage. c. increased DC output voltage. b. increased AC ripple voltage. d. no effect on the output voltage.

99. (162) A 60-Hz ripple frequency from a single-phasefull-wave rectifier unit indicates

a. no trouble with the unit. c. a rectifier diode is defective. b. a zener diode is weak. d. a voltage increase.

100. (163) In solid-state devices, the prefix for a metallic rectifier numberis

a. MR or SR. C. Z. b. IN. d. Hz or Mz.

41 0 Preface THIS SECOND VOLUME of CDC 30554, Electronic Computer Systems Repairman, includesanalysis of the tasks of operational performance checking, adjustments, alignments, programming, and troubleshooting. Dur- ing each study, the analysis exposes the requirements to identify allaspects or parts of each task, and explains how to place these parts in their proper positions. The explanations provided in the studies about the different parts ofa computer system are designed to show that the task is usedmany times in many places. It also explains that the principle of the task is the same even though its application may be different. Your objective in eachcase is to correlate the principles with various applications explained in thetext, and then to relate these studies to your present duty assignmentand computer. For your convenience in studying this volumewe have placed in the workbook figures and a chart to which there is extendedor frequent reference. Also an index to key elements has been included in thisvolume for quick reference. t. -.. 11 you have questions on the accuracy orcurrency of the subject matter of this text, or recommendations for its improvement, send them to: Tech Tng Cen (TTOC), Kees ler AFB, MS 39534. If you have questions on course enrollmentor administration, or on any of ECI's instructional aids (Your Key to Career Development,Study Reference Guides, Chapter Re-iiew Exercises, Volume Review Exercise, and Course Examination), consult your education officer, training officer,or NCO, as appropriate. If he can't answeryour questions, send them to EU, Gunter AFB, AL 36118, preferably on ECI Form 17, Student Request for Assistance. This volume is valued at 33 hours (11 points). Material in this volume is technically accurate, adequate, and currentas of March 1972.

iii

4 11 go 2-

Contents

Page Preface iii ,Chaptor

1 Performance Checks 1 2 Adjustments 20 3 Alignments 39 4 Programming 62 5 Troubleshooting 75 Index 99

412 iv CHAPTER 1

Performance Checks

THIS CHAPTER presents an analysis of teas I. Here we are more concernedwith the associated with the performance of checks on operational tasks, which are the tasks related equipment operation. Reliability of equip- to data movement. ment, as we are learning, is becoming better. 4. Operational/performance checks are per- Components are being 'manufactured with forrnesi by various methods. Some ofthese greater skill beCause of' mafor breakthroughs methods are: in engineering. The adoption ofsolid-state * With various meters. devices, wing crystal structures, silicone and With an oscilloscope. quartz, thin films, and doping, together with By use of display CRTs. the techniques used in the manufacturingof By use of printouts. these devices, have led to the developmentof By interpretation of lamps, audio alarms, maintenance techniques which you must and internal tests. understand so you can maintain the equip- By visual examination of mechanical ment properly. Early maintenancetechniques assemblies. which were applicable but which have been deemphasized or eliminated are: 5. A basic technical order seriesapplies to Checking the equipment frequently to this type of task. This TO is the preventive discover weak links. maintenance TO, the -WC6 series technical Aligning the circuits on a clere interval order. The phase period of the task may range basis even though no indications ofmalalign- from daily to annually. The time interval is ment exist baseduponstatisticaldata accumulated Checking the operational capability by through MDC and engineering data. excessive substitution of test problems. 6. During the analysis of tasksrelated to Interrupting the power stability with performance: marginal checks, power run down and up,and Preferred methods of doing the task are conversion to other power unita, to, name a idepjited. few. The reason that a check is made at certain specific points in equipment isdeter. 2. These practices led to thefollowing mined. problems: Technical data about the task or circuit Decrease in operational availability. being tested is examined. Increase in chance for human error, such as shorting components. Great temperature variations inenviron- 7. To make this text more meaningful, the mentally controlled cabinets. tasks which are analyzed are further identified Just plain tinkering. as pertaining to: System input (1). 3. However, these maintenancetechniques Output (0). did have their good points. The primary ones Both (I10). were that training wasmaintained at a fairly System cental (C). high level and engineering data ofsignificant value was collected on MDC documentation. In the following discussion, these alpha char- Analysis of this data resulted in the present acters identify the uniTirr-which the task will concept which, as we stated, iselimination of likely be found. But first,ave shall look at all but essential maintenance tasks.We cov- some of the sources ofdala---we will be ered the service tasks in Chapter 2 ofVolume checking. 1 4611

CLAMMED AS CLUTTIR CLIXIO mOvINC TARGET. ""%**"----;a uOvu.C, TARGET 2 V MED LESION RACIAlt SET

%%11113111100 ., ,. /vim ,.02 k.1 v. j; MUM lB

Figure 1. Radar.

1. Sources of Data Affecting Operational feet per second, and since the time you say a Checks word until it comes back as an echo return is 1-1. In this section we identify most of the measurable, the distance to the resotmding sources which supply data to a computer backdrop, usually a cliff, can be determined. weapons system. Their principal use is de 1-3. Radio wave reflection. All radar sets. fined. Their operational checks are centered work on a principle very much like that around the use of the data and its input described for sound waves. In radar sets, circuitry. The first of these sources is radar however, a radio wave or signal of an extreme- and beacon. ly-high frequency is used instead of a sound 1-2. Radar and Beacon. The operational wave. The words wave and signal have the checks normally associated with this type of same meaning. The energy sent out by a radar system input require the use of hands-on set is similar to that sent out by an ordinary methods and test equipment These tasks radio transmitter. The radar set, however, has must determine the validity of the return and one outstanding difference in that it picks up the quality and accuracy of the return. What its own signals. It transmits a short pulse, and return? Let's examine a few of the basic receives its echoes, then transmits another principles of radar and beacon so that we can pulse and receives its echoes. This out-and- appreciate why operational checks are needed back cycle is repeated from 60 to 4000 times and performed. Radar means radio direction per second, depending upon the design of the and ranging and came into being during World set. If the outgoing signal, is sent into clear War II (1939-1945). Its concepts are related space, no energy is reflected back to the to an echo in sound. When you have heard receiver. The signal and the energy which it your voice echo back to you, the delayed carries simply travel out into space and are response, of your voice repeated your original lost for all practical purposes. statement. The echo is called the return. The 1-4. By referring to figures 1 and 2, you delay encountered is measurable tin time and can see that if the signal strikes an object' such distance. Since sound waves travel at 1100 as an airplane, a ship, a building, or a hill, some of the energy is sent back as a reflected signal. If the object is a good conductor of 2 RANGE/MILES electricity and islarge, a strong echo is returned to the antenna. If the object is a poor conductor oris small, the reflected energy is small and the echo is weak. 1-5. Radio waves/signals travel in straight lines at a speed of approximately 186,000 (light) miles per second as compared to 1100

SYSTEM FIXED CLOUD MOVING MOVING feet per second for sound waves. Accordingly, TRIGGER RETURN LLUTT ER TARGET TARGET there is an extremely short time interval 2 between the Bending of the pulse and the Figure 2. Radar return. reception of its echo. It is possible to measure 2 (L5' the interval of elapsed time between the special military codes. Each return or reply is transmitted and received pulse with greatstoredwithina half-mile range block in accuracyeven to one ten-millionth of amemory. Since a code is bracketed, a detec- second. tion circuit must be designed to sample the 1-6. The directional antennas used by radarfirst and last (15th) pulse and the intervening transmit and receive the energy in a more orpulses must be temporarily stored. To do this less sharply defined beam. Therefore, when aeffectively, a delay line in conjunction with signal is picked up, the antenna can be rotatedan AND gate is used (refer to fig. 3). With until the received signal is maximum. Thedetection of both the first and last pulse a direction of the target is then determined byparallel shift is generated, causing data bits 2 the position of the antenna. through 13 and parity bit 14 to be loaded 1-7. The radar return is fed to the input into a decoder unit. unit of certain electronic data processors in 1-10. Height-finder returns. Although we the forms of raw or normal video and have not discussed height-finder radar returns, processed video after each has been amplified data acquisition systems employ this type of by the radar receiver. The returns may beradar. The returns are similar to search video, raw/normal video or processed video. Raw or and the processing and amplification of re- normal video is that type of return which is turns are similar to those described in Chap- merely amplified along with the noise returns. ters 2 and 3, of this text. Therefore, opera- Processed video, however, may be in various tional/performance checks usually are the for-One such form it MTI (moving target same. Now let's examine another part of radar ink:lei:dor) video. This form is obtthned bywhere we must be concerned with operational measuring a return with the last return for the checks. same target and, if the return shows achange 1-11. Radar Antenna. Search radar and in position (representing velocity), the circuitbeacon radar usually scan the skies by rota- performing the comparison generates a pulse. ting an antenna assembly upon a fixed pedes- Another type of processed video is MLI (main tal. Height-finder radars usually scan the skies lobe indicator) video. This type of presenta-by having the antenna nod up and down in tion is generated by_a circuit which processes much the same way that you shake your head the strongest return from a target (main lobe) when you agree with a statement. The height- and suppresses the weaker returns (side lobes) fmder radar alsois capable of horizontal from the same target. Then there are othermovement, but this movement is usually types of video which are processed to be used controlled and exercised only upon demand in jamming situations and to eliminate clutter of an operator or automatic machine opera- such as clouds and electrical disturbances. tion. 1-8. Beacon. Just as radar scans the skies 1-12. Determining proper orientation of aircraft radar rotation. This means "Does the radar for aircraft, beacon scans the skies for always maintain its proper orientation with which are fitted with transmitters or trans- respect to north?" To obtain this answer, an ponders, as they are called, whichtransmit automatic change pulse (ACP) counter is coded beacon repliesto ground stations. Where radar only locates an object in the sky, inserted in data prccessors which counts ACPs beacon, through its processing, is capable offrom the time that a main pulse labeled identifying what type of aircraft is in the sky. NORTH pulse is received. Many search radars These aircraft may be friend or foe. They may use this north pulse as an orientation signal be civilian airlines fitted with IFF (identifica- and, when the radar personnel orient the tion, friend of foe) transmitters which allowradar to north, the pulse is allowed to be ground stations to identify them, or they maygenerated. Since the pulse is generated at be military aircraft or missiles fitted with SIF (selective identification feature) transmitters

which allow ground stations to identify which 713 at. type of military aircraft is in the air. BEACCt3

1-9. Beacon replies differ from radar re- 1313 17 1110 11 7 turns. In beacon, a pair of pulses (bracket) are generated 20.3 Asec apart. Between these two pulses is room for 13 additional pulses, and MOM these pulses are formed into codes. To help Li10919VENIVAVA 70 31F TAIMET you distinguish which type of beaconreply P ROC E SUNG your equipmentisprocessing,the term MODE is used. Each mode is associated with particular types of replies such as IFF, SIF, or Figure 3. Beacon detector. 3

415 146 4

awns IC* 1....II IS feet, plus or minus a specified amnunt, then X te operationally the system is malfunCtioning and alignment is required.If coincidence occurs at some points but not at others, nonlinearity is evident and alignment is required. In the operational checks of these 1 areas, data processing system and radar positioning are examined and, if errors are discovered, then alignment must be performed. 1-14. Keyboards. A keyboard is basically a typewriter with a digital encoder attached that converts the action of depressing a key to ill a digital code. By this means it is possible to insertdata into a digital machine inits ,./.11,0 ....,, languagedigitalcode.Inthiscase,the NMI/PooDif DIPI.A1 keyboard and its encoder function as an MASA( nooti interpreter between man and machine. Figure meAfrAJNiS wing URN CIAVA Net coif Iwo, 5 shows the function of a typical keyboard when it is used as an input device. Each time Figure 4. Height-finder angle mark display. that a key is depressed, an 8-bit binary code is inserted into the transmitter. The transmitter north, it may be at true north or magnetic converts this pai-allel data to a serial message north. The EDP may use either north direc- that is transmitted over a telephone line. At tion for determining position; therefore, an the other end, a receiver converts the serial ACP counter is installed to count the posi- data back to parallel and applies it to a tional changes of a search radar starting with printer. The printer decodes the digital data north pulses. The increment of change is and prints out the character that was inserted often established at .088° per change and a by the keyboard. total of 4096 pulses equals one revolution of 1-15. Notice that there are eight parallel a radar antenna scan. The increments may be lines leading from the keyboard to the trans- larger or smaller depending upon circuit de- mitter and that each line shows a voltage level sign and antenna rotation speed. The opera- that represents a ZERO or a ONE. Also notice tional check is to measure the output of the that each line is labeled with a bit number counter with north mark pulse for coinci- (DO through D7). The binary configuration dence.If coincidence does not occur, a generated in this example is: problem may be identified. If the EDP uses true north and the radar uses magnetic north D7 D6 D5 D4 D3 D2 D1 DO as references, then a preset number of ACPs 0 1 0 1 0 0 1 0 equivalent to the angular difference between Parity Control Character Code true and magnetic north must be programmed bit bit into the ACP counter. Either a switch or a series of switches will provide this capability. 1-16. This Fieldata code is used with the 1-13. Determining proper orientation of StrategicAir Command Communications height-finder nod. This means you must per- System (SACCS). It uses an 8-bit binary form a check, usually with an oscilloscope at number to represent letters, numbers, punctu- the input unit, which determines that the nod ation marks, and other selected symbols. To voltage change is the proper amplitude, phase, enable you to understand more of the key- and angle, and that it is coincident with the board operation, we shall explain it in terms nod positions at, for instance, 0°, 5°, 10°, and of the code it generates. 300. Radar personnel willprovide certain 1-17. Now let us see how the mechanical signals to your system which will aid you. A movement of a typewriter key produces an circuit in the radar generates a pulse each time 8-bit binary code. Look at figure 6. There are that the antenna increases or decreases its nod eight 2-position switches meci±imically con- by 5°. This signal is called "angle mark." Its nected to the typewriter. In the figure, it is occurrence, through circuit design and com- assumed that the M key has been depressed. pensation circuit variations, is measurable at The mechanical analog-to-digital converter has selected ranges and altitudes. For instance positioned the switches so that their voltage (refer to fig. 4), if the angle mark at 0° with outputs represent the binary code for the earth curvature correction (ECC) does not letter M. The voltage at the output of a switch intersect the 200-mile range mark at 31,000 is either -12 volts (logic ONE) or 0 volt (logic 4 416 - 60.

10.If) 101 /1) / 1) 101

I.0161 I tte OCCEIVell

Figure 5. Keyboard operation.

ZERO). In figure 6, switches Sl,53, 54, 7), the electronic package places the Fieldata their 0-volt code for each character onto the tape in the S6, and S8 are switched to Operational positions;therefore,the outputcodeis sequence in which it is typed. DO-0 1 0 0 1 0 1 0D7, which isthe Fieldata checks of this keyboard also require that code for M. compatibility with the tape unit be checked. 1-18. As the operator depresses each key, If data cannot be loaded properly, then the the keyboard prints each character just as a control signals fed to the machine, the timing typewriter does and, at the same time, gener- of the machine, or the development of data ates the Fieldata code. Operationai accuracy from the machine may be incorrect, and requires that the letter "M" be typed on the corrective repair action is indicated. paper by the letter "M" onthe ball in the typewriter. If the character is not printed, the keyboard must be aligned or adjusted, and you must use appropriatetechnical order reference instructions to adjust or align the unit properly. If an incorrect Fieldata code is developed by the switches and/or electronic ""'41:; logicpackages which are a part of the keyboard unit, very likely a parity error will .10000

be generated. Each parity error is visually 41 indicated by a light. Backspacing will erase 0 the Fieldata code, but will not correct the .100 JO 11t i problem. Troubleshooting with special test equipment in an off-line mode (bench) is .100I 0. .11.411 N.. indicated. -Is IA .10 0. 1-19. Since the keyboard we are using in our example is used in SACCS, we might ....111.0G110 mention here that this keyboard is also used C11.0 to write data onto magnetic tape. When programmed by an external control unit (fig. Figure 6. Letter selection code. 5 FILE I -r---- FILE 2 POWER e WRITE 0COPY WRIT LAMP TEST INDEX INDEX

KLOCK MANUAL START END CONTROL OPERATION .11 2

ENTEr SP SC FILE REQD REDD REDD SKIP PARITY

ADVANCE NOLO KIM LINE CHARACTER SELECT SEARCH SELECT PARITY

11.111101=mor li [0:

2 FILE SELECTION KNOBS IEOA = END OF ADDRESS SP REQDSEND PARTIAL REQUIRED SC REDD SEND COMPLETE REQUIRED

Figure 7. Control unit. 1-20. The keyboard is also used as antor is called for, the program stops and a output device when checking the valiclity ofcontrol panel light lights (in callout ()area) program data on magnetic tape and theidentifying which operator action is called control of signals called for from the control for. The operator completes the operation panel. By selection of a file on the control and the program continues. The final action panel with the selection knobs in callout (2) on a message or program will be an operator (shown in fig. 7) and the command signal action called send complete (SC REQD). This search, the keyboard will select the proper action provides the command signal to trans- key through its electronic package and cause mit. it to print. At such time in the printing of a 1-21. Tape Transport Units. Let's briefly prop= that a control signal from the opera- identify tape drive units and discover what we

READ WRITE DATA ERASE 41111-1110. P ROC E S SING CONTROL UNIT UNIT

TAPE DRIVE UNIT

OWER UNIT

Figure 8. Block diagram, tape drive.

. 6 418 REEL ASSEMBLIES SERVOS

Figure 9. Servo unit, tape drive.

checks. will cause the reel assemblies to rotate until should look for during operational nulled. Refer to figure 8, the block diagramof a tape the error voltage (induced voltage) is unit, and observe that the tape unitis usually The rotation and velocity of the reelassembly an external part of adata processing system. are dependent uponthe phase angle and This unit provides flexibility in the usesof the magnitude of the applied error voltage. (For a EDP because many fixed programs maybe detailed explanation of servo units, refer to stored on individual tapes and may,at the the servo unit in the chapter on alignment.) discretion of the user, be inserted.The data Look at figure 9 and see that the servos do, in and control functions are fedthrough and fact,control the reel assemblies and that controlled by the interface unit betweenthe external voltages in the form of error voltages data processor and tape drive unitSome error provide the drive force necessary for tape checking may also be performedby themovement. Now that we have briefly dis- control unit. cussed some of the general characteristics of 1-22. Mechanically, the tape driveunittape transport units and have seen howthe consists of two units to house the tapereel unit is connected to the data processor, let's and takeup reel, servo units tocontrol each identify, in the next two paragraphs, some reel assembly, a vacuum pump(on many elements of the unit which are considered models), photocells for tape orientationand during the performance of operational checks. control (on some models), and a motordrive 1-23. Mechanical and electricalelements: unit and power supply unit. Whenthe servos a. Servos. are supplied anelectrical error voltage, they b. Motors.

:Fm004.1tA704 t

k, YO:Vt I N ACAI NI AR( /./ ///.. /4/. "MQ 11 CS

1. :II

Figure 10. Repeater stations. BINARY MESSAGE

i 0 1 1 0 1 1 1 0 0 I 0 I I 0 0 0 I 1 1 SERIAL PULSE TRAIN (NEGATIVE LOGIC)

1300-CPS SINE WAVE INPUT Ai GATED OUTPUT r WA (VVt v[VI) Figure 11. Dipole data. c. Vacuum pump. telephone company. In overseas areas and d. Reel assemblies. under tactical situations in the United States, e. Tape head positioning. Air Force personnel and equipment replace a f. Photocell. commercial company. g. Voltages, currents. h. Tape tension. 1-28. Since data must be transmitted and received over these media, a problem arises in 1-24. Data flow elements: that any signal entered into a long wire loses a. Read, write, and erase. power. The reason for *this is that wire has b. Control signals. 4 resistance which impedes the flow of a signal. C.Diagnostics: To compensate for this, refer to figure 10 and (1) All ones check. see that TELCO places repeater stations every (2) All zeros check. 6 or 7 miles with capabilities of taking in a (3) Crosstalk check. very small signal and boosting it to a high enough power rating to reach the next repeater station. The amplifiers in the repeater d. Reliability check between tape trans- station are linear-type amplifiers with auto- port and data processor. matic frequency and gain controls built in. e. Error check circuits check. They can raise the power level of the output signal with no loss of signal data. 1-25. The above listings point out each area in which an operational breakdown may 1-29. To get the data to a TELCO line occur. These areas are significant enough to properly, you may have a modulator or have performance routines prepared and per- transmitter in your equipment. This unit formed. Some may be daily, such as theprepares the digital data for the line. In one diagnostic check, servo unit check, photocell system,it may change the digital data to check, or vacuum pump check; others may bedipole data. Referring to figure 11, dipole scheduled as infrequently as every 180 days. data shows that a change of binary one of 1-26. Transmission Line. This system inputzero to 1 (1 0 1) in a message results in a and output requires the use of indicators,change from a cycle pulse to a level to a cycle. meters, and switches. To aid in understanding Further examination of figure 11 shows that why and how performance checks are per-each binary one results in one cycle pulse. formed in this area, let's first explore what isAnother system currently in use uses frequen- necessary in order for data to be transmittedcy shift keying (FSK). This method (refer to and received. Then let's identify how the fig. 12) uses two audio frequencies. A change input/output equipment can sense the cor-in frequency represents a binary one. No rectness of data and errors in data. change in frequency for successive time peri- 1-27. Whenever data is accumulated at a ods represents binary zeros. station, it may be of value to higher head- 1-30. Line quality. Selection of the bit rate quarters. That is why almost all command and of a message is determined by the quality of control systems have data links. For the most the local TELCO lines. If the noise levels, part, these data links are conventional tele-crosstalk, or other factors related to audio phone (TELCO) lines or microwave units of a transmission cause the line quality to be low, 8 4 2 0 DIGITAL MESSAGE

17 III TI 12 T3 14 1$ TA

TIMING mODULATED OUTPUT PULSES OUTPUT UNIT

0 0 I I a 1 0 I A

1 I I I I 1 I i I I I I I IIII I I I T3 I 11I T1 1 TIS1 114 I 113 I 112 T11 I TIO 1 TIMING 120 I119 IllI 717 I TIII I I I I I I II, 1 'I I I I I ii. LOGI "0" j.._.....;.4...... I I II 1 0 I I I 0 0 1 1 0 0 0I 0 0 III DIGITAL I I LOGIVI" MESSAGE I ' 1 I --4-1. .. I I I I I I I I I I 1

OUTPUT FREQUENCY fir I I I I I i I I 1 CRITICAL CROSSOVER B ADJUSTMEN T POIN T. Figure 12. FSK data. signal since a then data must be transmittedat the slowest .1= 100, or a +20-dbm rate possible. On the otherhand, a noise-free, power-ratio factor of 100 = 20 db. The east interference-free line can handledata at a fastline loss is - 10 and the receiver input is +10 bit rate and is called ahigh-quality line. dbm. 1-31. Decibel. Now we need onefinal bit of 1-32. Transmission path. Referagain to information; then we can tiethis discussion figure 10 for this discussion. Thetransmitted up. This informationconcerns the decibel signal enten3 the phone line fromthe modula- (db) and dbm. The db is aunit of power ratio, tor or transmitter at a fixed dblevel, usually and the dbm is a measureof absolute power between +6 to - 25 db. It may passthrough as comparedwith a reference level of1 one or more repeatersuntil it reaches the milliwatt. One milliwatt of poweris equal to high-frequency terminal equipment.Here the 0 dbm. Look at figure 13.As you can see, the data ismodulated onto a high-frequency line loss from thetransmitter (west line) carrier and sped on its way tothe receiver. is 10 dbtransmitteroutput equals 0 dbm, Periodically along the line, repeaterstations repeater input equals 10dbm; This loss of 10 amplify the signal so that it hassufficient db represents a power lossof 90 percent, so if power to reach thenext station. At the the signal injected intothe line were 1000 Hz receiving end, the high-frequencycarrier is at 1 milliwatt of power,then the repeater removed and the audio-frequencydata is fed would receive a .1-milliwattsignal at 1000 Hz. to the receiver at the properdb level. The The repeater amplifiers areadjusted to pro- receiver demodulates the signalby a reversal vide a +30-db gain. Thisprovides a power- of the process used to modulateitdipole- ratio factor of 1000 and theoutput is 1000 X to-digital, or FSK-to-digital asexamples. Pro- cessing within the equipment thenbegins. 1-33. Printers. Operational checks onprint- *$ "s. a ers generally areperformed by making the printer produce a printed copy.This makes 'm1 ..31(1..II ..s..1 U.%I I a%I ...I for a reliable check since agood printout 0.....r....? .III It* indicates that the printer isoperationally ..... satisfactory. Since the check isreliable for ...... d various types of printers, weshall discuss the identification of subelements withinthe print- Figure 13. Db loos Ind gain. ens which could cause animproperly printed 9 crultAcTen lemma !!!!!!!!!!! RECOGNITION GAT E

DOT GENERATOR AND MtnCOMBINING GATES PRINT II GATESHU

Fiffure 14. Printer character check.

message and visual tasks associated with them. ter failed to print when using the impact 1-34. Subelements. Each of the elements printer, a hammer driver (refer to fig. 15) listed and explained below can contribute to acould be defective. Each of these examples defective printer output; therefore, each may shows theusefulnessof theprintoutin be part of an operational check. locating the defect. a.Switches.Various types of switches d. Mechanical. A defective printout could provide for control of the printer. These may also be caused by a mechanical malfunclion. be start,cycle, paper feed, advance, and Audio noises emitting from motors, drive electronic switches (solenoid) for selection of units, etc., may be identified when a review of relays; during a print cycle any or all may be the printout shows defects in operation. used. Failure of one often results in improper operation which can be visually determined. 1-35. Printout To summarize, printer oper- b. Power. Improper power supply voltage ational checks can be performed reliably by output affects operation. Indication of im- using the maintenance diapiostic printout. proper voltages may result in an insufficient Depending upon the type of printer, electro- number of printed lines per minute, improper graphic or impact, the test should include spacing between lines, and missing or over- checks of as many subelements of the ma- lapped printed characters. chine as possible. Characters, paper advance, c. Character formation. Missing or incom- switchoperation(externaland internal), plete character formationisgenerally the mechanicalunits, and power supplies are problem that is encountered. Understanding some of the most important areas to be of the principles of printers aids in quick exercised during maintenance testing of oper- evaluation of malfunctions. For instance, if an ational reliability. amplifier fails (fig. 14) a row of dots will be missing on each letter of the printed message 1-36. CRT Display. The method thatis on the electrographic printer. Or if a charac- most adaptable to performance checks of the 10 4 9 o I '413

PRINT MANNERS

INRE0 *MON PAPER TRAVEL

$R000 /STUVWXYZo,( 012345678 OPQRo$*000 /S UVWXYZo.( PRINT 08*000 /STUVWXYZo.(00001234567 NOPQR08*000 /S UVWXYZo, 4HEEL 1108*noo /ST1JVWXYZo,(0000123456 HNOPQRo$*000 /S UVWXYZo gRos*pop /STUVWXY7.o.(000012345 LMNOPQRoS*000 /S UVWXYZ PORoPouo /S7UVWXYZo,(cloo01234 KLMNOPQR0$*000 /S UVWXY II OPQRoP000 ISUVWXYZ0,(0000/23 JKLMNOPQR0S*000 /8 UVWX NOPQRoS*600 ISTUVWXYZo,(000012 -JKLMSOPQR0*000 /S UVW MNOPQRoPono /STUVWXYZo.(00001 o-JKLMNOPQRoP000 /S UV

PROPER IMPROPER 'MISSING T Figure 16. Impact printer defective print.

CRT displayisthevisual method using 1-38. Analysis. By simple analys of the switches and controls. The visual display video and control selection of data during available most often can be selected by switch callup, performance checks can pinpoint the action from the console in which the CRT is defects in any one of these four areas. As an located. example, suppose that the focus is fuzzy. 1-37. Parts of a display unit Refer to figure High voltage to the focus anode could be the 16. Almost all display systems require four problem if the variable control did not coned basic units for operation. They are the vertical the focus. Linearity problems can be traced to drive unit; the horizontal drive unit, which horizontal or vertical sweep circuits. A black- controls the sweep display; the intensity ened screen could lack timing or unblanking unblanldng unit,sometimes called Z-axis, or even high voltage. Thus you can see that whereintensification,blanking, video, or performance checks do check quality of the symbol analog data and high voltage are display and readily point to trouble spots. applied to the CRT; and a basic timing unit 1-39. Now let's see if you can associate for controlled generation of all timing signals performance checks with likely defects in necessary for CRT display. circuits. Match the defects listed below with

SYNC

TIMING GENERA TOR

HORIZONTAL SWEEP GENERATOR

vlolo DATA 3 INTENSITY UNBLANKING CRT HIGH VOLT AGE

VERTICAL SWEEP GENERATOR /1

Figure 16. Display unit. 11 14.

the units of the display unit thatare listed: (remote cominunication center): Defects Display units a. Input fed from I/0 keyboard through a. A bright 1. Intensity unit defect. b. concentrator (central processor) through picture. c. moderns (modulator) and d. back into the modem (demodulator) b. Out of focus. 2. Low high voltage. station-to-station operation, or e. to a headquarters center, and c. Poor vertical 3. No high voltage. linearity. f. back into the modem (demodulator) g. through the CP, and d. No horizontal 4. Defective focus anode h. to the printer (0) unit. sweep. or ;ow high voltage. e. No data or 5. Intensitycontrolad- video. vanced too far. 1-42. Another example might be checking the validity of data through the CP ofthe All black 6. Sweep unit defective, 412L AWCS system by using the central screen. vertical. storage (tracker) unit by selecting amessage for crosstell and having the message Sweeps do not 7. Tinting control to hori- processor reach outer zontal unit missing. wired for back-to-back operation. Themes- limits of screen. sage would: a. Process through the tracker storage unit Responses: to

a. 5 e.1 b. the data link central when the data is formatted for transmission to b. 4 f.3 c. 6 g. 2 c. the message processor (MP). The message d. 7 processor converts the data to FSK and transmits. 1-40. Central Processor. A fault and facility d. Back-to-back operation causes decoding panel, a confidence indicator, or error lights of FSK data in the MP (demodulator) into associated with on-line and off-line teiting digital data for are the primary devices that are used to check e. processing by the data link central for performance in centgal processor units. The f. storage5n the tracker. checks are primarily designed to validate the quality of data transfer, formation, storage, 1-43. You can see by these simple examples and erasure, at specific times _with...specific that exercising the CP of equipment does known data inputs. provide reliable checks. 1-41. In every test, the successful end result 1-44. Interruption in data flow usuallycan validates the quality of the central processing be detected by observation of lamp indica- (CP). These tests quite often must encompass tions on equipment and on confidence panels. I/0 devices and peripheral equipment because If, you }mow and understand the full data the data needed comes from these units or content of a message and data flow within the must go to these units and return. To give youCP, you will have very little difficulty inter- an example, consider the following sequence preting data transmission and processing qual- of events for processing data through an RCC ity.

OSCILLOSCOPE PRESENTATIONS

cgi SOURCE AC TRANSFORMER UNREGULATED OUTPUT OUTPUT REGULATED DC oDC 7 77777 POWER TRANSFORMER RECTIFIER \REGULATOR SOURCE UNIT UNIT/ %UNIT

Figure 17. Power supply unit. 12 424 ulated output of' a power supply maybe SERIES LIMITING satisfactory for some applications, aregulated RESISTOR output is necessary for mostcircuits. Regu- lating DC means keeping the outputof the DC power supply constant Thisis of critical DC INPUT REGULATING applications. FROM DEVICE importance for most circuit RECTIFIER UNIT Some regulator circuits may bequite simply designed, through the use of a singlethermis- toror zener diode.On the other hand, complicated units use an array ofsolid-state SHUNT REGULATOR devices to attain proper regulation.Although solid-state regulators are functionallysimilar Figure 18. Shunt regulation circuit. to electron-tube regulators,they can be used 145. Power Supplies.Electxonic power in more different ways. Thefact that either supplies are the units thatsupply the neces- NPN or PNP transistors can beused permits sary voltage, power,and current for the considerable diversity in design. Regulationof operation of EDP equipment.Whether you a power supply involvesthe control of either are working onsolid-state or electronic tube voltage or current or both. Thetypes of equipment, you will find that awell-regulated regulation most commonly used are: source of poweris of primary importance. Performance checks are performed onthese units to verify their properoperation. A review of general powersupply construction identifies that most unitshave four elements. These are shown infigure 17 and are explained next: a. AC source.Depending on the particular computer, the AC source maybe the output of the motor-generatorset or 60-hertz commercial power. b. Transformer element.A DC power supply does not alwayshave an input transformer; the inputcould be taken directlyfrom the AC source. An obviousadvantage of an input transformer is that theAC source can be isolated trom the loadand either stepped up or down-withinthetransformer secondary. c.Rectifier element. Therectifier unit converts AC topulsating* DC. Therefore, within the rectifier unitthere must be some type of rectifyingdevice such as half- or rectifiers made full-wave rectifiers or bridge Figure 20. Current regulationcircuit. from vaxious electroniccomponents such as diodes, saturable reactors, ortransistors. has, as shown Although the unreg- (1) Shunt voltage regulation d. Regulator element. in figure 18, a limitingresistor in series with the load and a variableresistance in parallel (shunt) with the load. reVT-1 (2) Series voltage regulation has, asshown in figure 19, a variable resistance inseries with the load. The thermistor used asthe variable component because of its negativetempera- voltage at the THERMISTOR ture coefficient regulates the load as the load changes, therebyregulating the output voltage. (3) Constant current regulationhas, as shown in figure 20, the capability toregulate the current rather than the voltageoutput. This is done by variation of thebias on the transistor. The transistor resists thecurrent Figure 19. Series regulationcircuit. change. 13 IL

meters (RMS), DC voltmeters, and differential ro...s.vrTge voltmeters and VOMs are examined inthe following paragraphs: a. Line data (I/O). A method for determining line or data quality is by usingan AC *Icy voltmeter (db meter). This unit is usually SI connected to the lines or at thecommon point in the modulators anddemodulators. Figure 21. Metering data lines. By reading the meter (dbm scale) andcom- paring the value to prescribed valuesfor 1-46. Each power supply generally-provides transmit and receive, it iseasy to determine a visual display to identify its status. The line quality. Refer to figure 21. Youcan see display may be voltage or current meters,or that it is relatively easy to connectthe unit. indicator lamps in various colors. Some lamps One important factor to rememberhere is represent proper operation (green), while that the sensitivity of the meter must bevery others represent overload (amberor red) or good or attenuation of the input and outp4 failure (red) conditions. signal will occur, and as muchas 3-cib loss canl occur. A loss of 3 db results in 50-percent 2.Devices Used to power loss and can easily interrupt data. Accomplish Performance b. Power supplies (I/O/C). Theperform- Checks ance checks used on power supplies require 2-1. In this section, we shall attempt to the use of DC meters for measurement identify which methods and devices of are used output amplitudes of DCpower supplies and in performing operational checks in specific AC meters for ACpower supply output sections of computer and data processing measurements. The power supply units.After studying each discussion, may use a .,you current (micro or ma) meter toMeasure should complete parts of chart 1 (printed in current load output. The power supplymay the workbook), by placing an X under each be equipped with a differential (null)DC part of the system which uses that methodor meter where the output voltage is measured device. against an internal reference voltage. Adevia- 2-2. Meters. The performance checksac- tion voltage reading from the nullindicates complished in various areas using AC volt- improper output voltage.

DIGITAL MESSAGE

71 72 13 14 15 Ti 17 TI TIMING PULSES

MOOULATEO OUTPUT

I I 0 I 0 I 0 0 A

I I I I I I TIMING T20 I 719 IIITI/ I VII TIS 714 TI3I 112 I I T9 TI T7 I I I TO TS 14 T3IT2ITI I I I 1 01=1.111., vmmm.... LOGIC "0" OIGITAL 0 I MESSAGE 0 0 I 0 0 I I 0 I 1 I LOGIC t'I" 1 I I I I

FREN/P46

CRITICAL CROSSOVER A 0JUSTMEN T POIN T.

Figure 22. FSK crossover point. 14 426 c.Reference voltages (C). Within many data processors and computers, selected circuits generate DC reference voltages in order (1) VANNOW,1 to insureproper linear circuit operation. NO SYSTEM TRIGGER These are generators other than power supplies. Performance checks on these voltage sources requirethe use of DC volt and SYSTEM differential meters. TRIGGER

(2) 2-3. Oscilloscope. We shall discuss next the performing of operational checks by use of NO NOISE OR IMPROPER NOISE LEVEL the oscilloscope. a. Line data (I/0). Oscilloscopes maybe required to perform operational checks on modulatorsand demodulators,especially where a system is using an FSK system or (3) frequency modulation system, or where data, sync, and timing pulses are transmitted sepa- thaeli,Ts rately. A critical point of inspection for FSK is at the coincident point (refer to fig. 22) where one frequency of FSK mecis with the other frequency. The crossover point must be CLIPPING at the zero-volt level and the first frequency (4) must be ending a cycle 'while the second frequency must be starting a cycle. SYSTEM VIDEO TRIGGER HIT b.CRT displays (C). Oscilloscopes are frequently used on performance checks of EXCESSIVE NOISE CRT displays to measure waveforms such as ramps, generator outputs,timing circuits, Figure 23. Defective radar returns. deflection and intensity circuits, and input signal data to the CRT. Check to see that each (1) no system trigger, (2) no noise or improp- signal measured contains all the elements of er level of noise, (3) no video(hit) returns, the waveform, and compare the waveform to and (4) excessive noise (clutter or jamming). a standard if possible. Someof the elements The circuits which first receive radar inputs may be: are usually the point of inspection. Inthese Pulse width. circuits, you must establishthat video is Amplitude. present and that it is of the proper amplitude Linearity of ramp signals, sine waves. and polarity. Therefore, the operational check Operating voltage levels. usually contains instructions to: Pulse recurrence times (PRT). Identify the points to measure and the Proper waveform, i.e., no cvershoot or controls to adjust. undershoot of square wave. Measure the input level of the radar Ringir a (noise). returns at various ranges. Data Content. Measure and adjust the circuit output for a desired level and phase or polarity. c.Servo units (I/0). The oscilloscope is used to validate waveform data from servos 2-4. The instructions in the TO may also for nulling operations and reference voltage provide a video return drawing which resem- checks. Polarity, , phase, and amplitude meas- bles figure2.If the regulating circuit is urements must be determined and compared designed to adjust the amplitude of the video with standards. Amplifier chain waveforms return by resistive means, weak signals and may be compared to standards. Feedback noise signals will be amplified or attenuated loop signals may be measured for phase and just as strong signals are. If the circuit is amplitude. designed to adjust the amplitude of the video d.Radar data (I).Oscilloscopes are the return by capacitive means, then amplifica- primary measurement tool fordetermination tion or attenuation of weak signals and noise of the accuracy and content ofradar data. can be controlled more than strongsignals. Common defects or missing componentsof a This condition exists because a weak return waveform as shown in figure 23 can onlybe may be only slightly stronger than thenoise detected with a scope. These defects maybe being received. Both of these components of 15

427 t

GAIN ADJ E515TIVE PEAKING COLLECTORCK] ADJ/rESISTIVE IN EMITTER TP1 Cr] D1FF POSITIVE AMPL AMPL EF OUTPUT / CURRENT 1 ADJ APACITIVE / IN EMITTERCV] AAAP'00 REF OUTPUT

CURRENT /SOURCE Figure 24. Video amplifier circuit. the video return consist of sharp spikes of than low-frequency pulses,as was previously very narrow pulse width, anda pulse with a stated, this control can, if misaligned, narrow pulse width may be expressed elimi- as a nate weak returns. The output of theamplifi- high-frequency pulse, especiallywhen it iser is then fed to an emitter follower (EF) taken in relationship to thetime for one radar which supplies a current gain, thgger period. So,we must be conscious of no voltage gain, which type of control and no signal inversion. The EFoutput is we are using when routed to a gated amplifier whichprovides a examining and adjusting these inputs. controlover the a. Video Amplifier Circuit An oscilloscope intensity of the video through a video intensity control.Therefore, is used to measure videoamplification, and a video return can be attenuated by three performance cheeks show wherethe likely meanstwo are resistive and one is capaci- measurable points are. Look at Aware24. You tive. The object, of will see that video is fed course, is to establish a to a differentialdesired video output with sufficientampli- amplifier through a coaxial cable.The shield tude and current to presenta reasonably of the cable is connected to theother input to strong signal to a display CRT the differential amplifier. These or to a signals are detection circuit which is designedto store forced by -the amplifierto present-the'differ- these pulses. Let us ence signal at the output. A variable current now consider another type of input unit whichprocesses raw or source is used to supply sufficient current for normal radar video. amplification and drive. Thiscurrent source control is resisfive. The video output b. Quantizer Video Unit. A quantizer(refer is then to fig. 25) transforms video informationfrom fed to an amplifier circuit wherea capacitive radar returns into distinguishable control is installed in the emitter pulses for portion of target determination. An oacilloscope isused the circuit and is calleda "peaking adj." Since toverifysignal capacitors control high-frequency amplitudes.Performance pulses more checks require adjustment of variouscontrols

RESISTIVE

VIOE0 / -- CLAMPER AMP VOLTAGE INTEGRATOR CF VIOE0 CKT TRANSFER SECTION OUT

RESISTIVE MANUAL )1 CCNTROL BIAS UNIT AUTO RESISTIVE

NO SE CONTROL UNIT

Figure 25. Quantizer. 16 4 28 LIP?

I X II MATRIX mi.SK

I 2 3 S 6 7 $

c 2 6

2 A 3 I 6 3 A I R300I 63 6001330 7

Figure 26. CRT displays. in selected portions of the quantizer. The unit hisuring that the north mark and the pre- contains elements which aid in the detectionscribed number of ACPs occur. The scope is of video and in the elimination of noise,also used to check phase and amplitude clutter, and jamming. It provides a digitized signals from radar servos which are compared video pulse output. There are various quanti- to a standard established for the system. zers designed using vacuum tubes,solid-state devices, and integrated circuits; however, their functions are similar. Each uses a noise meter to establish an acceptable level of noise which must be present to insure that weak video returns are not eliminated from processing. The first control in the circuit is a video amtaifier (resistive) control: Since the quanti- manual or auto- MISSING / zers may be operated in a DOTS ImPROPER STARTING POSITION matic mode, bias level controls are included in TO FORM these circuits and they are resistive. These bias adjustments cause amplifiers to pass only selected peak amplitudes of returns, but they must be adjusted to include a percentage of noise.

2-5. One final point about the use of a noise meter is that once its threshold has been ImPROPER PAPER FEED exceeded, it blocks all video returns for the remainder of the radar period and part of the next radar period. The obvious conclusionis ROW 3 DOTS ANSSING that the noise meter circuit can: Affect valid video returns by elimination. DEFECTIVE LINE AMPLIFIER Be veryeffective during a jamming BROKEN COMMUTATOR LEAD . . situation...... NOON FEW DISTINGUISHABLE Control the noise level of all video being . . . .. CHARACTERS processed.

DEFECTIVE DECODER umiT 2-6. Radar orientation validation (I). Oscil- loscopes are used as coincidence detectors for Figure 27. Defective printout. 17

429 Ad

2-7. CRT Displays (C). Videoor symbol or on, amber for overloact, and red for voltage digital displays have examinations performed failure. during operation and the cheeks quickly d. CP units (C). Lamps indicate counter pinpoint defects. Refer to figure 26 forsome operations, sequences, data flow (yellowor of the operations that must be included in the white), and failure (red). Sampling circuits checks: may use live data or test data, depending Use of CRT voltage controls for intensi- upon design. ty, focus, positioning, and astigmatism. e.Tape transport units (I10). Sequence Symmetxy and linearity of range marks. lamps, failure lamps, and command andcon- Callup operations of console. trol lamps indicate the status of the unit. Printing capability of the digital display Interpretation of lamps may relate to specific by use of test pattern. If complete, thistest areas where operation ceases. also exercises all character generators. 2-10. Visual Examination of Mechanical 2-8. Printouts (0). The following discussionAssemblies (I/O/C). Some examples of visual covers the use of printouts as a check for examination to find defects are given below: operational quality: a. Servo units (I/0). Noisy or binding gear a. Electrographic printers (0). The printout trains are the only visual examinations possi- determines the operational capability of this ble on these units. printer. An accurate printout satisfiesper- b. Electrographic printer (0). Noisy drive formance requirements for quality and accu unit or clutch assemblies and improperpaper racy. A defective printout such as that shown feed are all signs of visual defects. in figure 27 indicates (1) improper starting c. Impact printer (0). Visual indications of position of commutator brushes, (2) defective improper or proper operations of cams,mo- paper feed, (3) defective line amplifier or a tors, paper feed, impact hammers, and other broken commutator lead, or (4) defective related units provide reliable visual examina- decoder unit. tion of this printer. Interpretation of the print- b. Impact printer (0). Printouts which out also provides reliable performance data. display all characters and numbers validate d. Tape units (I/0). Proper orientation of operational quality. Print selection cixcuits,tapes, operation of servos, takeup reel ten- mechanical assemblies, and character decod- sion, and photolamp illuminationor vacuum ing circuits are the most frequentsources of pump operation are 0 visual indications of trouble. proper or improper operational performance. c.Central processor data (C).Printouts which are generated as a result of data taken 2-11. Conclusions. The examinations of from peripheral equipment or I/0 equipment operational checks performed on some of the and which process through the DPCmay be various input/output and DPC units bring used to validate DPC operational quality. certain factors into focus. These are: 2-9. Lamps and Audio Alarms (I/O/C). The a. The checks require the use of visual use of lamps and audio alarms is discussed indicators such as: next: Lamps. a. Line data lights (110). Interpretation of Readout prints. Meter readouts. lamps or alarms usually verifies thatsync group (audio signal data preceding the data Mechanical movements. message) signals are present or absent. They Meters and test equipment. may be called busy bit, sync group, orno b.The checks can often be made by message characters. A synchronization circuit exercising the machine operationally andana- samples sync bits and provides visual lamp lyzing the output product. The input, output, failure indications and audio tone failure and DPC units require that specific tasks and indicatinns. specific equipments be used to perform the b. Parity lights (I/0/C). Lamps providedfor operational performance check. Whenyou these circuits show that a circuit designed to completed chart 1 (printed in the workbook), count each bit of an incomingor outgoingYou identified which part of the dataproces- message detects overall correct parity. Failure sing system used specific pieces of test equip- may be indicated on fault facility panels or ment and indicators. Listed below in column confidence indicator units or other conveni- 1 are the units. In column 2we list the most ent panels where lamp and audio indicators appropriate methods used to perform opera- alert failure. tional checks. A comparison of this listing c. Power supplies (I/C). Lamps indicate with the chart you completed should rein- operational quality; green or white forpower force the concepts you learned while studying 18 43dJ (6) Printers a.Operationalcheck with this chapter. Figure 28 (printed in the work- printout. book) shows how chart 1 (in the workbook) b. Visual check of mechanical should be conipleted. Should you find signifi- movement. cantly different indications in your chart, c. Interpret noise, impedance, poor quality printout. restudy the text. d.Interpret lamp indicator. Subtask Check Unit Data (7) CRT Display a. Visual inspection, using (,1) Radar, Beacon a. Hands-onmethod. video, symbol modes. b. tra oscilloscope. amplitude, b. Examine for definition of c. Measure input details. phase, and polarity. c. Operate display with con- (2) Radar Antennaa. Hands-onmethod. trols and switches. Orientation b. Use display equipment. d. Interpret indications. c. Use oscilloscope. e.Locate defects in digital d. Measure and adjust ACP information displays. counter output, north pulse. e. Correct for errorof ECC. (8) Servos a.Use oscilloscope, display consoles, RMS and DC me- (3) Keyboard a. Operational check. ters. b. Cheek for proper orienta- b. Check null. tion of key board characters, Check servo vs. antenna Fieldata codes. c. c. Use with tap*unit. rotation. d. Perform electrical check. d. Check servo position. e. Interpret errorindication. (9) Power Supplies a. Use meterscurrent and (4) 'rape and Tape a. Operational check. voltage. Drive b. Mechanical check. b. Use differential meter. c.Cause advance,reverse, c. Interpret lamps. read, and writ*. (10) Central a. Use fault indicatorpanel. d. Evaluate printout of tape. Processor b. Use confidence indicators. s. Check all ones, all zeros, c. Interpret referenceindica- crosstalk. torlamps(counters,data (5) Line Data a. Use meter readingsfor line transfer). quality. a. Use same procedures as for b. Transmit and receive. (11) Reference indication. Voltage power supplies. c. Interpret visual b. Use meters. d. Examine data for quality Interpret lamp indicators. on a bit-rate ratiobasis. c.

19 CHAPTER 2

Adjustments

EACH OF YOU HAS, during your training at bring intolineor straightline. For the the resident center, performed a task called following chapter on alignments, this means "adjustments." In all probability, you were that the adjustments are combined within a shown the controlto adjust and given a functional unit to provide a discrete output. standard to meet. You turned the control in one direction or the other until a specified standard was indicated on a measuring device. 3. Characteristics of Variable Controls Some of you were very cautious in turning 3-1. Characteristics are explained by pur- the controls and others were not. Since you pose, type, and principle of operation. arrivedat your work center and started 3-2. Purpose. Each time that a variable upgradetraining, you should realize that control is included in a circuit, it servesa indiscriminatecontrolmanipulation often distinct function in the operation of that produces disastrous results. Circuit misalign- circuit.Itis a compensation device used ment can result in loss of equipment opera- because the inputs to the circuit are variable tion, cause unnecessary work problems, and signals which must be regulated to provide a upset supervisors. specific output. Within the circuit, this may 2. Each adjustment must be made with care cause increase. or decrease in bias voltage or for the circuit operation. Often, these adjust- current, a change in frequency, or a shift in able components are set very near the proper frequency. Any one of these changes causes point.Ithelpsif you know the proper the circuit to operate outside its designed direction in which to turn a control. However, operating level. The signal may be affected by if you must guess the direction, you have a distortion, limiting, attenuation, or amplifica- 50-50 chance of disturbing the circuit operation. Variable controls are used to alter the tion and causing it to operate worse than it output waveformtomeet specifications. did before. Then you will have an extreme However, if the input signal strength causes adjustment to make. In many circuits, re- the circuit to operate beyond the control of active components are the adjustable units the variable device, no amount of adjustment and, when these are arbitrarily turned, ex- can correct the output waveform. This is a treme results are produced. Selected frequen- significant factor to consider when studying cies may be attenuated or lost, waveforms the purpose of a variable control. may be distorted causing improper data flow 3-3. Types. Study the illustrations in figure and loss of digital data quality, and operating 29 (printed in the workbook). Each of these levels may be affected causing a shift in components is a variable control, even though amplifier operation. physicalappearances vary. 'Mb common 3. This chapter identifies reactive controls, types of variable capacitors are the tubular givestheir characteristics, and shows how type (A) with an adjustable core, and the they aro used in various circuits. The defini- button type (B) with a variable rotor. In tions below should help you to distinguish the either case, different values of capacitance are difference between adjustments and align-obtained by varying overcoupling of the ments. plates. For most frequencies up to 30 MHz, 4. Adjustment is the act whereby a device these are adequate. For frequencies above 30 is used to alter a condition to make it fit orMHz, the variable capacitor must be con- correspond. This means, for purposes of this structed so that no RF voltage is developed. discussion, the physical change of a variable This is often done by having the external component to make the circuit provide a circuit connected to two sets of stator plates discrete output. The word alignmennmeans to and using the rotor to increase or decrease the 20 able and are used extensively in electronic 3 equipment. However, variable coils are seldom used in data processing and computer circuitry so no further coverage is included. 3-5. Principles of Operation. Variable capacitors are manufactured, using different ROTOR dielectrics. Some are ceramic, ELECTRODE material as (METALLIZED mica, glass (piston), polystyrene, teflon, and SURFACE) air. Each of these materials has a different dielectric constant. The basic principle of a 41---7 DIELECTRIC variablecapacitor involves positioning the rotor with respect to the stator. The area of electrode (plate) is fixed. Turning the rotor from 00 to 1800 varies the amount of plate surface exposed, thereby varying the amount of capacitance. Refer to figure 30 and note STATOR that the metallized rotor surface may overlap ELECTROOE (ME TALLIZED any part of the metallized stator surface. With SURFACE) this arrangement, the capacitance varies, depending upon the amount of metallized plate CERAMIC overlapping and the dielectric constant. To CASE vary capacitance requires either varying the dielectric of varying the overcoupling of the electrode plates. CONTACT 3-6. In most trimmer capacitors used in Figure 30. Variable capacitor. computer and data processing circuits, the variablechangeincapacitanceislinear throughoutits rotation (see fig. 31). The total capacitance between the plates. In this figure shows linear increase and decrease in arrangement, no RF current flows since the capacitance through 3600 of rotor rotation. rotor is not a link between the stator plates. Variable capacitors or trimmers are frequently Figure 29, C (printed in the workbook), used as filters in oscillators, and as attenuators shows a typical potentiiimeter. This control in displays and counters. uses a rotor; however, the rotor is in contact with the resistive element. The output voltage 3-7. Let's review some characteristics of the or current istapped off at the point of newer types of capacitors which can create contact. Figure 29,D, is an example of a problems for us: potentiometer commonly' found on printed a. Most ceramic capacitors have a maxi- circuit cards. Its control is a screw-type shaft mum life of 250 turns. Some tubular types which, when turned, causes a contact point have 1000 or more turns of life expectancy. on the screw to mate with the resistive b. Adjustments must be made with tuning element. This provides an output voltage or wands since most trimmers connect the stator current proportional to its wiper arm posi- or rotor to the end frame or turning screw. tion. The control shown usually has from 8 to Placing a metal screwdriver on the turning 26 full turns. screw changes the effective area of the metal- 3-4. Inductors and coils may also be van- lized plated surface of either the rotor (usually) or the stator, thereby altering the characteristics of the capacitor.

070. 3 o c. The size of these units is being reduced ITING to meet demands of industry for microelectronics. As a result, the voltage breakdown values have been drastically reduced. d. Tubular type variable capacitors (fig. 32) are now satisfying industry's requirements for microelectronics. These capacitors possess a characteristic not unlike potentiometers in that small, critical adjustments can be made YIN A TING on them. The sliding action of the rotor, 0 controlled by the screw, changes the plate ROTOR ROTATION area opposite the stator, thereby varying the Figure 31. Linearity through3600of rotor rotation. capacitance. 21

433 Lk1

3-8. Later in this chapter, applications of these capacitors will be explained. Let us now review the principles of potentiometer operation. 3-9. Potentiometers are variable resistance components. They may be either carbon pile :..:111111101111111111111111111111111111111111111111111111111p or wire wound. The wire-wound potentiometers are usually used as rheostats rather than 111 aspotentiometers. . To seethe difference between the two, look at figure 33. Figure STA1011 33,A, is a.schematic sythbol for a rheostat. ItFLON 1101011 Notice that the resistor element is connected to the circuit at each end, and the slider arm, which is used as the pickoff point, is connected to one of the ends. However, in figure PISTON ADJUSTMEhlt 14"0104 33,B, the potentiometer is connected with the (1.001110CM entire resistance in a series configuration and tepistONNUT one end of the slider, performs the pickoff function while the other end is connected to an external circuit. It may be used like a rheostat and still be called a potentiometer. 3-10. Potentiometers, or "pots," are used extensively in computer and data processing equipment. Usually, they are carbon and resemble those shown in figure 34,A and B STATOR CLICIROOt (printed in the workbook). Notice that figure GLAH.111111t OltIACTRIC 34,C indicates that a brass slider is positioned by the turning screw to some point along its Figure 32. Tubular capacitor. path of travel. Its poaltion is manually selected and the resultant output voltage is fed its resistance, the wiper arm output resistance causes an even deflection ofthe meter needle to the tieing circuit. In the manufacture offor the entire length of the resistor. The these units, the adjusting screw is isolatedtapered pot is made so that one-tenth of the from the carbon resistor and the metal turn-total resistance is available between one ex- ing shaft by a nonconductive substance, suchtreme and the midpoint of the adjustment as epoxy. Figure 34,D shows the internalcycle, and the other 90 percent of resistance structure of the pot shown in figure 34,B. the Notice that the resistive element is circular in ia available between the midpoint and shape and that each end is connected to an external terminal. The variable slider or wiper is pressed against the resistor by spring action and is isolated from the turning screw. The slider has continuity to the third terminal RHEOSTAT through the circular ring. Two factors must be identified and explained here. First, when the A turning device of the rectangular pot is turned to its end, it may make an audible clicking sound sipifying that no further turning in that directionis possible. Second, the pot shown in figure 34,D, usually has a mechanical stop at each end of the resistor and further turning of the screw results in shearing the stop pal or destroying the pot screw or both. 3-11. Since we are discussing the adjustment of circuit components and the variable resistor, we must recognize another manufacturing charscteristic of these components. POTEI, TIOMETER Variable resistors and pots are made linear and tapered. The linear pot is made so that its resistance is diStributed evenly over its entire length. When an ohmmeter is used to measure Figure 33. Potentiometer snd rheostat. 22 Infant instructions are found in preventive maintenance routines and in the chapter of 2 the service manual titled"Maintenance." These instructions seldom provide any explanation of why an adjustment is performed. Compliance with the instruction is not very BALANCE difficult when you can accomplish it; how- WEIGHTS ever, when you cannot comply, where do you go? The answer, of course, is that you must study the theory of operation of the cireuit or function so you can apply a logical and accurate solution in minimum time and, by having a thorough understanding of variable components, their design and applicatior,, insure greater success. Speaking of applications, let's explore some of the most typical areasof equipment where we might use adjustments. 4. Adjust Meters and Dials SHAFT HAIR SPRING 4-1. Adjustments that you can make on meters and dials are usually restricted to centering the needle and calibrating it with the calibrating voltage and adjustment con- Figure 36. Mechanical needle adjustments. trol. The only exceptions to these adjustments are those where you are required to other extreme of the adjustment cycle. If you perform category 1 or 2 test procedures for use an ohmmeter to measure the resistance of test equipment (Chapter 4, Volume 1). a tapered pot, placing one lead on the input 4-2. Balancing. Positioning the needle on a terminal and the other lead on the wipermeter or dial requires you to use a small (rotor) terminal, you can see that, as you turn screwdriver and V) carefully adjust the screw the wiper, the resistance increases (from zero) until the pointer aligns with the proper mark very slowly and gradually until you reach a on the meter face. Refer to figure 35 and you point midway on the pot. From the midpoint will see that this adjustment is mechanical and on, as you continue to turn the wiper shaft, that no voltage or current is involved. You the resistance increases much more rapidly in merely twist the control and position the comparison with thefirst half pot rotor pointer, which is pressed onto the shaft, to rotation. the correct position. Balancing the meter 3-12. Technical Orders. Typically, adjust- needle requires disassembling the *meter and

CALIBRATE POWER POWER SUPPLY SI 5 SUPPLY NULL UNDER CAL JACK TEST o o o-7

NULL NULLCALIB ADJUST CALIBRATION READ I / ADJUST POWER SUPPLY ADJUST

SELECT S2

Figure 36. Simplified differential meter circuit. 23

4 35 CALIBRATED POWER SUPPLY

2.5K 141. +CAL JACK R2 t > I I 0 0 RECTIFIER AC 1 REGULATOR I 00 .C) 0 CKT ® 0 > b 7.5KI.n. 1 R17 ® CO 1 0 FLUKE METER 1 I GND

L -I_ .allmOM ...1 Figure 37. Calibrate adjust.

repositioning the weights on the needle shaft; deflection again by use of the adjustment of these adjustments are performed by PME zeropot. To adjusta meter such as a Laboratory personnel. differential voltmeter, apply a source voltage 4-3. Centering. Adjusting a meter before it to the balancing circuit. Most differenVal is used requires a check of internal electrical voltmeters work on the same principle. Refer components. This is called zeroing in the tofigure 36 for a simplified circuit of a meter.For ohm-adjusting, short the two differential voltmeter application. Notice how probes together.This should cause 100-simple the unit is. As you can see, the percent deflectioh of -the needle. A potenti- calibrated power supply is very similar to an ometer in the meter circuit will actust current 801B differential voltmeter except that this from the battery to cause 100-percent needle power supply is permanently installed as part deflection. When you change ohm scales on of the equipment. It feeds its output to one your meter, you change the sensitivity of the side of the meter. The power supply under meter. Therefore, you must adjust the needletest has its output sampled under load condi-

TOTAL ALGEBRAIC SWA OF LOAD VOLTAGE

L __J Figure 38. Null adjust. 24 tions, and if both voltages are exactly the ance of 1.8K and requires a current of 50 pa same, there is no deflection of the null meter for full-scale deflection, uses only .09V of the needle. battery source. The remaining voltage and 4-4. Two factors become important to the current are dropped within the circuits when analysis. First, before the power supply can zeroing the meter. be used as a standard, it must be calibrated. 4-10. By examining the three modes of Remember, from your study of test equip- operation, RX1, RX100, and RX10K, you ment calibration in Chapter 4 of Volume 1, can see that Rt for each mode is different. that some equipment is calibrated by PME for RX1 has an Rt of 29,788 ± 5K. RX100 has an use as a shop standard. An 801B, for instance, Rt of 28,760 t 5K. They are almost alike, can be used to calibrate the power supply. except that in RX100, R2 is substituted for Then you can use the power supply as an Ri. Finally, Rt for RX1OK mode has a total equipment standard. Second, having a cali- resistance of 124.5K t 5K. This mode has an brated source voltage available in the equip- additional voltage source of 6V, making a ment 'allows an accurate check of all power total of 7.5V. The three modes are calculated supplies that use that same voltage. By use of below to show Rt and Et: a selection switch (S1 in fig. 36), any or all units can be tested rapidly. RX1 Path a M + R25 + R3 and R1 4-5. Applying. Figure 37 shows an applica- a 1800 + 10K + 21,850 + 1,138 tion of potentiometers. 11.17 is a 7.5K potenti- at a29,7881t5K ometer connected as a rheostat. It can, by Et a 1.5V variation, change the output voltage for the full range of the 7.5K potentiometer because RX100 Patha M + R25 + R3 and R2 when the wiper arm is at point a, the full resis- a 1800 + 10K + 21,850 + 110 tance is in the circuit; If the wiper is moved to Rt a 28,760 I 5K point b, then all of.the reisstance is removed Et a 1.5V from the circuit. R2 in figure 37 is a 2.5K potentiometer used to pick off a portion ef the voltage, depending upon its position. R2 and RX1OK M + R25 + R4 R17 combine to make a voltage divider. a 1.8K + 10K + 117,700 4-6. By plugging in a differential voltmeter Rt a 124.5K t 5K and setting it for the exact output voltage, Et a 7.5V adjustment of R2 and R17 can provide an 4-11. In addition to these factors, consider output which can act as the standard. R25, the 10K pot. Its quality is established at 4-7. Null adjust pot. In figure 38, the null an accuracy of only t30 percent. Finally, the adjustment pot incorporates a centertap pot voltage source must be taken into account. If and, inthis application, the centertap is it is weak, it will not provide the current pounded. The variable control then has the required for proper circuit operation. With all ability because of the conduction of diodes these conditions, you can see the importance D1 and D2. The pichoff voltage is matched of the role the pot plays in providing a against the algebraic sum of the load voltages control in the variables for accurate use of t.he of the power supply under test. meter. 4-8. Finally, the power supply under test is 4-12. The examples of centering and null adjusted to the calibrated voltage power adjusting begin to identify the versatility of supply. This is done by switching to the read the potentiometer. Each example shows how position as shown in figure 36, and the power the pot acts as a resistance factor and that the supply voltage under test is fed to the meter. wiper arm selects a voltage proportional to its If deflection occurs out of the limits pre- position. You can see that meters and dials scribed in the TO, adjustment of the pot for require the use of potentiometer aitustments that supply increases or decreases the voltage and screws to prepare them for use as to the null meter and effectively calibrates the measuring devices, just as amplifiers and pulse power supply to the preset calibrated value. generators need them for amplification and 4-9. Ohmmeter adjust pot. Refer to figure bias control. 39 (printed in the workbook), the meter zero circuit of a typical VOM. This meter incorpo- 5. Amplifiers and Pulse Generators rates two voltage sources for measuring resist- 5-1. In many cases, amplifiers and pulse ance:the 1.5V battery for the RX1 and generators incorporate variable components. RX100 scales, and the 6V + 1.5V batteries for The primary objectiies of variable compo- a total of 7.5V for the RX1OK scale. In each nents in these circuits are to (1) alter the gain case the meter, which has an internal resist- ratio of the circuit, (2) control the pulse series with Rth. With 5V PP inputand the pot at minimum, or point A, theoutput equals 5V PPunity.. Considerthe full pot in the circuit. The feedback loopequals 110K; Rin 1.00K. Therefore:

A Rs, --w- -1-19' 1.1 gain Rin 100 Therefore, 5V PP X gain of 1.1= output of 5.5V PP, or a gain of 0.5V PP. }VF 5-4. Based on these conditions, the Maxi- mum variation that the circuit can have is .5V PP. Change the size of any componentand apply the formula and youcan obtain the Figure 40. Operational amplifier. maximum and minimum gain. 5-5. Adjust a Miller Circuit. Now, alter the duration, or (3) act as phase-shifting device. basic circuit again and this time replaceRfb To understand these uses of the potor with a fixed capacitor. This simple change variable capacitor, examine the basic amplifier results in development of a Miller integrator and relate its principles to some of themore circuit. Refer to figure 41,A, andsee that a complex circuits. rectangular wave input producesa sawtooth Adjust an Operational Amplifier. An output. The Miller integratorisa special operational amplifier is a circuit consisting of amplifier, using a feedback capacitor instead three basic parts: (1) an input resistance, (2)a of a resistor.It provides a linear rising (or high-gain amplifier, and (3) a feedback resist- falling) output voltage when the input levelis ance. Refer to figure 40,A, and note that Rin suddenly decreased or increased. This circuit is the input resistance and has an assigned isbasically an RC circuit with the time value of 100K; therefore, the circuit hasa constant increased by the amplifier gain. Since long time constants can be obtained by gain of tmity(-111-R Pi). For example, a using high gain, the output isvery linear. 5-6. Now refer to figure 41,B, andsee that 5-volt signal into Rin results in a 5-volt signal by replacing the fixed capacitor witha vari- output from the amplifier. Now look at figure able capacitor, the capacitor providesa capa- 40,B. By the insertion of 10K pot, the circuit bility for altering the overall time constants of is made to provide a variable amplitude the circuit. Selecting any position of the output. Apply a 5-volt 60-Hz signal into the variable capacitor affects the amplitude of the amplifier and see what effect the pot willoutput waveform since the input pulse is have. constant. *All RC networks contain specific 5-3. First, establish the parameters of the time constant values to charge to full poten- circuit. Rh, 100K; Rfb100K ± R2, 10K. tial. Therefore, if the time is restrictedas in Therefore, the gain of the circuit is from our example, any change in capacitance re- unity in the case where the wiper of R2 is atsults in a charge being accumulatedon the point A, or 10 percent where the full pot is in capacitor for the same time duration each cycle. Study the following example: T a RC Where: R ,n 1000 C a 6 -- 45 pfd Therefore: (1)T 1 x 10 x 6 x 10" 6 x 10') sIN a .006 seconds or 6 milliseconds 'IN or: (2)T 1 x 10' x 45 x 10" 45 x 10-1 Figure 41. Miller circuit. a .045 seconds or 45 milliseconds 26 438 The output waveform can be ait.pred to have_nents to the point where the rirettit reverts to AI tam Uuw porttal for Alai* Crum millhetsu It* orighthl atttto. onds to a maximum of 45 milliseconds. Now, 5-10. Refer to figure 43 (printed in the by applying a fixed input waveform to con- workbook), for an example of miniature trol the output as is shown in figure 42 potentiometers being used with an integrated (printed in the workbook), you can see that circuit. The operation of pots R3 or R4 is the output waveform becomes a sawtooth.very similar to the uses already described. Also, by studying the graph you can see that Their primary function is, once again, variable for a pulse duration of 1 millisecond: control; when eachisused with a 3.3K a. The circuit with a capacitance of 6 Pfd resistor and an 8-picofarad capacitor, an RC allows a charge of 20 percent before discharge network is formed. Study figure 43 closely begins. during the discussion of pots used in pulse b. The circuit with a capacitance of 45 ad generators. allows a chaige of 2.5 percent before dis- 5-11. Integrated circuit with RC pulse- charge begins. From these conclusions, then, width control. The circuit consists of inte- theoutput waveform varies in amplitude grated units Z1 and Z2, and external to the depending upon the position of the variable ICs are pots R3 and R4, both 20K. Resistors capacitor. R5 and R6 are 3.3K each, and capacitors Cl and C2 are 8 pfd. On each half of the IC, Z2 5-7. To go one step further, you can isa Schmitt triggercircuit. The primary calculate the maximuru and minimum points function of a Schmitt trigger is to provide a or the maximum variable gain. Assume that rectangular waveform output whenever the the output can have a maximum voltage of 36 input is caused to change states. If the input is volts with a control input gate of 1 millisec- a low-frequency AC signal (i.e., 60 Hz), the ond.This would mean that the variable input circuit delays its reactions to the input capacitor would have a capacitance of 6 ad. untilthecontrolling slopeof thesignal Turning the control to the other end or 45 reaches an amplitude sufficient for the change pfd decreases the amplitude 17.5 percent to to occur. No change in output results until 2.5 percent of charge. reaction occurs. 5-12. For instance, if the input waveform Therefore: takes 50 psec to rise high enough to bring the input circuit out of cutoff, the output has no 173% of 35V = 6.125V change or: reaction until the change takes place. On the MM to max range = 28.875V to 35V other hand, if the input is rectangular and the rise time is 20 nanoseconds or faster, the output 'reacts almost instantanequsly. Con- 5-8. Adjust a Pulse Generator. A pulse sideringthesefactors, examination of the generator, such as a one-shot MV, single-shot circuit in figure 43 (printed in the workbook) MV, or monostable MV, can be designed to shows that the input AND gate Z2A requires provide a variable pulse-width output signal. three high inputs on pins 1, 13, and 14, plus a Most frequently, the device used is a POT. high from pot R3. Since this AND gate has 5-9. Use of RC time constant. The pot may pins 13 and 14 tied to +5VDC, pin 1 causes be installed in the input circuit or in the the Schmitt trigger to start operation. R3, R5, output circuit.Ineither case, it is usually and Cl form an RC network for pulse-width inatalled in the emitter or collector circuit of control. The maximum and minimum times a transistor MV. Its primary function is to derived from the formula T = RC reveal two alter the RC time constant of the circuit, conditions: (1) a time of 20 nanoseconds with thereby causing a shorter or longer decay the pot effectively removed, and (2) a time of time. This allows thecircuit to provide a 187 nanoseconds with the full pot in the varied or adjustable output pulse width. Most circuit. This variable component controls the of these circuits require a trigger input to conduction times of the input circuit of the cause a change in states. From a quiescent Schmitt trigger and consequently delays the state a trigger may be applied to either the completion of the rectangular output wave- base or collector to cut off the conducting form. transistor or bring into conduction the cutoff 5-13. The Z1A NAND gate provides a pulse transistor.This action causesthe MV to when the inputs to pins 12 and 13 are high. A switch states. The decay time of the RC negative pulse is fed to pin 1 of IC Z2 AND circuit controls the conduction period of the gate Z2A. On the rise of the output signal entire circuit by maintaining bias values until from NAND gate Z1A, the trigger is turned the voltages decay through circuit RC compo- on, and an output is generated from the 27

4 30 Lt3o

Schmitt trigger. The length or pulse width of Adjust power supply control R25 for a 15V t .01V the output pulse is dependent upon the value output. of the RC circuit consisting of R3, R5, and Adjust R8 for a meter reading of -15VDC. Adjust the 390VDC power supply for 390V t .6V. Cl. Their sizes provide a time constant value, Adjust R16 for a voltmeter reading of 16VDC. which causes the Schmitt trigger to stay in its ON state. The delay resulting effectively The first and third examples reflect an exact stretches the pulse. R4, R6, and C2 and the percentage of deviation and, because they do, second Schmitt trigger unit do the same thing. the use of a differential voltmeter is required. 5-14. With this understanding of circuit On the other hand, instructions two and four operation, performance of the adjustment specify voltage taken from a meter installed routine shown below has meaning: on the power unit. The adjustment of any of Set up scope for 5V at 0.1 nanosecond these pots consists of varying the resistance to each channel. the load at the output of the supply. By Adjust trailing edge control R3 fully varying this component, conduction in the clockwise. circuit is varied and output voltage indications Adjust leading edge control R4 for show the new value. maximum value (as near to 600 nanoseconds 6-2. If adjustments are made using a differ- as possible) while looking at TP20 on channel ential meter, the output of the power supply 1 of the oscilloscope. is measured against the output of the calibrated meter and the adjustment potentiome- 5-15. This is a primary example of the ter on the supply provides the control. simplicityof instruction taken from a -9 6-3. Most regulated power supplies are (alignment) TO, and it focuses on the point of complex units and require extensive study. this discussion that a knowledge of circuit For this discussion on adjustments, a brief operation is needed if for any reason the pulse review of their makeup provides the basis for width doin not measure 600 nanoseconds. understanding. The output of a regulated supply is distributed to many circuits. The output voltage isusually adjustable with 'n 6. Adjust Power Suppliers limits. The output current may or may not be 6-1. The following four quotes from PMIs adjustable and visually measured; however, its show the simplicity of power supply adjust- value is considerable. It may be as much as ment instructions: 100 amps.

+ 15 VA

VR1 lir°A F.(il____

VR2 OUTPUT TP2 VOLTAGE ADJ 15VA

500 II fl$V ,4: 0.5V + 15 V A co...... ,MA......

Figure 44. Differential amplifier voltage regulation. 28 4.1)

1 '43 / voltage to +15V ±0.5V. The RC network provides filtering for high frequency induced by amplification of noise. In this example, the control is included in the input circuitry. This illustration points out again the usefulness of potentiometers and the variations of their arrangement in circuits. 6-6. High Voltage. Most high-voltage power supply test points and adjustment controls are isolated.Frequently, the potentiometer is connected to a voltage divider network from infinity on one end to ground on the other. This arrangement is shown in figure 45. The wiper arm, however, has a very high potential since it has a voltage equivalent to t.he power supply. Caution must be used because of the high voltage present, even though the controls Figure 45. High-voltage adjust. and test points are isolated.

6-4. Low Voltage. To have this much 7. Adjust 'liming Devices current at the low voltage required for transis- 7-1.Almost without exception,timing tor and integrated circuit operation neces- units incorporate crystals. The extremely-high sitates the use of extensive front-end cir- stability of these solid-state structures has cuitry. Common electronic components such accounted for remarkable advancements in as silicon-controlled rectifiers, zener diodes, newer computer equipment. Many crystals are thermistors, and thyratron semiconductor de- encased in ovens in order to insure proper vicesareall used to, provide current and operating frequencies. Many crystals are cut voltage regulation. Filtering is accomplished for negative or positive coefficients which by extensive use of coils, capacitors, and require engineering solutions. Advanced tech- resistors.Finally, the source input isfre- nology and manufacturing skills have pro- quently 400 Hz instead of 60 Hz because it is vided solutions to most of industy's demand, easier to filter. and the result is that little maintenance of the 6-5. In figure 44, VR1 and VR2 are zener timing units of the newer computers in the diodes used in conjunction with R.1, a 500- Air Force inventory is required. ohm pot. They provide a variable +15V signal 7-2. Time and Frequency. One of the to one input of a differential amplifier. The oldest data processors in use in the Air Force other input (pin 4), also a +15V signal, is is the AN/FST-2B. It is used to collect and inverted in the first stage of the circuit. The process data for use in the SAGE'system, and output is regulated by developing a difference it transmits the data to the AN/FSQ-7 com- between the two inputs which, when added to puter at a direction center. The T2 uses a the gain of the amplifier, regulates the output 323.44-kHz crystal in a pulse Hartley oscil-

MOON 0 1

CmC = 3 ms12 4 100 HZ 2 10 HZ I 1

COMPUTER MEMORY ms.4C = 3 MHZ t 2 10 HZ I MASTER MASTER 1 CLOCK CLOCK SC = 3 MHZ - 100 HZ 2 10 HZ I I TP L_ _ I ;REOUENCY ADJUSTMENT CONTROL

L I Os mEmORT COMPUTER CI P 2 SLAVE 2 CLOCKS SLAVE SLAVE SLAVE CLOCKS CLOCK CLOCK

Figure 46. BUIC timing generator. 29 lator to provide frequency stability. When crystal and associatedcircuit has no fre- properly adjusted, pulses from the oscillator quency compensation controls. Its crystals are are generated each 3.09 microseconds. In cut to oscillateat 10.36 MHz and 1.0752 adjusting the frequency of the oscillator, the MHz. The crystals feed frequency dividers output of the circuit encompassing the crystal which are manufactured with variable pulse is meaaured. When its amplitude is at peak, width and amplitude resistive controls. the circuit is operating at the frequency of 323.44 kilohertz. 7-9. While the T2, GPA-73, and BUIC have reference clocks for central timing, 407L uses 7-3. The AN/GPA-73 air weapons control many different clocks. The computer uses a systemusesabasic1-megahertz crystal- 4-megahertz clock, and displays use 20-MHz, controlled clock. The output feedslocal. 10.36-MHz,1.0752-MHz,and1.67-MHz clocks which, inturn, divide this timing clocks. All are crystal controlled. generator output into 64 reference pulses of 7-10. In addition to central or master variouspulse widths and pulse repetition times. Timing adjustments in this system are timing, many other timing circuits are used. extensive and are made with potentiometers. Some of these are: The master clock circuitry provides for adjust- Free-running oscillators. On e-sho t multivibrators. ments of the output frequency by trimmer Blocking oscillators. capacitors. The calibrated output must be Time-sharing circuits for displays. measured with a frequency counter and must Automatic gate length (AGL) generator be 1 megahertz plus or minus 1 hertz. for use with radar returns. 7-4. The AN/FSQ-7 uses a 2-megahertz, crystal-controlled,referencegenerator.Its 7-11. In each case, a variable control is output frequency variation also is exacting. usually incorporated and frequentlyitis 7-5. The AN/GSA-51 BUIC system uses a resistive used for control of voltage aznpli- 3-megahertz timing reference generator. Its tude. crystal-controlled timing generator is set by 7-12.Let's look at thefacts we have tubular capacitor adjustment to 3 MHz + 100 covered so far. First, variable capacitors of Hz ± 10 Hz. By referring to figure 46, the both the button and tubular type are used for block diagram of the clock generation circuit controlling frequency. They are normally of the BUIC, you can see that: found in circuits used for master timing and a. The computer master clock (CMC) is set areoften foundin display timing units. by the adjustable capacitor to a frequency of Second, resistive variable controls in master 3,000,100 hertz ± 10 Hz. timing units are usually in the output for b.Each slave clock (SC)issetfor a amplitude control. They are also used in other frequency of 2,999,900 hertz ± 10 Hz. timing circuits to control pulse width, pulse c. The memory master clock (MMC) is set repetition rates, and amplitude. for exactly 3 MHz ± 10 Hz. 7-13. Timing Routines. Timing routines fall in two broad categories: 7-6. With these frequency variations, it The frequency adjustment of a crystal- becomes easy to see that the CMC does all controlled oscillator. controlling when operative and causes the The adjustment of a duty cycle. slave clocks to speed up to 3 megahertz. If the CMC clock fails, the MMC clock which is still 7-14. The frequency adjustment is made running faster than the slaves causes the slaves with a frequency counter externally con- to speed up and the system still runs at 3 nected to the oscillator output. The fre- megahertz. If both MMC and CMC fail, the quency control is adjusted until the counter system fails; however, the SCs are used for reads the precise value of the performance local testing. standard. 7-7. The MD 452 modems used with the 7-15. The duty cycle adjustment is usually SACCS employ a crystal-controlled reference measured on an oscilloscope. A basic refer- generator. This unit uses ovens for frequency ence pulse is usually displayed on either A or stability. Its requirements are for 100 kilo- 13 trace and the waveform of the circuit to be hertz, plus or minus 1 hertz. Adjustable adjustedisdisplayed on the other trace. trimmer capacitors (button type) are included Calibration of the waveform is performed and for frequency adjustment. adjustment of the duty cycle is performed by 7-8. The MD 807 modems used in 407L altering the variable component in the circuit tactical control equipment use a crystal which under measurement. If an amplitude variable is also encased in an oven. However, this is included, the instructions usually specify 30 4 4 -0 AMPLITUDE ADJUSTMENT SCREW

MOUNTING CORE SCREW BUFFER HOLE MOUNTING SPRING SCREW HOLE

CASE CARRIAGE RETRACT SPRING

CARRIAGE

CORE TRACKING SPRING

COIL

CORE GAP

Figure 47. Read/write head, Q7, T2. the amplitude plus or minus a specified and the alignment manual, the -9 are used, deviation. 7-16. Technical Orders. Once again exten- 8. Adjust Storage Devices sive use of the adjustment/alignment manual, 8-1. During a study of storage devices and the -9 TO, is made. In addition, checks for their adjustments, a significant factor devel- circuit operation are made with the preventive oped. The adjustments performed were di- maintenance manual, the -WC6. If repairs are vided into two separate, significantly differ- made and circuits realigned, both the mainte- ent, subtasks. One was mechanical adjustment nance chapter of the service manual, the -2, and the other was electrical adjustment using 31

443 3 'I'

an electronic component. One might say that 84. Drum head adjust. Theassembly is any adjustment, even a pot, is mechanical, approximately 11/4 inches wide by and in the truest sense this is 3/8 inch correct. In this thick. It contains two mountingscrew holes study, mechanical adjustment indicatesthe on the flanges and internal coil, the heart physical altering of components of to specific the unit. The amplitude adjustmentscrew distance, even though the distance ismeas- allows the carriage tomove up or down, ured in voltage amplitudes. Electricaladjust- closer to or farther ment is construed to mean away ftom the drum a variation of a pot surface. The adjustment routinesrequire that or capacitor to provide a standard waveform data in the form of or level. a binary one be written onto the drum channel being adjusted.The 8-2. Based on these premises, mechanical pulse is measured ona dual-trace oscilloscope adjustment can be readily associated with with one trace measuring the inputwaveform drum systems, tape systems, and disk systems, and the other trace measuringthe output since each has the same principle of de- waveform. Adjustment of the head forthe Q7 positing data and extracting data througha requires that an output voltage bemeasured magnetic head. The electrical adjustmentscan at 125 to 150 millivolts peak topeak. The be associated with the systems listed above steps to arrive at this voltage outputare such and also with core systems, thin film, electro- that the head is lowered to the stoppeddrum static storage tube systems, delay line storage surface and then raised until 75percent of the systems, and some integrated circuit storage voltage waveform is displayedon the scope. systems. In these systems, electrical adjust- 8-5. Ten years of progress andadvanced ments are performed on components external technology have brought simplificationto the to the storage device in almost everycase. drum head units, as shown in figure48. This During this study you will see that this istrue. BUIC read/write head is smaller,simpler, and 8-3. Mechanical Adjustment Principles. The uses spring steel (spring flat reed) to holdthe drum storage device consists of many chan- recording head near the drum. Itincorporates nels, and each channel has read/write heads a miniature coil that is approximately 1/8 and usually an erase bar. Each head is secured inch square. The techniques foradjustment to a frame which is designed to place the head are similar to those for adjusting the older very close to the drum surface. This is nothing models in that a binaryone is written into the new to you since you have already studied channel and the readout voltage ismeasured drums. The read/write head aasembly on the while adjustment is being made.Special tools AN/FST-2 or AN/FSQ-7 is similar in con-axe required to adjust this system. The pivot struction, and is shown in figure 47. screw shown on the left in figure 49 (printed in the workbook)secures the adjustment tool to the head mounting bar, and theadjustment screw controls the positioning of the head. The head clamping screw is tightenedand the task is complete. 8-6.Tape driveadjust. On tape drive systems, mechanical adjustmentsare usually associated with the drive mechanismrather than the heads. Most headsare installed in a (41AO metal container andare recessed from the outer surface of the container HEADMARPINLGEADS 3/1000th to saEW 7/1000th of an inch, therebyproviding the required gap for magnetizing thetape. One tape system uses shims to raise thetape .003 MINIATURE to .005 inch from the tape head. HEAD BAR MAGNETIC HEAD 8-7. Mechanical adjustments ASSEMBLY vary in accord- DRUM SURFACE ance with the design features; however, they are common in that the proper drive speed, stop, start, and tension must be maintained. For instance, in the format MAGNETIC message composer HEAD of SACCS, there is a sprocketadjustment which provides the required tension for the WIRE REED tape as it passes over the read/write head. SPRING (FLAT) REED 8-8. On the tape drive units,a pinch roller is adjusted by use of shims, andso is the Figure 48. Read/write heed installed. brake. The vacuum pump adjustment is made 32 4 44 INPUTS ADJUSTMENT SCREW

MAGNETO RESTRICTIVE DELAY 4.34 so that the water gauge shows a reading of 40 of a micrometer. From figure 51 you can see inches, plus or minus 5 inches. Also, adjust- that the heads are placed in various positions ments are made on belt-driven assemblies at around the disk. Examine callout 1 of figure the time that corrective maintenance is per- 51 and you can see that the head bar has an formed. They involve the driven capstan, adjustment called a pivot screw. The head bax vacuum pump motors, and rewind motors. is shown more clearly in callout 2 of figure 8-9. Delay line adjust. The magnetorestric- 51. Once again, extensive use of mechanical tive delay line storage system incorporates a adjustment is made on storage devices. mechanical adjustment device, tunable to a 8-11. Electrical Adjustment Principles. Cur- precise position. The principle of storage with rent is required to write a one onto a storage this device is shown in figure 50. A silver wire device, and all systems use drivers to accom- is used as the storage element with approxi- plish this. The current is almost always the mately the last 16 microseconds variable. result of a decoding action of data. A binary Current in the form of a short duration pulse one will usually cause a circuit action which is entered into the wire at one end. It travels converts the digital one into a current pulse of down the wire at the rate of approximately the proper polarity for use in a magnetic 1100 feet per second. Since its rate of travel is storage medium. The device most generally linear, the selection of a precise length then used is the write amplifier. identifies two facts: (1) the time delay of the 8-12. Read/write amplifier adjust. Almost pulse is known by the length of the wire times all systems usewrite amplifiers and read the rate of travel, and (2) if the pulse (data amplifiers. These amplifiers usually have po- hit) occupies a precise measurement of length tentiometers installedforfine adjustment. along the wire, a specific number of data bits They may be current-limiting or voltage- or words may be stored. Access to data at the limiting, or both. They are usually adjusted to output is sequential and any selected data can specificationsas performance routines. A be sampied if its entry time and the total study recently completed of some of the length of the storage line are known. The weapons systems reveals that all tape storage adjustment of thelast few microseconds units have either a read amplifier or a write becomes a critical factor and precise timing is amplifier adjustment pot, but some drum necessary. Two methods are used for making storage systems have neither. One drum sys- the adjustments. First, an oscilloscope using two traces may be used. On one trace the input pulse is shown; on the other trace the THIN FILM output pulse is shown. Since these are the MAGNETIC ACTION same pulse, the rneasurement of time between VECTOR DIAGRAM input and output reveals the delay or storage time. Adjustment can be made to display a EASY STATE precise known delay storage time. The second method is performed by using a test setup designed and built for adjusting these storage devices. The principle used is that switches program the tester's internal circuits, thereby providing pulses and measuring pulses at NEG "1" BIT specific times. The pulses are then displayed 1-5- by use of neon lights. The first light to come on isinterpreted to indicate that a close setting has been achieved and the see id light HARD STATE indicc ..es an exact setting. 8-10. Disk memory adjust. The disk memory system is related to the juke box in that the disk rotates and the heads are placed .. above and below the recording disk. Figure 51 __A..POS "0" BIT (printed in the workbook) shows a cutaway view of a disk memory unit. As is true with other storage devices using magnetic recording, there are mechanical and electrical adjustments. The mechanical head assemblies are adjusted by screws installed in pivot arms. EASY..0.. STATE These are shown in the breakout of figure 51. The heads are adjusted with shims and the use Figure 52. Vector diagram thin film memory. SA

44 G ing current necessary for storage of data. 8-14. The principlefor write needs a coincident address current plus a write current sufficient to cause switching. To read requires a coincident current, but one that is not high enough in amplitude to cause switching. The diagonal dashed line in figure 52 is TOP PLATE the read value for either a one or a zero. 845. The makeup of a thin film storage JIIIINININ unit is shown in figure 53. The storage area consists of dots of magnetic deposits (3)

IMINNWomMINao 4111MMINIIIII within a grid of coincident connectors (2). 1.M.M., Each dot is capable of acting as a core and is addressed in a similar manner. The primary CIRCUIT PLATE differences are the physical makeup and the nondestruct readout or data loss from loss of power. 8-16. Storage tube adjust. The electrostatic storage tube is a device using a modified CRT to allow operators to view its stored data. You may use variations of this tube. One is MEMORY PLANE called the memoscope. The principle of operation is shown in figure 54. Data is written by the high-velocity write gun through the collector screen onto the storage screen. The flood guns scan the screen and every point on the storage screen where data is present (+ voltage). The flood voltage penetrates and illuminates the CRT phospher. As is true in drums SPACER and core storage, the applied voltage and current are controlled by pots. They control IIINIIIIIIIININI. scanning, unblanking, video data levels, flood ... ,, et .... gun intensity, and storage and collector screen :IIMI 2 ' . erase. 8-17. Integrated circuit display (CRT) adjust. One system previously using the storage CIRCUIT PLATE tube had the circuit redesigned to use a simplermore moderndesign.Figure 55 (printed as a foldout in the workbook) shows a view of the control panel including all the potentiometers,a view of the CRT and integrated circuit packages, and logic and circuit diagrams. The simplified circuit elimi- TOP PLATE nated the storage scope with its six mechanical centering controls for pitch and yaw, its Figure 53. Thin film memory. eight stepping voltage adjustments (fotre for tern uses a current-limiting memory protec- horizontal and four for vertical), and its two tion circuit with adjustment pots to regulate intensity controls. The new system operates the current requirements for the entire drum on a principleof storing the data to be displayed in a recycling storage buffer (not unit. shown in fig. 55). The data from the buffer 843. Thm film circuit adjust. Thin film programs the memory IC storage, figure 55,B, memory systems provide a nondestructive which provides an output to digital to analog readout after storage of data. This is done by converters,1 and 2 infigure55,1). The reading a current amplitude of slightly less character voltage from the D/A converter is than switching current or hard state, as is added to a vertical and horizontal stepping shown in figure 52. The adjustments associ- voltage, and these voltages are applied to the ated with this memory system are made on deflection plates. During intensity time, the the read/write amplifier units. Coincidence of character is painted. The controls, all pots, two pulses is required to provide the switch- adjust for: 35

4 ei T 21430"

FLOOD GUN HIGH VELocir( velure GUN STORAGE SCREEN

COLLECTOR SCREEN

FLOOD GUN PHOSPHOROUS VIEWING SURFACE

Figure 54. Electrostatic storage tube.

(refer to fig. 55,A) voltage isfed to the differential amplifier. Character width and height. This control determines when the difference Position vertical and horizontal. output occurs. It does not alter the character Characterspacingverticalandhori- size. It provides a control for positioning the zontal. charactersin a particular position on the Intensity. CRT. 8-21. To show you the effects of the pot as 8-18. Let's study figure 55,A, the align- displayed on the CRT, look at callouts 1, 2, ment panel of the digital informational dis- and 3 of figure 55,C. Ca limit 1, the vertical plays (DID) unit. The upper third contains in, alters the stepping voltage to the plates. three potentiometers, all contained in a senal Therefore, it provides more or less stepping voltage divider network with one end tded to voltage and causes the display to vary as soucre voltage +13 volts and the other end to shown. Ca llout 2, the character height pot, ground. Tracing back to its use, each wiper controls the size of the character within the arm feeds to the D/A converter board. R11, space allotted for the character. The differ- vertical gain, feeds to an amplifier (shown in 2 ence in size is shown in callout 2 of figure of the D/A converter (D) ) to the high-order 55,C. Cal lout 3, the vertical position control, bits decoder. The symbols shown are really moves the display up and down, as shown in transistorsacting as switches. The output figure 55,C, but does not affect the size. voltage of the high-order bits is determined by 8-22. Returning again to the schematic of the binary count input. It may be 0 through the alignment panel(fig. 55,A) the upper 15. Each count biases one or more of theshaded area of the panel shows a similar transistors and the algebraic sum of the four, arrangement forthe horizontal control of plus or minus the variable gain of R11,characters. Notice, though, that R5 is 2.5K through the amplifier provides a deflection ohm where R11 in the vertical unit was 1K voltage for the vertical deflection plates. The ohm. The additional variable resistanceis unitiscapable of providing 16 stepping provided because the display is wider across voltages; however, by looking at figure 55,C than down, and more stepping voltages (16) (printed in the workbook), you will see that are generated. The controls provide the same only 10 vertical positions are used. functions as the vertical controls. 8-19. The next in the series of pots is the 8-23. The right side of the alignment panel character height pot. It allows the increase (fig. 55,A) shows a bezel (rim) light control and decreaseof theverticalsize of the knob and, more important, an intensity am- individual characters. The voltage from the plitude control for overall brightness of the pot is fed to the lower order bits decoder. The CRT display. variation in size, therefore, is restricted by the 8-24. From this study of adjustments, you allowable parameter of the decoder. can see that adjustments are many and varied. 8-20. The third control (vertical position)The final area of application in this study is 36 446, 431

I = CHANGE IN FRED 111111VAIWORIOND 1111110111 11111111111 PSI<

111111111-111111111111

111111VAMIERWANIII

DIPOLE

RIMUMIRIMENNAI1 = HIGH FREO INIONNINNEMPIM0 = LOW

FSM

Figure 56. Transmitted data(FSK. FSM,dipole). the adjustment of data input andoutput 9-2. Digital Data. Digital data is that data circuits. which is transmitted from one unit to another via lancllmes (TELCO), troposcatter, or micro- 9. Adjust Data Input and OutputCircuits wave. The system of transmissioninvolves primarilyfrequencyshiftkeying(FSK), 9-1. Both potentiometers and variable ca- dipole, andfrequencyshiftmodulation pacitors are used in establishing the correct (FSM). Although we covered FSK and dipole datalevelswithintheinput and output in Chapter1 of this volume, review their circuits of the computer, data processing,and forms in figure 56. Each time, in FSK, that a communications systems. Since some systems binary oneistransmitted or received, the use more than one typeof data entry or exit, circuits sense and process a change in fre- this discussion shows where typicaladjust- quency. Contrast the dipole data whereeach ments are performed according totype of binary one is represented by an AC pulse and data. The data inputs and outputs canbe a binary zero is representedby a level. The separated into many classes, but for thisstudy FSM not previously discussed, but shown in these three were chosen: figure 56, combines some of both systems in Digital data. that frequencies are modulatedone repre- Video data. senting a binary one and one representing a Electronic data convertible to orfrom binaryzero. In allthree cases, timing is digital. related since the speed of sampling of the 37 pulses corresponds to the datacontent. Quantizers. 9-3. Adjustments performedupon circuits Video amplifier units. using these systems of data transfer use both SIFprocessorsorbeaconinput pots and variable capacitors. Thepots pri- processors. marily control amplitude and pulsewidth. The capacitors affect frequencyamplitude and phase control. Adjustmentroutines re- 9-5.Electronic Data ConvertibleTo or quire the use of measuring devices,frequency From Digital. The unitsproviding data to counters, and oscilloscopes. Some ofthe input/output units in thiscategory are: common names applied to these input/output Punch card readers. units are: Teletype. Message processors. Printers. Modems. Video printers. Modulators-demodulators. Paper tape machines. I/0 units. Keyboards. Transmitters or receivers. Decoders or encoders. 9-6. Many of these units haveadjustment controls installedin their circuitry which 9-4. Video Data. As we discussedin Chap- eliminate the need for the data ter 1 of this volume, radar andSIF may be processor or provided in many forms, from computer to have Austablecomponents in raw to digi- their input/output circuits. For tized. Radar sets, ofcourse, receive a very instance, a small pulse return, and the amplifiers certain card reader has two controlsonefor within pulse-width adjustment and theother for the set boost them considerably. Ifthe return timing of a strobe pulse is digitized within the radarset, all target generated by a saturable reactor. Then there isa selection returns are presented to the dataprocessing unit at a standard pulse width and control within another unit witha variable amplitude. amplitudecontrolforeachlevel. The data processor input unit mightthen have Some amplitude pots as controls, but printers and keyboards have variable mechani- not much cal and electrical controls,so input/output more. However, if the data is selectable by units do not use them. These personnel using the dataprocessor where are examples of digitized, raw, or processed radar adjustments being providedon I/0 equipment enters the feeding to or being fed from dataprocessors input circuitry, extensiveuseis r -de of or computers, or communication equipment. variable components. Capacitorsak ..-.orpo- The data codes used by these ratedtoprovidegaincontrol devices differ forhigh- from both the digital input data and videoin frequency pulses, and potentiometersare used thatfrequentlythe data is converted to for low-frequency (DC) pulse control,pulse- current pulses, is fed in parallel, travelsat a width control, duty cycle control,and bias higher rate of speed,may be completely control. Some of the commonnames applied digital at prescribed logic levels, to these units are: or is converted to digital from relays andswitches.

:18 CHAPTER 3 4441

Alignments

THE BRINGING together of individual ele- 10-3. This man was praised for doing an ments to provide an overall functionis the efficient job on the alignment, but 2 hours primary concept forthe performance of later the equipment he aligned went down. alignments. Back to the equipment lie went, only to 2, In Chapter 1 of this volume, operational discover that he did not know what caused performance checks were identified and anal- the failure. yzed. These checks were made almostentirely 10-4. We all know that a failure can occur upon functionalcircuits which provided a at any time, but consider theclose time specific output that was necessary forthe interval between the completion of an align- entire equipment to perform. Some ofthe ment and the failure. Is one act the cause of checks took into consideration onlysmall the other? Is there more to performing an segments of the equipment, such asvideo alignment than mmpleting the steps of a amplitude validation. Others checked the en- given routine? What may some of these tire unit as in the case of a printer. answers be, and how could theyrelate to 3. From this study, we developedChapter improving anidividual's work? How can 2 and analyzed the variable componentwhich answers to these questions be usedto improve was used to make theindividual adjustment. the mission of preparing the man? Let's seeif The analysis brought out thatadjustments we can break down theperformance of involve individual circuit elements, as well as alignments into some significant elements. interconnecting and interrelating circuits, and 10-5. Identify the basic objectives of the often other functions. allgninent. Our man in the figure learned to perform the steps in the alignment. Did he 10. Alignment Concept understand the objective? He probably knew what it was from the title of the alignment 10-1. Combining the objectives ofthese routine, but did he realize that the title only two chapters aids in acceptance ofthe con- identified a particular area, function, or sub- meaningful and cept that for alignment to be function of the equipment? effective, a complete understanding ofthe 10-6. To identify the basic objective of an overall function of the circuits within the alignment routine requires more study than alignment is essential. The principalobjectives study identified, ex- reading the title. It involves an in-depth and selected applications are of all the related circuits, components,elec- plained, and analyzed in the paragraphsthat tronic principles, and worktechniques com- follow. bined. Figure 58 (printed inthe workbook) five major subdivi- 10-2. Principal Objectives. Look at the man illustrates that there are he resemble someone you sions of an alignment. Thefirst subdivision is in figure 57. Does the alignment title and theobjective of the have seen a few times during the shortperiod the subunits, that you have been in the workenvironment? alignment. The second element is his alignment circuits, and components of theobjective. He is well equipped. He has The third element identifies the need tostudy technical order,test equipment, plenty of have a leads, and a job order. He is going toalign a interrelated functional units which equipment. Do bearing on the objective. The fourthelement complex piece of computer interrelat- you think that hewill do a good job? In all is the sequence of alignment of the probability, he will, because theinstructions ed functions and objective. Thefifth element clear and is the alignment of the objective.The first of written in the alignment TO are the objec- specific, and the standards axe specified. these subdivisions is "determining 39

451 10-7. The second element shownin figure 59 as being necessary to obtaininga clear definition of the objective iselectronic principles.As an example, if integratedcircuits are included in the system, their capabilitymust be thoroughlyunderstood. Their physical makeup must be identified. Themaximum and minimum variations possiblewith variable controls must be studied. Aswe pointed out in Chapter 2, if a potcan only alter a circuit output by 10 percent and the measurements of the actual output vary by 20percent, no apparent alignment can be made.Is the circuit containing the variable control isolated,or is it interrelated? If itis isolated, then a local problem exists and correction is required.If, on the other hand, the circuit is interrelated with another control circuit, the possibility ex:sts that the other control circuit is causing the wide variation from the specification. 10-8. Combining the two elementsof the study to determine the objectiveof an alignment establishes the primarypurpose for the alignment. This purpose muse be established in clear specific terms and mustconvey a specific meaning to you. It must identify either a major or minor functionwhich the machine must perform.It must relate to theory of operation of the equipment.Final- ly,it must lead you to developmentof an in-depth study. The next logical step in the study of an alignment,as indicated in figure

ALIGNMENT TITLE & OBJECTIVE

Figure 57. Alignment technician. east TECHNICAL ELECTRONIC ORDER PRINCIPLES tive." Expanding part of figure 58 into figure 59, we identify that there are two require- 41. ments which are necessary in obtaininga clear definition of the objective. The study must SIGNAL FLOW------1 first include an examination of the specific alignment and the related technical orders. This will determine: Various segments of the technal orders which would aid in understanding the mallSoECIFICATIONS objective. 1.

The data or signal flow paths whichmay IllosObwOmolmoie.YEN1116 be altered by the alignment. Specifications and limitationsof the various steps involved in the alignment THEM"( OF instructions. OPERATION The theory of operation of the unit to be aligned. Figure 59. Alignment title and objective. 40

4 (-c ) 4,4_3 58 (printed in the workbook), is the identifi- 10-11. If, for instance, circuitry within a cation of subunits or circuits which affect the function contains an oscillator circuit and a main objective. flip-flop frequency divider, identify the oscil- 10-9. Identify subunits or circuits which lator as one block and the frequency divide': affect the main objective.Almost without as another block. If thefunction contains exception, a function of a computer system is switching networks, amplifiers, and buffers, made of multipla circuits. Somefunctions make a block for each circuitone for the have no adjustment controls; others have one switching network, one for the amplifiers, and or many. If the circuitswithin the function one for the buffers. Labeleach block. The contain only one control, understandingits separation aids in understanding relationships operation is easy; so is the verification of its of circuits within the function. It alsoallows functional operation. The complete under- for listing selected necessary parametersof standing of the function, however, is no less the individual circuits. important. This is so because any circuit, 10-12. Because of the wide varietyof either preceding or following the circuit con- circuit design and application, we cannot taining the variable component, may have one cover parameters in this CDC.However, in- or more of its parameterschanged due to a depth understanding of them is essential to physical breakdown of elements within the the understanding of thc operation and align- structures. For instance, heat affects all comment. Do not be misled by attitudes or ponents and causes resistances to change,comments that changing a printed circuit capacitances to change, or thermal runaway board (PCB) is always the solution to prob- of semiconductor devices. Changes in current, lems. This is a fallacy. This concept allows for caused by the structural changes in compo-restoration of equipment for operational pur- nents, alter conduction parameters ofthese poses, butit does not identify causes of components and their related circuits.The equipment failure. It does not answer ques- variable control is primarily designed to over- tions about why the variable component in a come these factors, and it will compensatefor function could not bring the function into some of them. line. 10-10.Figure 60illustrates that when 10-13. To cite an example containing this i.) functions are broken into subunits (individual thought, conskler that transistors are classed circuits), data about the function mustin- according to frequency passing capability; i.e., clude the items listed. In computersand audio RF, VHF, etc.,as wellas current processing machines, manufacturershave built handling capability. We know that two space circuits on printed circuit cards andthen regions exist in each transistorone between interconnected the circuits with wire orcable. the emitter and base and one between the To identify these circuits, youmerely extract collector and base. Under normal operating the circuits included in the functionby: conditions of a given circuit using transistors, Identifyingthealphanumericinthe these regions are the controlling elements. alignmen ts. The amount of forward and reversebias Identifying circuit titles, parameters, and determines operation. We also know that purposes. transistor amplifiers have interelectrode ca- Locating them in the circuit and diagram pacitances, and the capacitance existing be- man ual. tween these regions affects operation.There- Placing the circuits, if not on the same fore, interelectrode capacitances may change pages, into a straight line(sequence) on a under varying conditions and, when they do, work pad to show initialization, pro- they offer more or less reactance to the input reRaincr. and utilization. frequency. This can cause a change in output frequency or amplitude. IMMIM=11.61.1.1=111111=0/bilaINIIIMANIIMINIIIIMIllip 10-14. Let's relate one more factor to this example. Most of theprocessing circuits SUBUNITS, CIRCUITS, COMPONENTS develop rectangular waveforms, and we know OF OBJECTIVE that these are made from a basic frequency and infinite odd harmonics of the basic. If a partial breakdown occurs within the regions identified above and reactance changes, then ALPHANUMERICS SEQUENCE OF CIRCUIT some of these harmonics will be attenuated TITLES OF CIRCUITS OPERATION by the amplifier, and the output waveform PURPOSES OF CIRCWTS l SERIAL, PARALLEL; becomes distorted. It may become integrated, ama...... 4 111111=411. differei 'iated, or begin to have ringing. It Figure 60. Subunit, circuit information. may increase or decrease in amplitude. It may 41

\ el'`-'0) cations. INTERRELATED FUNCTIONAL 10-18. Whichever system is used, the sig- UNITS, CIRCUITS nificant idea is that some people knew that preliminary steps must be performed. These people also knew and understood the entire unit operation. Therefore, they were able to sequence the necessary steps. They knew MI MASTER CONTROL from research exactly which functional units (TIMING) or circuits provided inputs to the function ...... ,...raalaimmilna being aligned. As shown in figure 61, any or all of the areas may play a significant part in I=1...1.1.0.=11Mir allowing the circuits to perform. If these people knew the system, you need to know DATA CONTROL NMI the system. Therefore, each interrelated func- (WOROS, BITS) MIMION.NN.MM1MIIMESIIIIMINIIMMI,, tion must be identified. Its title, purpose, and 4115=11MMINI...m.1111Ir ALL OR ANY significant data input to the function under TO alignment must be listed. Using a separate OBJECTIVE block for each interrelated function allows for netVIDEO CONTROL quick, sure identificaVon of its influence. You (AMPL, PW, PRT) should also include notations within the block about any and all controllable variables such as pots, capacitors, and data. 10-19. For an example of the concept stated above, refer to figure 62 (printed in the meiMANUAL CONTROL workbook). The figure shown in 806B sym- (SWITCHES, POTS) bology represents a functional alignment with other functions having bearing upon its function. Function A is the function to be aligned. Figure 61. Interrelated functional information. Noticethat function B must provide an output and, to do so, both signal 1 and signal frequency shift, causing a delay in time. 2 must be present at its input. Further, B is a 10.15. This example typiL s the need foi functionalunit whichisin itself aligned. analysis of an alignment to identify its ele- Notice that function C allows for the pro- ments. It furthers the need for basic elec- cessing of either generator D or E, and both D tronic understanding of circuit design and and E are aligned. interconnection, and it brings another signifi- 10-20. We now have a situation where A's cant element of alignments into view. function is dependent upon its own internal 10-16. Identify interrelationships of the circuits, parameters, and components, and function with other circuits or functions. This also needs either (1) D processed by C, and B, element, illustated in figure 58 (printed in or (2) E processed by C, and B. Consequently, the workbook) and amplified in figure 61, the output of A could not be brought into brings into focus the concept that very often proper specifications uniebs alignment of D, functions other than the one being aligned E, and B preceded A's alignment. must provide a discrete, specific input. An 10-21. To point up this discussion, you example, as shown, might be the timing unit need to analyze each alignment, using the supplying time share pulses at particular pulse technical orders to determine the complete widths and pulse recurrence times (PRTs) to a picture. You must find if any interrelation- display unit. ships of function exist, what they are, and 10-17. Some system must be used in an how they affect the function being aligned. alignment routine to identify external require- This brings us to the next element of the ments. The system may be substeps in the objective as indicated in figure 58 (printed in first stages of the alignment and may require a the workbook). verificationof the externally controllable 10-22. Determine the sequence of inter- pulses. 4 may be a general statement stipu- related functional units and the objective lating the prerequisite that certain r..1ses be alignment. For overall success to be guaran- present in accordance with specifications. Or teed, the broadest knowledge of processing it may be sequencing of alignments within must be thoroughly understood. This means scheduling thatprovides the method for that the theoretical knowledge of unit and determiningthatallnecessarycontroAed subunit functions must bt. focused upon the pulses are present in accordance with specifi- question, "What part must be aligned first, 42 454 INME111111111011111100ININIJIMIIM=11. second, and third?" 10-23. This elementisconcerned with SEQUENCE OF ALIGNMENT OF be- INTERRELATED FUNCTIONS AND identification of sequencing alignments OBJECTIVE tween interrelated functions andunits, but not within the functional unitbeing aligned. Let's use figure 62 again. In order for Ato be aligned, we see that it must have twoinputs. Therefore, B in figure 62 must bealigned IDENTIFY INDEPENDENT before A. Also, D and E must bealigned & DEPENDENT FUNCTIONS before A because either D or E provides the other requirement to A. 10-24. Therefore, B, D, and E mustprecede alignment of A, but since D and E canprovide a separate input toA, either can be aligned PLOT SERIAL AND/OR without regard to sequence. On theother PARALLEL PATHS hand, B may have an input oneither of the two input lines which may be from analigned circuit. 10-25. Should this be the case, B's input DETERMINE PRIORITIES must be proper. Therefore, thealignment of OF ALIGNMENT the circuit supplying the input must precede B's alignment. To recap the sequence: 11111 D or E can be aligned first. Figure 63. Sequence of alignment requirementa. B can be aligned if its inputs are not coming from an aligned circuit. If either You must identify the major elements which input does come from an alignedcircuit, cause it to be dependent. Whiledoing this, that circuit alignment must precedeB's determine whether or not the inputs to these alignment. elements are from other independent or de- Finally, A circuits can be aligned. pendent functions or circuits. If independent, your study (as in the case ofthe generator) 10-26. This discussion has illustratedin acan be concluded. If dependent, youmust simplifiedmanner our previousquestion, look further and identify all the relationships. "What part must be aligned first,second, and This may require search for the origin of the third?" A detailed study of yourequipment signals. After all functions have been identi- can show thatinterrelationships are depend- fied and listed, data relating to generation, ent upon determining the datalisted in figure distribution, and processing ,zan be listed. It 63. can then be related to theobjective alignment 10-27. Independent/dependent. Youmust, as minor to the objective ormajor to the after identifying the interrelatedfunctions objective. This may sound like considerable and their associated circuitry,determine if the effort, but experience has shown that depend- function is independent or dependent.if the ency seldom exceeds three orfour functions. function is independent, then it is agenerator of some sort which is designedand manu- 10-29. Serial/parallel. The next step in this factured to provide discrete outputs.Except phase of the analysis is determining whether for power requirements, itfunctions by itself. the interrelationship is serial, parallel, or both. A unit of this typeusually contains anThis means tha'nu must find how the oscillator. It may include frequencydividers, functional unit's tput is relevant to the phase shifters, discriminators,quadrature net- objective alignment, how it interacts, and works, multipliers, and other assortedcir- when it occurs. You must identify simultane- cuitry. These internal circuitsonly prepareous occurrences, time sequences,delayed the discrete output which is necessaryfor the sequences, automatic and mar ualcontrol objective alignment. Detailedinformation forsequences, and off-line test/on-line test se- your study of theobjective alignment need quences. not include all aspects of theindependent 10-30. Refer again to figure 62(printed in related function, but must include enough to the workbook). This simplediagram clearly show what and when the generatoroutputs shows that the sequence of actionsis com- are, what generatesthem, and what circuits bined serial and parallel. Most frequently,the alter them. common elements tocomplexing the defini- 10-28. If the interrelated function is de- tion of sequencing are the timing andcontrol pendent, you must identify its dependency. units. The wide distribution ofthese signals 43

4 44-ite necessitates careful study. These controlled various times. It may be able to be used in signals play an extremely significant role. In different modes. It may have test parameters the pest, the circuits containing timing and other than the normal operating parameters. control have been the ones first aligned. This If any of these conditions exist, the priority trend must of necessity remain high on the to function validation through alignment may listfor starters. Other circuits using any cause the alignment routine to specify par- inputs from the timing and control unit could sequences, comparison of results with not be aligned without proper receipt ofticular.alternate sequences, or serial validation while timing pulses. sequencing. 10-31. Priorities, Since interdependency is so 10-32. Determining the sequence of units significant even though the study may reveal to be aligned is the fourth in a list of elements that the relationship is minor, some considera- discussing the principles of alignment. To this tion inust be placed upon the last element in point we have identified the objective, listed figure 63, priorities. Each complex waveform the subunits affected, identified am,- .riterrela- may play an interrelating role with others tionship which the function to be aligned has and, because it may, it causes priorities to be with other functions, and, finally, determined established. Most often, though, the priorities the sequence in which the unith or functions you encounter are prerequisites of the align- must be aligned. Now we must determine ment to be performed. They may be such within a fr ation where to start the align- items as determining that specific DC voltage ment, the ,Joints to measure, and the inter- levels are or are not present. Priorities also mediate and final adjustment. have to do with identification and verification 10-33. Align the objective. The fifth ele- of major signal inputs, minor signal inputs, ment within the study of alignments, indi- and voltage requirements. A final thought on cated in figure 58 (printed in the workbook), priorities is that of the function being aligned. develops the information necessary for the The function may provide multiple outputs at understanding of the function to be aligned. Figure 64 shows that there are three main subelements which must be included in order to develop a complete picture. These are (1) identify serial and parallel signal paths, (2) list ALIGNMENT OF OBJECTIVE controls, connections, and test points, and (3) draw waveforms, amplitudes, and list tolerances. The second element in this entire study identified the requirement to list all subunits, circuits, and components of the objective. IDENTIFY SERIAL This fifth element requires the use of the data & PARALLEL accumulated in the second element plus addi- SIGNAL PATHS tional data collected about the three subelements and their subordinates which are shown in figure 64. 10-34. Before studying each subelement, LIST ALL CONTROLS, let's examine a point. The functional unit CONNECTING AND TEST POINTS being aligned may have as few as one to three circuits or as many as 20 to 30. It becomes reasonable to assume thatin a function containing one or two adjustments, a study CONTROL TYPE, LOCATION. reveals that if: (1) the controls are independ- PURPOSEII ent and parallel, either may be done first, or (2) the controls are interdependent and serial, then the one preceding the other must be adjustedfirst,or (3)the one controlis DRAW ALL WAVEFORMS dependent upon the other, then the independ- AMPLITUDES, LIST ent control must be properly set before the TOLERANCES dependent control can be set. 10-35. If the function contains numerous controls, an analysis of each of their purposes SPECIF CATIONS and functions is necessary. The study must GAINS reveal the same information as a function having one or two controls. It must also reveal Figure 64. Alignment of objective requirements. sequences and priorities. 56 44 base, emitter, collector,grid, cathode, plate, 10-36. Serial/parallel paths.The block dia- of the coupling, or filtering. gram beingdeveloped for the study 10-40. We have given youall the require- function must bearrangedinserial and understanding of what it takes in figure 62 (printed ments for an parallel order as shown to make an alignmentmeaningful. Of course, in the workbook).Connecting lines should be the held to a minimum to you realize thatthe actual performance of used but should be alignment takes considerablyless explanation avoid confusion. Includeonly significant lines here. You might even minor control data to than we have presented which provide major or be thinking, "I don'tneed to know all this and get a unit the circuit. connecting points, and information just to turn a pot 10-37. Controls, back into toleranceduring an alignment." test points. List allcontrols by name, type, You don't if every pot youturn accomplishes and symbol in theblock on the drawing (within the specifiedlimits)itsintended where they occur.This information isob- going to do Include function. However, what are you tained from thealignment itself. if that pot does notaccomplish this function? alphanumerics of thecontrols and locations You're the repairman.You're the man who of the test points.Draw the symbolfor the will have to find outwhy that pot didn't control. Standard symbols areshown in figure function. You're the control including perform its intended 65. Figure 65,A represents a man who willhave to do thetroubleshooting a knob.Figure 65,B represents ascrewdriver and correct the problem.Don't you think adjustment. Figure 65,0represents a potenti- that your job of correctingthe problem will ometer or rheostatcontrol. Figure 65,D repre- equipped with the 65,E be much easier if you are sents a variablecapacitor, and figure knowledge of the functionsand interactions represents a tunablecoil. For filling in your that particular align- choose any of these of the circuits within block diagram, you may ment? symbols or combinethem. Finally, figure 10-41. Block DiagramOverview. To be sure 65,F shows a typical testpoint symbol. that you have a completepicture, let's put the 10-38. Waveformspecifications. Up to this whole program togetherin block diagram point in youranalysis, you shouldhave an form with proper sequence.Let's also identify and understanding of each element of thestudy as a -t,p. Figure 66 almost complete picture the the alignment.You have the: (printedinthe workbook) illnstrates (1) Objective. whole concept. Steps1 through 5 illustrate (2) Subunits withinthe function iden- each phase of thestudy and list for us the pertinent data neededfor that phase of the tified. phase can be (3) Interrelationshipsof other functional study. As you can see, no units noted. omitted. In the finaldrawn study, certain of adjustments to be phases may not be presentbecause they do (4) The sequence How- made. nc., have abearing on the alignment. (5) Test pointsused for checking the ever, the phase mustbe checked to determine accuracy of theindividual adjustment its nonexistence.Finally, step 5 must com- and the intermediatefunctional steps. plete the picture whichstep 2 started, and (6) Final output testpoint. steps 3 and 4 mustinclude all information necessary forunderstanding. 10-39. From the technicalorders you can 10-42. In the next foursections, we discuss obtain the final dataneeded for your study. four general areaswhere alignments are most This data is the exactwaveforms, voltage frequently performed. They aredisplays, elec- levels, and currentamplitudes. Place these tromechanical assemblies, memoryunits, and their point of occur- In each of thesestudies, waveforms as close to message processors. of rence as possiblei.e.,input and output wave- except memory, thereis an example study forms located at theirrespective test points. an alignmentasdetailed inthis section. amplitude and allowable Preceding the study is anexplanation of tne Record exact voltage the deviation specifications.Identify, along with type of unit(display, etc.) on which the alphanumericcode of each control,its alignment is to beperformed, and an identifi- it is a a.1 purpose andlimitations. For instance, if pot, list its maximumand minimum gain in volts, current, etc.If it is a capacitor, list it as trimmer for over/undershoot,frequency com- specify its maximum ? pensation, or gain, and 0 and minimum effect.Know or list in notes on A the sheet where theadjustable component is located in a givencircuiti.e., input, output, Figure 65. Control symbols. 45

4 5 7

--411.0* zIAB cation of the limitation of thescope of the High-voltage power supplies which pro- alignment. Your objective is to read and study vide the voltages for coupling, focus, each section carefully in order to: astigmatism, aquadag, and acceleration. Gain understanding in areas related to your job requirements. 11-5.Deflection.Displaypresentations Broaden your knowledgeofrelated most often use composite waveforms for areas. generation of the display. Vertical and hori- Gain knowledge of new areas. zontal delfrection units generally use thesame Make comparisons and correlation to the sweep generators, have time-sharing symbol equipment you work on. generating capability, and develop sweep sig- Identify with the concept of alignment nal inputs. For instance, range marks and in order to improve your worth to your radar data are often combined and processed unit through expertise. simultaneously. Concurrently, through deflection, symbols may be presented on thescope 11. Displays screen. Alignment, therefore, :equires at a 11-1. Let's review what we covered in the minimum a clear understanding of where the previous chapter about displays. Thereare displayed signals are coming from. However, four logical functions in almost all displayan in-depth understanding of the alignments units. They are: provides, in addition to a clear picture, a Timing. knowledge of each element of the display, its Intensity. origin, and its use. Vertical deflection. 11-6. Principles of Statistical Display. The Horizontal deflection. purpose of the development of statistical informational displays (S1Ds) and digital in- 11-2. Associated with these areas are align- formational displays (DIDs)isto. provide metts, and we will see in our study that thevisual, graphic presentations of digital infor- identification and comprehension of interrela- mation for command personnel to monitor tionships are exta.emely important elements. and evaluate. Most often the displaycan be Alignments are performed in all the units. classified as being used for tactictil control of 11-3. Timing. Alignment of timing affects airspace within the environment or for the use all units in the display; consequently, timing of the air defense of the environment. is usually aligned first. Some of the most 11-7. The presentations include vector dia- significant subfunctions in the display func- grams, numerical notations of weapons, and tional areas using timing are: symbology designating weapons classification. Sweep time generation. Alphabetical and numerical listings are pre- Sweep and symbol modes time sharing. sented to identify headings, speed, armament, Intensity unblanking and blanking. altitude, time to target or base, weather Data or video control. conditions, and other data pertinent to evalu- Expansion factoring. ationoftheair environment. They also Special pulses for special display features includegeographicaloutlinesofterrain, being impressed on vertical, horizontal, boundaries, and grids. Each element of the or intensity units. display requires circuitry for its generation and insertion into the display. 11-4. Intensity. The alignment of the inten- 11-8. Requirements for circuits. Foremost sityunitaffects the control of the CRT in circuits required for display is the symbol display. This unit provides control for the generator. Since lines, curves, and dots are cathode and control grids which affeete emis- used extensively L. create patternson the sion in the CTR. Alignments are performed display, symbol generators are built for these for: uses. One technique of activating these gener- Intensity of the different types of dis- atorsisto have a digital input cause an playsfor example,normal andex- output. For example, a symbol is assigned to panded mode. a particular type of aircraft. A generator is Unblanking and blanking of the CRT. provided to create the symbol when the The unblanking provides a display peri- operator elects to use it. He initiates console od, and the blanking provides a retrace action which creates a digital word. If the period. word has the 4 bits, 1101, in it, for example, Video selection or symbology processing a detection circuit as shown in figure 67 of data which requiresamplification, activates the generator. Examination of t:ie clamping, limiting, inversion, and shift- detector gate in figure 67 shows that the 4-bit ing. word must be 1101. The generator output is 46 450 memory and select the characters.The unit 14 ttif uses a standard CRT, and thecharacter is I 100m %ruolOt I' (WWI C.Fmf k 106 painted on the screen in a series of dots % nn101 I.I I ?-14v,I through the grid circuits. Deflection voltages are developed from binary countsconverted to analog voltages. The vertical position coun- Figure 67. Generator with input decoder. ter is advanced each time that the horizontal counter resets. The generated voltages from the digital-to-analog (D/A) converters position processed through the intensity channel (Z- the character on the screen of the CRT. A axis) or deflective circuits for presentation on review of the requirements for circuits on the CRT face. these types of displays leads to: 11-9. Vector generators are another re- a. Type of CRT. quirement for these types of displays. The b. Types of circuits used for generation of generators usually require two locations for deflection voltages. storage of the coordinates of the vector. c. Circuitsfor conversionof digital to Assume that a vector is to be drawn on the analog circuits. face of the CRT as shown infigure 68 d. Symbol generators. (printed in the workbook). The vector is in e. Input selection and decodingcircuits. the first quadrant; therefore, positivevalues f. Vector generators. of X and Y are used. The signs of thevalues g. Vector coordinate registers. are positive (0). The originof all vectors is h. Panels containing controls (pots, coils, center scope. The LSD of each bit is 8 miles. capacitors) for aligning the systems. Register contents must have binary values of 24 for start Y and 80 for stop Y, and 16 for 11-11. Types of display programming. We start X and 24 tor stop X. Thesevalues are have mentioned some of the types of pro- added to the normal X and Y registersduring gramming SIDs and DIDs in the preceding sweep generation anddeflection to cause discussion. Now let us study them in greater intensification of the vector line. Vector lines detail. can be drawn in anydirection, but they have 11-12. Time sharing. Time sharing is one of two limitations: (1) only a totalnumber of the most extensively used methods for display lines can be drawn, based upon the number of programming. Figure 71 (printed in the work- storage locations allocated to memory,and book) shows clearly that only when the CRT (2) the length of each vector isrestricted to is unblanked by timing control1 does the the number of bits per register in storageand intensification of the signal cause a character the bit value of the LSD. formation. In the formation of letter A, times 11-10. Requirements for DIDs are similar 1 through 5 are painted; then the CRT is to those of SIDs. Generators areactivated by blanked for one time period while the symbol an operator throughselection of switches. generators are idle. The CRT unblanks again Characters and symbols are displayed onsmall for times 6 through 10 and completes the CRTs. Various types of CRTs and circuits aresecond line for letter A. Blanking is used used. One type is the charactron tubeshown again, and the vertical amplifier output rein figure 69 (printed in the workbook).The verses its polarity to prepare for thepainting CRT incorporates two sets ofdeflection of the horizontal bar. At the same time, the units: plates for character selectionand cPils horizontal amplifier output also reverses its for characterpositioning. Three-bit bi.larypolarity to allow for a sweep from right to words are converted into deflectionvoltage left during time periods 12 through 14. At the for selection as shown in view A of figure69. end of time period 14 the CRT is blanked Compare the charactron tube with the typo- is the use ofand stays blanked until the next character tron tube. The basic difference intensification period. plates for character position instead of coils. This is shown in figure 70 (printed in the 11-13. Matrices. In two of the DIDs men- workbook). In each of these systems, the tioned above, each had a stencil plate (called sweep positioning voltagesallow for a hori- matrix), and the flow of electrons through the zontal and vertical positionmg ofcharacters character stamped in the plate created the and symbols to form words and statistical shape of the character on the CRT screen. In data and have a classification asDIDs. A thethirdDID examined,anintegrated newer device shown in figure55 (printed as a memory unit was used with eachcharacter as foldout in the workbook), used as a DID, uses a permanent data entry.Addressing of a integrated circuits with programmed memo- memory location allowed D/A conversionof ries. Binary values are used toaddress the the character storage to take placeand a 47 display on the CRT screen to occur throughan azimuth heading relative to thesite's the grids of the CRT. position. It is also identified as to type of 11-14. Programmed. Many displays contain aircraft, by beacon code, by aircraft flight forced display data. This is data which isplans, or by scheduled airline routing. The usually hard wired and available all the time. purpose of height-finder displays is to deter- The display may contain information by mine the altitude of aircraft within the range whichanalysiscan show and verify the of the radar. To accomplish this, the operator operation of the: or computer controls the azimuth position Generators. and the height nod. Most height-finder radars Circuit processing symbols and charac- also have a capability of locating an aircraft ters. through a januning situation. This operation is CRT circuits. called search lighting. 11-17. Requirements for circuits. In addi- The programmed data may also be hand wired tion to the basic complement of circuits that (by patch panel) to provide a display. For are normally used in displays, both types example, we have: display certain characteristics of their radar. Search radar displays, as shown in figure 72, Grid or polar coordinates. have sweep and intensity coincident with the Site relationship. azimuth position of the radar. Height dis- Maps of states, countries, etc. plays, also shown in figure 72, havesweep Maps of densely populated areas. coincident with the nod angle of the antenna. Elevation maps, contour maps, etc. Since each display uses the position of the Maps of airfields. radar in its display, the voltage received from Satellite positional data. radar servosisprocessed by the display equipment and used for sweep or nod voltage The hand wiring allows for easy change when in the display. In search displays, quite often conditions warrant. It also allows for indi- the sweep generator is an integral part of the vidual site configuration, thereby addingver- converter/processor unit. It is a free-rimning satility to equipment and increasing its capa- generator and provides continuously changing bility. sweep voltages for all search display consoles 11-15. Ca Hun methods. Numerous methods in the site. The principal use is c, .ite simple. are used to perform programming of the As the generator operates, detection circuits display (often called calling-up data for dis- cause two independent outputsone for verti- play). The most usual methods employ: cal and one for horizontal. A sawtooth of Switches. varying amplitude and inverse.capability is Tag symbol. generated for each deflection. When algebrai- Omniball or wheels attached to analog- to-digital converters. Light guns. Keyboard to memory program.

Each of the items listed above provides an input of correlation which the processor can compare and react to. The input may be directly sensed as binary or may be transmitted by pay code. It may be an analog input or photoelectric input through sensors. 11-16. Principles of Radar Displays. Radar displays are those that are usually associated with displaying radar returns. The two types of displays usually developed are the search display and the height-finder display. The purpose of the search radar display is to present allflying targets in positions on a CRT relative to the site location. We discussed this type of radar in Chapter 1 of this volume. We also discussed radar antenna rotation and beacon returns. Each of these elementsis necessary for video display for air surveil- H FIGHT lance. Each flying object's position is assigned Figure 72. Radar CRT displays. 48

49 g 5- cally combined in deflectioncircuits, the 11-20. In addition to the requirements for intensity is shown as the instantaneousvalue sweep generators, servos, anddifferential cir- of each. Figure 73 (printed in theworkbook) cuits,another requirement isrange mark shows how this operation can beperformed. circuits. The circuits must provide a signal for With two positive-going sweep ramps,the each 10 miles of range. Each radar mile is displayed sweep is shown betweennorth and 12.36 microsaconds. Therefore, each 123.6 east. The magnitude of thehorizontal sweep micruseconds the circuits must produce an is minimum at 0° and maximum at900, and output. The pulse width of the 50-, 100- , the magnitude of the vertical sweepis oppo- 150- ,and 200-mile range marks must be stretched by blocking oscillator, delay line, or site(fig. 73, A). This shows that at any instant in time the combined valuesof sweep monostable flip-flop to allow a longer time voltages provide a deflection between00 and for intensity. Finally, video processingcir- 90°. In figure 73,B, horizontal sweep voltage cuits, such as quantizers and video amplifiers, decreases, and vertical sweep vultage reverses are used to process radarreturns and make polarity and increases in magnitudefrom these returns acceptable for display equip- minimum to maximum. In figure73,C and D, ment. full 360° the two other requirements for a 11-21. Types of display programming. Pro- sweep are established. gramming in these types of displays includes 11-18. The antenna rotates, andthe sweep programming of: on the display showsrotation. The two must Numerous kinds of search radar video. be synchronized. A methodfrequently used Beacon video. for synchronizationis called error sensing Height-finder video. correction. A differentialprinciple is incor- Limited displays through control func- porated whereby a feedbacksignal from the tions. antenna servo is matchedagainst the genera- Range marks. tor signal thatis produced in the display Angle marks. equipment. If no difference isdetected, the Video mapping. circuit is said to be null. Ifthe antenna error Antijamming control functions. voltage is greater or lessthan the generator Target identification. output, a difference voltageis generated by the differential circuit. Thisdifference, called 11-22. Data selection. Each of the videos error or correctionvoltage, is fed to the used by these display systems incorporates generator to bring the sweepgenerators into some specific limitation of theoriginal video synchronization by speeding up orslowing received by the radar set. For example, clouds down the operation. are usually eliminated fromthe display by use 11-19. In height-finder displays, two setsof of moving target indicator circuits.Jamming generators (servos) are often used.One is for is reduced by anticlutter circuitry. Echoes are nod generation and the other forazimuth reduced by use of main lobe indicator circuits change. These generators function alongwith with suppression of side lobes.Digitizing height-finder radars. Feedback voltagesfrom video returns allows for uniform intensityof antenna servos are used like searchfeedback alltracks regardless of the originaltrack voltages for control of internal generators.A intensity signal being received. Furtherlimita- significant difference in the operation of this tionof displaydatais accomplished by display is that the sweep in azimuth isonly circuits which limit the display to: done on command, while search iscontin- Specific height groups; i.e., 40-60 K ft. uous. in addition, thenod origin is usually or 20-40 K ft. located in the lower left corner of thedisplay. Initial tracks. Nod voltages are shown in figure74 (printed Old tracks. in the workbook). If the antennais stopped at Tracks with ID. 00 elevation, the horizontaldeflection voltage Tracks with beacon. shown in figure 74,A, is maximumand the Hostiles. vertical deflection voltageis minimum. A Weapons. nodding antenna contains all angles of nod between 0° and 30°, as shown in figure74,B. Almost all of the circuits, either generating The horizontal sweep voltagedecreases with thedisplays or limiting the displays, are increases in elevation, and thevertical sweep controlled by switch actions at the console. voltages increase from null with increases in Each switch is wired to the programthrough antenna nod. The relative magnitudeof hori- circuits in the processor. It either arms or zontal and vertical sweep voltages for0° to disarms the processing circuits whichdetect -2° nod is shown in figure 74,C. the data under itscontrol. These switches 49

,1 61 43'2-

seldom inhibit the accumulation of data. different gate outputs whichcause more or 11-23. Thne sharing:. Time sharing isan less intensification on the CRT. Eachgate essential method used with these types of amplitude ultimately results in biascontrol displays. It has the same weight as it did with for succeeding circuits and the CRT. Video statistical displays. and data are usually imposedon top of the 11-24. Programmed. Video mapping is intensity gate. Therefore. the gate amplitude usually performed through a program ofa must be high enough for proper intensifica- video mapper. The display is fed, along with tion, but low enough for the videodata to other data and range marks, into the CRT and cause a further intensification of this display. displayed. Video mapping usually providesa 11-29. Trimmer capacitors, used in aligning map of geographical boundaries; however, it is these circuits, provide two functions.First, not limited to geographicalmaps. Coordi- they allow for squaring of gatewaveforms, nates, data content, and other dataare pro- and second, they allow for amplitudecontrol grammed. of high-frequency (short pulse width)data 11-25. Callup methods. Aswe have men- and video pulses. Generally, considerablevari- tioned,switchesaretheprimarycallup ations in amplitude are possible whenusing method. In addition to switches, lightguns these trimmers. and ornniballs are usedas callup methods. 11-30. Specifications must be followed, 11-26. Typical AlignmentRequirements especially when aligning gate amplitudes. As- for Sweep Circuits. Generally,the sweep sume that the maximum signal into a high- alignments fall into two broad categories.One voltage coupler is 15V and the CRT turn-on is the sweep generator and the other is the voltageis 7V. If an adjustment within the centering. The sweep generator alignmentis alignment were performed and the gate level performed to bring sweep voltage amplitudes were incorrectly set at 12V, the conduction to specification. It may also prescribespecifi- of electron flow within the CRT would be cations for pulse duration, slope angle,and almost maximum (extremely-high intensity). proper phasing. Alignments will usuallyre- Add data or video to the top of the gate quireisolationofbasic sweep generators (amplitude 5V) and clipping within the high- during a phase of the alignment. Prerequisites voltage coupler (HVC) occurs. usually require verification of timingwave- 11-31. The video or data displayed would forms because an improper pulsewidth af- be hard to see because of the clipping action. fects the duty cycle of thesweep generator. However, with proper alignment, a 5V gate After alignment of the sweep generator, align- and a 5V data or video pulse can pass through ment of the combining or controlling circuits the HVC to the CRT without clipping and usually follows. Frequently, capacitors (trim- cause a display with a good contrast (signal- mers) are used in the controlling circuitsto to-noise) ratio. compensate for variables in the operation of 11-32. Focus and other high-voltagecon- these circuits. This allows for a proper overall trols mainly consist of pots (refer to Chapter display. 2 of this volume). Thesemay, however, be 11-27. The cering alignments usually alignment controls on circuits using the high require the use of meters and isolation of the voltage which compensate for ripple. Some of sweep driver circuits. Voltages, sometimes DC these circuits are the high-voltage coupler and and sometimes AC, are read simultaneously focus compensation circuits which correct the while individual adjustmentsare performed. focus at the extreme edges of the CRT. When both meters read thesame voltages 11-33. To recap, alignment of intensity/ within tolerable allowances, centeringis com- unblanking and high voltage includes the plete. It may be necessary to considerthe following: front panel horizontal and vertkalpositions Pulse-width (duty cycle) control. of these controls. If theyare included while Pulse shaping (squaring) control. centering is performed, their positions must Amplitude (gate, levels, and data)con- be at the 50-percent point withinthe control. trols. This allows for operator positioningof the Focus controls. sweep in all possible directions equally. In High-voltage controls. addition to sweep and centeringalignments, intensity and high-voltage alignmentsare performed. 11-34. Perform a Display Character Posi- tion Alignment Study. 11-28. Typical Alignment ofIntensity/ Title:Character Position .4dpistment.Ob- Unblanking and High Voltage. Intensityand jective:Aligndeflectionunitsto provide unblanking circuits contain pots andtrim- characters of the proper size and placement. mers. The pots usually control amplitudes of The objective of this alignmentis clear. Both 50 162 HORIZONTAL DEFLECTION

FRONT PANEL POTS

VERTICAL DEFLECTION KEYBOARD 0

THROUGH Z AXIS

Firms 75. Alignment units with external elements. horizontal and- vertical deflection units are Beam current adjustments. affected. Since these units are parallel as Focus adjustments. previously defined, an interaction (interrela- Character input from the keyboard. tionship) exists. The interrelationship is not between units but within the CRT. Each unit 11-38. Verification of these prerequisitesis is self-contained and has nointerconnection requred before the deflection alignmentis with the other unit. However, a simultaneous performed. combining of the two outputs is required 11-39.Let's move along to figure 76 withinthe CRT inorder to produce a (printed in the workbook). In this figure, the complete display (all other functions being interrelated units are identified. They are: present). If either one is missing, a lack of Intensity circuitzy. height or width (a straight line) results. Beam current circuitry. 11-35. Elements. Viewing figure 75, we see High-voltage circuitry. that a parallel exists. We also see that front Front panel control circuitry panel controls are connected to the units. The Keyboard circuitry. CRT uses the output of each unit, and an input character generator (keyboard) provides 11-40. Notice that in each unit except the data through the Z-axis (intensity) to the keyboard (which is not an integral part of the CRT grids. In this alignment, selected characters provide the visual element needed for display), variable controls are included. They are: adjustment of the deflection units. Also, note An intensity control. that the front panel control for height alters A beam current control. the circuit operation of the horizontal deflec- A raster and focus control. tion unit The same is true for vertical. 11-36. Prerequisites and interrelationships. Power setting controls. From the study of operation and elements, Front panel controls. we see that interrelationships exist and prere- Carefully note that focus and beam current quisites are formed. In the order of their have interaction. Therefore, one controlaf- general priority, the prerequisites are: (1)Power adjustments. fects the other circuitry. (2)Raster adjustments (front panel in- 11-41. Align the deflection units. Moving tensity). into the final phase of our study, refer to (3)Front panel lights and vertical posi- figure 77 (printed in the workbook). Included tion adjustments. arethethree controls on the horizontal (4)Character intensity. deflection unit and the three on the vertical unit. Looking closely at the zero reference 11-37. Character intensity consists of: (vertical) pot and uert gain pot, we seethat Z-axis adjustments. these two controls interact. We also seethat 51

4ti Lisr11

the vert amplitude pot interacts with thevert Identification of specifications and toler- pas (front panel) control. The same inter- ance. actions a controls exist in the horizontal Proper salectionof oireumstances to deflection unit. activate and control the element under 11-42. This arrangement of controls realignment. quires a delicate touch while adjustmentsare Visual recognition of mechanicalassem- made. Proper sequence of positioning these blies from illustrations. controls results in an accurate alignment. 11-43. The technical order which listed the 12-3. Perform Servo Unit Alignment Study. information for this study established the Title: Align the Range Servo Unit. Objective: sequence, not in precise instruction but in its The purpose of this alignment is tomeasure format. Finally, the character position adjuit- and adjust individual controls to specifica- ment routine was followed by a series of tionsto allow for generation of voltages routines which refmed other elements of the through coupling by mechanicalmeans for display unit. positioning the displays on a console. This information provides an answer to step 1 of 12. Electromechanical Devices the procedure which was detailedinthe beginning of this chapter. The purpose clearly 12-1. For the discussion of alignmenton states that all adjustments must be aligned to electromechanical devices, only twoexamples specifications in order to provide an overall are provided. These are aligning aservo unit alignment of the servo unit. It also indicates and aligning part of a printer. The principles that mechanical coupling is involved in the of understanding an alignment in thisarea are servo unit. This shows that feedback position- unique in that, in addition to normalelec- ing, although measured in voltage form, is tronics, some mechanical changesoccur. Elec- performed by mechanical means. The title tronic pulses (voltages or currents)are con- indicates that range data (X and Y)are verted into mechanical action6or work, or involved. Therefore, feedback voltages from mechanical actions are converted into elec- resolvers are to be included in the analysis. tronic data (voltage or current). One sample 12-4. Before going into step 2, we shall examines the alignment of aservo unit which review servo unitstheir purpose and opera- converts two positional datamessages into a vector voltage magnitude. The vector voltage tion. Figure 78 (printed in the workbook) shows a simplified block diagram of aservo causes actions further on in two ferms: (1) unit. It shows an input unit, an amplifier the electronic displacement ofsweep voltages chain, a servomotor unit, a feedback pickoff to a display unit, and (2) the conversion to device (which can be electrically or mechani- mechanical readout unit througha chopper unit. The other example presents cally linked), a nulling device or point, a rate a representa- feedback, and a power source. In the example five selection of an alignment ofa mechanical element in a printer. This alignment in this text, the feedback is primarily elec- isre- trical through mechanical coupling from the stricted to one small segment for presentation drive motor. of the concepts which were outlinedin the first section of this chapter. Research showed 12-5. Nulling. Servo loops operateon the that electronic control principle of positioning a feedback pickoff is provided for the device so that the feedback voltage mechanical actions, so it becomes part ofthe can be analysis. Keyboards, card readers, punches, summed with the input signal to producea tape units, and printers fall into null. The difference between the inputand a classifica- feedback signals tion with electromechanical devices.There- is fed through a chain of fore, the discussion on the printer alignment amplifiersto the"signal windings" of a can also provide an example for analysis of 2-phase 400-hertz motor. The motoralso alignments on these other devices. The inter- contains a "reference winding" which iscon- action of mechanical and electrical assemblies nected to a constant powersource. For motor is closely related in all units. Whenyou do operation, both sets of windings must receive research on your equipment, apply theprinci- power, and the direction of rotation isa ples shown here on the printerto those function of the phase relationships between electromechanical units in your equipment. the two sets of windings. Typical feedback pickoff devices are potentiometers, synchros, 12-2. Requirements. Selected requirements and resolvers. When the motor is correctly forunderstandingalignmentsonelectro- positioned, the feedback will null the input mechanical devices relate to: signal leaving no further drivepower to the Understanding the processing of the im- motor signal windings. The drive motor will mediate circuit or mechanical element. stop at the desired point. 52

4 64 - 12-6. Rate feedback. A refinement is pre- coupled, it may be assumed that the feedback sent in the form of a negative rate feedback-. voltage equals the input voltage. one whose amplitude is a function of motor (2) The amplifier chain which converts the rate of rotation. Without this feedback, the single voltage input into push-pull outputs by motor would have a tendency to "coast" inverting the input to one leg of the output. beyond the actualnullpoint and would Two gain pots are used, one for each line. receive an acceleration in the reverse direc- Noninverting amplifiers provide amplification tion. This could, in turn, cause an overshoot of the signal to motor windings. in the reverse direction followed by another (3) The drive motor which reacts to the reversal, etc., which would set up a continuing amplifier inputs based upon the amplitude of oscillation. The rate feedback tends to reduce the signal; one signal wire is in phase and the drive power as the motor picks up speed, but other is 1800 out of phase with the reference givesvirtually no opposition at very low winding. The motor rotates, and its shaft speeds, such as in the immediate vicinity of rotates the wiper arms on three pots. the null. Therefore,ithelps to eliminate (4) The three pots. Er is an AC pot which oscillation or hunting without destroying null provides a feedback voltage for servonull and accuracy. provides an AC range voltage to the console through the line driver board. Vr is a DC pot 12-7. Direction of rotation. In the 2-phase which is mechanically linked to the motor AC motor, the direction of rotation is a shaft and provides a DC range-voltage through function of the phase relationship between an amplifier board. The AZ gain pot provides the signal and reference windings. A reversal a rate control to the azimuth servoloop by of current direction (phase) in either, but not regulating the rate of change, depending upon both, will reverse motor direction. o range of target data. (5) Reference voltages which are provided 12-8. When the input signal changes (which for the motor and for pickoff voltages for the should drive the servo to a new position), the Pots- difference between input and feedback signals (6) The GAMI and LDRI boards which will result in a signal either in phase or 1800 provide adjustable outputs to other functions. out of phase with the reference signal; this will determine the direction of rotation. 12-12. Before proceedings with step 3, let's 12-9. It should be noted that a reversal of review the extent of the work involved: connections on either, but not both, sets of All controls are pots; therefore, they are motor windings will reverse the current direc- measurable on meters as AC or DC and on tion and, consequently, the motor direction. oscilloscopes. If these phase relationships are incorrect, the Two gain amplifier controls are included servo will drive away from the null position in the amplifier chain. instead of toward it. Each output circuit has a gain control. 12-10.Usingthisinformation and the A level control is also included in both figure, we see that a voltage input signal into output circuits. the resolver provides a signal to the amplifier Potentiometer controls on the assembly chain. The phase and amplitude of the signal are mechanically positioned by the shaft of cause the servomotor to rotate. The feedback the motor. is coupled to the null point. A difference value to the amplifier chain causes the motor 12-13. Step 3 instructs us to identify the to rotate in a direction which reduces the interrelationship of other functions to the voltage into the amplifier chain. This action basic function. Therefore, we must establish continues until the signal into the amplifier where the data inputs are coming from and chain is reduced to null. how they are derived. 12-14. Range voltage, as an input to the 12-11. Step 2 requires the identification of servo, is a product of digital-to-analog conver- the subelements, circuits, and components of sion.Itiscomposed of two distinct and the unit to be aligned. Figure 79 (printed in separate sources which are electronically com- the workbook) illustrates these elements. In bined in a servo unit. This brings these points the sequence of their respective placMg, they into the analysis: are, left to right, as follows: Generation of X and Y data. (1) The input transformer which provides a Range data (X and Y coordinates). method for coupling any difference between Digital-to-analog conversion. the input signal and feedback signal into the Resolver action to combine the coordi- secondary of the transformer. If no signal is nates into one range value. 53

L.. F EEDBACK GAIN OIGITAL X RANGE TO ANALOG RANGE OATA VOLTAGE CONVERTER X X AMPLIFIER CHAIN ."RESOLVER RET SERVO

CIRCUITS

14FLIFIER RET OIGITAL CVAIN TO Y RANGE ANALOG DATA{ =11 CONVERTER

d)FEEORACK ;AIN

INTERRELATED FUNCTIONS

Figure 80. Interrelated functions and servo unit.

12-15. Taking the reverse method of iden- a foldout in the workbook). We do this now tifying the interrelated functions shows that so that you can grasp the full significance of the resolver feeds the range voltage to the this discussion. servo unit (refer to fig. 80). The resolver has 12-19. Step 4 requires that a sequence of two inputs: an X coordinate range voltage and alignment be established with reference to a Y coordinate range voltage. These voltages interrelated functions. Refer to figure 81, and (AC) are developed from the amplifier chain locate the test chart between the D/A con- and digitt.1-to-analog converter circuits from X verters. This chart shows test 4 with 64 miles and Y digital range data. in an X coordinate and test 5 with 64 miles in 12-16. A review of the text on this cir- a Y coordinate. cuitry gives us the following specifications 12-20. The next phase is that of determin- about the interrelated functions: ing the sequence of functions of interrelated (1) X and Y data can be programmed by units.Obviously,the D/A converter and selecting the off-line test mode of operation, amplifier chain preceding the servo unit must and a range coordinate of 64 miles is equal to be aligned properly in order to align the servo the reference voltage of 5VAC. accurately. Since there are two paths, one for (2) The feedback pot of the amplifier chain X and one for Y, we have a parallel situation. is 10K ohms in series with 100K ohms and is Either one may be aligned first. Verification thereby limited to 10 percent. Further, since of range data in binary form as inputs to the the signal is in AC in the range of 5VAC, a 10 D/A converter is a prerequisite. Verification percent or less change i3 not measurable on an of the 5-VAC refere:ice voltage is a prerequisite.Operation of the azimuth servo unit oscilloscope; an RMS (AC meter) is required. (since resolver B2 is a part of this unit) is a 12-17. From these items, we can see that a prerequisite. defmite interrelationship of functions exists. 12-21. Prerequisiteverification.Step 1: The following prerequisites are given which verify digital data. Step 2: veiiy unity gain now have meaning: from amplifier chaintor h X and (1) The alignment is performed in off-line measured at AZA4Xki -6 and l(A8-6 of dri,,er test mode. boards respectively. Step 3: vcify that output (2) Selected switch settings are used to from R3 measured A2A2XA8-4 a equal to provide X and Y range data to the D/A output from amplifier chain. Thic completes converters. zhe verification of interrelated functions. One (3) Gain ratios of related functional ampli- factor not identified, but significant, is that fier chains are to be in unity. for verification of R3 output to equal 64 (4) Resolver B2 (part of the azimuth servo) miles, either disabling of X while measuring Y or disablingof Y while measuring X is must be properly oriented. paramount. A combination of X and Y results 12-18. These four prerequisites definitely in a coordinate range other than 900 or 180°. establish a sequence of operations which must 12-22. Align the servo unit. The fifth step be properly verified before alignment of the requires the alignment of the servo unit. Two servo unit. At this point, we are substituting points are examined: first, a new unit is to be the complete pictorialoftheservo and installed and aligned, and, second, an existing interrelated functions in figur 31 (printed as unit is aligned. 64

....M...... 1.1M131.11.1M.... LI 5-7 a.Before installation positioning of tl-e Ls to adjust the clearance betwe&the space pots Er, Vr, and AZ gain, adjustments must pawl and carriage rack teeth when the arma- be made. Using an ohmmeter, set all three ture is energized. The second requirement is pots for very close to a short: for Er, pins 2 to position the space magnet and armature and 3; for Vr, pins 7 and 8; and for AZ gain, when the armature is energized. The third pins 9 and 10. After installation and power requirement isto adjust the clearnnce be- check, alignment is performed on zero ampli- tween the stop plate and the space pawl when fier Loards A2A5XA7 and XA3, which are the armature is energized. This alignment may shown ontheright-lower portion of the be completely foreign to manyomputer drawing. technicians becauseitinvolves niechanical b. The remainder of the alignment is thealignment; therefore, we provide this brief same for either a new installation or realign- review of the printer. In the operation of this ment of an existing unit. Use a pure 64-mile impact printer, two characters are activated ither X or Y into the servo. Er must measure within a specific time interval (print cycle). 5VAC. With proper operation of the null The characters are printed on the paper by point transformer, measured voltages at both hammers. After printing the characters, the test points in the servoamplifier chain are set. carriage is moved to the left, and the opera- The output of the line driver board processing tion is repeated. A space hAtween words is Er signal is set to a gain of unity. Finally, the treated by the machine as a character. A GAMI board gainissetto the value of rather complex mechanical assembly (fig. 82), 17.24VDC with the entire test problem 4 controlled electronically, is incorporated into inserted (X and Y, reference chart). The the printer. The logic package provides de- alignment is complete. All internal subunits coding which releaser a pawl for spacing and operate properly. All interrelated functions allows a spring to puil the carriage to the next have been identified and verified or aligned. A position. It is in this carriage that the align- complete picture of the unit is presented, and :lent must be performed. an undergtanding of its operation, purpose, 12-24. Spacing theory. An explanation of and function is clear. the spacing theory follows: .2.The spacing mechanism (fig. 83, printed 12-23.PerformKeyboard-Printer-Punch in the workbook) consists of a magnet (coil), Space Alignment Study. Title: Space Magnet, armature, bail, rack, pawl, and carriage feed Space Pawl StopPlate, and Space Pawl spring. The carriage feed spring exerts a Clearance.Objective: The purpose of this constant pull to the right on the carriage. The alignment is threefold. The first requirement carriage is kept from moving by the engage-

STOP CARRIAGEPLATE RACK CARRIAGE BAIL SHAFT SPACE PAWL FEED BELT

SPACE COIL

ARMATURE CARRIAGE FEED SPRING DRUM

Figure 82. Mechanical printin carriage. 55

t3 7 14.57

ment Of the pawl in the rack. The pawl is (6) Carriage feed spring, lower right. mounted on the carriage in away that allows (7) Stop plate, upper center. it to engage the spacing rack. When the circuit emits a space impulse, the magnet energizes and causes the armature to move down. As it 12-27. The three objectives of this align- does, the bail rotates counterclockwise when ment are shown in the blocked-inareas. A is viewed from the left side. The bail contacts forspacepawlandcarriageclearance, the bottom of the spacing pawl, causing the blocked-in area B is for the space magnet and pawl to move down and out of engagement armature, and area C is for the space pawl and with the rack. stop plate. Each of the blockedareas is b. The magnet is held energized forap- expanded for discussion in figure 83 (printed proximately 4-6 milliseconds. This isjust in the workbook). When studying this figure, enough time to get the pawl out ofengage- combine the use of figure 82 and those in ment and allow the carriage feed spring to blocked areas A, B, and C. Specific tolerances pull the carriage a short distance to the right. of individual adjustments are not included When the magnet deenergizes, the mechanism now but are listed in the final element. is reset by the bail spring and the pawl spring. 12-28. Step 3(fig. 66, printedin the c.. The rack is spring-loaded to the left. workbook) requires identification of interrela- When the pawl leaves engagement with it,the tionship with other functions, and figure 84 rack spring causes it to move toward the left. (printed in the workbook) shows these. The As the pawl reengages, the rack willmove mechanical assemblies and electronic assem- slightly. This slight movement is enough to blies are shown in block-diagram form: the absorb the energy which the carriage has built mechanical in dash-enclosed blocks and the up. The rack stops against a small rubber electronic in solid-line enclosed blocks. bushing which cushions the bounce. 12-29. The interrelationship serial andparallel sequence as required by step 4 isas 12-25. Two methods of spacing. Two follows. Refer to figure 84. Before the align- methods result in providing groundto the ment of space pawl clearance, space magnet space coil and thereby activating the space and space pawl/stop plate adjustments, the mechanism. These are shown in figure 84 space pawl rack clearance is accomplished. (printed as a foldout in the workbook).The Before this alignment, space bail is positioned. first method is that of depressing the spacebar Before these two alignments, space armature on the keyboard. This action results in bail and shaft end play adjustments are made. This latches closing and generatinga binary code shows you that four elements are prerequisite of 0000010. This code is detected in printer to thealignmentinthis analysis in the logic in the function detection, andis sent mechanical area. through the function register to themanual 12-30. In each case of this alignment, the input of the space circuit. The secondmethod coil must be energized. Therefore, an electri- is the automatic sensing of the end-of-print cal path is obtained through ground toener- cycle. Since time is allocated for printingtwo gize the coil. Already identifiedare the two characters before spacing, the print cycle ends paths for obtaining groundmanual andauto- with detection of both hammers fired. This matic. Note in figure 84 that R4 of thespace action sets the automatic detection gates in circuit is a control in the single-shot circuitry, the space circuitry and providesa ground to and it provides a variable pulse width. Consi- the coil. deration must be given to this circuit output when operation of the printer spacingis 12-26. Align the printer space elements. performed. Too short a time intervalmay The second element of figure 66 (printed in provide insufficient time for proper operation the workbook) requires identification of sub- and may mislead a technician into adjusting units of the function to be aligned. To do space clearance. The opposite is also possible this, refer again to figure 82. This figure isa if too long a time could cause a skipor double view of the carriage assembly and shows each space and again lead the technician astray. of the elements of the space mechanism. To Farther back in the circuitry, the hammer repeat them and identify each as shown, they control circuits also have pulse-width are: controls.Improper adjustment of thesemay (1) Magnet (labeled space coil), lower left. influence the spacing and cause improper (2) Armature, lower left. selection of space timing. Finally, although (3) Bail, upper right. thissubject of troubleshooting isnot in- (4) Rack, upper right. cluded, a processing or decoding failure could (5) Pawl, upper center. lead the technician into realignment of these 56 66 units when misalignment is actually not the Class 1 'Cla.ts 2 cause. Receive, Store, Provide Data Only (read only) and Provide 12-31. For thefinal element, figure 83 a. Cores a. Storage tube (printed in the workbook) provides an ex- b. Drums b. Integrated(program memory) ploded view of areas A, B, and C, as noted circuit (IC) above. In each -Ease, specifications of toler- C. Disk c. Capacitorreadonlystorage ances are included for visual acknowledgment. (CROS) d. Delay line d. Trancformer read onlystorage The routine requires: (TROS) a. Verification of input data, completion of e. Thin film e. Programs prerequisite spacing alignments, and power. f Tape b. Alignment instructions which identify eachscrew tobe turned, loosened, and 13-3. Similarities exist between the two tightened, and the final securing of screws. classesin the sense that all require, at a minimum, each of the following functional areas: 12-32. Completion of the task is relatively Timing. simple. Verification of mechanical prerequi- Addressing. sites requires use of oneofthe systems Interface circuits. outlined in -thefirst part of this section. Read logic. Verification of correct pulse width of the Memory device. ground enable pulseis measurable on an oscilloscope. Complete understanding, verifi- 13-4. By contrast, although class 1 devices cation of prerequisites, validation of entries, require write control logic and erase control, and accurate alignment of the steps listed inthe read only memories do not. the routine insure operational capability. 13-5. Types of Access. The similarities of different memory devices can be further defined by the type of addressing media used. 13. Memory Units Currently, the two modes used most exten- 13-1. The coverage of memory devices sively are the random access mode and the presentedinthechapter on adjustments sequential access mode. The two modes are defines in detail the many types of these well defined, and you have studied each. The devices currently in use. The different adjust- random access mode allows for rapid entry or ments were discussed. Alignments of memory recovery of data without limitations, while units require, in many cases, a repetition of sequential access requires an address to await the adjustment tasks. For example: Adjust a its turn to memory. The systems in the table drum read/write head. Normally, one set of given above can be categorized once again instructions establishesthe procedure, and into the address modes. The following table each head is adjusted the same way with the shows the access commonly used with the same instructions. Completing adjustment of system: all the heads constitutes a complete alignment. The same situation exists for read/write Either or amplifiers, tape heads, disk heads, and other Random Sequential Combined Mode memory devices. Consequently, this section a. Core a. Drum a. Disk does nct present an example alignment. It b. Storage tubeb. Delay line b. Thin film does present some significant data about the C.IC c. Program c. Program types of memories, principles, classification, d. TROS d. Tape and a comparison of the read/write cycles e. CROS most frequently used. 13-6. Types of Memory Address Circuitry. Four types of address circuits are widely used 13-2. Types of Memory Units. At present, in computer systems. They are: there are approximately 11 different types of Registers. memory devices. Each one iscapable of Counters. providing data to a machine in language that Decoders. the machine miderstands. However, not all of Matrices. them can accept data from the machine for storage. In the interest of clarity, we list the 13-7. Each of these types may be com- types according to two classes: (1) those that posed of a variety of circuits. Most exten- can receive, store, and provide data, and (2) sively used is the flip-flop; it is used in the those that can provide data only. register, counter, and decoder. Combinations 57 of flip-flops, transistors, or integrated circuits frequently used. For example, refer to figure can be used to form ring counters or stepping 85. It shows a shift register. Assume that the counters. In addition, resistive ladders can be input (parallel data) is loaded at a megahertz used in registers and decoders. Diodes, ICs, rate. Only one timing pulse of 1 microsecond and transistorsare used extensively with duration is needed to dump the data into matrices and decoders. storage. Assume that the data message which 13-8. Types of Read/Write Cycles. There is dumped is properly formatted for serial are two basic types of read/write cyclesthe transmission. Clocking of each stage of the destruct (volatile) and nondestruct (nonvola- register results in a shift. If the clock is lacla tile). The destruct read/write cycles which are Hz, then, bit by bit, the data is shifted out. most commonly used in core memory units The same type of unit may be used to receive require that a change in state (usually hystere- data. In this case, serial data is received and sis) take place in order for current induction shifted into the register. Upon receipt of the into the read logic circuits. Then the data is last bit, a megahertz timing pulse triggers a usually rewritten into the same location for readout in parallel. So, one functional require- future use. In the nondestruct read/write ment which is usually needed for message cycle,data from memory is sampled by processing is an ability for serial-to-parallel or various modes with no change to the memory parallel-to-serial conversion. You might have media. The representative examples of this also associated the speed times and their type of memory are magnetic tapes, disks, changes. Speed of data flow is a functional drums, thin film, punch tapes, and delay line. consideration. Also included in the class of nondestruct 14-4.Speedreduction/increase.When readout memory units arethe read only receiving or transmitting, data messages are memories.These units are fixed program caused to change their rate of speed per bit. elements which are activated by input control This element is called frequency conversion. and sampled during read. The primary conditionto be maintained during the frequency conversion is the abso- 14. Message Processors lute accuracy of data content. To accomplish this a frequency divider may be used when 14-1. Message processors (MPs) provide a data stored is shifted out at the rate of 1 bit distinct function for data processing. They each time that the divider produces a pulse. accept input data and convert it to a language Data, for instance, may be loaded into a acceptable to the machine. They also prepare cyclic register (fig. 86, printed in the work- data for transmission media. Of necessity, one book). Timing, coincident with the data bit of the primary requirements for circuitry followingthepreviouslytransmittedbit, within the unit is modulation and demodula- causes succeeding bits to be selected during tion. each cycle. The process slows transmission. 14-2.RequirementsforCircuitry. To An example of this method is shown in figure achieve modulation or demodulation, many 86. The cyclic storage loop loads data at a methods may be selected. Along with the rapid rate; 1 bit per timing bit 1. However, variety of methods is a wide range of circuits. data bits are shifted out at a much slower Functionally, though, a limited number of rate. Notice that timing 2 is set to occur once requirements can exist. These requirements each cycle plus 1 bit. Therefore, each time must be satisfied throug'l design of circuits that coincidence occurs at the gate, a succeed- which are compatible with parameters of the system. 14-3. Serial-to-parallel and parallel-to-serial I 3-NSEC GATE conversion. Almost without exception, mes- I-USEC (OUTPUT) sages are transmitted over a media in serial GATE SERIAL form. Also, data is processed in EDP units in parallel and serial form. We know from our study in Chapter 2 of this volume, that the EDPs are presently operating at rates up to 3 megahertz, but serial transmission operates at MULTI- PARALLEL TO SERIAL PARALLEL SHIFT REGISTER audio rates (1300-2400 Hz). Message pro- DATA cessors, therefore, often contain conversion INPUT circuits. The various types may be flip-flops, binary cores, and monolithic shift registers. These circuitsare almost always operated with timing as the controlling factor. Two or more separate timing gates or pulses are Figure 86. Shift register. 58 4 7. 0 1441 20.8 KHTZ (SHIFT) SERIAL DATA FROM EDP MESSAGE SERIAL DATA CONSTRUCTION UNIT

47 BITS 1"1 REGISTER #2

BLANKI RUN LENGTHI TIME IN MESSAGE PARITY IA2IMUTH RANGE BUSY 9 BITS I 10 BITS BIT PARITY 3 BITS STORAGE LABEL BIT 12 BITS 5 BITS 5 BITS HIRT BIT I DATA REGISTER SERIAL IN/SERIAL OUT

SERIAL DATA

1300 HI I300CPS 01GATE 11. PHONE LINE SINE WAVE

(DIPOLE) Figure 87. Data processing (output). ing bit of the message is gated out. e Switching networks. 14-5. This same cyclic loop may be used to Triggering. input data messages into an EDP. Received Decoder units. data can be loaded at the receive transmission Encoder units. rate. When loaded, timing 1 initiates a high- 14-7.Switches,triggeringcircuits,de- speed shift out. Timing also brings into focus coders, and encoders may use an assignment anotherfunctionalconsiderationtime of numerics representing a speciAed priority sharingwhich is sometimes called time divi- system for the processing of multimedia data sion or multiplexing. messages. Counters and switching networks 14-6. Time sharing. A message processor oftenoperateonarecyclingprinciple. may be designedtotransmit data to, orThrough the priority circuits,all channels receive data from, a number of different may have equal time for access, or selected stations or devices. A system of priorities may (high-value) channels may have more than one be established to accommodate all stations. access period per cycle. Now that you know Sequencing, on a recurring cycle basis, may be something about message processor require- used to allow all media to gain access. To ments, let's examine some of the different accomplishthisfunction, time sharingis types of message input/output processors. incorporated and various forms of circuits are 14-8. Typical Message Input/Output Pro- available. Some of the typical circuits used cessing. The objective to be attained in the are: study made here is to identify the common Switches. goal of preparing messages for transmission to e Counters. another media without real concern for mes-

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1 TIN DAT HO ISST SIIw(SSGt ItACK10;;Ti0O SOSLC. Nuoilts tof,

T1 Is TS Nos ,iod:4:nt.oloC, OIS os° no...! otOl t., : oOtkoL4o0.1S

Figure 88. Message processor. 59 sage content. The study presents a few ex- board, an operator types his message and the amples of conversion of digital messages into machine converts it to digital (we discussed forms of voltage patterns which are accepta- this under keyboards in Chapter 1). Data bits ble to txansmission media. which form the message are loaded into the 14-9. In figure 87, data from the target output parallel-to-serial shift register where processing equipment is routed through the they are serialized and modulated into a message construction unit which slows the complex waveform. This waveform contains data bit rate (frequency converts). The data phase shifting and amplitude modulation of a message is then shifted out cerially with a basic carrier frequency. The data bit groups (8 1300-hertz shift pulse. It goes to an output bits)are converted intotones within the gate where each binary one produces one modem. The tone is dependent upon the ones cycle of a 1300-hertz sine wave, and each and zeroes combination in each character and binary zero produces a voltage level. In figure the transmit bit rate. The tone generators 88, the digital message is composed in the cause a composite phase shift equal to the unit preceding the message processor. You sum of the detected data. The phase shift can see from the figure that this message signalis superheterodyned into the phone contains many more bits of data; however, lines at a 0-to 3-kHz rate. coming into the message processor, the simi- 14-11. Alignment instructions, given in the larity is close. The data sampler and control technical order, prescribe exact prerequisites switchcircuitsconsistofflip-flops. Each for sequence. binary one causes a change in states. The 14-12. Perform a Data Detection Circuit output of the data sampler triggers the appro- Alignment Study. Title: Signal Level Detector priate frequency generator (one of three), and Alignment. Objective: The purpose of this the generator produces continuous outputs alignment is to adjust the receiver sensitivity until the data sampler unit senses another to inhibit message processing of incoming binary one. A change in the state of a flip-flop data when the received signal level is too low. resultsinselection of another frequency This alignment is performed in a modem unit, generator, and the cycle repeats. The resultant and the circuit functions similarly to the noise output is known as frequency shift keying. canceler circuit in a quantizer. If the receive 14-10. The third example, shown as figure levelof a transmitted data message drops 89, representsa typeof message which below a specified db level, the data-to-noise contains data other than machine initiated ratio drops. Below a specified ratio, noise can data. Thisisthe portionof the message be interpreted as data just as noise can be labeled operator inserted data. Using a key- interpreted as radar video input to a quan-

PARITY OPERATOR INSERT ED CLARITY NM NM NM CHA RAC T ERS EOD LFCR SPACES (2 EACH) DATA I', CHARACTERS) (2 cHA RAC TERS)

ORIGINATOR MESSAGE SPACE INPUT 46.C(S 1OUTING PART OUTPUT ADDRESS OR LCFR LSD (5 CHARACTERS) .1 CHARACTERS) SYMBOL NUMBER NUMBER 0' 5001 12 CHARACTERS) (1 CHARAC TERS)

NM NO MESSAGE 150 LEAST SIGNIFICANT EDO END OF DATA 9 ROUTINE MESSAGE LFCR LINE FEE0 CARRIAGE RETURN Wm START OF MESSAGE

01 DI 00 DT 06 05 04 03 02 DI Do

TO THRU T7I SHIE SHIFT REZISTER MODULA TOR PARALLEL IN,SERIAL OuT SERIAL DATA (MODEM,

AmPLITUOE AND PHASE MODULATED OUTPUT 0-3 ,(142

TIMING .1 DA TA INPUT

Figure 89. Modulator output unit. 60 r c.--- tizer. Therefore, this alignment is performed tion of data is directly related to the opera- to insure that only data received at the proper tion of this circuit. Verification, then, of data, db level is processed, and that noise received valid data, or no data may be directly related at a low db level is inhibited. to positioning of the level detector pot. 14-13. Processor theory. The demodulator 14-20. For the alignment to be performed, section of this modem receives a frequency substitution of input db level signals is made shift modulated (FSM) signal input from a by use of a signal generator, electronic coun- 600-ohm balanced transmission line. When no ter, AC voltmeter, and multimeter. Refer to dataisbeing received, the input tothe the level detector circuit in figure 90 (printed demodulator consists of alternate ones and in the workbook). zeroes. 14-21. The input to the level detector 1444. When incoming data is received, the should be approximately +3V. If the adjust- front end of the unit references the data to ment has been made correctly, Q19 is held at modem ground, amplifies thesignal, and cutoff, and Q20 conducts while Q21 is held at detects the data. It also causes the data to be cutoff. This provides a +5V level and enables synchronized with the receiver timing. the data to be processed. Should the input 14-15 An automatic gain control (AGC) drop below this acceptable level, Q19 con- civcuit is also incorporated into the front end ducts, Q20 cuts off, and, with Q20 cut off, a ai.... regulates gain of the amplifiers much as a positive voltage is felt on the base of Q21 radio AGC circuit does. This AGC circuit also causingitto conduct. Since Q21 is con- influences the level detection circuit opera- ducting, its output goes to a low logic level tion. and prevents the data from passing through , .. 14-16. The normal flow of data, as shown the inhibit gate. in figure 90 (printed in the workbook),is 14-22. Establishing the proper operating indicated by the heavy line passing through level of the detector circuit requires that a 6- the blocks. The signals pass through: to 24-microvolt RMS transformed input signal Bandpass filters. provide a 5VDC detector level output and Equalizers. that a 5-microvolt RMS input signal provide a Shaping circuits. OVDC level output. This indicates that 100 Phase shift networks. percent of the noiseisinhibited with a Discrimination circuits. magnitude input of 5-microvolt RMS or less. Also, this indicates that weak data and strong 14-17. Align the level detection unit. Step noise with magnitude between 5 and 6 micro- 2 (fig. 66, prin+ed in the workbook) requires volts RMS cause the detector output to be an identification-.s.f the circuits within the 5VDC. and above 6 microvolts RMS, the alignment. To facilitatA: illustrations and unify output provides a 5VDC level. The TR (transi- the text, the heavy blocke-Lin area containing tion) level arms the data gate. the level detector is included with the interre- 14-23. Based upon information presented lated circuits. This is normally a function of in this section, we can see that for alignment step 3 (fig. 66). to be meaningful: 14-18. Interrelationship of the level detec- Incoming and outgoing data conversion tor circuit to other functions shows (in fig. must be understood. 90, printed in the workbook) that it is almost A unit usually processes data in serial like a generator. It is nearly independent, and fashion, and later in processing converts allother circuits are dependent uponits the data to parallel. operation. The TR pulse is a feedback pulse Multiple input source use of message and is generated asa result of all circuits processors may be used but on a time- functioning. The TR pulse provides a DC level sharing basis, again restricting the proces- plus pulse to the AND gate which is pro- sor to coding or decoding individual cessing data. Should it be an improper level, messages. no data processes. Alignment routines generally require ex- 14-19. This alignment presents us with a tensive use of AC (RMS) meters, fre- situation slightly different from those previ- quency and electronic counters, signal ously discussed. The level detector circuit is generators, and oscilloscopes. an input control device and causesall other Steps in alignment are usually sequenced control devicesto be dependent upon its to allow for proper processing proce- setting. In this analysis, it is necessary to look dures. ahead to find that understanding. Interrup- Prerequisites are usually identified. 61

4 72) '441

CHAPTER 4

Programming

AS THE AIR FORCE entered thespace age, ments in the quality, effectiveness, and in- the need and use of electronic computer s truc tioncomplement(lessinstructions systems increased. One of the first large-scale needed to perform the same functions) of the computers to evolve was the AN/FSQ-7. This software have resulted in greater reliability computer was, andstillis, usedinthe and maintainability of computer systems. In Semiautomatic Ground Environment (SAGE) other words, your job as an electroniccom- System whichisan aircraft control andputer systems repairman continues to be warning system. The mission of SAGEre- simplified as the computer industry continues quires its computers to perform specificoper- to make state-of-the-art improvements. With ations rapidly, accurately, and most iznpor- all of these improvements, you will find that tent, reliably. Because of the immense size of many of the basic theories associated with the an AN/FSQ-7 computer (it uses approxi- software and hardware of the first large-scale mately 50,000 vacuum tubes and thousands computers can still be related to many of the of other electronic components), a team of newer systems of today. engineers was assigned the task of determining 3.In this chapter we are primarilycon- its reliability. Their study showed that this cerned with programming, but we do not computer would experience its first failure intend to try and make a programmer out of after approximately 32 hours of operation. you. The programming we will study here is Even more astounding was the fact that once maintenanceprogamming.A repairman the initial failure was corrected and power doesn't need the depth of programming restored to the equipment, another failure knowledgethatacomputer progammer would occur almost immediately. In order to needs, but he does need enough knowledge of increase the reliability of this system, two maintenance programs to: complete AN/FSQ-7 computers were used. Analyzecomputer maintenancepro- (You will recall that this is known as duplex- grams. ing or redundancy.) Also, a marginal checking Interpret computer maintenance pro- system was used to increase the mean time gram printouts. between failure (MTBF). Marginal checking provided for the detection of weak compo- 15. Analyze Computer Maintenance Programs nents before they had a chance to fail. In an 15-1. You are probably thinking, "These attempt to simplify ANIFSQ-7 troubleshoot- guys have got to be kidding if they think that ing and reduce downtime, maintenancepro- a CDC can teach me how to analyze all the grams were developed. The first printouts that maintenance programs associated withmy were provided by these progams contained computer system." We will be the first to large amounts of information, some of which admit that analyze is a big word. The part of was in no way related to the problem area. Only the definition of analysis, as found in most after considerable refinement were thesepro- dictionaries, that we are concerned with here grams and their printouts useful as a znainte- is limited to: the separating or breaking up (of nance tool. any whole) into parts so as to find out their 2. As the saying goes, "You've come a long structure, proportion, relationship, and func- way, baby," so too have our computer sys- tion. This is what we intend to do. We will tems. Computers have advanced through vac- look at maintenance programs as a whole; in uum tubes, transistors, and microelectronics other words, how does a maintenance pro- into modular systems. Newer computersys- gam function in the hardware to identify and tems have virtually eliminated the need for isolate malfunctions? You 'willrecall that duplexing and marginal checking. Improve- earlier we stated, "Many of the basic theories 62 used in the software (in this instance, mainte- one program. This program ispermanently nance programs) for the first large-scale com- stored or wired in the computer. The term puters can still be found in the software of normally associated with this type of com- the newer systems." This fact would seem to puter is fixed program. The general-purpose enforcetheadage,"Thetheorydoesn't computer is designed to be used for a variety change but the application does." Think of purposes. This type of computer is a stored about that. program computer which employs some type 15-2. Maintenance Program Defined. Just of electro nic mass mem ory. what is a maintenance program? What is its 15-5. Your technical school training should function, and how does it perform its func- have taught you that a program, whether tion? These are questionsthat should be fixed or stored,directsthe computer to answered one at a time: perform a series of actions in accordance with a. A maintenance program is any program a specific plan. The computer automatically designed to indicate whether or not a com- calls out each instruction in sequence, inter- puter is capable of performing its intended pretsit,and performs as the instruction function. When improper operation occurs, commands. The wired-in logic which controls the program must specify the cause of the the automatic functions is, in fact, a wired failure, and, if possible, it must designate the program, but it is c.assified as system hard- corrective action to be taken by you, the ware along with all nonlogic componentsof repairman. From this, you can see that Lhe the computer. A stored program, whether term "maintenance program" includes relia- stored in memory or on any other media bility,diagnostic, overall, and confidence- inside or outside the computer, is classified as diagnostic programs as well as hard wired system software. programs. Many programs such as the on-line 15-6. Fundamentals of Maintenance Pro- (on-line as used here is synonymous with grams. In performing its primary function of active, operational, and main control) and insuring system integrity, the maintenance utility programs may give some indication program performs two fundamental tasks: (1) that an error is present within the system, but fault detection, and (2) fault isolation. Fault normally they provide very little aid to the detectionisthe action of the program in immediate maintenance effort. recognizing malfunctions which might exist. b. The primary function of a maintenance Therefore, it is the most important task of the program is to insure system integrity, i.e., to maintenance p-ogram. Fault isolation is the locate any existing or impending failure. action of the program in isolating the mal- c. To adequately perform its function, the functions. To perform these tasks, mainte- maintenance program must attempt to treat nance programs are designed to: all circuits in a manner which approximates Exercise the hardware by using pro- the ultimate applications of the computer. grammed instructions. This criterion can only be met by treating Check program results against known computer eircuits as strenuously as possible. standards, constants, and programmed instructions. 15-3. A maintenance program is used as a Alerttherepairman whenevermal- maintenance tool much as ap bscilloscope and functions are detected and isolated. This a screwdriver are used. Therefore, it is neces- can be done through the use of machine sary that you know the functions, capabil- printouts, indicator lights, CRT displays, ities,and limitationsofthe maintenance programmed error halts, audible alarms, program just as you must know the functions, or a combination of these. capabilities, and limitations of the handtools that you use on the job. Your ability to select 15-7. Later in this chapter we will present and use the right handtool for a particular job and discuss examples of several maintenance comes through experience. This fact is also program flow diagrams. This should reenforce true with maintenance programs. Your ability your understanding of how program routines to select and use the right program for a detect and isolate malfunctions. particular failure will increase as you gain 15-8. Failure Classification. The design of more experience on the job. the maintenance program isbased on the 15-4. Maintenance Program Considerations. particular system's hardware, its function, and Recall from your earlier training that there the type of task the program must perform are two basic classes of automatic computers: i.e.,detect and/or isolate failures. System (1) special-purpose, and (2) general-purpose. failuresfall generally into one of the three Special-purpose computers are designed for categories discussed next: one specific purpose and usually require only a.Catastrophic. This type of failureis 63 40.4

continuously present (steady state) until it is systems. Basically, the technique is a method repaired. It is normally easy to detect and of preventive maintenance in which certain isolate. The symptoms and fault indications operating conditions are varied from their of a catastrophic failure are very often clear normal values in order to detect deteriorating enough to allow the selection of a mainte- components. The amount of variationneces- nance program thatwillsearch out the sary before a component malfunctions indi- trouble froma limited group of circuits cates its margin of reliability. Sincecompo- within the suspected trouble area. However, nent values normally change withage, the at other times, it may be necessary to run a marginal check is a valid indication of how group of programs on a major unit or the soon a component will need replacing. The entire system in order to isolate the failure. most widely used methods of marginal check- b.Intermittent. You can really "lose your ing found in many of our computer systems cool" and become quite frustrated when are the variation of AC vacuum-tube filament troubleshooting an intermittent failure. This voltage and the variation of DC supply volt- type of failure is not continuously present age. In older computer systems, these voltage within the hardware; it occurs only once or at variations are applied automatically under the random intervals.Because itappears and.control of maintenance program instructions disappears at random, the intermittent failure or manually by the repairman. Many of the presents an inconsistent set of symptoms and newer computer systems still use the marginal becomes extremely difficult to isolate. checking technique, but only manual voltage c.Machine state. This type of failureis variations are used. present only under certain conditions, such as 15-13. Multiple clue approach. Oncean after a certim sequence of instructions, after error is detected, a program ming the multiple a specific instruction followed by a delay in clue approach attempts to obtain thesame time, or at a particular pulse repetition rate. error using varying sequences of instructions. If the error can be detected in a variety of 15-9.MaintenanceProgrammingTech- ways,itisonly necessary to locate the niques. There are many possible programming common conditions in isolating the error. techniques which may be used to locate 15-14.Process of elimination.You will find failures within the system's hardware. Five of that certain errors in the computer system are the major techniques that are used in system verydifficulttoanalyze. However, itis maintenance programs are explained in the possible for a maintenance program using the next five paragraphs. As you read through process of elimination technique to aid you in eachtechnique, try and relateitto the locating errors.Inthis technique, sets of systems maintenance programs that have be- programmed routines are used to vindicate come familiar to you during your training. one area after another and, by a process of 15-10.Start small.This technique, as the elimination, to infer the error to be in the name implies, starts its operation by checking remaining area not checked. a small number of key circuits. These circuits 15-15. Types of Maintenance Programs. are then used to check another small group of The terminology associated with the various circuits. This process uses a continually ex- types of maintenance progams employed in panding group of proven circuits to check out your computer system may be different from other groups of circuits until the total area those in the following paragraphs. However, within the scope of the particular mainte- from theexplanation of each type, you nance program is checked. The "start small" should Ise able to relate their functions with process is thorough and well suited to diag- the programs in your system's program li- nosing catastrophic failures and some types of brary. intermittent and machine state failures 15-16. Reliability program. The basic task 15-11.Startbig.Maintenance programs in this type of program isto verify that a using this technique are designed to test the specifiedportion, or logical area,of the computer while itis operating in a manner system is functional. Therefore, the reliability similar to its operational mission. Because program stresses fault dekection and generally many sections of the computer are operated minimizes isolation. Theoretically, if this type simultaneously when the "start big" tech- of program runs successfully (without a fail- nique is used, certain catastrophic, intermit- ure indication), the circuits checked are in tent, and machine state failures (which would proper operating condition. normally escape the attention of a "start 15-17. Diagnosticprogram.The diagnostic- small" program) are identified. type program is constructed to isolate known 15-12.Marginal checking.Marginal check- failures. The emphasis is on isolating failures ing is a must in many of our older computer to a restricted area and, when possible, to the 64 component that failed. Generally, a diagnostic 15-21. Methods of Failure Detection and program doesn't attempt to integate large- Isolation. The typical causes of failure listed scale operations or to isolate failures associ- above will ultimately reveal themselves as ated with the operation of widely divergent belonging to the failure classifications which areas of the system. It may begin by checking were described earlier-i.e., catastrophic, in- acircuit and then include another small termittent, or machine state. As we indi- increment of circuitry for each successive test. cated, eachclass of failure requires that This processisextended until all circuits maintenance programs use specific program- included in the program have been checked. ming techniques in the detection and isolation The diagnostic programs used in modern day process.The programming techniques dis- computers combine reliability and diagnostic cussed previously are used to apply special programming. Thus, the maintenance func- fault-finding test routines. These routines may tion is enhanced since one program exercises range from simple pattern control routines to the circuitry and provides for detection and lengthy and detailed timing checks. In gen- isolation of malfunctions. eral, the electronic construction of the area being tested determines the type of test 15-18. Overall program. Major applications of this type of program are in such areas as routines to be performed by the maintenance programs. Itisbeyond the scope of this drums, disks, inputs, and outputs. The overall course to list and explain all of the mainte- program starts big using the entire area under nance program test routines associated With test, and then it uses the multiple clue and each computer system. However, the test process of elimination techniques for error routines that we will explain are representa- detection. Normally, an overall program con- tive ofthe maintenance program routines sists of the reliability, diagnostic, and mar- used in many of the computer systems in gmal checking (if used in the system) routines your career field. Along with some of our necessary to check an equipment area. explanations, we will present a flow chart of 15-19. Confidence-diagnostic program. This the test routine to enchance its understand- type of maintenance program is normally ing. For a review of the more frequently used cycled in conjunction with the operational flow chart symbols, refer to figure 91 (printed program, and in some instances is part of the inthe work book), and the explanations operational program.Basically, confidence- below: diagnostic programs providetheparticular (1) Direction of flow (A). The direction of computer system with the ability to monitor flow line is used to connect all symbols and the operation of on-line and backup (some- indicate the flow. If the direction of flow is in times called standby) hardware. Confidence- the normal dfrection (left to right or top to diagnostic programs are capable of detecting bottom),itisnotnecessarytouse the andisolatingfailuresinthe online and arrowheads. backup hardware, as well as monitoring hard- (2) Operations (B). This symbol is used for ware status. all program operations not involving reading, writing, decisions, or modifications, 15-20. Causes of System Failure. We could (3) Decisions (C) and comparisons (E). list numerous causes of system failure here, Many notations are used with the decision but we do not intend to list them all. The and comparison syt..bols. Some of the morr ones that we list are the most typical causes frequently used notations and their function: of trouble encountered in most computer are: systems today. The order in which we list Notaiion Function them doesn't necessarily indicate the fre- or EQ On equal quency of their occurrence in the pa-ticular On not equal system that you are maintaining. These fail- > or HI On greater than < or LO On less than ures are listed to enable you to recognize the On equal or greater than need for maintenance program versatility to On equal or less than the extent that they can detect and isolate a On positive variety of failures: On negative Failing cards (opens, shorts, bent pins, 0 On zero 0 On not zero etc.). On yes Loss of voltage. On no Timing, 1' On true Interface problems. On false Spurious or continuous output. Operator error. (4) Modifications (D). This symbol denotes Program. an alteration in the address or operation part 65 of an instruction. It may also be used to quired by the routine. For this particular denote changes which are essentially counting routine, the constants used are all1 bits in nature. located in memory location 100. Othermem- (5) Connector (F). This symbol is used to ory locations are loaded with the predeter- connect remote portions of a flow chart with mined sum for each add operation tobe one another without the use of long or performed. crossing lines. An exit connector terminates a b. The accumulator (also referred toas the flow line.Itis normally labeled with a working register)iscleared, and the pass number or letter reference. The program will counter is reset. then continue at an entry connector symbol c. The contents of memory location 100 which is labeled with the same number or (all ones) are added to the cleared accumu- letter reference. lator. When this addition is completed, the (6) Stops (G). All programmed halts are accumulator should should contain all ones. indicated by this symbol. The word HALT and the number of the halt are usually placed d. The contents of the accumulator are within the symbol. compared with the memory location contain- (7) Data entry symbols (H, I, J, and K). ing the predetermined results for this addition The symbols shown indicate sources of data (a constant loaded by the housekeeping rou- entry. tines of the control program). a If the accumulator is not equal to the 1522. Computer test program. A computer predetermined sum, the test routine deter- test program includes routines that check the mines the failing bit or bits and stores this logic circuits within the computer for correct error information in a specified memciry area. operation. This is done by performing various All error information is printed out, and the computer instructions with the use of selected program halts. The printout and' any other data constants. The instructions performed by failure indications are analyzed by mainte- the computer are checked in a sequence nance personnel to tietermine the required which assures that each instruction has been corrective action. Once corrective actionis checked beforeitisused in later tests. taken, depressing the continue pushbutton Therefore, the computer circuitry whose cor- (PB), or its equivalent, restarts the program at rect operation has not been verified is not step b, connector 6; the same addition check used in checking other circuitry. Normally, willbe cycledinorder to confirm the each instruction tested is exercised only to corrective action. the extent necessary for verifying the correct f. If the sum of the first addition is equal to operation of its logic circuits. These routines its predetermined sum, the pass counter is do not exercise all possible variations of the checked to determine if it has been stepped to instructions in the computer. Therefore, the 1. The pass counter has two primary func- logic circuits involved in these variations are tions: (1) its count determines whether the checked through the use of other instructions program branches (jumps) to step c or the which use the same logic circuits. next test routine, and (2) its count is used to determine what predetermined sum, from the 15-23. For a close examination of thememory constants, is used to compare with operation of a computer test routine, refer to the results of a particular pass. For example, figure 92 (printed in the workbook). Herewhen the pass counter is equal to zero, the you will find a small portion of a typical flow predetermined sum used is equal to allones. chart for a computer test routine. The flowWhen the pass counter is equal to one, the chart indicates that the add class instruction is predetermined sum used is equal to the to be checked. There are many progamming sum methods of performing this type of check.acquired when all ones are added to allones. The method shown in figure 92 performs the g. The pass counter is stepped to one, and check as explained below. Notice that each the program branches to step c. The second lettered paragraph corresponds to a lettered check (which will be a different variation) of the add class instruction is performed. Loca- box in the flow chart: tion 100 is added to an accumulator that a. The number 4 connector indicates entry contains all ones. Recall that after the first from the control portion of the maintenance pass the sum in the accumulator was equal to program. Upon entry to this particular ADD all ones and, as the program returned to step c class routine, the control program performs from step g, the accumulator was not cleared. the required housekeeping routines, such as Therefore, during this pass we will be adding loading the required constants to be used by all 1 bits from location 100 to all 1 bits in the the routine, clearing various counters, and 'accumulator.In addition to checking the performing any other control functions re- circuits which were checked in the first pass, 66

4 7(1 the carry, overflow, and end around carry cannot be looped because of interaction with circuits will also be checked during this pass. the control portion of the program. There- If an error occurs during this second pass, the fore, when you set up a loop (other than a program halts. After the necessarycorrective program directed loop) in a portion of a test action has been completed, the program is routing, you should check to be sure that you continued by depressing the continue PB. The are not interrupting other portions ofthe progam will return to the first passand cycle routine or control program. In other words, through the entire routine again. When step Iyour abilityto set up a loop within a is reached and the pass counter is equal to maintenance progam will primarily depend one, the program branches back tothe con- on your ability to analyze theflow of the trol portion of the maintenance program (this particular program. , is indicated at connector 5 of the flow chart). 15-26. Memory test program. This type of program includes test routines thatexercise 15-24. Let's suppose that you were running alimemory modules associated with the a maintenance program that contained anadd particular system in an attempt to verify their class test routine similar to the one just operation. The maintenance program tech- discussed, and the routine continued to fail niques used within the memory test programs during the first pass. You have taken all the perform step-by-step checks of each function corrective action indicated by the printout associatedwiththe module being tested. and other failure indications to no avail. What These functional tests include routines which do you do now? Give up? Giving up is a are designed to uncover faults resultingfrom "no-no" in our Air Force. What about setting marginal operation of the particular storage up a loop in the area of theroutine that is media and associated logic circuits. The test failing? You would then be able to scope the routines use various test patterns that are addition operation from point to point. Will it designed to exercise the storage media and work? You better believe it will. Looping a logic circuits as rigidly as possible. A few of routine while scoping the circuits being exer- these test routines are described below. These cisedis one of the best, if not the best, routines are typical of those used in many of troubleshootingtechniquesforisolating a the memory test programs being used in the failure when all other techniques have failed. field today: How do you set up a loop? Must you be a (1) Memory access and logic circuit test programmer to set it up? To answerthese routine. The first portion of this routine tests questions, let's set up a loop using figure 92 the ability to gain access to and write all (printed in the wora,book). We will assume zeroesin specified memory locations. The that our failureisoccurring in the first data is then read and checked for correctness. addition process at stepc.The program In the second portion of this routine, the writeup wouldbecheckedtodetermine operation of the first portion is repeated, this wheretoinsert an unconditional branch time using all ones instead of zeroes. instruction.Remember,anunconditional (2) Beat test routine. There are two basic branch instruction causes a program routine beat tests. The first writes all zeroes in each to jump to the address it specifies regardless address of the memory module under test, ofprogramconditions.Actually,for our and then one address is beat with ones. Beat is particular routine,all you need to do is the process of performing the same operation determine (from the program writeup) the (writing data, in this case) several times. All memory location of the first instruction at addresses (except the one beat) are then read steps b and e.Once you determine these and checked for a 1 bit. The second beat test locations, you change the first instruction in writes all ones into the memory module under step etoanunconditional branch. The test, and one address is beat with zeroes.All address portion of this unconditional branch the addresses (except the one beat) are then instruction must contain the address of the checked for a zero. A routine of this type first instruction in step b. Now our program checks for disturbance of the storage media will continue to loop through the add instruc- and the sensitivity of the sense amplifiers. bon, and you can scope the circuits involved. (3) Core plane crosstalk test routine. Recall 15-25. The maintenance programs associ- that crosstalk is the term used to express the atedwithmany coniputer systems make effect that adjacent memory cores and core provisions for you to establish aloop upon planes have on each other during write and request. As a matter of fact, many pregram read operations. This test uses a special test wnteups contain instructions for establishing pattern to check each core within a memory loops. These instructions are very detailed. ir Aule for possible failuresresulting from They include explanations of routines that crosstalkBasically,thisspecialpatternis 67 Lt7 O made up by alternately writing all ones and Input/output keyboards. zeroes throughout the entire memory module Card readers. so that facing core planes contain opposite Card punches. test patterns. The contents of each location Printers. are read and checked for correctness. Message processors (or composers). (4) Addressing test routine. The primary Magnetic drums and disks. function of this test is routine to check the Magnetic tape drives. address registers and decoders. Normally, this Paper tape punches and readers. testing is performed by storing the address of each memory location intoitsrespective 15-28. The following flow charts, along memory location. Once the entire memory is with their explanations, are presented to help loaded, a read and compare process of eachyou understand typical I/0 test routines that memory address is performed. Refer to figure you might be required to use in the field: 93 (printed in the workbook) for a flow chart (1) Card reader and magnetic tape unit test. of a typical addressingtestroutine. An Refer to figure 94 (printed in the workbook). explanation of the flow chart follows. Notice For this particular test, we are using five that each lettered paragraph corresponds to a standard punched cards that are punched in a lettered box in the flow chart: row binary code. Each card contains 24 words a. Entry to step a is from the cmitsol (30 octal). portion of the memory test program. At this a. At step a, the test checks for a reader time, the control program performs the re- ready conditioni.e., cards in hopper, power quired housekeeping routines. on, etc. If not ready, the program will cause b. The first memory location to be checked an alarm condition. Once the alarm condition is read from memory. Each time that the is corrected, the program continues. routine returns to this step, a different ad- b. One card is read and check summed. dress is read from memory. Recall that a check sum is a programmed c. The contents of each memory location check in which the bits read are summed. This are checked at this step to determine if the sum isthen checked against a previously contents are equal to the memory address of computed sum to verify the data read. that memory location. c. If a check sum error occurs, a printout is d. The correct address of the memory provided identifying the error. After correc- location read from memory and the erroneous tiveactionis completed, the programis address contained in that memory location continued. are stored in a specified memory area for d. If the last card has not been read, the future error analysis. program returns to step *a. A determination e. The error computation routine deter- for the last card being readis made by mines the failing bit position(s) and, if pos- checking a word counter for a count of 120 (five cards with 24 words each). This type of sible, the faulty addressing circuits. counter is stepped as each word is read (or f. The address of the memory location just written). Thus, its count indicates whether checked is looked at to determine if it is the the desired number of words has been oper- Lae location in the memory module under ated on. test. If it is not, the address counter is stepped e. As at step a, a check is made for the and the routine lxanches back to step b of the ready condition of the particular I/0 device. flow chart. If the last memory location has If the magnetic tape unit is not ready, or if it been checked, the routine branches to the isfile protected(thiscondition prevents print error routine at step g. writing), the program will cause an alarm g. When all the stored error data is printed, condition to occur. Once the alarm condition the routine branches back to the control is corrected, the program continues. portion of the maintenance program. 1. Tapeispositioned to effect a write operation of 120 words. Other setup condi- 15-27.Input/output (I/0) test program. An tions, such as clearing certain counters, would I/0 test program is normally made up of also be performed at this time. several individual test routines that are used g. At thisstep, a checkismade to totest the various peripheral equipments determine if 120 words have been written. associated with a computer system. However, The same word counter used in step d could several of the older computer systems use be used here for this check. If 120 words are separate test programs for each of their not read, the program causes an alarm condi- peripherals. I/0 test routines perform test tion. Once the alarm condition is corrected, operations on such peripheral equipment as: the program continues. 68 4 6 0 '7 I c. Here a check ismade to determine if five h. The programmer knowsthe operation, is done, as the device, and the numberof times the cards have been punched. This He also knows before, by checking a word counterfor the operatton is to he performed. 120 words were hrivi much time is requiredto perform a count which indicates that certain operation with agiven I/0 device. operated on. With these facts, the programmer cancheck 94, step h, a the device's d. As in our last test in figure (using programmed instructions) check is made to determineif the I/0 device ability to perform a givenoperation in a the time allotted specific amount of time. In our programflow performed its operation in chart, the programmer is set upto write one by the programmer. record consisting of 120 wards.At step h, he e. If enough timeremains to complete this checks the tape drive's abilityto complete punch operation, return to step cand check the write operation in thetime he allotted. to see if five cards havebeen ptanched. i. If enough time remainsto complete the routine is used to to step g and f. An elapsed time error operation, the program returns determineif,infact,120 words were checks the word counter todetermine if 120 punched. If not, the number ofwords actu- words have been written. ally punched and the total timeused to punch corrective act!on The elapsed time errorroutine first them are printed out. Once j. has been completed, the programis continued determinesif,infact, 120 words were of words actually at stepa.If the program then runsto written. If not, the number corrective written and the total timeused to write them completion, this indicates that the are printed out.Depending on the system, action did the trick. other information isprovided at this time. g. At this step, the operatoris told to check Once corrective actionhas been completed, the cards punched against thecards read at the program will continueat step e. If thestep b of figure 94. Ifpunching errors are program then runsto completion, thisindi- noted, the required correctiveaction is taken, cates that the correctiveaction did the trick. and the punch test isrecycled according to the particular program k. If 120 words are writtenin the allotted the instructions in time, an end-of-record (EOR)indicator is writeup. written on the tape. The programthen causes h. We have indicated a halthere, but the the tape to backspace to thebeginning of the particular program could branchto another record which was just written.A read opera- test of another I/0 device. tion is now performed. 15-29. The maintenance programroutines 1. At this step, the dataread from the tape that you data read from the associated with the computer system is compared with the are now receivingtraining on may not be cards. A printout is providedif any errors are identical to those we havediscussed in this detected. Once correctiveaction is completed, chapter. However, as youbecome familiar the entire test is cycledagain to affirm the with more of the progamroutines used in corrective action. If all data comparesat this to the card your system, youwill note many similarities step, the program continues on to the routines presentedhere. As a matter of punch test (indicated by connector6). fact, as you gain more experience onthe job, Refer to figure 95 you will even detect manysimilarities among (2) Card punch test. used by your (printed in the workbook).This test deter- the maintenance programs punch can perform its system. The knowledge ofthese similarities mines whether the card should aid you in isolatingfailures. For function correctly. example, let's assume that you wererunning a. At this step, acheck is made to insure the I/0 test program routinesexplained in the that the punch is ready.If the punch is not preceding parafgaphs and thelast routine ready, the program will cause analarm condi- (punch test) failed. In examiningthe failure tion to occur. Once thealarm condition is printout and other indications, youfound corrected, the program iscontinued. that the I/0 word counterhad not stepped. Would you immediately startout to trouble- b. Now, five cards will be punched.The circuits? In view data that is punched is the same datathat was shoot the I/0 word counter read from the tape at step h offigure 94 of the fact that the magnetictape and card reader test routine (it alsoused the I/0 word (which is actually the originaldata read from failure before the the cards at step b of fig. 94,printed in the counter) cycled without punch test routine, the logicalpoint at which workbook). 69 Li 7-2. n

to start troubleshooting would be within the control oriented; that is, theyare designed to punch control circuits. More explicitly,check be operated in conjunction with the punch control circuits that (or by) some provide the type of control program. Othermaintenance pulse and/or level which affects thestepping programs do not require external control and of the I/0 word counter. Youshould not rule are designed to be self-control oriented. Other out the word counter circuits completely, but areas of program organization thatyou will they definitely should not be the firstones to see during your training are flow charts and check. Along with the knowledge ofmainte- tagging. nance program similarities, you will need to become proficient in the sat of interpreting 16-4. Flow charts. Recall that flowcharts maintenance program printouts ifyou are to consist of a series of blocks, eachcontaining a become an effective troubleshooter. description of a computational function.As explained before, the particularfiow chart symbols may change from systemto system, 16. Interpret Maintenance ProgramPrintouts 16-5. Tagging. Tagging makes 16-1. As stated earlier,many of the failure a program printouts which were generated by theolder easier to prepare and easier to understandby computer systems lefta lot to be desired. the original programmer, succeedingprogram- However, as the software improved,so did the mers, and those who use the program flow usability of the failure printouts.Your effec- charts and descriptions. Many methodican be tiveness as a repairman will depend used in tagging instructions. Inone method, a a great program listingis deal on your ability to interpretthe failure divided into blocks of printouts provided by the variousprograms in logical functions. Each block hasa header your particular computer system. It might be giving its name, function, and communication data. Ail data words, or constants, which hard to believe, but work centershave often are suffered excessive downtimebecause mainte- referenced in the block are grouped together nance peraonnel misinterpreted a particular and placed at the end of the block. Withinthe functional block itself, instructions and failure priout. Our Air Force hasexpended data large sums of money to provide can be tagged with a three-part tag to show you with the block identification, type of reference, best maintenance program publicationsavail- and a able. Your on-the-job trainingwill include digit to distinguish several referencesof the many hours of studying these publications. same type. For example, the third part ofa This study will be rewarded by therespect particular function tag, N4, might beany of you gain from your coworkers and supervisors the following: every time that you interpret a failure print- E - Entry out correctly and take the right corrective F - Exit or final. action. Normally, dependingon the system M - Instruction that is modified. you are assigned to, maintenance C - Constant (unmodified). program T - Temporary constant. descriptions can be found in chapter 4 ofthe TO or section 4 of the appropriate I - Input communication word. manufac- 0 - Output communication word. turer's service manual. As your trainingpro- gresses and you become ferniliar with more of the maintenance programs inyour system, In conclusion, the functional block N4 might have internal tags N4E, N4M1, N4M2, N4F, one thing that should quickly becomeap- parent to you is the standardization of these N4C1, N4C2, or N4T. programs. 16-6. Control program. A maintenance 16-2. Standardization of MaintenancePro- control program is a package of controland grams. In each computer system,program helper routines that facilitates theloading and standardization is essential in order to reduce operation of the various maintenanceprogram the cost of the system andincreaseits routines. The controlprogram portion of a usability. Within a given system,most pro- maintenance progam provides specialrou- gramming aspects have been standardized tines that fulfill common requirementsof the particularly program organization andopera- program's test routines, thuspreventing need- tor communication. less duplication of programmingeffort. For example, the same print, interrupt,or manual 16-3. Program organization. This is the intervention routine is used by thevarious moat important aspect of a successfulpro- test routines in a maintenanceprogram. A gramming system.Each program thatis maintenance control programcan be included written must be organized in consideration of as part of the on-line (active or operational) its functional relationship to the total system. program,aswellasa backup (standby) Some maintenance programs are executive program.Inthis environment,itistime 70 I.) shared with the on-line andbackup program, 16-10. Printouts. Standardization of main- and it provides confidence-diagnosticcheck- tenance programs is insured to some extent if ing of the system hardware.However, a a set of print routines (within the control maintenance control program canbe strictly program) is used by the various maintenance associated with an off-lineenvironment (for program test routines. The following items are period). considered essential to uniformity of program example, scheduled maintenance printouts, and the maintenance programs of 16-7. Operator communication.Depending the many systems normally adhere to them: on the particular system,operator communi- Program heading. cation can take on many forms.The more Results of program run. standardized types include interrupts, manual Error informationdata failure, control intervention, and printouts. failures, etc. Indicated repair statements. 16-8. Interrupts. You are able to interrupt the processing of a maintenance programby 16-11. Uniformity of Maintenance Program initiating an external request from suchde- ErrorPrintouts. Each computer system's vices as an external keyboard, a statusmainte- maintenance program library insures uniform- nance console, a displayconsole, or a test ity of the format of its error printouts siniulator. The method used by the control through the use of the four essentials indi- program to honor yourrequested interrupt is cated above. However, tiu experienced com- an interrupt processingroutine. Once the puter repairman and technician are the first to control program recognizes the interrupt, as a admit that their training on a new system would be a lot easier if all systems used the legal request, control is given to the requester. Unfortu- He can then enter additional data,initiate or same data format on their printouts. change specific switch settings, or makeready nately, uniformity of the data format con- testing. tained within each of the four essential items and identify other hardware for required on the error printouts varies from 16-9. Manual intervention. The manual system to system. The following examples are intervention and interrupt aresimilar. In presented to point out these differences. Note order to distinguish between the two, think of the identification of the four essential ele- the manual intervention as being preprogram- ments which were presented in the previous med by the programmer. That is, at specified paragraph. These elements are identified on points in a given maintenance program, theeach printout as follows: © = Program head- program requests specific actionsto be taken ing;(j= Results of the program run. (j= by the operator. These actions include setting Error information; and ®= Indicated repair specific switches, preparing card or tape in- statements. puts that will furnish needed informationfor the test, or making ready andidentifying 16-12. AN/FSQ-7 (SAGE) maintenance other hardware for testing. program printout:

THE FOLLOWING PROGRAM WILL BE OPERATEDUNDER CONTROL OF SMCP 3

CDS 1L TAPES MC 1L 2606 A COMPLETE DIAGNOSTIC AND MARGINALCHECKING TEST OF THE TAPE DRIVES, TAPE ADAPTER UNIT AND ASSOCIATED CIRCUITRY. 0 .+ .44 *4.4 .4,4,4.4 A- -4.* .4. .4** SS1-OFF SS2-OFFSS3-OFF SS4-OFF BSW 0.10100 1.00000 NOW TESTING LOGICAL DRIVE 3 WHICH ISPHYSICAL DRIVE ---. ® 4.... E ..2 .... +150-040 FAILURE MC WORD 005PRESCRIBED 40 ROUTINE 2

(DI 7;,EvVITIZT)1,41,?.G3IVE DISCONNECT c'TEE PUS WERE MARGINED AND COULD CAUSE ERROR.

® 7;1E112 7. R E 1113AARIGID312 B1U37;TW 4 ?d.. 1BLDD1N304 M I.A3L8LEY NOT CA US E ERROR.

THESE PUS NOT MARGINED BUT COULD CAUSE ERROR. 13BH 13BG 71 7

16-13. This particular printout isvery and marginal voltage +150 volts. The failure definitive in that all the essential information occurred at the prescribed margin of- 40 is included. The proram heading informa-volts while cycling a particular test routine, tion, 0,is complete to the extent that itroutine 2. The error information, ®, identi- even indicates the setup condition of thefies the tape unit that failed and includesa programi.e., sense switch(SS1 through brief explanation of how it failed. The indi- SS4) and B switch (B Sw) settings. The results cated repair action, C), includes identification of the program run, 0, identifies thata mar; of the plug-in units (PUS) that could have gin failure using margin word 005 occurred. possibly caused the margin failure. Also, it identifies the failure as being within 16-14. AN/GSA-51A (BUIC)maintenance marginal group 4, circuit line selection E2, program printout:

MTU DIAG TEST USING COMP=1 MEMS CC=1. 10 TEST..005PC111076152 DESC. NO 001 CONTROL WD.04) ® IP DR 0041040732110254 STATUS st 00 RS DR 0000000732522274 STATUS01 ® EX DR 0000000732522274 STATUS z 01 ITEST WORD z, 0404040404040404 WORD READ 01010101010101010 FAULTY MODULE MTU 4, INTERFACE WITH CC 1 )

16-15. This printout for test 5 of the satisfactorily, and status 01 indicates end of magnetic tape unit (MTU) diagnosticprogram record. The error information, 0, indicates is typical of the printouts provided by the that a data comparison error occurred while maintenance diagnostic programs used in the reading tape unit 4. The 0 in the control word BUIC system. Theprogram heading, 0, (WD) specifies a read operation, and the4 includes such information as what computer specifies tape unit 4. Jf an error had been (COMP), memory (MEM), and controller detected during thewriteoperation, the comparator (CC) were used during the test. control vvord printout would containst 7 in The controller comparator is similar toan I/0 place of the 0. The test word indicates what control unit. Also included as part of the was written on the tape. The word thatwas program heading is the faulty module number read indicates what was actually readback and the number of the controller comparator from the same tape. The indicated repair that this faulty module was interlaced with. statements, 0, in this type of printout are Depending on the particular diagnostic test, normally used with specific diagnostic tables the results of the program run C), consists which are contained in Chapter 5 of the of the in-process (IP), result alS), andex- particular unit's service manual (TO). Nor- pected result (EX) descriptors (DR) which mally, the test number, contents of the PCR were processed during thetest.Basically, (program count register), and the DESC. NO. descriptors are used to set up, initiate,con- (descriptor number) are used with the diag- trol, and terminate data transfers between nostic tables to determine the requiredcorrec- core memory and the terminal devices. Along tive action. The corrective action indicated by with each descriptor will bean indication of the diagnostic tables can include, but is not certain status conditions. Status 00 indicates limited to, the replacement of plug-inassem- that the particular I/0 operation was initiated blies. 72 4 84 printout: 16-16. AN/TSQ-91 operationcentral maintenance program

407L MAGNETIC TAPEDIAGNOSTIC PROGRAM SENSE SWITCH OPTIONS THE MTS DIAGNOSTICPROGRAM HAS THE FOLLOWLYG SW1 - LOOP ON ERROR SW2 - LOOP ON INTERMITTENTERROR SW3 - LOOP ON SYNCHRONIZER SW4 - INHIBIT ERRORPRINTOUT SW5 - ON AND OFF TOCONTINUE SW8 - OUTPUT ERROR TABLE DIAL UNIT ZERO. C( MOUNT SCRATCH TAPE WITHWRITE ENABLE RING AND AND OTHER PLACE UNIT AT LOAD POINT.PRESS UNIT ZERO ON LINE

UNITS LOCAL. TYPE IN 7 TO CONTINUE

7 CHANGE MTS CARD CRR 000 0 MTS ERROR TABLE EXP ACT EXP MTS ACT DAT 1© STA STA DAT COM 000090 511400 000000 509909 090000

associated with the MTS test. information, program data 16-17. The program heading MTS con indicates theMTS command word ,for the above 407Lmagnetic tape ACT STA is the 0 printout includes the generated by the program. diagnosticprogram actual status word receivedfrom the MTS. sense controlswitch (SW) options for the word-expected based (MTS) portion of EXP STA is the status magnetic tape synchronizer preliminary setup conditions.ACT the program. An exampleof the use of these on the provide the DAT is an indicationof the actual data switches would be 5W8 ON to received, and EXP DATindicates the ex- MTS error table, SW1 ON toloop on error, or this error table con- printout while pected data. Normally, SW4 ON to inhibit the error tains considerably moreinformation. How- looping. Other informationincluded here is have presented shouldsuffice for writing and ever, what we the mounting of a scratch tape to give you an idea ofthe printouts associated reading of test data (with a writeenable ring programs. The in- in place to allow writing)and the identifica- with the 407L diagnostic the tape unit to dicated repair statement,C), CHANGE MTS tion of zero being dialed on CARDS CRR poo, is usedwith a functional be tested. A note isinchided in the program make sure card group table(located in the appropriate heading to remind the operator to TO) to determine thecards to be changed. that the scratch tape is atload point. If the middle of the MTS tapes were not at loadpoint, an error indica- Before we jump into the and start pulling cards,let's take a closer look tion would occur during theMTS -portion of It is apparent fromthe this diagnostic. Also, the tapeunit is placed to at the error table. actual and expected dataindications that we an on-line statusand other tape units are failure. However, in off-line). The test did not have a data placed to local (effectively,in a 7 at the checking the status tables andbreaking down is then started by typing the status words, wewould find that the keyboard-printer-punch (KPP). The MTS test indicate that the cycled. The magnetic actual and expected status i3 the first test to be tape unit under test wasdialed to another tape synchronizer includessuch circuits as interface. The setting besides zero. Recallthat the program tape control and computer heading called for the tapeunit to be dialed results of the program run,0, include both operator error was 'and indicated repaix action. to zero. In other words, an error information the cause of thisfailure and not card group The error information,0, includes detailed 73 CRR 099. Once zero is dialed intothe tape contained the four essentialsi.e., drive that is under test, the program program can be heading, results, error information,and indi- recycled. cated repair statements. Once 1648. Although the three printouts you are able to pre- identify and interpret these fouressentials in sented used different data formatsfor pre- your system's printouts, your job of senting failure information, they maintain- maintained ing your particular computersystem will be uniformity in the sense that eachprintout simplified. CHAPTER 5 I

Troubleshooting

IN THE PREVIOUS chapters of this CDC, electronic hardware completely within your you gained an insight tothe knowledges power. Now, while you are savoring this great needed to perform the various duties as- feeling of power and pride, keep in mind that sociated with maintaining a computer system. you will maintain your superiority only as guides and directs you long as you are able to maintain proficiency As your trainer in troubleshooting your system. through the maintenance inspections and 3.. Every computer system has many trou- tasks associated with your particular system, bleshooting aids that are designed to make this important fact should become apparent of to you: Sucpessful mission accomplishment of your job of isolating failures easier. Some dependent on a system the more important troubleshooting aids that a computer system is you might use on the job are: of scheduled maintenance inspections per- Fault indicators. formed by competent maintenance personnel. System and unit testers. Wouldn't it be great if the effective perform- Performance test standards. ance a all scheduled mcintenanceguaranteed equipment infallibility? Of course, this is not Diagnostic programs. the case since equipment failures can occur at Flow diagrams. Specialized test equipment. any time. However, effectiveaccomplishment of the scheduled maintenance inspections 4. The various troubleshooting techniques minimizes equipment failure. When a failure presented in this chapter are representative of does occur in your system, you will bethose used in troubleshooting most of the responsiblefortroubleshootingi.e.,for isolating and correcting the problem as fast as computer systems maintained by personnel in system to the the electronic computer systems specialty. you can in order to return the The computer system that you are maintain- performance of its primary mission. ing, together with your personal abilities, will 2. Troubleshooting, as we once knew it, has dictate the troubleshooting technique or tech- taken on a new dimension. With the advent of niques you adopt and excel in using. The the computer and all of its shortcuts and troubleshooting techniques that we shall pre- wonders came a new age of troubleshooting. sent fall within these four basic task elements: The computer figures our pay, works our Analyzing logic and wiring diagrams. math problems, and makes our life as a Analyzing oscilloscope waveforms and maintenancerepairmansomethingofa patterns,andsignaltracing with an breeze. Yes, the computer can do all of these oscilloscope. things as long al it functions properly. But, Using and interpreting fault location brilliant as it is, the computer (just like all of guides and facility panels. us) still has its problems. This is where you Using the group removal and replace- come in. All of a sudden thiselectronic brain ment method of pluggable units. (that has practically taken our jobs and made its superior us look ridiculous because of 17. Troubleshooting Considerations ability and speed in working math problems) has failed, and it is now at your mercy. As 17-1. The basic troubleshooting procedures any good repairman dedicated to his profes- used in computer maintenance are generally sion should react, you will respond by curing quite logical. A good repairman will attack a its ills. Isn't this ironic? You may not be as problem by asking and trying to answer some fast or may not possess the abilities of that simple questions. His first questions normally computer, but without you it is nothing more concern the causes of the trouble. As each than several miles of wire and a maze of questionis answered, he eliminates some 75 4.17t.

TRY TO LOCALIZE THE FAULT THROUGH ANALYSISOF THE SYMPTOMS OF MALFUNCTION

TRY TO LOCATE THE TROUBLE THROUGH INSPECTION 2

LOCALIZE THE FAULT TO THE DEFECTIVE SECTION BY TESTINGaw TECHNIQUES 3

LOCALIZE THE FAULT TO THE DEFECTIVE STAGE BY TESTING TECHNIQUES

LOCALIZE THE FAULT TO THE DEFECTIVECIRCUIT OR PART BY TESTING TECHNIQUES 5

REPLACE OR REPAIR THE DEFECTIVE PART 6

TEST THE CIRCUIT'S OPERATION--READJUST THE CIRCUIT 7

Figure 96. Troubleshooting procedure. possible sources of trouble, thus decreasingonly a limited knowledge of the equipment step by step the different areas which he must and by using the correct procedure, the troubleshoot. Hew far he is able to proceed troubleshooter (you) will probably find the will depend upon his knowledge of the more obvious troubles. equipment and his ability to troubleshoot. His 17-2. Know Your Equipment. Remember, knowledge may permit him to locate the there is no substitute for equipment familiari- exact component that is causing the trouble, zation to aid you in troubleshooting your or it may only permit him to isolate the system. Why is this such an important consid- trouble to a cabinet or rack. Howgker, with eration in troubleshooting? That's a good 76 4 I devel- question. The best way to answerit is to ask variations of symbology which were not familiar with oped from M1L-STD-806B, whichreplaced you this question. If you are system your equipment tothe extent that you can 806A in 1962. A manufacturer of a printouts, used in the Strategic Air Command(SAC) analyze its operation, indicators, MIL-STD-806B; and programs, can you isolate afailure within converted all of its logic to corrective however, the particular system usednegative that equipment and take the proper logic exclusively (thus requiring inputand action? output state indicators on logicsymbols). 17-3. THINK Before You Act.The most Therefore, the manufacturer decided to elimi- important step of any troubleshootingeffort nate all state indicators. Whenusing this isto think before you act.Ask yourself, particular system's logic, you must takefor "What are the symptoms andwhat is most granted that the indicators are there. Theidea likely to be causing the trouble?"By asking worked until repaL-men from other computer and trying to answer thesequestions, you will systems were assigned to this SAC systemand be following a logical sequenceof steps which applied the true principles of MIIATD-806B. will lead you to the cause of thetrouble. They found that without the presence ofthe 17-4. Establish a GeneralTroubleshooting stateindicators,the system underwent a Procedure. The word "general" asused here complete reversal and would not operatein means all-encompassing.Establish a trouble- accordance with the 806B standardsthey shooting procedure you canfollow regardless knew. It is apparent from this one example of the particular hardwarefailure. Figure 96 that the repairman's responsibility of recog- presents a generaltroubleshooting procedure nizing the various types of logic (including the that can be used for justabout any hardware manufacturer's errors in applying MIL-STD- failure encountered within acomputer sys- 806B) becomes rather difficult. In order to tem. The directionsgiven in blocks 1 through broaden your knowledge, a variety of manu- 5 are steps to be usedin locating the trouble, facturers' logic symbols is included in figure and the directions inblocks 6 and 7 are steps 97. to be used in repairingthe unit. Steps 2, 3, 4, 19-3. Troubleshooting withBoolean Alge- and 5 may sometimes beeliminated, but steps bra. You should recall from yourtech school 6 and 7 must alwaysbe followed. In the days that boolean algebra is aform of logic paragraphs that follow wewill expand this symbols to describe procedure by incor-that uses mathematical general troubleshooting logicalprocesses. This typeof logic was porating specific troubleshootingtechniques named in honor of GeorgeBoole, an English in steps 1 through5. When incorporated into mathematician, who developed it in1854. No a troubleshootingprocedure, the trouble- practical use was made of this newtype of shooting techniquespresented will simplify logic until 1938. Then, C.E. Shannon, a the troubleshootingeffort. research assistant at theMassachusetts Insti- 18. AntUYze Logic and WiringDiagrams tute of Technology, discoveredthat this form 18-1. A computer is no morethan a of logic was perfect forindicating the logical which perform functions of computer and telephoneswitch- combination of simple devices ing circuits. There are severaladvantages in a few basicoperations. Complexity arises technique for de- from the fact that the logicis not stand- having a mathematical to the manu- scribing these circuits; it is far moreconveni- ardized but varies according ent to calculate withequations than with facturer. In 1960, MIL-STD-806A,Graphic Just as an Symbols for Logic Diagrams, wasdeveloped schematics or logical diagrams. of Defense ordinary algebraic equation can besimplified and approved by the Department describing logi- for preparation of logicdiagrams. Unfortu- using basic theories, equations calconclusions for arithmeticoperations, nately, many computersystems were manu- networks can factured before this date;consequantly, nonlogical decisions, and switching also be simplified. This enablesthe designer to standard logic symbols arestill quite com- perform a func- mon. A point toremember is that the symbol devise the simplest logic to manufacturer to tion. It also enables you, the repairman, to representation varies from the logic, manufacturer, but the basicprinciple remains understand and troubleshoot with matter how it is thus achieving efficiency of repairand maxi- the sante. Stated simply, no availability. Normally, trou- disguised, an AND gate remains anAND gate, mum operational bleshooting with boolean algebrainvolves the etc. development and use of aboolean equation or adopted 18-2. The manufacturers who have truth table. the military standard have merelyadopted the equations. A symbology but do not fully use thebasic 18-4. Deueloping boolean boolean equation is developedfrom certain concepts.Figure 97 shows some of the 741. 77 TITLE SYMBOLS 106B

. . A 1 [..._ 4 AND la

OR INCLUSIVE 1::)---1Z>.-- OR ID iui FL 0 I 0 IJ 0iu FLIPFLOP iu Mil re

OE 0 EXCLUSIVE OR T&

MS MONOSTABLE

STORAGE REGISTER 111111Lighlihillighlik111111k

Figure 97. Logic symbols.

490 491 presented in figure 100 (printed in the work- t If I book)? Could you do it? To enable you to do so,the next paragraphexplains how to develop this equation. 18-5. The circuit that you see in figure100 is a stepping circuit used to develop output pulses that in turn step a counter. In analyzing this circuit, a determination as tothe Figure 98. Logic OR function. output's origin and its dUration must be made. As stated earlier, a boolean equation is developed from the input to the output. fundamental ideas encompassing logical con- Therefore, we will develop the boolean equa- ditions and operations. Logical conditions are tion by beginning at AND gatej44-13. J44 by develops an output at pin 13 for its input called variables, and they are represented ( indicates and) OPE letters.Logical operations are called func- signals Alert Message tions, and they are representedby symbols. OTH TX (output parity error signal from the When a variable is used in a normalalgebraic other transmitter). Note the lineabove the formula, it is assumed that the variable may signal "Alert Message." It is called thevincu- take any numerical value. For example,in the lum, and it indicates the absence of thesignal equation "3A plus 6B equals C," the A,B, AlertMessage. OR gate J5-18provides and C may range through the entirefield of TFGOO + (+ indicates or) TFG35; observe numbers. However, thevariables used in that this expression is fed to inverter J5-28 boolean equations have a uniquecharacteris- which NOTS (invertg_the expression,thus tic in that they may only assume oneof two providing TFGOO TF 35 (TFG standsfor possible values, high or low, and thesein timing format generator) at pin J5-21. At turn may be represented by a true orfalse J5-19, theal (Alert MessageOPE OTH condition. For review purposes,let's consider TX) + (TFGTIOfiTaE) is produced. This the development of a booleanequation for signal primes pin 24 of AND gate J3-22. 13-23 the circuits shown in figure98, and figure 99 isprimed by T6 (time 6 pulse), which (printee in the workbook). Figure98 illus- produces an output at J3-22 as long as pin24 trates twc, AND gates feeding anOR gate, is satisfied. The output of an AND gateis thus becoming an overall ORfunction. Note determined by the duration of itsshortest the lack of signs of grouping withinthe fmal input.Inthisparticular stepping circuit, equation. Figure 99 (printed in thework- timing pulse T6 determines theduration of book) shows two OR gates feeding anAND the output at J3-22. This timeduration is 417 gate, thus becoming an overall ANDfunction. microseconds. The 417-microsecond output OPE In this case, signs of grouping(as shown in fig. at13-22 is written: (A-WIT-Walt-10 99) are used to retain circuitintegrity. In OTH TX) + (TFGOOTPG35)T6. To com- developing the boolean equations for eachofplete the equation, we find at pin 24 ofOR the figures, we start at the inputand work gate J5-22 a signal that, when present, re- toward the output. This is a goodrule to places the entire equation thus fardeveloped; to this signalis EOD (end of data). The re- remember, especially when you attempt of develop a boolean equation during atrouble- mainder of this stepping circuit consists shooting period. Based on yourprevious nothing more than an emitter followerand technical school training, the boolean equa-level restorer. Now, the output's originand seemed all duration are known, as is the boolean equations just developed shouldn't have The complete that difficult to you. What aboutdeveloping a tion for this stepping circuit. boolean equation for a circuit such asthe one boolean equation reads:

[(Alert Message . OPE OTH TX) + (TFGOO.TF035)T61 + EOD

18-6. Now that the boolean equationfor possibility of the emitter follower (EFP J5) the stepping circuit is completed,let's deter- and level restorer (LR J5) being defective. mine its effectiveness in troubleshooting.For Should the pulse be present at TP J77-F and example, to determine that thestepping not present at TP J77-H, card J5 wouldbe circuit is functioning properly, an oscilloscope changed. However, if the pulse isn't present at would be used to check TP J77-H for apulse J77-F, the boolean expression must be ana- that is 417 microseconds in duration.If this lyzed to determine which logical function pulse is not present, the next logical step provides the normal stepping pulses. The first would be to check TP J77-F and eliminate the portion of the equation (Alert 'MessageOPE 79 Stz

OTH TX) can be eliminated becauseit is an hypothetical troubleshooting problem. Let's error condition that normally isn't present. suppose a failure occurs within your com- Another stepping condition is EOD, which puter system X, and the failing card (the full occurs only at the end of a transmissionor adder circuit in fig. 101) Is identified and the reception of a message. At thispoint in replaced. While we are supposing, let'sgo swiping this boolean equation, it becomes further and involve you. That's right,you are apparent that the normal stepping pulsesare the repairman assigned to perform the bench provided when the format generator isnot at check. First you read over the failuredocu- TFGOO and TFG35. The, troubleshooting ment. It reads: "Card failed during diagnostic approach at this point would be concentrated program routines of the ADD class instruc- on the function (TF000 IT G35)T6. A tion.Not much to go on, is it? You look check would be made at the timingpulse over the logic diagram and develop a truth generator for T6 pulses. If T6 pulsesare being table (fig. 101). Systematicallyyou set up generated, a cheek of TP J76-Bwould be your tester to provide the inputs identified in made to determine the absence of TFGOO each line (1 through 8) of the truth table. and TFG35. The absence of TFGOOand After setting up each test, you check TP-H TFG35 at TP J76-13 would indicatethat the (test point H) and TP-M for the output problem circuitry is between TP J76-Band TP indicated by the truth table. Let's further J77-F (in other words, the timingfrequency suppose that each output checks until line 8; generator should be functioning properly).At here you find no output at TP-M. Nowyou this point, cards J3 and J5 would bereplaced. perform the following checks and get the 18-7. Developingtruthtables. Another results indicated: means of troubleshooting by use of the TP-G - Output OK. boolean equation is to disregard thefull TP-L - No output. equation and develop what is knownas a TP-J - No output. truth table. A table of this nature is nothing TP-E Output OK. more than a means of determining an output TP-C - Output OK. by considering all inputs and their variables. In figure 101 (printed in the workbook),a truth table has been developed for the output 18-9. From the results of the above checks, of a very common computer circuitthe full it is apparent that AND gate 6 is failingi.e., adder. The circuit inputs consist of X, Y (the with two good inputs (TP-E and TP-C) it addends), and C (a carry input froma produced an erroneous output at TP-J. Also, previous stage). The outputs are represented by starting at the output and checking each by S (the sum) and Co (the carry out). Look TP back to the input, the gates thatwere over this truth table carefully and note the functioning properly were identifiedas well as binary inputs and outputs. What is happening the faulty gate. Now, you must admit that the in lines 1 through 8? Binary math? That's part truth table helped your troubleshooting ef- ofit.Something else is theresomething fort. Actually, once we knew that only line 8 very important to a truth table. Remember was failing, the contents of the truth table the definition of a truth table? That should pointed to AND gate 6. What does this mean? give you the answer. A truth table isa means For one thing, all the checks made afterwe of determining an output by considering all found the failing variables (line 8)were not inputs and their variables. For example, in necessary. line 1 of figure 101, 0 + 0 + 0 = 0 witha carry of 0; in line 8, 1 + 1 + 1 = 1 witha carry of 1. 18-10. You might be questioning the state- Now, look at all the inputs between lines 1 ment that indicated the contents of the truth and 8. Here are all the other variables poseible table ppinted to AND gate 6 once line 8was for the inputs X, Y, and C. Thisanswers the identified as failing. Let's analyze that state- question of what is happening in lines 1 ment to determine its validity. The only time through 8 of the truth table. A determination an error occurred was during the addition of 1 of the output from a full adder circuit is being and 1 with a carry-in of 1. Looking at. the made by considering all its inputs and their logic, it becomes apparent that the only gate variables. Now the big question is, "Howcan affecting the sum (S) output, when adding the a truth table help you in your troubleshooting inputs of line 8, is AND gate 6. This is true efforts?" because its upper leg is conditioned by the carry input, and its lower leg is conditioned 18-8. When troubleshooting, the truevalue of a truth table is its identification by the ANDed function of X Y from AND of all input gate 2. Also, you must keep in mind that the variables along with their outputs. Theeasiest tests (lines 1 through 7) performed before line way for you to see this is by settingup a 8 were successful. 81 -

4 Q 1-i?3 EQUAL - DISCRIMI-j DATA AGC fio, SHAPING1 PHASE NATOR IAFILTER IZER SHIFTER0 DATA CIRCUIT . CIRCUITS CIRCUITS oll CIRCUIT A

TR (FEEDBACK FOR LEVEL DETECTION)

Figure 102. Demodulator unit block diagram.

18-11. Before leaving our hypothetical this analysis depends upon your knowledge of troubleshooting problem, let's regress to when the functional operation and data flow within you were looking atthe card's failure docu-the computer system. Once a failure is iso- ment. Suppose the repairman who ranthe lated to a specific functional area, further diagnostic program identified (on thefailure analysis of the circuitry within this area is document) that the failing program routinerequired to isolate the malfunction to the was attempting to add 1and 1 with a carry-in failing component. Another name for this of 1. Just think how much easier it would functional area approach is the block diagram have been for you to bench check the card approach to troubleshooting. with this information on the failuredocu- 18-14. For an example of the block dia- ment. The repairman who prepared thedocu- gram approach to troubleshooting, refer to ment could have acquired this exactfailure figure 102. Here we have a block diagram of a information by consulting the diagnostic pro- demodulator unit.Let's suppose that its gram writeup. Now when youhear youroutput is absent and you are attempting to supervisor say, "Put all the failure data on the isolate the failing functionLe., AGC, filter, failure documents," you will know why itis etc. What approach would you take in trou- needed. bleshooting this demodulator? Look over the 18-12. Troubleshooting with LogicAnal- following steps and compare them to the ysis. A fine line is drawn betweentrouble- troubleshooting approach you would use: shooting with boolean equationsand logic (1) Check for the presence of the data analysis. First, you devise yourboolean equa- input to the AGC circuit. tion and .then you use it in yourtesting to (2) Check the data output of the equalizer determine if each function is present.It is circuit. The results of this check will isolate during this testing and applicationof your the failure to the first or second half of the boolean equation that logicanalysis takes circuits in the demodulator. place. (3) The first half of the circuits (i.e., the 18-13. Functional area approach. The pri- AGC, filter, and equalizer functions) would mary purpose of the equipmentin electronic be suspect if no data appeared at the output computer systems is the processing ofdata. of the equalizer. By checking the input and This is done through a logical flowof data output of these first three blocks, you should which, in turn, is accomplished through the be able to isolate the failure to one .)f them. functioning of the equipment's `circuitry. The (4) The second half of the circuits (i.e., the basic functions of these circuits,exclusive of shaping, phase shifter, and discriminator func- power supplies, is thegeneration, transmis- tions) would be suspect if data appeared at sion, conversion, logical manipulation,and the output of the equalizer. By checking the storage of signal voltages. Whenthe system input and output of these three blocks, you fails in performing any one of thesefunctions, should be able to isolate the failure to one of the cause must be found before the repair can them. be made. This means you must troubleshoot the system in an effort to isolate the fault to 18-15. The method of troubleshooting ex- the failing functional area and then to the plained above is sometimes called the split- failing component within this functional area. half methodi.e., once you determine the The logical method of isolating afault is absence of an output, you split the circuits in through a process of elimination ofthe half and check for an output at the half-way functional areas that are performing properly. point. When you determine that the failing This is usually done by careful analysis of the circuit is in the first or second half, you split malfunction's symptoms. The effectivenessof these circuits in half for further isolation of 81 8'1

the failure. This process is continued until the Check the records. Do notoverlook me failureisisolated to one function. This importance of your fellow workers' splitahaIf method could. also be previous continued experience. They may haveexperienced the once you begin troubleshooting the circuits in same trouble. the failing functional area. 18-17. Troubleshooting with booleanalge- 18-16.Signalinjectionapproach. This bra and logic analysis is method of logic analysis consists of inducing a must in most a electronic computer systems. Yourability in normal signal (or a signal similar to thatwhich using these two methods of troubleshooting is present under normal operatingconditions) increases as you gain experienceon the job, to the input of the circuits in question.The and as you become proficient in circuit conditions which result analyzing from this waveforms and patterns and signaltracing applicationarethen checkedatvarious with an oscilloscope. points, using test instruments suchas a vacuum-tube voltmeter, oscilloscope, or any 19. Analyze Patterns and Waveforms other device which is appropriate foruse as a signal indicator. By using these testinstru- 19-1. In this section, the objectiveis to ments and injecting a signal into the circuits, learn how to analyze patterns andwaveforms you can monitor circuit operation at various as seen on an oscilloscope, and touse this stages, and localize the points of originof analysis when troubleshooting. Asstated in such faults as distortion and hum,noise the introduction to this chapter, thisis one of oscillation, or any other abnormal conditions. the specific techniques introubleshooting. When this method of logic analysistrouble- The analysis of this taskexposes the many shooting has revealed a faulty stage,you can different types of digital datapatterns and further check that stage by making voltageor analog waveformpresentations you may resistance measurements, or by individually observe on an oscilloscope duringyour career testing circuit components. A logicalproce- in the electronics environment. dure along these lines is to firsttest those 19-2. Purpose of Measuring Patterns and components that are easiest to check andthat Waveforms. Two specificreasons for meas- experience has shown to be the most trouble- uring patterns and waveformsare evident. The some. If a vacuum tuber transistor is first is to analyze data content and thesecond involved, it is usually checked firstor, in the is to determine if a waveformmeets the case of vacuum tubes, one known to be good prescribed specifications. is substituted in its place. In mostcases, a 19-3. Analyzing data content. Thedigital schematic andjor logic diagram is all thatis data content in the variety ofsystems now necessary to determine where to insert the beingused and maintainedisextremely signal and where to check for itspresence. In varied. However, it generally hasone common other cues, voltage charts or illustrationsof elementit is digital. This means that within waveforms may be needed for comparisona prescribed duty cycle one pulse,or its purposes. However, in most of thecases absence, represents a bit; agroup of pulses inv olvinglogicanalysistroubleshooting represents a data word, a byte (agroup of through signal injection, the importantthings binary digits usually operatedupon as a unit), to remember are these: or another form of intelligence. Digital data Narrow the tzrouble downas far as consists of information that is routed,altered, possible by analysis of the symptoms. stored, processed, controlled, anddisplayed Use your schematic diagrams andlogics. by the computer system. Digitaldata also Check waveforms and voltages before generates visual intelligence in the formof checking resistances (resistance checks require printouts, displays, mechanical readouts,and the power off). automatic functions of consoleunits.In Think the problem through before replac- addition to providing the substance for the ing components. program to operate, digital data (converted from punch cards or other inputs)controls ()mum. program sequencing which, in turn, controls VALUE 16 s 2 the actions of the computer. A COUNT = 2 + 11= 14 19-4.Determining prescribedspecifica- tions. The data content we have beentalking about thus far is digital; therefore, it is DATA SHIFTED LEFT FOR 2X MULTIPLIER in informational pulse form, either voltageor eLI1110 10 COUNT= 4 + I 1 14 ^ 28 current, representing a language called binary. 12 X 14 t 211 From your studies in tech school,you know that binary Figure 103. Left shift (times 2 multiplier). is a two-character (1 and 0) language or number system. Now let'scon- 32 4 93- counter with the count inserted asshown at A 7 DECNAAL VALUE 32 le 2 of the figure. What count would result?If you F aS answered 7 (00111), you would be absolutely I correct. In other words, the originalcontents of the counter have been divided by 2. 19-7. We can also manipulate thedigital COMPLEMENT OF 45 count by either addition or subtraction.Using the same figure again, let's add 2 bitsserially, one at a time, to the LSDof the counter. a Ao0ITION Or I Enter the first bit of data into the LSD atA of the figure and, since the LSDcontains a zero, the counter causes a oneto be stored in 0 0 44 itt place. Enter the second bit of datainto the LSD and, since the LSD, two, four, andeitat Figure 104. Binary subtraction. stage now contain a one, the counter causes a one to be stored in the16 stage and a zero in sider this data as containing intelligenceindi- each previous stage (i.e., the LSD, two, four, cating the number of aircraft (flight size),and and eight stage). What has occurred is that that the total number of positionsallowed in two binarybits have been added to the a word for storing thisdata is three. This counter, and it has upcounted from its origi- would mean that low numbers of aircraftin a nal count of 14 (01110) to a count of16 formation may be cataloged individuallyand (10000). A one can be subtracted from a high numbers may be grouped underspecific binary counter by a complementingand numerical headings. Forvxample: adding process. Refer to figure 104 for this For a flight size of 1 to 4 aircraft, the explanation. At A of the figure, you see the binary count would be equal to itsrespective binary configuration for 45. B represents45 counti.e., 1 aircrafta. 001, 2 aircraft in complement form. C represents theresult 010, etc. of adding 1 to the complement (B)of 45. D For a flight size of 5 to 7 aircraft,the represents the answer, 44, which is actually binary count would be equal to 5(101). the complement of C. For a flight size of 8 to 12 aircraft, the 19-8. In the previous paragraphs wediscus- binary count would be equal to 6 (110). sed digital data as patterns containingintelli- For any flight size consisting of more gence. In the discussionthat follows we must than 12 aircraft, the binary count wouldbe also include analog voltage and current wave- equal to 7 (111). forms that do not contain intelligence.Stating that analog waveforms do notcontain intelli- By the arrangements shown in thisexample, it gence may needfurther explanation. Digital follows that digital data expressed in binary data, as we have discussed, isreadily inter- can be interpreted to meanspecific inforrna- preted into word data such as rangeof tion. More significantly, it can beprocessed, aircrafts, flight size, or computerinstructions. altered, updated, and used in a very simple Analog waveforms do not containthis trans- and accurate form in an electronic computer latable information. However, eachwaveform system. is, in itself, capable of transmitting animage 19-5. We also know that digital datais to the human brain andcausing a specific manipulated in parallel and serial form; that it reaction. For instance, consider aconsole is speeded up, slowed down,shifted, erased, using time sharing forits display cycle and generated as the requirementsdictate. For instance,if a requirement exists to multiply a numbsr by two, a simplemachine NIGH- EOUENCY operation could perform this action.This DEEP VOLTAGE SIGNAL operation is a leftshift. Notice the two OC LEVEL examples in figure 103. A of the figureshows a five-stage counterwith a count of 14 in it. 11111111111111111111111111 By applying a left-shift pulse to thecounter, the data bits are moved one positionleft. This action causes the value of each bit todouble, and now the count, as indicated atB of the 11111111111111111N111111 figure, equals 28. 19-6. Data can also bemanipulated by 11111111111.111111111111111 division of binary. Using figure103 again, suppose a right-shiftpulse were applied to the Figure 105. Time sharing. 83 4

11111111111111111111111:1111111111111111111111 REFERENCE SIGNAL

formassaire A M MODULATED

Figurr 106. Reference signal compare. where the first part of the display .is a sweep ple cycles reveals that data is,or is not, being voltage and the second part is a-DC level with received. For instance, in figure 106, A,a some high-frequency signal riding on it as basic reference signal withoutany data is shown in figure 105. The image displayed is depicted. All cycles are the same pulse width converted by the human mind into the and amplitude. Now insert amplitude-modu- functional operation of the circuits involved lated data onto the basic reference frequency in providing the ;weep voltage, DC level, and and increase the number of cycles per centi- high-frequency signal. Therefore, if any por- meter on the scope, and the waveform would tion of the waveform is distorted or missing, appear as it does at B of the figure. If the that portion should convey a message to the signal carrier were frequency modulated, the repairman. What message? Well, if the sweep signal as seen on the scope would showno voltage were distorted, the logical circuit to change in amplitude as it did with amplitude suspect first would be the sweep generator. modulation. However, it would show consid- 19-9. If a display as seen on the scope erable change in frequency since frequency reflects a high- or low-basic frequency, then modulation requires the algebraic summation the examination of the waveform requires use of the data and carrier frequency. It should be of the scope controls to verify the frequency apparent, then, that knowing what effect accuracy. This is most often done by meas- amplitude and frequency modulation have on uring the time of one cycle and then applying the carrier frequency is an aid when analyzing 1 waveforms as a troubleshooting technique. the formula, Frequency al On the other 19-10. Reading Techniques for Digital Data Patterns. With the purposes of measuring data hand, if a display is known to contain either foremost in mind, let's consider the next amplitude- or frequency-modulated data, sin- element of the task in analyzing patterns and gle pulse examination would not reveal any waveforms, i.e., "reading the data." significant information other than information that would facilitate the measurement of 19-11. Oscilloscope displays provide for a the carrier frequency. Examination of multi- left-to-rightsweep presentation of digital

SCOPE SETUP 2 BITS PER C/N

SCOPE SETUP 1 BIT PER C/N

Figure 107. Digital display. 84 4 9 7 -T I t data. Therefore, when scoping serial input binary code that is one value higher than the data with the LSD as the first input, it will previous; i.e., G = 12, H = 13, I = 14, and J = appear on the left of the scope. Look at 15, etc. Once again the reading technique was examples A and B of figure 107. Each word from the left of the scope to the right. By generated by a system that uses positive logic, now you might be asking yourself,"How do although consisting of a different number of you always obtain the LSD of a wordin the digits, shows its data starting on the left. For first centimeter of the scope display?" our discussion, assume that A of figure 107 19-13. Oscilloscope synchronization plays depicts a 16-bit serial input word (LSD at the an important role in reading a datadisplay. It left) with 2 bits per centimeter. The data provides the basis for selection of a sweep content of this display shows a binary config- start time coincident with the first bit of a urationof 1011001001011000. Since the data word or any other selected bit. By word is 16 bits long and there are just 2 bits selection of a timing reference signal and use per centimeter, only the first 8 centimeters of external horizontal sweep (as previously are considered. Let's further assume that the explained in Chapter 4 of Volume 1 on test first 13 bits (i.e., 1011001001011) represent equipment), the LSD bit is placed in the first radar range. The LSD is equal to 1/4 mile, and centimeter of the scope. the MSD (bit 12) is equal to 512 miles. The 19-14. Reading Techniques for Analog sign bit (bit 13) indicates which direction, east Waveforms. Analog waveforms are usually or west (0 = east and 1 = west), the target is easier to acquire and interpret than digital from the radar site. The maximum range that patterns. This is so primarily because analog could be represented by the range bits (bits 1 waveforms arepresented more frequently through 12) is10233/4 miles. The data as with less alteration. Primary techniques in shown indicates an aircraft with a range ofreading analog waveforms require extensive 364% miles west of the site. For our ex- knowledge in the use of the oscilloscope. For ample, this range is computed by totaling example, you'll need to be knowledgeable in thedecimalvaluesrepresentedbyeach the binary1, and since the signbitisa1 Synchronization of the scope. (indicating negative), this total range value is Use of the DC and AC voltage selection subtracted for the maximum range. In our on the vertical preamplifier. example, the total range value computes to Proper selection of sweep speeds. 6591/4 miles;subtractingthisfrom the maximum rangeof 1023 resultsin an 19-15. To successfully read a waveform, actual range of 3641/2 miles. If the sign bit had knowledge and understanding of its genera- been 0, the actual range would have been tion make the job easier. But in the actual computed by totaling the decimal values reading of the waveform you must be able to represented by each binary 1; this computes measure its AC and/or DC level, and under- to 6591/4 miles. stand that the DC level of an AC sine wave is 19-12. In example B of figure 107, the data its midpoint and is normally equal to zero displayed is a Fieldata code consisting of 8 volt DC. However, any AC waveform may be positions-1 bit per centimeter. The first 6 caused to ride a DC potential other than zero bits of this particular Fieldata code are used volt. When this occurs, use the DC switch and to represent an alpha or numeric character. volts-per-centimeter control on the scope's Bitposition sevenof the code indicates vertical preamplifier to determine and validate whether the character is alpha or numeric the accuracy of your reading. i.e., 1 = aipha and 0 = numeric. Bit position 19-16. The average DC level of a square eight is the parity bit; odd parity is used. wave is normally zero volt DC; however, in a From the listing below, identfy the alpha or rectangular waveform, this average DC level is numeric character represented in binary form dependent upon which part of the alternation using the reading technique of LSD on the is above or below the zero-volt DC reference left and MSD on the right: forthe longer period. Figure 108 shows examples of the average DC levelwithin Bit Position 1 2345678 rectangular waveforms. Notice in detail A of 0011001 0 -G 10 11001 1 -H the figure that the positive portion is longer in 01 11001 1 -I duration when compared with the negative 11 110010 -J portion. This leads to an average DC level at a 01 1 0000 1-6 point above the zero-volt DC reference. Now 1 01000 1 -9 0 notice that in the B section, the situation is The correct answerisalpha characterI. reversed(i.e.,the negative portion of the Notice how each alpha character is assigned a waveformislonger in duration than the 85 Ay(OC LICt. The storage space allowed for height within the data word is the first 9 bits of a 16-bit word. The LSD of height is equal to 375 feet. An ordinary binary counter is used to accurn- ulate this height data. Now refer to figure 109 and determine if its oscilloscope presentation depicts the description given. Your answer:

mmmummummmu=0 vOC miimminimm 19-19. Problem 2: While performing a

AveOC bench check of a keyboard, the letter K was depressed and the configuration displayed on Figure 108. Average DC level compare. the scope was as shown in figure 110. For this problem, determine what the correct bit positive) and the average DC level is below the configuration is for the letter K by referring zero-volt DC reference. These waveforms back to the page (inthissection) that _show examples of amplifier or other circuit presented the bit configurations for letters G outputs which allow signals to be displayed through J. Your answer: without clamping to a baseline. However, if thecircuitgenerating these waveforms is designed for zero-volt DC clamping and the average DC level is other than zero volt, you know that a circuit defect exists. Before continuing with the development ofour objective in this section, let's examine a few figures of various patterns and waveforms and determine whether they are or are notcor- rect. 19-17. Interpreting Patterns or Waveforms. We have provided four figuresfor your 19-20. Problem 3: A display cycle of a interpretation. Preceding each figure you will particular CRT is developed from a range of 0 find a description of what the scope presenta- to 210 mike. An unblanking/intensity pulse tion represents. Your job isto read and (provided by the unblanking/intensity genera- interpret the description, study thescope tor shown in section A of fig. 111) provides presentation, and determine whether itis this display cycle by unblanking the CRT. correct or not. If the presentation is incorrect, The two elements controlling the generator write the reason that it is incorrect in the are shown in parts A and B of section B in the space provided. figure. They are system trigger and AGL 19-18. Problem 1: A radar return froma (automatic gate length) trigger. System trigger height finder has been converted into digital occurs at range zero, and AGL trigger occurs form and stored. Flight plans for the particu- after it (at 210 miles). For this problem 7ou lar aircraft specify its altitude at 10,500 feet. are to determine if the unblanking/intensity

A1111111111111111111111111SCOPE SETUP 2 BITS PER ClA Vi2.410WA. tv .tv 5V PER C 1111111111111110.111111111Milt.SIICv.evx LSO ON LEFT 11111111111111111111111111 111111111111111111111111111 1111111111111111111111111111 Figure 109. Data pattern (height). Figure 110. Letter data pattern. 86 4 01 `I T 7 generator output (shown in section C of fig. IS Q. .,:lali"" 111) is correct or not. System trigger ampli- Ival.40. tude is +35 volts (±10 volts) and AGL trigger amplitude is +15 volts (t2 volts). The output A amplitude from the unblanking/intensity gen- tre+Al4i, erator is 18 volts. CRT unblanking occurs 11111111111111111111111111IIV C , co II II ,Wilt from system tzigger to AGL trigger, and 111111.11111/11IVIIMIN blanking occurs from AGL trigger to system trigger. Based on these specifications, you are 111111111111111111111111111111 to determine if the unblanking/intensity gen- ILTAILINVILIPE erator output (as shown in section C offig. I II I 111) is correct. Your answer: I I strtf . V /1- SH WIC lefiffitiiiiiIME1,, CAI colt n 111111111111111111MAIMPI 111111111111111111firatill 110111111111111111111111

Figure 111. CRT blanking and unblanking.

The other bits in positions 12, 13, and 16 of figure 109 represent another element of data about the same aircraft, but not height. 19-23. Answer to problem 2: The display as seen in figure 110 is incorrect. The letter K 19-21. Problem 4: The waveform shown in has a binary value that is equal to 16 decimal. figure 112 represents the output of an integra- The character is alpha so bit 7 is a 1, and tor circuit. The parameters for the standard parity bit (bit position 8) should be a 1, are shown in section A of this figure. Com- indicating odd parity. However, the display pare these with the waveform displayed in indicatesbit6 was picked (instead of 0) section B and record your findings in the resulting in the parity bit, showing up as a 0. space provided. Note that the pulse width is 19-24. Answer to problem 3: The wave- measured from the start of rise time to the forms are correct. System trigger turns on the 50-percent point ofthefalltime. Your unblanking/intesitygenerator.At turn-on answer: time output B (fig. 110, C) goes low; this low is used to gate the data to be displayed to the CRT. The unblanking pulse, A, goes high at turn-on time and brings the CRT out of cutoff. At AGL trigger time (210 miles after systemtrigger)thegenerator outputis switched, thus ending the display cycle. 19-25. Answer to problem 4: The integrator output waveform does not meet specifications. Its amplitude exceeds the maximum of 4.3V. Its baseline is good. The pulse width exceeds the maximum limits of 3.7 microseconds. Its fall time is within the specifica- 19-22. Answer to problem 1: With a height tions. flight plan specifying 10,500 feet, the proper 19-26.With the solutions to the four binary configuration for the data word would problems given, our study of patterns and appear as follows: waveforms is concluded. The study you made

375 750 1500 3000 6000 12000 24000 48000 96000 101500 feet

0 i 0 ii 1 11 o o o I o LSD MSD 87 90

A 20-3. In the discussion that follows, corre-

Ampinuel. +4 37 WM late the letters in parentheses with those in 73 W7 OANI I IUIVINCI i.I IV INA AI the block diagram. The load level (a)ondi- IV Dom 7 KOMI I4TV 77 MC %AM 2 IV US(C POW tions the memory control unit and error 7 00.71 CLOCK 7 I WIC KAM detector for 1 millisecond. This is the time required to validate and store an input charac- t re. ter into a memory address. Data (b) is loaded 111111111111/11 into the buffer register with a transfer pulse (0). The memory address to be written into is IIIIIMININ1111111111111 cleared with a read pulse (d), and data is then written into that address from the buffer with iii111111111111111:1011 a write pulse (e). The buffer is reset with a 1111111111111111111111111 reset pulse (f) which is developed from the unload pulse (g). The buffer is then loaded with data (the same data just written into Figure 112. Inttgrator circuit output. core) from core by a strobe pulse (h) which is also developed by the unload pulse. The same memory address is cleared again with a read in the section on logic arialysis, coupled with pulse, and the data is written back into it. The this one, provides you with the tools to delay load pulse (j) which occurs 93 micro- proceed with troubleshooting tasks. seconds into the load cycle is used along with the load level for the actual detection of 20. Signal Tracing Techniques errors. If validation occurs on a bit-by-bit 20-1. As the saying goes, "Let's get it all check, the error light remains off. together." Let's get it all together by combin- 20-4. Analyze hobable Trouble Areas. The ing the techniques of analyzing logic, pat- block diagram shows four distinctareas where terns, and waveforms into the technique of error could occur and give an error indication: signal tracing. This will be done by trouble- Buffer register. shooting a typical computer malfunction. Core. Since you are working in a computer system Comparator/error detector. environment, the chances are that you have Control unit. some type of memory unit. As you know, every memory has a control unit. For our 20-5. Buffer register.If a stage of the troubleshooting problem, a memory that is buffer is failing, proper comparison cannot used to store and validate input data has been take place.Also, a faulty control signal selected. The block diagram for this memory feeding the buffer (i.e., reset, transfer,or is shown in figure 113 (printed in the work- strobe) will result in a failure indication. book). 20-6. Core unit. A defective core is 20-2. Analyze Block Diagrams. As you can possibly, but highly unlikely. Cores seldom see in flgure 113, the memory consists of the fail, but don't rule out the possibility of following: failure altogether. More likely, though,one of aInput unit with converter. the control signals that affect the condition of Memory control unit. the core (i.e., read, write, and inhibit) is Core memory unit. defective. Error detector and lamp. 20-7. Comparator/error detector. A defective leg of a comparator circuit could cause an Using our figure, we can now set thescene for error indication. Also, the error light control our malfunction. As data came in the error circuit could be defective, causing the error light went on, but by using the reset switch, light to turn on. the error light went out. Thiserror light 20-8. Control unit. If any one of the pulses didn't come on again until later in the day. feeding or generated by the control unit This indicates an intermittent error condition. becomes defective, the operation is impeded As we stated earlier, intermittent error trou- and an error indication occurs. Considering bleshooting can cause a person to become the fact that this unit receives, generates, and quite frustrated. However, before thisinter- distributes the pulses that directly affect the mittent error turns into a solid error condi- core, wouldn't you say that it would be a tion, there is a certain amount of before the primary suspect when the error light came fact troubleshooting that you can accomplish. on? As a matter of fact, this is where youcan 20-9. Priority Order of Failure Probability. really make money. A definite priority (indicated as follows) is 88 501 Li 'I/ apparent when certain characteristics of the signal trace through the techniques of lvgic, four areas listed above are considered. patterns, and waveform analysis, we should Memory control unit. begin to determine which signals must be Buffer or comparator. verified first, second, third, etc. At the same Core. time, a listing of the boards involved in the entire unit should be acquired or made. Along 20-10. Memory control unit.This unit the side of each board identified, analysis contains six pulse generators: transfer, reset, notes should be made that include conditions write, read, inhibit, and strobe. Generators are which might suggest changing it. Let's analyze likely places to suspect a failure because they each of the signals: usually have extensive circuits. If one fails, TRANSFER SIGNAL the signal may be lost,differentiated, or NOTES: distorted. 1. Pulse width: 4 microseconds. 20-11. Buffer or comparator. Both of these 2. Card A14, monostable multivibrator. units present equal possibilities for failure. A 3. Card Al2, inverter amplifier. buffer usually contains a bistable device made REMARKS: up of more than one stage that is vulnerable 1. Transfer pulse begins at the end of load to failure. If the multiple input gates to these pulse and continues for 4 microseconds. units employ diodes, you can place these 2. Load must be present before transfer diodes high on your nit of probable failures occurs. when an error occurs. In comparators, AND, 3. Results if transfer does not generate, but OR, EXCLUSIVE OR, FLIP/FLOPS, or other load is present: comparison devices are used. Frequently the a. Error light will turn on. transistors or diodes used in comparators b. Data will not be gated into buffer; open or short between their junctions.Also, a therefore, memory loadsall zeroes possibility for error exists when a F/F, setting because the reset cleared the-buffer:. to the one state, is used to provide the ground for the error lamp. A relay may also provide RESET SIGNAL this ground to the lamp. Either type of NOTES: switching without proper control could cause 1. Pulsewidth: 4 microseconds starting the error light to come on. with load or unload. 20-12. Cores. As a rule, cores do not break 2. Card A14, monostable section and inver- down and fail. However, the wiring of the ter section. cores (for addressing, inhibiting, andsensing) 3. Card All, OR gate one leg, and inverter may short or open. More Often than not,the section. current driver circuith fail in a memory unit. 4. Card A13, monostable multivibrator sec These facts lead us to suspect that the cores tion and inverter section. themselves are least likely to cause a failure, REMARKS: and the current driver circuits are most likely 1. Reset pulse begins with load and ends at to cause a failure. beginning of transfer. Results if reset 20-13. Selecting the Approach. Using the does not generate: priority order above, we see that no verifica- a. Error light will turn on. tion of the buffer, core, or comparator is b. Data loaded into buffer will combine possible without verification of control unit with previoualy loaded data. operation. Therefore, the analysis must pro- c. Core memory will load invalid data ceed by examining the logic of the control from buffer and comparison of data in unit. the error detector unit results in error 20-14. Determiningthecontrol signal. correlation. These three consideretions areto be made and determined from the analysisof the memory READ SIGNAL control unit logic: NOTES: Width of the pulses. 1. Pulse width: 4 microseconds starting and Polarity of the signals. ending with transfer pulse. Sequence of operationfor load and 2. Card All, differentiator section. unload. 3. Card Al2, OR gate (one leg). 4. Card A13, monostable multivibrator. 20-15. Figure 114 (printed as a foldout in 5. Card A9, current driver. the workbook) includes a logic diagramof the REMARKS: control unit and timing charts for the load 1. Read signal is converted to a current and unload sequence. As we continue to pulse which causes all the cores to reset 89 4 502 to the Zero state. 2. Strobe pulse width: 0.4 microseconds. 2. Read controls the generation of write 3. Card Al2, two sections of monostable and inhibit. multivibrator. 3. Results if read is not generated: 4. Card A10, inverter section. a. Memory will not clear. REMARKS: b. Write and inhibit will not be genera- 1. Delay strobe causes generation of strobe ted. to occur during a read (memory reset) a. Data storedinbuffer cannot be time. The strobe pulse transfers the loaded into core. memory core data through drivers back d. Error light will come on becausecore into input buffer storage. data and input data do not correlate. 2. Results if strobe is not generated: a. Rewrite into core is incomplete. WRITE SIGNAL b. Memory core unit will contain zero. NOTES: c. No correlationindetector circuit, 1. Write delay pulse wid:41: 4 microseconds resulting in error light indication. (starting at the end of read). 2. Write pulse width: 4 microseconds (start- 20-16. Analyzing the conditions.If any ing with the end of write delay). unit, buffer, core, comparator, or control fails 3. Card A10, two sections of monostable in any part of its circuits, the error circuit multivibrator are wed. provides a visual sign. The primary reason for 4. Card A9, current driver section. thisisthat input data is routed to the REMARKS: comparators for later use in the comparison 1. Write signal is converted into a current cycle. Further analysis shows thatany one pulse used to load the data. control signal including unload also providesa 2. Results if write or write delay generators visible error indication. However, the load malfunction: signal not being present (even if data is to be a. Memory cores will always be zero; stored) inhibits all memory action. This is read will reset them. true for two reasons: (1) without loadno b. Correlation will be improper because transfer or reset action can occur, therefore, on the unload (rewrite) cycle, data the buffers cannot be cleared and loaded, and stored in buffer and loaded inmem- (2) without load, the error detector cannot ory will zero. sample the comparator output. With this logic c. Error light will come on. and function analysis completed, and a set of notes similar to the items we listed above, INHIBIT SIGNAL predicting the failing component or assembly NOTES: is possible. 1. Inhibit pulse width: 9 microseconds. 2. Inhibit delaypulse width: 2 micro- 20-17. Isolating the malfunction. In this seconds. hypothetical problem, an intermittent error 3. Inhibit delay pulse starts at the end of was indicated. From the logic analysis, we read. understand that: 4. Card All, 2 sections of monostable Load must have been present. multivibrator and inverter are used. Correlation did not occur. REMARKS: 1. Inhibit signal restricts the buffer data Unfortunately, no further positive prediction (zero bits) from loading into cores be- can be made. However, some probable hy- cause of its polarity. potheses can be assumed: 2. Results if inhibit or delay inhibitgenera- Core memory is good. tors malfunction: Error detector circuit is good because a. Improper data load to core memory. manual reset extinguished the lamp. b. Possible switch of cores when data Buffer and comparator may have a faulty bits vire zero in buffer. component. c. Possible switch of all cores in memory Most likely area to validate first is the because of write current. memory conrrol unit. d. No correlationin detector circuit, 20-18. Validath:g the Memory Control resulting in ertor light indication. Unit. Now comes the time for the use of the oscilloscope and physical signal tracing. As- STROBE AND DELAY STROBE sume that each test point is available while NOTES: the unit is in an operational configuration. By 1. Delay strobe pulse width: 1.5 micro- synchronizing the scope (preferably a memo- seconds. scope) on load, each of the pulses generated 90 t- ,.) 0 d L193 by the memory control unit can be checked. for its desired characteristics may provide z Further, each pulse can be checked for pulse clue. Signal det*rioration is often a prelude to width and other relationrhips. Since the prob- signal failure. lem is intermittent, the complete absence of a 20-19. If you find such a clue, write a note pulse is unlikely. But, examining each pulse about it, draw its measured waveform, and

(----/Whoa!What's thatI see?

Figure 115. Display console trouble. 91 '19y

ask yourself, "Does the pulse width exceed its Impropev timing (consider this as an parameter? Does it have too short a pulse unlikely possibility because the symbols seem width? Is the pulse amplitude too low or too to be proper). high? Is clamping or base reference voltage proper?" Ask any question that may lead you 20-23. Our repairman knows that with the to develop an opinion or cause you to select a front intensity control at maximum no re- specific approach when the failure becomes trace should be visible. Without going into solid. If you find the slightest clue, write it voltagelevels(because of the variety of down and list the specific usemblies (PCB them), it is apparent that retrace is a function cards) involved. If you are proven right later, of blanking/unblanking. Further, retrace oc- you will know just what cards to remove. If curs at the end of a sweep cycle when the all signals look, measure, and recur as speci- sweep generators are allowed a short period in fied in the performance standard, begin the which to return to their starting point. If same procedure for the buffer, then the blanking is improper, the return energy pro- comparator, and finally, the sense amplifier duced by the generators is amplified and and address control cards within the memory presented as retrace. unit. As we stated earlier, do not discount the 20-24. Now our man knows where to look. cores themselves as a possibility; just consider What should he do? Get the oscilloscope? Not this possiblity as very unlikely. yet. First, examine the logic and alignments 20-20. The example just completed showed tosee which controlis involved inthe one instance in which the oscilloscope was blanking/unblanking circuit. Then ask: used in troubleshooting. We could present What cards are involved? numerous other examples of different parts of What controls are involved? systems where the oscilloscope is used for Is there an alignment for correcting this signal tracing during troubleshooting periods. problem? Rather than do that,let's develop some Can the work be done on line? problems in certain areas of a computer 20-25. He answers these questions, and system and determine when the oscilloscope then he gets the oscilloscope. From his list of should be used. test points he quickly and accurately meas- 20-21. When to Use the Oscilloscope. If ures the controlling waveforms and records someone tells you that the scope will be used his findings. From his Cindings he researches for every troubleshooting problem that is the alignment for the waveform test point encountered, don't you believe it. Just be- that is improper. He compares the waveform cause you get an error indication doesn't with the standard. Can the pot or variable mean that you must scope the computer. capacitor range far enough to correct the 20-22. Problem 1: Look at the repairman problem? This data should be available in in figure 115. He saw something on the own notes or it definitely can be located in display unit that triggered his trouble button. the pertinent TO. A quick look verifies a Can you pick out what he saw? If you see the misalignment or a malfunction. If there is a retrace from the map outline, you've got it. misalignment, realign; if a malfunction exists, Our repairman walks back to the console. He change the card and then align. takes a real close look at the display and finds 20-26. In this problem the oscilloscope retrace from the track dot, tag, end symbol came into play after research and display (A in fig. 115). Where is the trouble? This is manipulation were completed. A definite pre- no time for an oscilloscope since he already cise area was identified in the research as most has what amounts to one in front of him. probable. Verification of opinions and conclu- Why not use it? Okay, now our man goessions was performed quickly and accurately through several tests with the console itself. with the oscilloscope, performance standards, The checks he makes include: and notes about the signal area. a. Reducing intensity with the front panel 20-27. Problem 2: While the computer is intensity control. The retrace gets lighter and, cycling, a failure occurs. From the study of just before losing all signal, it disappears. That diagnostic programs completed in Chapter 4, won't help. you know that the problem must first of all b. Selecting different operating modes. AU be localized. Clearly, then, this is not the time have the same indications. The problem seems to use the oscilloscope. However, it is the to be localized to the Z-axis (unblanking/ time to run the diagnostics. Selection of the intensity). It might include: proper diagnostic may be possible if interpre- High voltage. tation from error lamps, failure printouts, and Improper voltage levels in intensity oroperational printouts provides a clue. In any I unblanking event, running a diagnostic is the first logic 5u5 92 474 7 45 stepnot troubleshooting with the oscillo- 21. Analyze Fault Location Indicators scope. 21-1. The use of fault location indicator; is 20-28.Interpretation of the diagnostic another in the series of troubleshootng tech- printout may identify the exact card or card niques to be discussed in this chapter. Fault group replacement that will correct the mal- indicators,asthe termimplies,identify function. Should this be the case, the oscillo- (through the use of various types of lamps) scope would not be used. However, if the card where a malfunction occurred within a sys- replacement doesn't succeed, then what? tem. An indicator may be installed anywhere Back to the drawing board and on with more that is convenient for visual observation. In function and logic analysis while recycling the order for these indicators to convey any diagnostic. Only this time, the diagnostic will meaning to maintenance personnel, they must have a loop set up in it, allowing us to check be appropriately labeled, and the labels or the functional area that is suspected to belabeling must be kept in a readable condition failing. The function and logic analysis identi- at all times. fies data peculiarto the circuit.It also 21-2. Since you are training on a computer identifies specific waveforms, data patterns, system, you should already be somewhat and voltage amplitudes. familiar with itsfault indicator assembly. 20-29. With the probables listed, additional Therefore, a study of selected fault indicator cards listed, specifications for the patterns assemblies of different systems would be of and waveforms at hand, and a loop program little use to you here, especially when analysis (manual or software) set up, the oscilloscope proves they are all the same in principle. This can now be used. The loopthat is set up in text is used to present a study of these units the diagnostic (as explained in Chapter4) in terms of their: allows point-to-point signal tracing. The oscil- Uses. loscope is used to verify each point and, at Types. these points, you can make a comparisonof Technical order information. measured data or waveforms with the specifications. 21-3. Use of the Fault Indicator Assembly. 20-30. If you are beginning to think thatThe two uses provided by the fault indicator signal tracing with an oscilloscope is a last assembly are the identification of a failing ditch troubleshooting technique, don't you function or subfunction and the identification believe it. Troubleshooting with the omillo- of correct or incorrect data flow. Regardless scope is indeed a technique used after consid- of the extent of coverage that the indicator erable study and analysia has been performed. has on a panel, only one of these two uses is Exercising the equipment, researching techni- possible. For both uses to be present on a cal data, and applying knowledge of theirpanel, at least two indicators must be used. functions to components are usually per- Let's examine this thought more thoroughly. formed first. These elements may take from a 21-4. A fault indicator or data flow indica- few seconds to many hours to accomplish. tor lamp is frequently located on the panel or Your expertise on the equipment may be so assembly containing the circuit it represents. good that you know just what action is This arrangement is convenient for verifica- required and that signal tracing pin 17 of card tion of that function or subfuncton of the A5 will provide the solution to the problem. system. It does, however, have a distinct Or, your expertise and notes may have been limitation; that is, each cabinet, rack, chassis, leading you to the conclusion that pot R5 is or drawer must be inspected in order tolocate deteriorating, and a scope display will verify the inoperative function. This system is cum- it. bersome, time-consuming, and inefficient. To 20-31. Referring back to paragraph 17-3, overcome this limitation, additional indicators where the advice to think before you act was areinstallecat a centralized, convenient given, this advice applies extremely well to location within the system. Notice the words the use of oscilloscope when troubleshooting. additional indicators. The need for primary THINK the problem out before you jump indicators, those located at the function, is into the middle of it with a scope. Analyze necessary in addition to those remoted to the the problem and its symptoms; check the more convenient location. Some of the most fault and facility panels for the various error used locations of conveniences are: indications that usually accompany equip- Front doors of cabinets. ment failures. The indications provided by Fault and facility panels. this panel can give you a definite starting Fault indicator and confidence indicator point for troublesnooting. consoles. 93 - 'ifs COMPUTER i I-ARITH CONTROL ]

I LOGIC CHECK SIGN 1 I_ 1 L

LOGIC CHECKi SIGN

I RACK A2 RACK AS RACK A4 - 4 ------P - -a ------

ir 1

RACK A6

Figure 116. Typical fault facility panel.

21-5. Thus far we have established thatsubfunctions within the arithmetic control each function or subfunction within a system unit. For explanation and use in this study, will likely have an indication of operation oronly the logic check sign indicator is exam- failure. Further, because of the volume ofined. Before identifying when the lamp would circuits and placement of units, a conven- light, review the other elements of the figure. ientlylocatedfault indicator assembly isOnly cabinet 53 is involved, but within the made. This assembly, called by various names, cabinet, racks A2, A4, A5, and A6 provide provides at a glance the status of all, or most some control over the logic check sign fault all, equipment within the system. We also indicator. The light will turn on when an identified the two uses for this assemblyincorrect check sign(parity) error occurs (para. 21-3). Let's examine each. from a subfunction in rack: 21-6. Identify the status of the function. The indicators 'are positioned in groups that A2 when A2-DS1 lights. are associated with specific Ainctions of the A5 when A5-DS1 lights. equipment. Figure 116 illustrates this arrange- A4 when A4-DS1 lights. ment. The block to the right represents a A6 when A6-DS1 lights. portion of the central fault panel. It has a Shown in the figure are five additional fault functional title, computer arith control, and indicators for rack A6. They are DS2, 3, 4, 5, has 10 lamps representing indications ofand 6. If one or more than one of these . 94 i47

ONLINE

XMT SELECTOR

SCAN XMTG WAIT

Figure 117. Transmit status panel. indicators turn on, the rackA6-DS1lamp are lit and go off. This sequence is repeated lights also. each time data is transmitted and, when the 21-7. Lamps A2-DS1, A4-DS, A5-DS1,and cycle is completed, lamp A returns to the ON A6-DS1are rack lights and receive their state. inputs from circuit indications. The breakout 21-9. Another example of data flow is that of racks A2, A4,andA5 issimilar to that of lamps associated with a register or counter. indicated for rackA6in the figure. For this In a register, grouping of its lamps provides a study, the detail in the figure is sufficienc. If display which, when read, reveals the data any rack light comes on, it provides the stored. This is contrasted with counter opera- necessary input to the cabinet light which, in tions where each lamp turns on and off at a turn, provides the input to the fault indicator predetermined rate, thus making count deter- logic check sign located in the arith control mination difficult. However, the experienced area of the fault facility panel. From this repairman can look at the lamps of a counter indication, we determine that a problem and determine if it is stepping correctly by its exists in the arithmetic control circuits and, as stepping sequence and rate. All of these a troubleshooting aid, the fault indicator has examples show the second use of fault loca- directed attention to a local area. But, what tion indicators, i.e., data flow. To give you about data flow? some idea of the more common equipment 21-8. Identifythe status of data flow. configurations of fault indicator panel assem- Circuit lamps installed on panels are used in blies, we will identify various types. various methods to identify data flow. In 21-10. Types of Indicator Panels. Figure figure 117, four lamps are used to display the 118 (printed in the workbook) portrays many status of a transmitter (XMTAor B) during of the different arrangements of indicators transmission time. In this system only one used for the two purposes stated. For identifi- lamp is on at any given time. For example, cation correlate their use as indicated below when data is being transmitted by XMTA, a with the letter that corresponds to a callout sequence occurs in which lamps B, C, and D letter in the figure: 95 1-198'

0, 1111s) ts _stye41;0 um "-ivratot isocl,.. 6644 St a644" 0664 .006 tat ,00Sao., uato`: ow' wv" -10° 011...co°.I. u to.OSV: 14014,:i A 6144Vigeb.e.. It$1%.:16.04°1y...1., tt . 0 Se. AA 1".. t0C4 AAA °66t. L40114 S:tg.it 46.0 111 °IA' I, * 00 - 0.4 --- 11.0441010 AAAAA . %VA 64 001.4" .4 NI/ 40AT i IA 006 V . 0 e.c.1.0%/' 1. -aro III (*101 NOOT eOVIAA Ill AAAAA cf 1111011 ) MI" 0""

*ICC AS 1.041 INPus txor, *ACK As ICLOCUON OUSIinatiT Mac MICA laual 01)1ALS 101A72.011

AAAAAA 0101 Lime WO 11101 PtilP0aumocc .0.11001 C*Oul OA.313)./CA.13

111:AVANII

"Talfl .ott"P

L."::Stria?. ONTICT011

°"413:18:OLIt"

Nr 01-,

Figure 119. Technical order fault indicator information. 96

503 Soo

almost in the center. The chart gives the ENTER DCU AND CONSOLE CONFIGURATION following information: Y IF UNTT IS IN THE SYSTEM N IF NOT IN SYSTEM Rack. * TO TERMINATE AND LEAVE REMAINING Row (the card is located in). ENTRIES UNCHANGED / TO RESPECIFY Card number. D TO DISPLAY CURRENT CONFIGURATION Type of card. DCU CONSOLE 01 02 03 04 05 06 07 08 09 10 11 12 13 14 The malfunction is in rack Al, row 700, cards 22-4. One of the five characters listed in 21 through 30. Note that the card typesvary this second part of the message is printed out from inverter (INV) to single-shot (SSA). This for each DCU end console. Eachresponse for is important to note because it tellsyou a unit is a single typed entry. The diagnostic immediately that your ipmove and replace test performs the required checks in accord- action will involve differerit card types. There- ance with your selection. If a solid error is fore, you must be extra careful in getting the detected (for instance, on the loopon solid right card with the right part number in the error check), a message is printed on the right location. You may be thinking that this keyboard which reads: CHANGE DISPLAY is no big thing, and it isn't untilyou get CARD GROUP XXXXXX CON XX. On the careless and insert the wrong card ina actual printout, the Xs would be replaced by location. Normsdly, when this happens you either a letter or a decimal number. Figure can expect maximum smoke and/or more 121 (printed in the workbook) shows that the downtime. But, what really hurts is the fact alphanumeric code printed is a cardgroup. that you feel like a dwarf among giants Let's assume card group B802 is typed out. looking for a hole to hide your head in. Now Referring to the self-test table (fig. 121),you you remove and replace cards 21 through 25 look for card group B802. The columns next and, if this clears the fault indication, you to the card group designate the rack DBSG, have removed the faulty card and the equip- row 10, and cards 36 through 41. Additional ment isagain operational. If this action information is given in self-test tables in the doesn't clear the problem, you then remove form of the part numbers of the cards and replace cards 26 through 30. involved. This information is provided for two 22-3. Another type of remove and replace primary reasons. First, for replacementpur- technique is that which is used in conjunction poses, and second, for reference purposes to with a programmed diagnostic test. A message fmd out from a parts list (IPB) the type of as indicated below is provided by a control card. program once the diagnostic is called in from 22-5. We have presented only two examples thestiaragemedia. You respondto this of the group removal and replacement tech. message for program operation. Note that the nique of troubleshooting. Thereare other printout isin two parts. The first partapplications, but their techniques are the indicates program options, and the second same in principle. It is probable that this part (titled "Enter Data Control Unit (DCU) technique of group removal and replacement and Console Configuration") contains perti- will be the from:: runner in newer computer nent information regarding the running of the systems, especially where integrated circuits diagnostic: and modular units are involved. This tech- DISPLAY DIAGNOSTIC PROGRAM nique provides for quick restoration of equip- DEFINITION OF SENSE SWITCH FUNCTIONS ment; therefore, it is an effective technique SW1 LOOP ON SOLID ERROR that is often used on simplex equipment. Be 8W2 LOOP ON INTERMITTENT ERROR on guard, though, since a card removed as SW4 INHIBIT TYPEOUT faulty but not repaired creates a catastrophic 8W5 CONTINUE TEST SW6 INHIBIT ELECTRONICS CONSOLE TEST situation. If you or your fellow workers fail SW7 INHIBIT DISPLAY BUFFER AND DCU TESTto uphold the integrity of the quality of SW8 DUMP ERROR TABLE maintenance, the technique fails.

98 510 177 (1) Counters and registers in operation (A). working back through the error indicators to (2) Information registers displaying mem- the end itemthe failing unit. Once at the ory core data (B). failing unit he must know how to trouble- (3) Confidence indicators detecting fault shoot it; he surely can't remove and replace conditions (C). all the circuit cards within the failing unit, or (4) Fault and facility panel ;slowing fault can he? Depending on the computer system, status(upper portion) and data transfergroup removal and replacement is an accept- (lower portion) (D). able and adaptable method of corrective (6) Status panel displaying status of the maintenance. computer and associated equipment (E). (6)Confidence indicator console panel 22. Group Removal and Replacement indicating status of the entire system (F). Troubleshooting Technique 21-11. Technical Order Information. Many 22-1. Certain eystems within the Air Force portions of the technical orders describe or inventory are built on a simplex mode that identify each of the indicators on the panel, does not allow the maintenance man much board, drawer, assembly, or cabinet. The parts time for repair. In this case, an accepted of technical orders and their series which method of troubleshooting is group removal provide data for interpretation and inforrna; and replacement of circuit cards. For in- tion on the use of indicators are listed below: stance, if you are called to repair a malfunc- Circuits and diagrams: -3 series. tion, your first action would probably be to Operations chapter of the service manual: analyze the symptoms by use of fault lights, -2 series. printouts, facility lights, etc. Let's suppose Principles of operation chapter of the that the fault indications showed a timing service manual: -2 series. error. You now have one of two approaches Maintenance chapter of the service man- to choose. First, with a schematic or block ual: -2 series. diagram, isolate the error to a certain area or Fault location guides: part of the mainte- group of cards. Second, usecharts that nance chapter. identify the trouble symptom and list the Control and indicator tables: within the cards to be removed. For systems designed to operations chapter. use the group removal andreplacement tech- faster. For 21-12. Figure 119 shows three examples of nique, the second method is lamps example, seefigure 120 (printed in the the various methods in which indicator workbook) for a chart that shows equipment are shown in technicalorders. These three examples are not the only methods used, but arranged by "alarm groups." The equipment 119, A is arranged in this way for repair purposes. they represent the extremes. Figure Each group contains from three to 14 cards. shows all the indicator lights, theirlocations, When The group removal and replacement concept their purposes, and their connections. dictatesthat removal and replacement is any one of these lights turns on,the RE- restricted to one-half of the cards, not to CEIVE light also turns on. Figure 119,B shows a portion of a table whichidentifies exceed seven. If after removal and replace- each lamp on a status panel by number,title, ment of the prescribed cards the trouble has of the been cleared, the cards are taken to the card and. color. Under the function heading tester for checkout and location of the faulty table, a brief description of the lamp's pur- component. If the trouble still exists within pose is given. Finally, in Cof the figure, the indicators show a rack (36A2, rack A3) error the group, removal and replacement of the light as well as the functional errorlights. second half of the cards is performed. Notice that any functional error causes an 22-2. Let's try a sample case in using the output from a higher order sensing unit(input alarm group chart. While checking system or output) to thehighest order sensing unit operation, you fmd a fault light indicating an within the cabinet. For example, the figure azimuth nounter error. Referring to the block indicates an input unit error causes an output diagrams, you find that the failing circuit is from the higher order battery data link sensor located in rack Al (see fig. 120, printed in the which, in turn, provides an input to therack workbook). Turning to the alarm condition A3 sensor. charts in the technical order, you note the 21-13. It is evident that the repairman's job page that lists rack Al. The rack number and of troubleshooting is simplified when system alphanumeric designator are, in most cases, in TOs contain fault detection information as the lower center of the page within the TO. outlined in figure 119. Simplified, that is, if The azimuth counter circuit is shown as being he knows how to use the informationin located in the lower one-third of the chart, 97 511 .5'0A,

Equipment Familiarization (17-2) Intensity (11-4, 17, 28, 29, 30) Error Indication unit (1-37, 38) areas (204) Interrelationships of Functions (10-16) buffer (20-5) comparator (20-7) control unit (20.8) K core unit (20-6) Keyboards (1-14-20; 2-11) priority (20-9) operational checks (1-19) Error Intermittent (20-17) L F Lamps and Audio Alarms (2-9) Failure Level Detector (14-19, 20, 21) catastrophic (15-8) Line Data (2-2, 3, 9, 11) causes (15-20) quality (1-30) characteristics (20-9, 10, 11, 12) Logic, analysis (18-12) clusification (15-8) conditioned (18-10) detection (15.21) equation (18-6) intermittent (15.-8) function (18-6, 12) isolation (15-21) functions (18-4) machine state (15-8) high (18-4) random (15-8) low (18-4) solid (20-19) nonstandard (18-1) steady state (15-8) true (184) Fault variables (18-4) detection (15-6, 16) Loop (20-28, 29) indicators (21-1, 2, 3, 4) isolation (15-6; 18-13, 14) M Flood Gun (8-16) Maintenance Program Flow Chart add class (15-24) computer test (15-23) analyze (15-1) I/0 test (15-28) as a tool (15-3) symbols (15-21; 16-4) considerations (154) tagging (16-5) defined (15-2) Flow Diagrams (15-7) fundamentals (15-6) Frequency interrupts (16-8) adjustment (7-14) loop (15-24,25) shift keying (1-29; 14-9) manual intervention (16-9) shift modulation (14-13) primary function (15-2) variations (7-2-6) start big (15-11) start small (15-10) G types of (15-15) Group removal and replacement, definition Malfunction (20-25) (22-1) Marginal Checking (15-12) Matrices (13-6, 7) Mechanical Adjustments (8-1, 2, 3-10) H Memory Units (13-1) Height-Finder nod (1-13) classes 1 and 2 (13-2) radar (1-10) Message Processors (14-1) Horizontal drive unit (1-37, 38) Meter, ohm, adjustment (4-9) Meters (2-2) AC voltmeter (2-2) I DC meters (2-2) Indicator differential (2-2) confidence (21-6, 7, 10) Meters and dials, adjustment of (Sec 4) data now (21-6, 9) balancing (4-2) fault (21-1, 2, 3, 5, 7, 9, 10) centering (4-3) parity (21-6) ohm adjust (4-3) primary (21-4) Miller Circuit (5-6-7) status (21-10) Mil-Std-806A (18-1) Integrated Circuit (5-11) Mil-Std-806B (18-2) display adjust (8-17) Misalignment (20-25) 100 3. 512 5-0 /

Index

A Computers, general-purpose (15-4) Adjust, read/write amplifier (8-12)* Confidence (15-2) Adjustments (3-7, 11; 5-14; 7-13, 14; 8-1, 2, Controls adjustment (9-3) 9, 17; 9-3) definition of (Intro., Chap 2) mechanical (9-6) instructions (3-12) principles of operation (3-5) Alignment (20-25) purpose (3-2) block diagram (10-41) types (3-3) concept (10-1) variable (Sec 3; 3-2; 5-1; 7-11, 12) definition of (Intro., Chap 2) Conversion, MP (144;; objective of (10-2, 33) Core Memory (13-2) panel (8-21, 22; Fig. 55) Counters (13-6, 7) Amplifier and Pulse Generator (Sec 5) CRT Display (2-3, 4, 8, 11) Amplifier, video (2-3; 9-4) Analog Data (9-5) D Analysis Data Input/Output Circuit Adjust (9-1) approach (20-3) Decibel (1-31) diagram (20-15) Decoders (13-6, 7; 14-6) function (20-16) Deflection (11-5, 10, 17, 18, 26, 27, 34, 41) Angle Mark (1-13) Delay line (13-2) Antenna, beacon (1-2) adjust (8-9) height-finder (1-11) Dependent/IndependentFunctionsdefined radar, search (1-11) (10.27, 28) Antennae, directional (1-6) Diagnostic, program (15-17) Automatic Change Pulse (1-12) Diagnostics (15-2; 20.27, 28, 29; 22-3) Digital Data (9-2) B analyzing (19-3) Beacon (1-8) content (19-3, 4) Binary (19-4) information (19-3) Boole, George (18-3) manipulated (19-5, 6, 7) Boolean, algebra (18-3) program (19-3) equation (18-4, 5) Dipole Data (1-29) variables (18-7, 8, 9) Disk Memory (8-10; 13-2) Bracket pulses (1-8, 9) Display Buffer Storage (8-17) blanking (20-23, 24) oscilloscope (19-11, 13) C principle of (11-6, 7, 10, 16) Capacitor Read Only Storage (13-2) retrace (20-23) Capacitors (9-4) symbol (20-22) life span (3-7) tag (20-22) trimmer (3-6) track dot (20-22) tubular (3-7) unblanking (20-23, 24) variable (3-5) Drum (13-2) Central Processor (1-40; 2-8, 9, 11) head lust (8-4, 5) Charactron Tube (11-10) Duty Cycle (7-15) Code alpha (19-12) E Fieldata (1-16,17, 18; 19-12) Electrical Adjustment, principles of (8-11-24) numeric (19-12) Electromechanical devices, defined (12-1) Coincident Current (8-14) Encoder (14-6) *Indicates paragraph number, unless otherwise stated. 99 t- 0 -/ 01 3'01

procedures (17-1, 4) Tape Head Adjust (84, 7, 8) sequence (17-3) Tape Memory (13-2) signal injection (18-16) Tape Transport Unita (1-21; 2-11) split-half (18-15) Technical Orders waveform; (18-17; 19-1, 2) adjustment instructions (3-12) with oscilloscope (20-30) alignment (746) Muth Table (18-7, 8, 9) maintenance chipter (3-12) Typotron Tube (11-10) preventive maintenance (Chap 1, Intro.) preventive maintenance manual (746) series (21-11) V service manual (7-16) Video (94; 11-4, 24, 31) Test instruments amplifier (see Amplifier) oscilloscope (18-16; 20-20, 21, 22, 25) Variable Capacitor (20-25) vacuum-tube voltmeter (18-16) Variable Controls (see Control) Thin Film Adjuot (843) Vertical Drive Unit (147, 38) Timing (7-2-5; 114; 144, 6) Vector Diagrams (11-7) Timing devices, adjustment of (Sec 7) Thoing Routines (7-13) Time Sharing (11-12, 23; 19-8) Waveform Timing Unit (1-37, 38) amplitude (19.9, 21, 25) Transformer Read Only Storage (13-2) amplitude-modulated (19-9) Mansistor, operation (10-13) analog (19-8, 14, 15) Mansmission line, linear amplifier (1-28) digital (19-3-8, 11) Transmission of Data (9-2) formula frequency (19-9) Transmission Path (142) frequency-modulated (19-9) Transponder (1-8) load level (20-3, 16) Troubleshooting multiple-cycle. (19-9) block diagram (18-13, 14) patterns (19-16, 17) indications (20-31) reading (19-15) instruments (18-16) rectangular (19-16) intermittent (20.2) signal tracing (20-1, 18) patterns (18-17;194, 2) square (19-16)

*U.S. OTIMIMIT OfPICI: If7S441-220/1I4

Ant POIlit MJCAPS: MA (761114) MOO

102 514 .51-44 3 Modems (1-41; 14-12) stored (15-5) Multiple Club Approach (15-13) wired (15-5) Multivibrators (7-10) Programming (11-11, 14, 15, 21, 24, 25) Programming Techniques (15-9) Pulse Generator (5-8) Noise Cancler (14-12) use of RC time constant (5-9) North Magnetic (1-12) true (1-12) Radar Nulling, principle of (12-5) definition (1-2) height finder (19.18; 19-22) 0 principle of (11-16) Operational Amplifier (5-2-4) range (19-11) Operator, Communication (16-7) returns (1-2; 1-7; 2-3, 4, 11) Oscillators (7-10) rotation(1-12, 13; 2-11) Oscilloscope (2-3-6; 20-26, 27, 28) video (1-7) Radar and Beacon (1-1, 2) Radix Antenna (1-11; 2-11) Parity (19-12) rotation (11-18, 19) Performance Checks Random Access (13-5) CRT display (1-36) Range Mark (1-13) parts of a display (1-37) Radio Wave Reflection (1-3) visual examination of mechanical usem-Rate Feedback (12-6, 8, 10) blies (2-10- RC Time Constant (5-9, 11, 12) Potentiometer (3-9, 10; 4-9, 12; 5-10; 6-5, 6; Read/Write Amplifier Adjust (8-12) 8-17, 18, 19-22; 9-4; 20-25) Read/Write Cycles (13-3) application of (4-5) Reference Voltages (2-2, 11) carbon pile (3-9) Registen (13-6, 7) linear (3-11) Relays (9-6) null adjustment (4-7) Reliability (15-2) ohms adjustment (4-9-12) Routine tapered (3-11) iiddreuing test (15-26) wire wound (3-9) beat test (15-26) Power Supplies (1-45; 2-2, 9,11) computer test (15-22, 23) a4justment of (6-1, 2) core plane crosstalk test (15-26) high-voltage (6-6) I/0 test (15-27, 28) low-voltage (6-4) memory test (15-26) Printer Power (1-34) program similarities (15-29) Printers (1-33) character formation (1-34) switches (1-34) Printouts (1-35; 2-8, 11; 20-27, 28) Saturable Reactor (9-6) error (16-11) Selective Identification Feature (1-8, 9) error table (1646, 17) Self-Test Tables (22-4) formats (16-18) Sequencing (14-6) interpretation (16-1; 20-28) Sequential Access (13-5) uniformity (16-10) Serial/parallel functions, defined (10-28, 29, Process of elimination (15-14) :40) Processing, MP (14-8) Servos (1-22; 2-11) Profram units (2-3, 10, 11; 12-22) confidence-diagnostic (15-19) Signal Thicing (20-30) control (16-6) Spacebar (12-25) diagnostic (18-11) Space elements, KPP (12-26) executive control (16-3) Spacing theory, KPP (12-24) fixed (15-4) State Indicators (18-2) multiple clue (15-18) Storage devices, adjustment of (Sec 8) orpnization (16-3) Storage tube adjust (8-16) overall (15-18) Switches (14-6, 7) process of elimination (15-18) Symbol Generator (11-8) standardization (16-2) Symbols (10-37) start big (16-18) System Integrity (15-2) 4 101 TABLE OF CONTENTS

Study Reference Guide

Chapter Review Exercises

Answers For Chapter Review Exercises

Volume Review Exercise

ECI Form No. 17

Text Chart and Figures

516 co 5 7-V

30554 02 21 WORKBOOK

System Maintenance

This workbook places the materials you needwhereyou need them while you arc studying. In it. you will find thc Study Reference Guide, the Chapter Review Exercises and their answers. and the Volume Review Exercise. You can easily comparc textual references with chapter exercise items without flipping pages back and forth in your text. You will not misplace any one of these essential study materials. You will have a single reference pamphlet in the proper sequence for learning. These devices in your workbook are autoinstructional aids. They take the place of the teacher who would be directing your progress if you were in a classroom. Thc workbook puts these self-teachers into one booklet. If you will follow the study plan given in "Your Key to Career Development." which is in your course packet, you will be leading yourself by easily learned steps to mastery of your text. If you have any questions which you cannot answer by referring to "Your Key to Career Development" or your course material, use ECI Form 17, "Student Request for Assistance," idcntify yourself and your inquiry fully and send it to ECI. Keep the rest of this workbook in your files. Do not return any other part of itto ECL

EXTENSION COURSE INSTITUTE Air University

517 541i"

CHAPTER REVIEW EXERCISES

The following exercises are study aids. Write your answers in pencil in the space provided after each exercise. Immediately after completing each set of exercises, check your responses against the answers for that set, Do not submit your answers to EC! for grading.

CHAPTER 1

Objective: To show an understanding of the requirements for and importance of performing checks on equipment.

1.List four problems that arose from early practices of performance checking. (Intro.)

2.Operational/performance checks are usually performed in input/output equipment using what type of method? (Intro.)

3.Define "radar." (1-2)

4. What type of antennas do radar sets use? (1-6)

S.Radar returns received by data processing equipment can be received in what two forms of video? (1-7)

6. MTI video is used to .(1-7)

7.State briefly the function that a beacon is capable of performing. (1-8)

8. What do the letters 1FF and SIF mean? (1-8)

9. How do height-finder antennas differ in operation from search radar? (1-10,11)

51 a I

STUDY REFERENCE GUIDE

I. US,!his Guide us a Study Aid.It emphasizes all important study areas of this volume. 2.Use the Guide as you complete the Volwne Review Exercise and for Review after Feedback on the Re.sults.After each item umber on your VRE ih a three digit number in parenthesis. That number corresponds to the Guide Number in this Study Reference Guide which shows you where the answer to that VRE item can be found in the text. When answering the items in your VRE, refer to the areas in the text indicated by these Guide Numbers. The VRE results will be sent to you on a postcard which will list theactual V RE items you missed.Go to your VRE booklet and locate the Guide Number for each item missed. List these Guide Numbers. Then go back to your textbook and card-4y review the areas covered by these Guide Numbers. Review the entire VRE again before you ke the closed-book Course Examination. 3. Use the Guide for Follow-up after you complete the Course Examination.The CE resultswill be sent to you on a postcard, which will indicate "Satisfactory" or "Unsatisfactory" completion. The card willlistGuide Numbersrelating to the questions missed. Locate these numbers in the Guide and draw a line under the Guide Number, topic, and reference. Review these areas to insure your mastery of the course.

Guide Guide Number Number Guide Numbers 200 through 221

200 Introduction to Performance Checks; 211Electromechanical Devices; pages 52-57 SourcesofDataAffecting Operational Checks:RadarandBeacon. Keyboards; 212 Memory Units; Message Processors; pages pages 1.-6 57-61 Analyze Computer 201Sourcesof DataAffectingOperational 213 Programming; Programs: Maintenance Checks: TapeTransport UnitsPower Main te n an ce Supplies; pages 6-14 Program DefinedConfidence-Diagnostic Program; pages 62-65 202Devices Used to Accomplish Performance 214 Analyze Computer Maintenance Programs: Checks; pages 14-19 Causesof System FailureInput/Output (10) Test Program; pages 65-70 203 Adjustments;Characteristicsof Variable Controls; pages 20-23 215Interpret Maintenance Program Printouts; pages 70-74 204 Adjust Meters and Dials; pages 23-25 216 Troubleshooting;Troubleshooting 205Amplifiersand PulseGenerators;pages Considerations; pages 75-77 25-28 217Analyze Logic and Wiring Diagrams; pages 206 AdjustPowerSt Applies;AdjustTiming 77-82 Devices; pages 28-31 218 AnalyzePatternsand Waveforms; pages 207Adjust Storage Devices; pages 31-37 82-88

208Adjust Data Input and Output Circuits; 219Signal Tracing Techniques; pages 88-93 pages 37-38 220 AnalyzeFault Location Indicators; pages 209 Alignments;AlignmentConcept;pages 93-97 39-46 221 Group Re mo v al and Replacement 210 Displays; pages 46-52 Troubleshooting Techniques; pages 97-97

5(, 22. What are four basic portions of almost all display units? (1-36,37)

23. What is the assembly in a data processor which verifies performance? (1-40)

24. Most performance checks used in data processors require the (1-41,42)

25. What four elements do most power supplies have? (1-45)

26. What are the three common methods of regulation of a DC power supply? (1-45)

27. What two types of devices are usually included in DC power supplies which aid in verification of its performance? (1-46)

28. List the areas of a computer system which usually require the use of a meter while performance checking is performed. (2-1,2)

29. The oscilloscope is used extensively for equipment validation. List some of the elements within an oscilloscope display that are checked during performance checks. (2-3)

30. How is radar data entry usually verified? (2-3)

31. List the devices usually used when performing oPeration checks. (2-2-10)

4 .7 v

10. What circuit is often incorporated in dataprocessors to compensate tin variations from north? (1-12)

11. A visual check for verification that the,nod angle ofa height finder is accurate is made by using and measuring (1-13)

12. Striking a key on a keyboard results in mechanical,electromechanical, and electronic actions. For this action to be useful for a dataprocessor or computer, what electronic action must take place? (1-16-20)

13.In what two general ways maya keyboard be usbd? (1-16,20)

14. An electrical error voltage is used ina tape transport unit for what purpose? (1-22)

15. Performance checks can be expected to be performedon which assemblies within the tape unit? (1-22,23)

16. How is attenuation of signals in transmission linescompensated for? (1-26-29)

17. What does the term line quality mean? (1-30)

18. Define "decibel." (1-31)

19. At what range does the decibel level ofa signal usually enter a transmission line? (1-32)

20. What test is most often used for performance verificationof a printer? (1-33)

21. What are the four areas within a printer whichcan be expected to be examined by performance checks? (1-34)

521 CHAPTER 2

Objective: To demonstrate a knowledge of how adjustment of variable components affects circlit operation.

1. Defme the term "adjustment," as Used in connection with circuits. (Intro.)

2.List three purposes of variable components. (3-2)

3.List six dielectric materials used in capacitors. (3-5)

4.Is the trimmer capacitor used most frequently in a computer system linearor nonlinear? (3.6)

5. What is a common problem encountered with the variable capacitor? (3.7)

6. Name the two types of variable resistors. (3-3,9)

7. Of the two types of variable resistance components, which is usually used whena wire-wound resistance is needed? (3-9)

8.Explain the "pickoff" principle of a potentiometer. (3-10)

9.List two manufacturing methods that are used to indicate the extreme ends ofa potentiometer adjustment screw turning capacity. (3-10)

10. Name the two different methods of manufacturing carbon res::.:-...;e deposits withina potentiometer. (3-11)

11. Which adjustment is made on a meter or dial that requires: (a) no voltage and (b) voltage? (4-2,3)

r .5"/Z

12.If a meter needle is in the null position of a differentiating measuring circuit, the load circuit is said to be .(4-4,5)

13. Explain how a potentiometer can be used as a rheostat. (4-5)

14. Why is zeroing of the ohmmeter necessary when changing scales? (4-9-12)

15. What are the primary objectives of the variable components used in amplifiers and pulse generators? (5-1)

16. What characteristic of an operational amplifier makes it linear? (5-2-4)

17. What must you change in order to make a Miller circuit with a variable output from an operational amplifier? (5-5-7)

18. How is the output from a variable pulse-width generator altered? (5-8-11)

19. Name four electronic component devices which are used in power sltpplies for regulation. (6-4)

20. What is the controlling component when DC power supplies are adjusted fbr a precise output? (6-1-6)

21.If a potentiometer is incorporated in a high-voltage power supply, how is it often installed? (6-6)

22.In addition to master timing generators, what other types of timing circuits may make use of the variable component? (7-10)

523

6 23. For what two functional uses can you expect to be using the variable component in a generator? (7-1315)

24. When performing adjustments on storage devices, what type of storage may require mechanical adjustment as defined in this text? (8-1,2,9)

25. Drums, tapes, and disk systems use a head to read from and write onto another recording storage medium. How are these head placements performed? (8-4,6-8,10)

26. In memory units containing devices which are not adjustable, what circuitry associated with the memory usually has the variable component? (8-12-14)

27. What three basic characteristics of the display shown in figure 55,D, are controlled by potentiometers? (8-17-23)

28.Is the adjustment of data received or transmitted restricted to potentiometer or variable capacitor use only, or may both be used? (9.1)

29.If data (video) is being received at too low an amplitude (attenuated), which control, the variable capacitor or potentiometer, would you expect to find exercising the most control? Explain your answer. (9-4)

CHAPTER 3

Objective: To exhibit an understanding of the characteristics of alignments.

I.What is necessary in order for an alignment to be meaningful and effective? (10-1)

2.Generally, what information about the alignment routine can be obtained from the title? (10-5,6)

524 S/171

3.In order to obtain the basic objective of an alignment, what two basic knowledges must you defme? (10-6-8)

,4.What purpost is served by listing the subunits and circuits within an alignment? (10-9-15)

5.If a circuit under alignment is dependent upon external circuitry for its inputs, where would you `.. look for prerequisites to performing the alignment? (10-16-21)

6.What does determining the sequence of interrelated functional units mean? (10-22)

7.What is an interrelated function that is classed as independent? (10-27)

8. What would make an interrelated function dependent? (10-28)

9.For what two general reasons may priorities used in alignment procedures be included? (10-31)

10. What elements of the study presented in this chapter are used when aligning the objective? (10-33-40)

11. What are four logical functions in most display units? (11-1)

12.List six significant subfunctions. in the display functional areas using timing. (11-3)

13. For what are intensity unblanking circuits used? (11-4)

14. Normally, how many sweep generators does a display have? (11-5) 15. Normally, how many deflection units does a display have? (11-5)

16. State the purpose of a statistical information display. (11-6)

17. How may a binary word be inserted into a system with the result that a symbol is generated? (11-7,8)

18.List the different ways by which a DID unit presents data on the CRT screen. (11-10)

19. Of the four types of display programming, which one do you have least influence 2nd control over? (11-12-45)

20.List five nrthods that are used to perform programming of a display. (11-15)

21. Which type of radar display has circuitry provided for search lighting? (11-16)

22. Alignment of search and height consoles includes azimuth orientation with north mark; however, height requires an additional alignment and it uses the for its orientation. (11-17)

23. When aligning servo units in the processor with radar set servos, what magnitude of difference voltage should you strive for? (11-18,19)

24. A measure of sweep linearity commonly used in displays of search and height-finder radars is the use of ( I 1-17-20)

526 574

25.If data selection is to be limited to targets displayedon a console with only specified properties, what might some of these limitations be? (11-22)

26. As with SIDs and DIDs, radar display consoles and their circuits havealignments of their sweep generators. List four characteristics o),7 the alignments common to these types of consoles. (11-26)

27. Alignment of intensity and unblanking circuitry ina display console usually includes three main requirements. What are they? (11-28-31)

28. When aliming a high-voltage power supply ina console, instructions usually include setting of a voltage output and (11-32)

29.If interaction existed in an alignment of a display, in which of the four basic unitswould you expect to fmd this interrelationship? (11-34)

30. Using figure 75 printed in the text, identify the prerequisites andinterrelationships. (11-35,36)

31.Using figure 76, identify the interrelated units. (11-39)

32.List the controls which aze included in figure 77 for the horizontalor vertical deflection and state the purpose of each. (11-41)

33. What does "electromechanical" imply? (124)

34. Explain the major objective of a servoalignment routine. (12-3-5)

527

10 / j point in 35.Since the servoshown in figure 79 is typical, where can you expect to find the null servo units? (12-11)

36. From your study of servos, can you expect to findinterrelationships with other units? Explain. (12-13-16)

37. Alignment of a servo unit could probably call forwhat type of measurement equipment? (12-22)

38. In the three parts of a keyboard-printer-punch unit explainedin the text, what is a common requirement? (12-23)

39. Identify the two methods which result in the carriage movingduring spacing on the keyboard-printer- punch. (12-25)

40. Identify the serial and parallel interrelationship required toperform the spacing alignment by using figure 84. (12-28,29)

41. Define the two classes of memory units as writtenin the text. (13-2)

42. List the five functional areas you can expect each memoryunit to contain. (13-2,3)

43. What type of circuit is most commonly used in memoryaddress circuitry? (13-6,7)

44. List the three general requirements needed for a message processorto perform its function. (14-2-7)

45. Name the two methods by which time sharing can bedesigned into a message processor. (14-6,7)

11 5-17

46. Referring to figures 87, 88, and89 (printed in the text),name each type of waveform. (148-10

47. Explain how misalignment of the leveldetector pot could result inimproper data being processed by the modem unit. (14-12,22)

CHAPTER 4

Objective: To demonstrate a knowledge of the concepts of maintenanceprogramming, including maintenance program functions, fundamentals, techniques, andprintouts.

1.What is the function of a computersystem maintenance program? (15-2)

2.What must a maintenance program do in orderto perform Its function adequately? (15-2)

3.Identify the two basic classes of automaticcomputers. (154)

4. What is the classification of the wired-inlogic which controls the automatic functionsof a computer? (15-5)

5. Name two fundamental tasks performedby maintenance programs. (15 5)

6. What is the design of maintenanceprograms based on? (15-8)

7. Name the three categories of system failure.(15-8)

8.List five major system maintenance programmingtechniques. (15-9-14)

520 12 '17 9,What factor does the reliability program stress, and what factor does it generally minumze? (15-16)

10. Explain how you would establish 1 program loop within a given maintenance routine. (15-24)

11. Explain the memory address test routine. (15-26)

12. What is the term associated with the design of a maintenance program that doesn't require external control? (16-3)

13. Define a maintenance control program. (16-6)

14. What do the more standardized types of operator communication provided within maintenance programs include? (16-7)

15. Identify the items that are considered essential in the uniformity of program printouts. (16-10)

16. Refer to the AN/FSQ-7 (SAGE) maintenaace program printout in the referenced text. Identify the meaning of item 2 results of the program run: 4...E2... +15 -040 FAILURE MC WORD 005 PRESCRIBED 40 ROUTINE 2.(16-12,13)

17. Refer to the AN/GSA-51A (BUIC) maintenance program printout in the referenced text. What would the CONTROL WD contain if a write operation were performed on tape unit 4? (16-14,15)

18. For what are descriptors used in AN/GSA-51A (Dux) programming? (16-14,15)

19. Refer to the 407L magnetic tape diagnostic program printout in the text. What sense control switch (5/r) would be used to Inhibit an error printout? (16-16)

5,30 S-2. o

20. Refer to the 4071. magnetic tape diagnostic program printout in the text. Explain theuse of the indicated repair statement: CHANGE MIS CARDSCRR 0 0 0. (16-16,17)

CHAPTER 5

Objective: To show an understanding of howto combine tJ..e various techniques of troubleshooting by analyzing the elements of the techniques.

I.List six troubleshooting aid., that relateto computer systems. (Intro.)

2. What should be achieved by analyzing troublesymptoms? (17-1)

3. Why are steps 6 and 7 of figure 96 (printedin the text) always included ina troubleshooting procedure? (17-4)

4. Give a brief definition of boolean algebraand state what Is usually inVolved in troubleshooting with this form of algebra. (18-3)

5. Are boolean equations usually developed fromthe input to the outputor from the output back to the input? (184)

6. Why is the TFGOO TFG35 portion of the booleanequation explained in paragraph 18-5 Inclosed In parentheses? (18-5)

7.In the actual use of a boolezn equation fortroubleshooting, is the same process used that is used for developing the equation? Explain (18-5,6)

8. Define a "truth table." (18-7,8)

5'3 1 521 9.Using the problem explained in paragraph 1841 andfigure 101, explain why the t uth table clearly identified AND gate 6 as the defective one. (18-8-11)

10.Explain the "functional area approach" concept of logicanalysis. (18-13)

11. What is another term for the "functional areaapproach"? (18-13,14)

12.Explain the "split.halr' method of troubleshooting.(18.14,15)

13. Of the five important considerations listed inparagraph 18-16 to be used with signal injection approach, which would be used with the signal injection itself?(18-16)

14. Name the two reasons for measuring patternsand waveforms. (19-2)

15. What is done with :he information thatcomprises digital data? (19-3)

16.List four ways in which digital data may bedisplayed. (19-3)

17. According to the referenced text thedigital data count of 011 would be stored on a trackhaving how many aircraft in the formation? (19-4)

18.If data stored in digital form represents adecimul equivalent of 10 and a left shift is applied, what value will the resulting action produce? (19-5)

19. If tracks and sweep presentations are to bepresented on a CRT during a specified period ot' time, what principle of display is used? (19.8)

532 f A A

20. How does frequency modulation differfrom amplitude modulation? (19.9)

_ 21. Using the binary configuration in paragraph 19-11, calculate what the values would be ifthe lust 8 bits represented:

a. Height data with an LSD of 375 feet. b. Velocity data withan LSD of 50 mph. (19-11)

22. In reading the average DC level of a pulse train, if the pulse train issymmetrical, what is the average DC level? (19-15,16)

23. Define "before the fact troubleshooting."(20-2)

24. In the memory troubleshooting problems, what single reason was exposed that made thecontrol unit a prime suspect? (20-8)

25. What facts about each of the signals generatedin the memory control unitare needed to verify that the signals are correct? (20-15)

26. If a memory problem is intermittent, whatwould you look for when scoping the mernorys' control unit generators? (20-18-20)

27. In the study in the text concerning whento use the oscilloscope, what information did the maintenance man collect before using the scope? (20-21-26)

28. At what point in troubleshooting is theoscilloscope used when a diagnostic lists cardsto be replaced do not clear the problem? (20-28,29)

29. List the two uses of the fault indicator assembly.(21-3)

53 3

16 5-23 30. In order for a remote facility panel to properly display the status of circuits indicated by thelamps, what condition must be present in the circuits? (21-6)

31. What do the common elements of indicator panels provide for as aids for troubleshooting?(21-10)

32. List the different technical orders which identify fault and status indicators.(21-11)

33. What restriction is placed upon the technique of remove and replace? (22-1)

34. For the group removal and replacement technique to be effectively used, technical orders are prepared with what listingtables or charts? (22-2)

35. What product of a computer system is a variation of the technical order chart showing a functional card group? (22-3)

17 .5"-2

ANSWERS FOR CHAPTER REVIEWEXERCISES

CHAPTER 1

1.(1) Decrease in operationalavailability. (2) Increase in chance forhuman error. (3) Great temperature variations in environmentally controlledcabinets. (4) Tinkering.

2. These methodsare used:

a. Lamps, audio alarms, and internaltests. b. Printouts. c. Meters. ,cl Oscilloscope. e. Display CRTs. f Visual examination of mechanicalunits.

3.Radio direction and ranging.

4.Directional.

5. Raw/normal or processedvirleo.

6.Distinguish aircraft returns from clouds by detection of velocity changesin returns aid generatez pulse when this condition exists.

7. A beacon can identify the types of aircraft in the skyby means of codes received from aircraft. 8. Identification friend or foe, andselective identification feature.

9.Height-finder antennas usually nod up and down and can move horizontallyon command, while search radars usually rotatean antenna assembly upon a fixed pedestal.

10. Automatic change pulse counter.

11. Angle marks, the intersect pointof an angle mark witha range mark for the exact height readout.

12. The action must be converted digitalcodes.

13. k an input device andas an output device.

14. To supply voltage forservos which in tum rotate the reel assemblies.

I;SP,",^5, rr.ltors, vacuum pump, reel assemblies, tape head, positioning, photocells,voltages, currents, and tape tension.

18 r 5.2 r 16. By inclusion of high-gain amplifiers inserted at repeater stations every 6 or 7 miles.

17. The degree of interference or absence of interference in a transmissionline.

18. A unit of power ratio.

19. +6 to -25db.

20. Operating the Machine to produce a copy (printout).

21. a. Switches. b.Power. c.Character formation. d.Mechanical assemblies.

22. a. Vertical drive unit. b.Horizontal drive unit. c.Intensity unblanking unit, or Z-axis. d.Timing unit.

23. Fault facility panel.

24. Exercising of circuits by processing wtth test data.

25. a. AC source. b.Transformer unit. c. Rectifier unit. d.Regulator unit.

26. a. Shunt voltageregulation. b.Series voltage regulation. L. Lonstant current regulation.

27. Meters or lamps.

28. Line data, power supplies, and reference voltages.

29. Pulse width, signal amplitude, linearity of signals, proper voltage levels, PRT,phase, polarity, noise levels, waveforms (such as ramps, timing, deflection intensity, generator outputs), and data content.

30. With an oscilloscope.

31. Lamps and alarms, printouts, meters, oscilloscope, CRT display equipment, visual examinations.

19 I J:2 L

CHAPTER 2

1. Adjustment is the act whereby a device is used to alter a condition to make it fitor correspond.

2.(I) Alter biai voltage to a circuit. (2) Alter frequency of a circuit. (3) Shift a frequency. (4) Attenuate or amplify a signal. (5) Limit or eliminate distortion.

3.Ceramic, mica, glass, polystyrene, teflon, and air.

4.Linear.

5.Each component has a specific mechanical life cycle.

6.Rheostats and potentiomems.

7.Rheostat.

8.The contact attached to the pickoff terminal usually tests ona carbon resistance element. Each end of the element is in series with ,the source voltage or current. The position of thecontact on the carbon resistance dictates the pickoff voltage or current.

9. An audible click and a pin to stop rotation.

10. Linear deposits, and nonlinear (logarithmic) deposits.

II.(a) Balancing and (b) zeroing or centering.

12. Equal to the balancing or applied voltage.

13. By connecting the pick-if output and one end of the potentiometer toa common point.

14. Each scale may have a different total resistance or it may have a different applied voltageor it may have both.

15. To alter the gain ratio of the circuit, control the pulse duration, or act asa phase-shifting device.

16. Incorporation of a high-gain amplifier.

17. Remove the feedback resistor and install a variable capacitor.

18. By control of the RC time constant with a variable capacitor or a resistor.

19. Silicon-controlled rectifiers. zener diodes, thermistors, and thyratron semiconductor devices.

20 c17 20. A potentiometer.

21.It usually is installed remote for the power supply with one leg of the resistance (carbon or wire) tied to pound and the other leg left untied (infinity). The wiper is tied to the power supply.

22. Free-running oscillators, one-shot MVs, blocking oscillators, timesharing generators, and AGL generators.

23. Frequency adjustment and duty cycle adjustment.

24. Drums, tapes, disks, and delay line (magnetorestrictive).

25. The heads are placed a specified distance above the recording surface on drums and disks. The tape heads are installed as per TO instructions and the tape tension and position are controlled by variable components.

26. Read/write amplifiers.

27. Horizontal and vertical width of each character, horizontal and vertical position of all the characters, and horizontal and vertical height of each character.

28. Both.

29. The capacitor would have the most effect upon the amplitude of the high-frequency video sigtal. An exception to this answer is that condition within the circuit where a potentiometer is performing a clipping or clamping action. In this case, control by the capacitor would be effective up to the clipping or clamping level.

CHAPTER 3

I.A complete understanding of the overall function of the circuits within the alignment.

2.The particular area, function, or subfunction of the equipment.

3. A defmition of the objective and related part of all TOs which provide the definition, and the electronic principles involved in the function to be aligned.

4. The list provides knowledges of the purpose, place, and significance of each circuit in the alignment. It also identifies the controls and their piacement.

5.(I) Substeps in the first part of the alignment.

. (2) Verification instructions. (3) Sequencing of other alignments with the alignment to be performed.

6.What part must be aligned first, second, and third.

538 SA. 8"

7. A generator.

8. External signals are required as input for thedependent function to operate and forit to provide a discrete output.

9.(1) Interaction of waveforms with eachother. (2) Sequence of performing steps ina routine.

10. Steps 1, 2, the portion of step 4 which relatesto serial-parallel paths and priorities, and all of step S.

11. Timing, intensity, vertical, deflection,and horizontal deflection.

12. Sweep time generation; sweep and symbol modes, time sharing; intensity unblankingand blanking; data or video control; expansion factoring; and special pulses for special display featuresbeing impressed on vertical, horizontal,or intensity units.

13. To control turn-on and turn-off of theCRT and to provide a path for thedisplay images. 14. One.

15. Two.

16. To providein visual, graphic formdigitalinformation for command personnel to monitor and evaluate.

17. A console operator depressesa pushbutton which is either prewired witha binary code or activates a code generator.

18. By use of a charactron CRT,a typotron CRT, or programmed memory intergrated circuits.

19. Hard wired matrix.

20. Switch action, tag symbol correlation, omniballor wheels attached to digital-to-analog converters, light gun correlation, and keyboard tomemory program.

21. Height finder.

22. Angle mark.

23. Null.

24. ftange marks.

25. Specific height groups, initial tracks, oldtracks, tracks with beacon and with identification, hostiles, and weapons. a Sa 9 26. Sweep voltage amplitude, pulse duration, slopeangle, and proper phasing.

27. Gate amplitudes, gate shaping (no overshoot orundershoot), and video levels.

28. Ripple filtering.

29.Horizontal and vertical deflection units.

30. Power, raster, front panel lights and verticalpositioning, and character intensity.

31. Intensity circuitry, beam current circuitry,high-voltage circuitry, front panel control circuitry, and keyboard circuitry.

.,.:.a. Zero referenceestablishes a baselevel for circuit operation. b. Gain controlestablishes the gain of the circuitry. c Amplitude controlcontrols outputamplitude of circuitry (character height). d. Position controlcontrols the position of thedisplay (character) on the CRT screen.

33. Electronic and mechanical actions working together toproduce a product.

34. The objective is to have all circuitryfunction so that a change voltage input causes a rotation to a new null. Further, once at the null, theunit rests and does not hunt.

35. Input circuitry (transform°.

36. Yes. A change voltage derived from some sourceand after adjustment must be fed to the servo for repositioning.

37. An ohmmeter, a DC meter, an AC (RMS) meter,and an oscilloscope.

38. All three require an energized coil.

39. (1) Depressing space on thekeyboard. (2) Automatic sensing of the end-of-print cycle.

40. Alignment of interrelated assemblies is asfollows:

(1) Space armature and shaft end play (parallel). (2) Space bail (serial). (3) Space pawl rack clearance (serial). (4) Space pawl stop plate (serial). (5) Space magnet (serial). (6) Space pawl clearance (serial).

41. Those that can receive, store, and providedata, and those that can only provide data (read only).

42. Timing, addressing, interface circuitry, readlogic, and memory device.

43. The flip-flop.

5 4 i ) 44.(1) Serial-to-parallel and parallel-to-serial conversion circuitry. (2) Speed reduction or increase from audio to megahertz ratesor reverse. (3) Time sharing for multichannel operation.

45.(1) Priority system through manual or automatic programming. (2) Cyclic operation through ring counters, etc.

46. Dipole, frequency shift keying, and frequency shift modulation.

47. Too high a setting results in noise amplification along with data, and this invalidates the real data.

CHAPTER 4

I.To insure system integrity; i.e., to locate any existing or impending failure.

2.It must attempt to treat all circuits in a manner which approximates the ultimate applications of the computer.

3.The two basic classes of automatic computers are specialpurpose and general-purpose.

4. The wired4n logic which controls the automatic functions of a computer is classifiedas system hardware.

5.Fault detection and fault isolation.

6. The design of maintenance programs is based on the particular system's hardware, its function, and the type of task the program must perform; i.e., detectand/or isolate failures.

7.Catastrophic, intermittent, and machine state.

8.Start small, start big, marginal checking, multiple clue approach, and process of elimination.

9.It stresses fault detection and generally minimizes isolation.

10. The program writeup would be checked to determine where to insert an unconditional branch instruction. The address portion of the branch instruction must contain the address (as determined from the writeups) of an instruction located at the beginning of the test routine.

11. Normally this testing is (performed) by stclng the address of eachmemory location into its respective memory location. Once the entire memory is loaded, a read and compare process of each memory address is performed.

12. Selkontrol oriented.

541 .

24 , 531 13. A packase of contrbl and helper routines that facilitates the loading and operation of the various maintenance program routines.

14. Interrupts, manual Intervention, and printouts.

15. Program heading, results of program run, error information (data failure, control failures, etc.), and indicated repair statements,

16.It identifies that a margin failure using margin word 005 occurred. Also, it identifies the failure as being within marginal group 4, circuit line selection E2, and marginal voltage +150 volts.Further, it identifies that the failure occurred at the prescribed margin of -40 volts while cycling test routine 2.

17. The CONTROL WD would contain: 74.

18. Basically, the descriptors are used to set up, initiate, control, and terminate data transfers between core memory and the terminal devices.

19. SW4.

20.It is used with a functional card group table (located in the appropriate TO) to determine the cards to be changed in correcting a detected malfunction.

CIIAPTER 5

I.Fault indicators, system and unit testers, performance test standards, diagnostic programs, flow diagrams, and specialized test equipment.

1 Elimination of some possible sources of trouble, and locating or isolating the troublesome component.

3. The repair function validates the findings of the analysis and testing phases of the procedures.

4. Boolean algebra is a form of logic that uses mathematical symbols to describe logical processes. Troubleshooting with boolean algebra usually involves the development and use of a boolean equation or truth table.

5.Input to output.

6. To retain circuit integrity.

7.No. Generally the troubleshooting use or an equation requires starting at the output lnd working bad. (o the input

8 A truth table is a listing in table form of all possible combinations of input signals which can produce an output.

542 s-32.

9. Checks of all elements previously validated thatthe function was performing properly. Only when an XY of a "1" with a carry of "1" are present does gate 6 provideany control over the output. When its results were measured and found to be incorrect, the correct diagnosiswas a failing gate 6.

10. The approach uses a process whereby fault location is localized toa function, then to a subelement within the function.

II. The block diagram approach.

12. The method requires localizing the trouble to either half of the circuitsor function by measuring the final output and the output of the midpoint. This localizes the problemto either half, thereby "split halving" the area of trouble.

13. Check waveforms 2nd voltages. The other four itemsare primarily research in nature and are used in obtaining data about the problem.

14.(1) To analyze data content. (2) To determine if a waveform meets the prescribed specifications.

15.It is stored, altered, routed, processed, controlled, and displayed by the computer system.

16. As printout products, displays, mechanical readouts, and automatic functions of console units.

17.3.

18.20.

19. Time sharing.

20.In frequency modulation, the intelligence or data is algebraically summed with the carrier frequency, in amplitude modulation, the intelligence on data is added to the carrier frequency, causing an amplification in peak-to-peak voltage.

21.a. 28,875 ft. b. 3850 mph.

22. Zero volts.

23.Before the fact troubleshooting is a study, using all available resources, which forms ideas, opinions, and procedures to isolate a problem in equipment.

24. The fact that it generates and distributes the pulses that affect the core.

25.(1) Pulse width and PRT, and waveform. t4.) Cara or cards used in its generation. (3) Types of circuits involved. (4) Purpose and position of occurrence of the signal. (5) Expected results if the signal fails. 4

26 5.1-1

26. You would look for pulses out of specifications in pulse width, amplitude,duration, and form.

27. He Identified that the problem was not caused by front panel controls,then he collected the alignment data and identified which controls could affect the retrace. Finally,he identified the cards and located the specifications.

28. After a local diagnostic fails to pinpoint the exact trouble area, andanalysis of the printout cannot lead to further tests, opinions, or questions, then looping of data or forcing data whilepoint-to-point oscilloscope measuring is performed.

29, (1) To identify a failing function or subfunction. (2) To identify correct or incorrect data flow.

30. Operation or failure of the circuits must be related directly to the remote indicator.

31. They portray: operations of counters, information in memory, fault indications, statusof each part of a system, and an entire system.

32. Service manuals (-2 series) and circuits and diagrams manuals (-3 series).

33. Only one-half of a card group up to a maximum of seven cards may beexchanged at one time.

34. Grouping of cards into functional areas (alarm groups), identifying thecard location, type of card, and name of function.

35. Diagnostic printout frequently lists the card group to replace.

27 544 I.MATCH ANSWER LUSE NUMBER I SHEET TO THIS PENCIL. STOP- EXERCISE NUM- BER. 30554 02 21

VOLUME REVIEW EXERCISE

Carefully read the following: DO'S:

1. Check the "course," "volume," and "form" numbers fromthe answer sheet address tab against the "VRE answer sheet identificationnumber" in the righthand column of the shipping list. If numbers do notmatch, take action to return the answer sheet and theshipping list to ECI immediately with a note of explanation.

2.Note that numerical sequence on answer sheetalternates across from column to column.

3.Use only medium sharp #1 black lead pencilfor marking answer sheet. 4.Circle the correct answer in this test booklet. After youare sure of your answers, transfer them to the answersheet. If you have to change an answer on the answer sheet, be surethat the erasure is complete. Use a clean eraser. But try to avoid any erasure on the answersheet if at all possible.

5.Take action to return entire answer sheet toEa.

6. Keep Volume Review Exercise booklet forreview and reference. comments through your 7.If mandatorily enrolled student, process questions or unit trainer or OJT supervisor. If voluntarily enrolled student, sendquestions or comments to ECI onECI Form 17. DON'TS: furnished specifically for each review I.Don't use answer sheets other than one exercise. to fill in marking blocks.Double 2. Don't mark on the answer sheet except marks or excessive markings whichoverflow marking blocks will register as errors. mutilate the answer sheet. 3. Don't fold, spindle, staple, tape, or pencil. 4.Don't use ink or any markingother than with a #1 black lead NOTE: TEXT PAGE REFERENCESARE USED ON THE VOLUME REVIEW EXERCISE. In parenthesisafter each item number on the VRE is the Text Page Number where the answerto that item can be located. When answering the items on theVRE, refer to the Text Pagesindicated by these Nutulwrs. The VRE resultswill be sent to you on u postcard which will list the actual V RE items youmissed. Go to the VRE booklet and and locate the Text Page Numbersfor the items missed. Go to the text carefully review the areas covered bythese references. Review the entire VRE again before you take theclosed-book Course Examination. 29 SIS

Note to Student. This Volume Review Exercise contains 89four-option items and 1 three-option item.

Multiple Choice

Chapter 1

1.(003-004) The use of the north mark, either trueor magnetic, is required for orientation of

a. height radars, but not search. b. search radars, but not height. c both height and search. d. neither height nor search radars, but beacon.

2.(004) The encoder function of the keyboard describedin the text is used to

a. convert serial input data to parallel. b. convert seven parallel lines to voltage levels of ONES andZEROS. c. generate an 8-bit data code. d. in3ert an 8-bit binary code into a transmitter each timea key is depressed.

3. (004-005) Since the keyboard discussed in thetext is required to produce a binary code, you can expect that performance tests would examine all of the followingexcept

a. its capability to generate data. b. manual operation and mechanical conversion to electrical quantity. c. alignment of the levers and cams. d. reproduction of a character when a key is depressed.

4, (005-006) Performance requirements whichmay be performed on a keyboard unit usually require all of the following tests except

a. operation of the internal elements of the unit. b. proper passing of data through interface units. c. control of transmission of data to output media. d. proper error indication if the unit is operated Incorrectly.

5, (008) Of the following listed items whichare in tape units, select dirt one which would most probably require a daily check.

a. Reel assemblies. c, Tape head positioning. b. Vacuum pump. d. Tape tension.

54 6

30 5-34

6. (008-009) If a high-speeddata rate of transmission is required,which of the following requirements would be most essential?

repeaterstation circuitry. a. Low-gainhigh-quality amplifiers are needed in minimize data loss. b. Signal loss is low, therefore linearamplifiers provide the best gain and c. Noise-free lines on theaudio transmission portion of the line mustbe used. d. Dipole data transfer would be usedin preference to frequency-shift keying.

control is monitored by a meter andthe known 7.(009) If an input line to a communication were standard is a range of 6 to 13 db, whatwould the meter read if a line loss of 90 percent being meanned?

a. 4 to 1.3 db. c. .4 to 1.3 db. b. 4 to 3 db. d. 16 to 19 db. provide the most reliable 8. (009-010) Which one of thefollowing checks made on printers would results?

a. Visual examination ofall moving parts, examining for wearand tear. b. Measurement of power to determine accuracyof circuit operation. c. Operation of the unit tomake it produce a copy. against a d. Measurement of tolerances of mechanicalassembly parts, i.e., cams, gears, spaces, specification.

probably have visual 9. (010-012) A performance checkof a CRT display unit (console) would which would fall in elements to examine. Select from thefollowing groupings of elements those this category.

a. Range mark separation,retrace purity, and sweep linearity. b. High voltage and unblanking. c. Video levels, DIDdata, and control switches. d. Timing generation, symbol shaping,and focus. that the 10. (012) A byproduct of a performancecheck made on a central processor unit is

a. timing is validated. b. power supply voltages are measured. c. lamp circuitry isexercised. d. environmental conditions arechecked. checking require an AC 11. (014) On which of thefollowing parts of a system may performance voltmeter?

supply. a. CRT display. c. Direct-current power b. Line data circuitry. d. Reference voltage.

31 5137

12. (015) If a performance check were accomplished using an oscilloscope,which of the following units would have checkc madeon puise width and linearity of signals? a. Line data circuitry. c. Servo unit circuitry. b. CRT displays circuitry. d. Radar data processingcircuitry. 13. (016) The purpose for a peaking adjustment instruction ina performance routine might be to a. alter the DC operating level ofa video amplifier. b. amplify weak radarreturns. c. alter pulse width of a square-wavegenerator. d. alter the bias level ofa collector or emitter circuit ina quantizer.

14. (018) From the followinglist, select the unit which wouldleastlikely be checked witha printout. a. Electrographic printer. c. Line data circuitry. b. Central dataprocessor. d. Impact printer. 15. (018) Select from the following list the type of dataleastlikely to have lamp indications existence. verify its

a. Line data. c. Central computer data. b. Tape data. d. Radar return data.

Chapter 2

16. (020) According to the text, whichof the following definitionsis correct?

a. Adjustment is the act of alteringan element. b. Adjustment is the act ofbringing into line. c. Alignment is the act of alteringan element. d. Alignment is the act of providing a variable component changeto a circuit. 17. (020) Select the reason from the following list which isnora regulatory use of a variable control. a. Provide a change in frequency. b. Cause an increase in bias voltage. c. Frequency shift an incoming signal. d. Increase the gain capabilitiesof the circuit design. 18. (021) Trimmer capacitors used in computer systems most frequentlyare a. linear. b. nonlinear. c, variable by altaring the dielectric material. d. manufactured with therotor contained between two sets ofstator plates.

,C1., Wh., is the difference, ifany, between a tubular capacitor anda button type? a. There is no difference. b. The tubular capacitors havea life cycle expectancy of 250 MPS. c. More critical adjustments can be madewith a tubular capacitor. d. The life turns cycle of a button type erceeds the tubular type by fourtimes.

32 C3 I 20. (022) What characteristic is included in the manufacture of mostpotentiometers that make it possible to use a metal screwdriver when making adjustments?

a. The slider arm is connected to the centerterminal. b. The turning screw is isolated from the slider shaft. c. Epoxy resin material is used to securethe turning screw. d. The resistive element is insensitive to the additional metal conductorof the screwdriver and therefore no signal attenuation can result.

(025-026) When variable components are installed in amplifier or pulse generatorcircuits, they provide all of the following capabilities. Select the one option which isleast common.

a. Alter the gain ratio of the circuit. b. Act as a phaseshifting device. c. Control the pulse duration. d. Attenuate input line signals.

22. (026) In order for an operational amplifier to have an increase ingain at its output, which of the following conditions must be met?

a. The feedback resistor must be madesmaller. b. The input resistor must be made larger. c. The feedback resistor must bemade larger. d. A low-gain amplifier must be installed.

23. (027) A pulse generator is usually called by all of thefollowing names except

a. one.shot MV. c. monostable MV. b. singleshot MV. d. bistable MV.

24. (027) The method most frequently employed in pulse generatorsfor altering the output pulse width is

a. changing clamping levels. b. triggering the circuit more frequently. c. triggering the circuit lessfrequently. d. altering the RC time constant of the circuit.

25. (027) What function, if any, can the slope of an input signalprovide for a pulse generator?

a. A delay to the start of the circuit. b. No effect. c. Alter the output pulse widthof the circuit. d. Alter the RC time constant of the circuit.

26. (028) The instruction "adjust power supply control RIO for24V +.00IV output" indicates which type of meter should be used?

a. Frequency meter. b. DC voltmeter, model PSM6 or 7. c. Differential voltmeter. d. AC voltmeter.

. 5 In ..r3 ,

27. (029) High-voltage adjustment controls frequentlyare connected with one end to ground and the other connected

a. internally to a plus terminal. b. internally as a rheostat. c. externally with the end left unconnected. d. externally with the end connectedto a negative or positive source voltage.

28. (029) What component do most of the computer systems timing generators havein common?

a. Adjustable capacitors. c. Wire-wound resistors. b. Crystals. d. 5.watt resistors.

29. (030) In addition to the master timing unit, all of the following unitsare frequently used for timing control except

:L free-running oscillators. c, automatic gate length generators. b. blocking oscillators. d. amplitude control circuits.

30. (032) Select from the following list the type of memory which does not have mechanicaladjustment associated with it.

a. Core. c. Disk. b. Drum. d. Tape.

31. (032) Mechanical adjustments ina tape storage system vary according to the design of the unit. However, they have at least fourcommon elements; the proper drive speed and three of those in the following list. Select the element which isnot in common with the others.

a. Stop. C. Tension. b. Start. d. Tape placement.

32. (034) Most memory systems use potentiometersto establish the proper current amplitudes. These pots are frequently found in

a. core units. c. read/write amplifiers. b. read/write heads. d. inhibit amplifiers.

33. (035) The potentiometers used in storage tube adjustmentscontrol all of the following items except

a. scanning. c. unblanking. b. flood gun intensity. d. frequency compensation.

Chapter 3

34.(039) The first step in the study ofan alignment is to identify the objective. Select from the rc-nnser the one which best describes this purpose.

a. Understand the title. b. Identify the area, i.e., assembly, function. c. Relate the operational performance to intermediate functions. d. Determine its functional operation and relationshipto functional and system operation.

f - fli 0

35. (040) The use of electronic principles as applied to identificationof the objective of an alignment is to Identify

a. components. b. operational circuits. c. variable component operation. d. characteristic signal development by circuit design.

36. (041) What characteristic of the data accumulated.inthe phase of a study in alignments titled "Subunits, circuits, components of the objectives" provides the clearestunderstanding of what knowledge and work are required?

a. Wentifying the alphanumerics ofthe assemblies in the alignments. b. Identifying the titles, parameters, and purposes of thecircuits involved. c. Locating the circuits and assemblies inthe various technical orders. d. Placing the circuit or assemblies in a line showmg processing.

37. (041) In which one of the listed items would detailedspecifications of parameters be must useful and significant during the study of an alignment?

a. An integrated circuit10-stage buffer. b. A collector bias-controlled operationalamplifier. c. A resistive voltage divider. d. A free-running oscillator.

38. (045) While performing a study of an alignment asdescribed in the text, how can a step in the sequence be bypassed?

a. It can be eliminated by researchof the alignment to determine its nonexistence. b. Any step that is identified in the prerequisite of analignment can be eliminated. c. A clear title can eliminate needfor step 1. , d. If only serial paths are used, the sequencing step(4) may be elimhiateit.

39. (046) Of the four units making a consolethetiming, intensity, vertical, and horizontalwhich is usually aligned first? a. Intensity. c. Horizontal. b. Timing. d. Vertical.

40. (046) From the four units listed, select the onewhich, when properly aligned, controls the illumination of the CRT.

a. Turning. c. Vertical deflection. b. Intensity. d. Horizontal deflection.

41. (046-047) After studying the requirements forstatistical display circuitry and associated alignments, linearity alignment of maps, symbols, and alphanumericsis a function of a. intensity. c. timing. b. blanking and unblanking. d. deflection

35 fsf 1

42. (047) The complexity and extent of alignmentson DID units depend for the most part on the type of which of the following items?

a. CRT. c. Vector generators. b. Symbol generators. d. Decoding circuity.

43. (047) In aligning a DID unit, which usesa charactron tube, the instructions would include alignment of deflection

a. plates for character positioning. b. plates for character selection and positioning. c. coil for character positioning. d. coil for character positioning and plates for character selection.

44. (047) The two different types of hard-wired matrixassemblies used with DIDs are the stencil plates and the

a. core. c. read only memory. b. tape. d. thin film.

' 45. (048) Patch panel programming usually provides

a. target outlines. b. maps of states, countries, and elevation. c. alphanumerics of targets. d. beacon responses.

46. (048-049) The range position of target positioning alignmentroutines on surveillance consoles is a function of

a. timing. c. intensity. b. deflection. d. high voltage.

47. (050) Sweep circuit alignment is often performed to bringsweep voltage amplitudes to specification as well as three of the four following selections. Select the item not often performed while aligning sweep circuits.

a. Pulse duration. c. Proper signal phasing. b. Slope angle. d. Video gate adjustments.

48. (050) Prerequisites to aligning sweep circuits ina console usually require verification

a. of timing waveforms because errors alter duty cycles. b. controlling and combining (time share) circuits. c. trimmers used in the sweep circuitry. d. of centering alignment usually performed on_coupler units.

4ofn50) The 'trimmer capacitors incorporatedin intensity units are used for

a. DC level control of gates. b. squaring leading edges of gates. c. amplification of gates. d. controlling basic turn-on voltages for thc CRT. 552 36 50. (050) Intensity/unblanking and high-voltage alignments include all the following requirements except

a. pulse width. c. data. b. pulse shaping. d. ampliiude.

51. (052) Servos operate on a principle of

a. rate feedback. b. summing a feedback voltage with an input signal. c. amplifying a difference signal to drive the motor to a position which produces a null tothe input unit. d. a 180° signal feedback summed with a 00 input of the samefrequencyand the motor drive until both signals are of the same magnitude.

52. (053) Direction of rotation in a servo unit is the product of the

a. motor. b. phase relationship between signals and reference voltage. c. phase relationship between signals and reference windings. d. relationship of phase of input signal and feedback signal.

53. (055-056) What portion of the spacing theory is essential to accomplishment of the alignment performed on the keyboard printer punch carriage unit? The fact that

a. two hammers must trip. b. clearances must be preset. c. coil must be energized to perform the alignment. d. rack is spring-loaded to the left.

54. (056) If the adjustable time cycle for movement of the carriage on a KPP were too short, what alignment could a repairman be falsely led to believe would correct the problem?

a. Space coil-to-armature positioning. b. Space pawl and carriage clearance. c. Space pawl and carriage stop plate.

Note to Student.Consider the following information for items 55 and 56: The text classes different types of memory units according to their capabilities.

55. (057) From the following lists, select the type which doesnotbelong in the class with the other three.

a. Storage tube. c. CROS. b. Disks. d. TROS.

56. (057) From the following iists, select the type which doesnotbelong in the class with the other three.

a. Drums. b. integrated (program memory) circuit. c. Delay line. d. Core

37 3-13

57. (057) The difference in requirements for a class 2 (ROM) memory device and those fora class I unit :s that class 2 units do not use

a. addressing circuitry. c. interface circuitry. b. erase control circuitry. d. a storage media.

58. (057-058) Circuits combined to form counters which are usedas memory address circuitry Usually include all of the following except

a. integrated circuits (chips). c. AND gates. b. flip-flops. d. transistor circuits.

Chapter 4

59. (063) Maintenance programs perform their function by

a. the application of AC margins to circuitry. b. the application of DC rmrgins to circuitry. c. treating all circuits in a manner which approximates the computer's static operation. d. treating all circuits in a manner with approximates the ultimate applications of the computer.

60. (063) The primary function of a maintenance program is to

a. insure system integrity. b. identify failing components. c. identify marginal failures. d. insure equipment maintainability.

61. (063) The two basic classes of automatic computers are the

a. active and standby. c. special and general. b. on-line and backup. d. reliability and diagnostic.

62. (063) The wired-in logic which controls the automatic function of a computer is classifiedas

a. system hardware. c. logic components. b. system software. d. peripheral components.

63. (064) In marginal checking, the amount of variation necessary to make a component malfunction indicates which of the following concerning a computer component?

a. Age. c. Flexibility. b. Reliability. d. Type of component.

64. (067) When all other techniques have failed, what should you do to isolate an inwmittent failure?

a. Replace all components in the failing area. b. Call in contractor personnel to troubleshoot the failure. c. Loop the failing % it routine while scoping the circuits. d. Drop all power and make resistance checks of components within the failing area.

38 65. (068) What operation cannot be performed when a magnetic tape unit is file protected?

a. Read. c. Rewind. b. Write, d. Backspace.

66. (070) Flow chart symbols

a. do not use functional notations. b. may change from system to system. c. do not contain descriptions of computational functions. d. require direction of flow indicators if the direction of flow is top to bottom.

67. (070) A maintenance control program

a. is only associated with an on-line environment. b. contains a separate print control routine for each test routine. c. combines common programming requirements of the various test routines. d. does not contain any provisions for interrupts.

68. (071) Which one of the following is not a form of the more standardized types of operator communication as pertains to programs?

a. Branches. c. Printouts. b. Interrupts. d. Manual interventions.

69. (071) Which one of the following is considered essential to the standardization of the maintenance programs within a computer system?

a. Time duration of the program run. c. Number of instructions per program. b. Uniformity of the program printout. d. Number of margins applied per program.

Chapter 5

70. (077) Which one of the following is the most important step of any troubleshooting effort?

a. Think before you act. c. Work on each problem alone. b. Know your test equipment. d. Use a general troubleshooting procedure.

71. (077) Identify the military standard that computer manufacturers are required to use for symbology uniformity.

a. M1LSTD-803B. c. MILSTD-805B. b. MILSTD-804B. d. MILSTD-806B.

72. (079) In boolean algebra, logical conditions are called variables, and they are represented by

a. letters. c. symbols. b. numbers. d. exponents.

555 5.141.5"

73. (079) When one OR gate supplies an AND gate, what sign of grouping, ifany, is required?

a. Parentheses. c. Braces. b. Brackets. d. None.

74. (079) The writing of an equation for a logic diagram is begun by writing theoutput of

a. the total diagram. b. the input gate or gates. c. one branch from the output gate. d. either the output or input gate or gates.

75. (079) In boolean algebra. what functitm does the + sign represent?

a. AND. c. NOT. b. NOR. d. OR.

76. (080) In the boolean equation A + B = X, thereare how many possible numerical combinations?

a.1. c. 4. b. 2. d. 8.

77. (081) What is another name for the functional area approach to troubleshooting?

a. Truth table approach. c. Signal injection approach. b. Block diagram approach. d. Schematic diagram approach.

78. (083) If a left shift pulse is applied to a five-stage register containing the binary confluratioiL 01010 (LSD on right), what will its contents be after the shift? ( Answers are in decimal notation.)

a. 5. c.15. b. 10. d. 20.

79. (083) If a right shift pulse is applied to a ten-stage regjster containing the binary configuration 0111100100 (LSD on right), what will its contents be after the shift? (Answers are in decimal notation.)

a. 121. c. 484. b. 242. d. 968.

80. (089) If the multiple input gates to a buffer or a comparator fail, the most probablecause could be

a. a transistor that has shorted between the junctions. b. an open or shorted diode. c. a flip-flop stuck in the one state. d. an open relay.

40 51.4

I. (089 090) What is the function of the read signal in the control unit?

a. Con trul the generation of the sense andinhibit. b. Cause all the cores to reset to zero when converted to a current pulse. t,. c. Data stored in buffer will be loaded into core. d. Error light will come on because core data and input data compare.

82. (091) Which of the following conditions, if any, could be a warning to signalfailure?

a. Signal absence. c. intermittent signal. b. Signal deterioration. d. None of the preceding.

83. (092) When does retrace occur?

a. Beginning of the sweep cycle. b. End of the sweep cycle. c. 180° from the middle of the previous cycle. d. Middle of the sweep cycle.

84. (092) All of the following options should be considered before troubleshooting ablanking/unblanking circuit with an oscilloscope excent determining

a. which cards are involved. b. which controls are involved. c. which alignment will correct the problem. d. if the work can be accomplishes) on line.

85. (092) What should first be done when a failure occurs while the computer iscycling?

a. Perform a PM1. b. Troubleshoot with the oscilloscope. c. Run the diagnostics. d. Turn the computer off.

86L (093) Interpreting the diagnostic may

a. pinpoint the exact circuit. b. identify the exact card or card group. c. isolate the malfunction to a specific component. d. analyze the circuit function.

87. (093) Fault location indicators are used to identify each of thefollowing except

a. correct data flow. c. failing subfunctions. b. failing functions. d. the failing circuit component.

557 88. (097) The best way to simplifya repairman's job of troubleshooting is to

a. remove the printed circuit cards one by one until the fault isisolated. b. utilize the system TO which contains fault information. c. remove and replace the end item. d. isolate the problem by troubleshooting withan oscilloscope.

89. (097) If a timing error were suspectedon a system and you were using the "group removal and replacement troubleshooting technique," you should doall of the following except

a. isolate the efror to a certain card. b. isolate the error to a certain group of cards. c. isolate the error to a specific area. d. identify the trouble symptom and list the cardsto be removed.

90. (098) What is the main advantage of using the"group removal and replacement troubleshooting technique"?

a. Isolation of the problem to a specific cabinet. b. Pinpointing the malfunction to a specific card. c. Quick restoration of equipment. d. A faster method of isolating the problem.

42 UNITS

NE TERS viV IAC VOL T v IDC VOL T v 3 OIrFERENTIAl V

I CURREN T v a OSCILLOSCOPES DISPLAYS V Vvlvv v vv v CRT DISPL AYS v./ PRINTOUTS v vI v L AMPS AND Aunici-ALAron vv v / VISUAL EXAM Cr v vv LaCIIANICAl ASSENDLIES

Figure 28. Completed DPC units and performancecheck devices.

553 SCREW ADT

I A DUTTON TRIMMERS I Atmm. AR IIImmimE R

SCREW ADJ

c. D m01 t m 11MmE TER "'DUN TIOmC TER

Figure 29. Variable Components.

5Co 63)

,/-- f

CARBON RESISTANCE ---"" ELEMENT INPUT OUTPUT TERMINAL

CONTACT PL ATE CENTER TAP ADJuSTING BRASS SCREW SLIDER INPUT OUT PUT TERMINAL

al111 111111111111111111111111111117;111111 ADJUSTING at' SCREW

1 I I STOP E PDX). CARBON .4.----- PIN COATING RESISTER ® , - 10 ROTOR CONT ACT (METAL)

Figure 34. "Pots "

561 ZERO ADJ

S IA R XI f- (5) 0- 14 10K POT R25 RX 100 R4 R3 = .09V 117.700 21,850 'IC 6V R I R2 1138 110

SIB 00) 0- R XI R X 100 0 RX 10K

Figure 39. Meter zero -djust.

562 1MS N---0-1

--V128.875

35V

63.2% 6gF0 I

PERCENT OF 45PFD CHARGE

I 5C I I 40

0 alkio 20 30 40 AA %, EXPANDED AA TIME/MILLISECONDS

.s.

....--."'

Figure 42. Miller circuit with variable capacitor.

5 6 3 TO .,ArEo 4c,.

;vto. .5VI)C

Figure 43. Variable pulse.wulth generator (Schmitt trigger).

564 ..F.S1

ADJUSTMENT SCREW

PIVOT SCREW HEAD ADJUSTMENT TOOL

REFERENCE SURFACES

RETURN SPRING

WIRE LEADS

HEAD CLAMPING SCREW

./- MAGN ETIC HEAD ASSEMBLY

DRUM ROTATION PLASTIC BODIES

I igure 4 9 Magnetic heed with adithlincnt tool in+talIed,

49 563 PRESSURE ADJUSTING SCREWS

CALLOUT I

HEAD BAR PIVOT SCREWS

DRIVE UNIT ATTACHMENT

RECORD READ HEADS

Figuie S. Disk memory.

so 55-4

ALIGNMENT TITLE & OBJECTIVE

SUBUNITS, CIRCUITS, COMPONENTS OF OBJECTIVE

INTERRELATED FUNCTIONAL UNITS

SEQUENCE OF ALIGNMENT OF INTER RELATED FUNCTIONS AND OBJECTIVE

ALIGNMENT OF OBJECTIVE

Figure 58. Five divisions of an alignment study.

5 I

56 7 5:5- 7

Figure 62. Functional alignment representation.

5 STEP 1

ALICNmENT TITLE, OBJECTIVE

THEORY OF OPERATION CID

TECHNICAL ELECTRONIC SIGNAL FLOW PRINCIPLES ORDERS

y STEP 2 SPECIFICATIONS

SUBUNIT, CIRCUITS COmPONENTS OF OBJECTIVE

ALPHANumERICS SEQUENCE OF TITLES OF CIRCUITS CIRCUIT OPERATIONS PuRPC6ES OF CiRCUITS (SERIAL, PARALLEL) 111/ STEP 3

MASTER CONTROL (TIMING) INTERRELATED FUNCTIONAL UNITS, CIRCUITS DATA CONTROL (WORDS, BITS) ALL OR ANY TO OBJECTIVE viDEO CONTROL PRI)

MANUAL CONTROL (SWITCHES, POTS) STEP 4

SEQUENCE OF ALIGNMENT oF INTERRELATED FUNCTIONS AND OBJECTIVE

PLOT ERIAL IDENTIFY INDEPENDENT DETERMINE AND/OR AND DEPENDENT PRIORITIES oF PARALLEL PATHS FUNCTIONS ALIGNMENT

virSTEP 5

ALIGNMENT OF 1 OBJECTIVE

'DENT,PY SERIAL LIST ALL CONTROLS ORAN ALL WAYEFOR S AND PARALLEL CONNECTING POINTS AMPLITUDES SIGNAL PATHS TESTPOINTS TOLERANCES

:ONTROL PuRPOSE SPECIFICATIONS CONTROL LOCATION GAINS TYPE OF CCNTROL Figure 66, Mock diagram of study,

563 X^1

SIGH 16 24 32 64 SIGN X VECTOR VECTOR o 1 o o I ' I o o START START

SIGN 24

X VECTOR o o i 0 0 1 VECTOR STOP STOP I 1 1 11

Note 68. Coordinate vector generator. ith%14 Ty IL 011 4D 1 UAEr 010 C 1 001 G 1.0 1 2 3 000 y R 4 $ 4 7 S M Y MARY ADDRESSES Z III a 1,1 11 Ill II H 0 3 K£2+X F 1 110 .11100. W. 101 INIACItil X % 4 III It tow ( s I. ri = = lit VIEW A &LANK Cm114(11111.1/0PooK. .4inoli CHARACTER

L10a 101 111 II) 000 001 010011

MI Hiatt POMION1NC DMICIKIN COIL

c Xvt X ...( xi. ( SOK

kx4eActt it comPixs4110x1ND '4:H0,43.11.4 PCit I

',II voiNG SC111114

Figure 69. Charactron storage tube.

5 '7 1 WRITING GUN

ChARACIER SEL ECTION PLATES

CHARACTER-f ORmING MATRIX

CHARACTER compEnsAT ton PLATES

CHARACTER DEFLECTION PLATES

COnvERGENCE COIL

STORAGE (WACO

F Loop Len

IONA RIPETLER MESH COLL CC TOR NEIN %HEWING STORAGE SCREEN MC Sti L (CHM

lAgure 70. I ypotron storage tube.

5'7 2

TIRA. Sts7,

READ OUT CORES fOR PAR7ICULAR SYMBOL Lsys(SIGNAL ENABLE) -..161 H0.2 USEC

OLD

20 21 7 8 9 10 11 12 13 14 15 16 17 18 19 1 2 3 C $ 6 .1111,

DELAY LINE =ULF PULSES (5 MHZ RATE)

11 21 Y SYMBOL 12 17 14 1$ 16 17 18 19 20 INTEGRATOR ISINI 10 OUVPUT (LETTER A) (GRID)

X SYMBOL INTEGRATOR !SIN/ OUTPUT (LETTER A) (GRID)

HORIZONTAL AMPLIFIER OUTPUT (LETT EfrA( iDEFLECTION)

VERTICAL L._AMPLIFIEROUTPUT LETTER Al BLANK (DEFLECTION)

UNBLANK UNBLANX 13 LANK UN- Z AXIS OUTPUT ELANx (LETTER AM

5 1

STROKES USED

YO DRAW AN A 3 7 yeoman. . USING IS STROK ES 3 CORRESPONCING To THE I i IA 1 13 1 12I r. ABOVE TIMING CHART 1 1 1 15 II

HORIZONTAL ...dienewommoregr.

Figure "1. Time ,haring tunblankmo

5 '7 3 .5403

ri v

11// II //,...:* srt.,..111/.. RE gERENCE idivt': ... \..GrvatmE :a To 103 A NORTH ,o CAST

Ige.....". .... REFERENCE MAGN1TUDE

20. 20 lite B EAST To SOUTH

H 4

REFERENCE hoONITUDE W\\ N N I 1

I % Ise TO 270* SOUTH TO WEST H 4 I i it II / , , li.v. Iii,,...".. REFIRENCE 4AcNirtme

1 k .,27e TO 11O' +EST TO NORTH

Figure 73. Sweep reference generator magnitudes (search).

574

53 .5'4 y

REFERENCE

A ZERO DEGR E ES SWEEP

30°

REFERENCE4101--s. MAGNITUDE

B 00 TO 30° SWEEP

REFERENCE MAGNITUDE yr._ -2° 1\ 178° 180°22...0* O° TO 2° SWEEP

Figure 74. Sweep reference generatormagnitudes (height),

59 INT BEAM ADJ CURRENT ADJ

KEYBOARD INTENSITY 1--- -1 HORIZONTALi 1 BEAM CURRENT s PI CHARACTER I I RASTER POSITION ADJ I ADJUST CRT

HIGH VOLTAGE 1

POWER er7 I SETTINGS ObFOCUS I ADJ I VERTICAL I FRONT PANEL CONTROLS L_

,C HEIGHTI VERTICAL CENTERING POSITION POSITION ADJ

ADJ ADJ

Figure 76. Interrelated units with controls.

5 7 6 Ian CRT ZERO REF ERENCE BEURCE ADJ 1, INTER-. ACT

HORIZONTAL VERTICAL

yERT ,AMPLITUDE 1AMMVDE ADJ 21.2.1. (INTERACTS WITH almarzglincwV vialigAl, ) POSITION) KEYBOARD ENTRY DATA-----0"

INTENSITY --es- TO CR T BEAM CURRENT --0,.... GRIDS HIGH ,VOLTAGE -

Figure 77. Deflection units with controls.

577 SERVOMOTOR

REF WINDING SUM POINT SIG WINDINGS ULLING XFORMER INPUT SIG, 400,, 0 A Z180° REF XFORMER FEEDBACK SIG, 400e :11V 115V g A L180. 4001%. f g A

/ POSITION FEEDBACK SERVO DIFFERENCE SIG / 400,N.0 A LO° OR Z.180° FEEDBACK POT

Figure 78. Simplified servo block diagram.

5 '7 8 1:1 GAIN MOTOR

TRANSFORMER INPUT NULL s1sY AC SOURCE > AMPLIFIER -11W CHAIN PITH 11F Pp OUTPUT_AAA %. $ VAC REL / VOL TACT A OP FEEDSACK POT RATE FEEDS CK r GAIN I I ET I FEEDBACK OH I I 1

OC VOLTAGE POT I I I I NN I DC RANGE I I I 1 L. r---r---1AZIMUTH GAIN POT i 1 1 TO A2IOUTH t SERVO i L

LINE DRIVER HAC RANGE DIFF ERENTIAL AMPLIFIER

ZERO AMPLIFIER lit.

LEVEL 1ADAM

Figure 79. Servo subelemenis.

579 .57

PRINT HAMMERS COMPL ETELY PRINT DRUM COVERING DRUM CHARACTERS CHARACTERS ECCENTRIC GUIDE SPRING CARRIAGE ECCENTRIC (2) ECCENTRICS STRI) NUT RACK GUIDE SPRING II lin smile

II VIS474 .(0 BUMPER -11111Mi BRACKET RACK

SO% TO 75% ENGAGEMENT elf"- (VISUAL CHECK)

SPACE PAWL

NORMAL DIRECTION OF MAXIMUM ECCENTRICITY SETSCREW

SPACE ARMATURE ECCENTRIC

007" TO .010" ADDITIONAL CLEARANCE

SPACE ARMATURE FRONT POL E COIL

SPACE MAGN ET ASSEMBLY

PAWL STOP PLATE

Figurc 83. Exploded view of space alignment element& INPUT SERIAL, OUTPUT SERIAL (TIMING I) (TIMING 2)

INPUT TIMING (I) T I T3 T3 TI T2 T3 T4

INPUT

OUTPUT TIMING (2) -1 f- / -1.--1 ii OUTPUT -Li o / 8IT I ISIT 3

Figure 86. Cyclic storage.

581 6 POIs IMO ___2.CONTROL) OISCI441 NA 1OR CIRCUIT

III

Wit( 04It CHMCMCI111 WYMAN iONODUL410.1) INPUTl I'd4 4DiuSli5NI

Figure 90. Data flow (modem).

582 5-7.Z

---1111. o I F. CONNECTOR A.DIRECTION OF FLOW 0 EL OPERATIONS G. STOPS

ES)

H. MAGNETIC (NO) TAPE UNIT

C. OECISIONS

I. MASS STORAGE MEOIA (ORUm OR OISK) D. MODIFICATIONS I .1 PUNCHED > (B IS GREATER THAN A) CARO at (6 IS EQUAL TO A)

<( IS LESS THAN A) K. PAPER TAPE E. COMPARISONS

Figure 91. Typical flow chart symbols.

58 3

67 .r73

LOAD MEMORY WITH a. PROGRAM CONSTANTS STARTING AT LOCATION 100

CLEAR ACCUMULATOR AND RESET PASS COUNTER 0 R ETURN CONTINUE PB DEPRESSED

t ADD CONTENTS OF LOCATION 100 TO C. THEACCUMULATO1

DETERMINE FAILING DOES BIT POSITION(S) d. ACCUMULATOR (NO) AND PRINT ALL ERRORS. = THE PREDETER PERFORM OTHER ERROR MINED SUM INDICATIONS AS REQUIRED U. BY THE PROGRAM

(Y ES)

9KSTEP HALT PASS COUNTER

TO NEXT TEST ROUTINE

Figure 92. Flow chart for computer test program (add class instruction).

5 8 4

68 k 57 Y

ENTRY FROM CONTROL PORTION (3OF PROGRAM

o. HOUSEKEEPING (INCLUDES THE STORING OF THE ADDRESS OF EACH MEMORY LOCATION INTO ITS RESPECTIVE LOCATION) T FETCH MEMORY LOCATION

ARE THE CONTENTS NO STOR E CORRECT OF THIS MEMORY ADDRESS AND THE LOCATION = TO ITS ADDR ESS R EAD ADDRESS

YES Er. PERFORM ERROR 4 COMPUTATION ROUTINE

ST EP NO IS ADDRESS THIS THE LAST COUNTER MEMORY LOCATION

YES

PRINT ERROR DATA IF ANY

BRANCH BACK TO CONTROL PORTION OF PROGRAM

Figure 93. Flow chart for memory addressingtest.

69 5-7.5"

HOUSEKEEPING

ALERT OPERATOR

READ A CARD AND CHECK SIM

CHECK SUM PERFORM ERROR CHECK SUM ERROR ROUTINE

ALERT 1..000MOMMNI OPERATOR

WRITE EOR. 0ACKSPACE ONE RECORD AND SETUP TO READ POSITION TAPE AND SET UP TO *RITE A 120 WORD RECORD

PERFORM ERROR ROUTINE

CHECK TIME FOR WRITES OPERATION BRANCH BACK TO CONTROL PORTION OF PROGRAM

YES

0 TIME o PERFORM REMAINING ELAPSED TIME ERROR ROUTINE

YES

Figure 94. Flow chart for card reader and tape drive test.

70 586 .5" 4

HOUSEKEEPING

IS NO THE PUNCH ALERT THE READY OPERATOR

YES

HAVE FIVE CARDS CHECK TIME FOR PUNCH BEEN PUNCHED OPERATION

YES

ALERT OPERATOR TO CHECK CARDS TIME NO PUNCHED AGAINST REMAINING CARDS READ o

YEs 0

Figure 95. Flow chart for card punch test routine.

71 587 Sm 77

Figure 99. Loidc AND ffinction.

72 ..%***.%,.. J3 N P3 ALERT MESSAGE 14 FROM TRANSFER DRAWER ""1*F--ID4A-A4 1ESA-EFP 4511446 4581466 OUTPUT PARITY ERROR --I---<< 1 14 344 J44 (OTH TX) J1 FF P1

TP nes-88

SESA 14 IESIS-EF 4581453 6D4A-10 JS

Figure 100. Stepping circuit.

589 .3-7 1

0 Co

M v

INPUT OUT PUT

X Y C S Co

1 0 0 0 0 0

2 0 0 1 1 0

3 0 1 0 1 0

4 0 1 1 0 1

5 1 0 0 1 0

6 1 0 1 0 1

7 1 1 0 0 1

8 1 1 1 1 1

TRUTH TA B LE

Figure 101. Full adder circuit and truth table.

74 (1 MIL) GATE (SPIKE) LOAD UNLOAD II 1 MEMORY CONTROL UNIT STROBE

TRANSFER RESET WRITEREAD INHIBIT DELAY LOAD LOAD

DATA INPUT CORE MEMORY C R ERROR (1 TO 15 UNIT MEMORY 0 0 LINES) UNIT DIGITAL /AULT. MULTI CONVERTER - PLE -PLE A LINES LINES A 0 65V DS1 (DATA HE LD FOR MEMORY DATA R T 1.5 M51 0

DATA

Figure 113. Memory unit block diagram.

591 Cr/

Nisl U U U _luu g!"ols.11w B88. EJOU tux i _2_000 L100 - ;S" . , .r.",..1.,1 !IIII 0 witstia,3A iih; moo ,J°DID

HIT

)rt.

r a

Figure 118, Types ot indicator panels

7o t

1 33 4 34 7 10 11 12 13 1.1 III 14 17 19 19 20 II 22 23 24211,24 37 24 24 30 31 3233 34 34 34 37 3839 40 41 41 444449

100

200

300

100

500

600

OW WO a4 a4 4a 4- 700 3J JJ5 aa" 21 5 30

800

900

a 1011 12 13 14 14 14 17 II 111 30 31 23 33 24 as 3427 25 28 30 31 32 33 34 311 3$37 3$ 311 40 41 42 43 44 44 III

(CARD SIDE) Al

Figure 120. Card location chart.

77 593 .3":3

-Card Part Card Part Group Rack Row Slot Number Group Rack Row Slot Number

B405 DBSG 10 32 1570471 B601* DBSG 10 39 1570472

10 33 157047 1 10 40 1570473

10 34 157047 1 10 41 1570477

10 35 1570471 10 45 1570480

10 36 1570471 10 46 1570475

B701* DBSG 10 33 B406 DBSG 10 33 157047 1 1570471 see /MSG 9 43 1570380 10 36 157047 1 NOTE A

B502 DBSG 10 26 1570468 B801 DBSG 10 14 157 1163 10 35 157047 1 see 10 26 1570468 10 36 1570471 NOTE A 10 29 1570169 10 38 157047 0 10 33 1570471 10 45 1570480 10 35 1570471

10 39 1570472 B503 DBSG 10 38 1570470 10 40 1570473 10 42 1570479 10 43 1570474 B504 DBSG 10 38 15 7047 0 10 47 1570476

PPISG 8 40 1570386 B505 DBSG 10 34 157047 1

10 38 1570470 3802 DBSG 10 36 1570471 10 4 0 1570473 B506 DBSG 10 34 15 70471 10 41 1570477

B803 DBSG 10 15 8507 liBSG 10 33 157047 1 1570469 see 10 42 1570479

NOTF A 10 44 1570478 B508 DBSG 10 33 1570471 AROSG 9 24 1570376

9 25 1570376 B509 DBSG 10 32 1570471 9 26 1570378

9 27 1570378 B510 DBSG 10 32 1570471 9 39 1570378

Ilgure 121. Self-tot table displays

78 OC- 9 4 DATA

PRINTERS UNITS TAGES DISPLAYS vOL

PROCESSORS CE ATA DATA PRINTERS ANTENNA CIRCUITS SUPLIE$ UNITS TRANSPORT DATA DISPLAYS R VD TRAL ITAL T ECTROGRAPHIC A RADAR a PARITY LINE POINER C S E IMPACT ORIENTATION TAPE 100 oe o SS# Ilk o 11#* * $ P 11111,10410 4.° ° 1Ine n c%, r7 A

, 'e) o 711 e W... yc 1:" $* $ * Silk $ Sisi,

00 e1V ... .0" 0.. .9 tA 9 0 0 rie..9 ef. 0sPI 5,09. HORIZONTAL CHARACTER AHDi:FLF.CTION CIRCUITRY eBALANCE HIGH ORDER BITS D A CONTROL ICONVER TER

nr LOW ORDER BITS

a 13V

INTEGRATED CIRCUITS

DATA 1 SHIFT REG DID Pip\ A M (11!) LAMP !IZW(11 IIORIZ CIT.AR INTENSITY POSN GAIN MD Ili COUNTER O 0 CONTROL L Y CONTROL PANEL

POSITIONAL ® COUNTERS VERT VERT CIIAR POSN GAIN HEIGHT INTENSITY

% 4 / V V 1+11 II. A Li 1000 250 450

I3V AIA BAI COI R.:L

HIGH ORDER LOTS 2

LOW ORDER BI 1 S 1.

0 NOTE: D = ALL CIRCUITRY Figure 55 (out apart) "r.RTICAL CHARACTER AND DEFLECTION CIRCUITRY 597 ...

HIGH-VOLTAGE COUPLER A7 1

ENSITY JLSE r> t I3V ...... ,

27V 40 reI' .4* r P/O Al4 A IS CRT IRIM LAMP ®I 0 0 --1 -2 7776 8 10"14 --18 ---22--;;;------N1-

3 4-.4 5

eam 1114.....

14 18 22 38 1 2 3 4 68 10 598 liguie SS. D unit. 577

J19 ANALOLUEERUI" - .11 $11

iANE :0

()PA AEED,,c

A5A.01/111 A0PI 14 ICI ty 11 1,1 OA c )0 A.A

ASAI0 :

001 F AtA. r0r,

MMUS. Wagapianua"

4.AA

. . 0 1.4 >->

_o__ ame.m. Figure 81(cut apart)

6 U 5E7

A POSITION ANALOG AO *S. >ACTT )1 AZIM,T.it .`,ASIV

LIT, Al 11.1 ALII

OPA OA,N TOP B2

OPA fie NW. AtPA

a A A,AI,A, MPLI

VI v) VIA 13 OK 7. romnowereg 01111 Re AUP

I01.Tit 1 iy; Ne,7..ATr(lete54C,

AMPLIFIER CHAIN rDOP. NE (ST;NAP? 1

A ICt,C AACOP, ,,,}6 wV vItt AT OPAI OUTPUT)

X AS AA VANI

'1.."44? 500511119SPInNil -. RIP

Alb. 110h. -Ala& - Albs SIC , MCI MN A.404 . A ISIMEMMIIIIIINI II MR impip..m......

,3t , A Us " SUI 54 1.11 AN.II Nu ,1.424 vo N 4$ WIto I Ito4.01,Wv

(;13 1.4.4

A,A1IA QVA ,

A-AIP Ps 11, I 14

.1i vl AU

AMPLIFIER C1lA1/4

Figure 81(cut apart) Cul Al A2XAR.4

RE SOI VLO RANG 1.10... 0A

...51Rm. MUM UP AIL -.- -.COY N Si ILA SIM POINT L OGIC 7424 270I ffl I 41.2V In 2V 4044 TOOT GAIN I', A2A2RAII .10 Iv ITOPIW 13.2V CI 01, 02 AIA2 A5 ASS2 IOIJF A2A 21 I A2A2XAR At A220AL ASA)

01r TOI:47E--102 03 01,02 02,04 3 1171 21 :tOOK mr..AmmormIL. 111 I CI C2 PP ALIP RE 1 I INV 331.0,11.1 2A2x0. II ASAI II^ I RS OCAC S 14, IP 23

RIS GAIN 1001 TOM) GI 10 ut 01.02 LI RA TE FEEDBACK 10 10 IV ACI LI

RAINAT 14 AU 0A)N' t

MAIN SERVO F ((MACK ER WO.. OA

NOTES 0 LIAO AND DAL ILOARDL AR( SHORN FUNCTIONALLY TRANSISTOR SYNICIIING CIPIUITRy INSERTS DIE FIRENT VALUESOf OPA INPUI RESISTANCE BETWEEN PINS I AND 3, AS R.,ISLE DAL, AT LEI I OF PAGE ra CAIN or OPERATIONAL AMPLIFIERS IS IDE RATIO OF FEEOBACK RESISTANCE DA) R41110 INPUT RESISTANLE DA 2-R o

al :A. BOARDS ARE At/AWARE C GAIN DO, TRANSISTOR INVERTING AmPLIFIERS USED 10 COmPENSAIT F OR DC DPW 1 OF OPA GALT AND LOB BOARDS Acq FOR C VD( ,leO INPUI I AI (MORO( tED HOARDS oulruIs 0 'KALI I AL TORS ARE VOL IS PLR RILE FOR CAEN VOL I 2AE IUALI OF REF Al AIASIN PIN 14 OR LIIF REF VOL !AGE IS exAct sr 1000 RAS. mul TIPLY BY SOW IIIE. Aalt ANAL OG vOL ;AGES ARE RuS FOR 000 RES RYLS 0 RAT( F [MACK IS Z IRO *NEN SERVO IS SIAM:NA/1Y APPROT IF RAO Al MAR VEL DEITY MUNE AL El AtIPLIIUGES AIN) I (RICO OF MILL VOI IAGLO API !LINEAL ONLY AMPLITUDES RN I. VARY APPLIOR 00' AIM RANGE

602 603

Figure 81( out apart) .510

AVIA 13.2

RANCE v. SCALE FACTOR0,135 V MILE I-10v REF. SERVO 47A2 A3/II AA23.12 A332 A3P1 ASSEMBLY

IlA I 12AS ORIvf MOTOR F225 RIOA 11 SI J2 APAIAI

OA 4 0 SV CA<0. 7A IAST4 120V REF xfOR/AER NWT IV Is * A7A1A2 3.3 I, ^ 0.121 IS a-0 A343 I 30V 2.3V 1 OS E -0 CB :Am 1 LEVEL I (1107 10h. ioNV. 1722;.,f AiAsxAr ZAIII 13 1,241

112 SY! '11::013 3 % I A2A4X AI CAM LOGIC 7 45 Is0 VI V / v 3 SV 01<11101 ASA 2 1004 A2A2KA1 17 A7A171 201 7A17 7 P17 .- 10V ov, OC MANGE 1120 110 OIFF cF K WM* Minor* II 1 III AMP ONLY TO 4441A1P2.4 17111 CONN PAN 0 11 1004 ro $1,0 4.g pA TO IIAIA RA 2304 1,, F RIO 474 AC RANGE PIN LORI LEVEL ca .v24 SEALE FACTOR A07 IGO TONI AMC, III ER 55 ,A3L1: -111Mil MOM 11140. SFO 47.4 ASAIIA3

AZ CAIN

5E4 AZ SERVO, 5E0 NO 17.3

A2ASOAI 1.041 41. AZ IRIC VIv2,y3 GAIN SOK II 1000 20

IQ KK 42 E. 17 moNNANA..A. OCIC 7710 124 1001( efONLT POT) RI IGAINI 415

SOK

'Figurei. Complete servo with interrelated functions, outputs,and test data.

61j.4 ADJUSTIN KEYBOARDT PRINTER SCREW -- - - I 1 SPE.E AARRANACTEUM R E

1 SPACE PANL

1 SHAFT END PLAY (SHIMS) 1 0.000000 0 0011000000 000000000 00000000* SPACE BAR P/0 FUNCTION DETECTOR 143 (P70)

DATA (8) K130 -1-11IP (BAIL) 0 DATA 0 (P56) INPUT (P65) STROBE R, B (P66) SWITCHES I- DATA CONTROL REGISTER TRANSMIT STROBE (SPACE, CHARACTERS (P14) INTERFACE AMPLIFIERS iMMI DISCRIMINATORSTROBEI CONTROLS) t------\ 51--72(7-1111°)IE ®

605 606

Figura 84 (out apart) ECCENTRIC ECCENTRIC SPACE SPACE MAGNET SPACE PAWL/ PAWL STOP PLATE CLEARANCE ARMATURE ADJUSTMENT ADJUSTMENT I I I SPACE PAWL/I SPACE BAIL 1.....-114 RACK 1.------0/1 ÷I POSITIONING , CLEARANCE , I I I 1 1 I CARRIAGE I SHAFT POSITIONING

I R4 SS (2-8 MS) I R30 SD ADJUSTING SPACE -DJUSTING R42 PI (10-40 MS) SCREW ARMATURE SCREW ECCENTRIC SPACE (P21) / FUNCTION CIRCUIT REGISTER SPACE my (P67j J/P 106 /J 50 J P 2'-'1.13 1 MAN GND UAL - G 46 11

HAMMER CON TROL -41 (P17) 1- .i. -12V AUTO HAMMER .12 CONTROL CIRCUIT (P20) 15

R3 (SINGLE SHOT Pw NOTES: I. CONTROL) -I2V IS FED THROUGH RELAY K5 IN PWR SUPPLY TO: . M. .1 II r-I 188 .17 TB 10 I COIL I 1-5 i I 1 1 I I

2. TWO ELECTRONIC PATHS PROVIDE SOURCE GROUND FOR ARMATURE ENERGIZING. 3. SPACE BINARY CODE IS 0000010 (LSD LEFT)

Figure 84. Space interrelated functions. 607 608 .176-. TP A67 DIFFERENTIAT )11 930EC A45 r 111 10 ERROR DETECTOR luS J77-13 TRANSFER SS Alt lv TRANSFER TO BUFFER 4 RSEC 4 f4SECr LOAD GistAll .177-A mEc r0 I V Ml .176. RESET Po TO BUFFER SS UNLOADT AI3 1 IV 414 SEC 411SEC T.° Al3 r

.1/7-C J77-H READ DIFFERENTIATOR READ (CLEAR CORE All SS Al3 4 ASEC DIFFERENTIATOR ro DELAY WRITE

SS MO WRITE (1)1 -1 4 PSECr 0 70 CORES DELAY INHIBIT INHIBIT J77-E SS 1 SS All INHIBIT All 70 CORES 244SECr 9 PSEC .177-o -1.221Ecr.

$S STROBE Al2 Al2 (DELAYED STROBE! 1.5 PSEC '10.4 PSECr0 IV 0- A10 TJ77.if 40 TO ERROR DETECTOR AND BUFFER -Ezipacr 6 10 603 Figure 114 (out apaet) 5'9

MEMORY CONTROL PULSE GENERATION AND rlemING

LOAD CYCLE HALF REWRITE (UNLOA1)) CYCLE HALF

TP j77-w LOAD if- TP J76-a UNLOAD (51114SEC AFTER LOAD)--/

J77-A If 4 I4 PSECI RESET

TP .177-B rRANSFER I4 IASEC

rP .177-H READ TP .177-X DELAY STROBE - TP .177-F STROBE TP J77-y DELAY WRITE

TP .177-D WRITE

TP .177-J - WRITE rP in-z DELAY INHIBIT 1 TP .177-E INHIBIT uISIEC r4{- (I()ELAYLOAD DIFFERENTIAL)! DELAY LOAU NEGATIYETh,F-"7: 93 ir SEC SPIKE USED

Figure 114. Memorycontrol pulte generation and timing.