Omnicomp Graphics Corporation Designs, Manufac- Tures and Markets Graphics Display Subsystems and Associated Products for the OEM and System Integrator

Aft Graphics Corporation PC }UU

High Performance Personal Comr)uter Graphics for the System Integ rator U L LJiD J

Omnicomp Graphics Corporation designs, manufactures and markets graphics display subsystems and associated products for the OEM and System Integrator. Since 1983, Omnicomp has provided many technological firsts to the computer graphics and System Integrator communities. Included, among those firsts, are the first hardware implementation of GKS (to off-load graphics processing from the host while providing a standardized graphics application interface for systems developers) The products presentedon the following pages repre- and the first graphics display subsystem for the ad- sent some of Omnicomp's most popular products for the vanced MULTIBUS II architecture. Omnicomp continues System Integrator using IBM PC's and compatible hosts. to provide "Custom Service" to meet the special re- For information concerning Omnicomp's other products, quirements of its customers. please contact your Omnicomp Sales Representative. Graphics Corporation OMNI

Matchless Graphics for sable resolution of the 2 overlay screens are fully implemented in the the PC/AT planes is always 2048 x 1024. OMNI 1400 GDC. These ACRTC The OMNI 1400 GDC expands the functions allow the three screens to limits of graphics performance and Color Palette be independently addressed and ver- resolution for the IBM PC/AT and Palettes of 4096 or 16.7 million tically or horizontally scrolled. compatibles user. 1280 X 1024 colors are available. Either 16 or 256 viewable resolution is provided for colors may be displayed depending CGA Support high performance applications. upon memory configuration. Any Applications and systems software The OMNI 1400 GDC provides: color plane may be disabled or made compatible with the IBM CGA is sup- to blink at one of 4 different rates. ported via video feed-through. The D Very high speed drawing video generated by a co-resident Drawing Functions CGA is multiplexed with the overlay Hardware cursor D The drawing functions are per- planes of the OMNI 1400 GDC. The Two overlay planes formed by a Hitachi Advanced CRT CGA video may be viewed at its normal Hardware pan & zoom Controller (ACRTC), which executes 320 x 200 (4 color) resolution in the commonly used functions such as: top left corner of the screen or it may D CGA Feed-through (Optional) line, arc, circle, ellipse, rectangle fill, be zoomed independently in the X 60 Hz non-interlaced display area fill, area copy, etc. In the OMNI and Y directions. Possible X resolu- 1400 GDC, the ACRTC functions as a tions are 320, 640, or 1280. Possible The OMNI 1400 GDC resides in a dedicated graphics processor closely Y resolutions are 200, 400, 600 or single slot of an IBM PC/AT or Com- coupled with multi-ported video 800. This allows a single high resolu- patible, providing a high performance memory. This allows drawing operation monitor to meet all user graphics workstation at a competitve tions to be performed continuously. requirements. price. A 50 pin DIP connector pro- The ACRTC also provides hard- vides I/O with the OMNI 1500 DLP for ware clipping, zoom and pan. Software GKS display list processing. A comprehensive library of Cursor subroutines are provided with the Resolution The cursor on the OMNI 1400 GDC OMNI 1400 GDC. This library is com- The display memory of the OMNI is implemented in hardware as a 64 x 64 patible with FORTRAN and C appli- 1400 GDC is organized as 2048 x pixel matrix and/or a full screen cations. Advanced software developers 1024 x 8 planes plus 2 overlays, 2048 crosshair. The cursor can be set to have full access to the ACRTC and x 1024 x 4 planes plus 2 overlays or blink on-off or between colors. The other hardware features. 1024 x 1024 x 8 planes plus 2 cursor may also be positioned with Drivers for many popular software overlays. Viewable resolution is soft- single pixel accuracy at any screen products, which benefit from the high ware configurable to 1408 x 1024, location. performance and resolution of the 1280 x 1024 or 1024 x 768 for either 4 OMNI 1400 GDC, are currently avail- or 8 plane configurations. The visible Logical Screen able or in development. Please con- area may be panned about the total BASE, UPPER and LOWER tact Omnicomp for current information display memory area. The addres- on supported packages. Models Compatibility Drawing Speeds Model 64 4 Planes, 2048 x 1024 Single card IBM PC/AT or Line 2 rnegapixels Addressable Resolution, 2 Overlay Compatible. per second Planes. 16 of 4096 Colors. Memory Circle 1 megapixels per second Model 68 4 Planes, 2048 x 1024 Display memory is 2.5 megabytes Addressable Resolution, 2 Overlay organized as 2048 x 1024 x 8 planes Rectangle Fill 2 megapixels Planes. 16 of 16.7 Million Colors. plus 2 overlays, or 1.5 megabytes per second organized as either 2048 x 1024 x 4 Copy 1.3 megapixels Model 104 8 Planes, 2048 x 1024 planes plus 2 overlays or 1024 x per second Addressable Resolution, 2 Overlay 1024 x 8 planes plus 2 overlays. Planes. 256 of 4096 Colors. Fast Fill 32 megapixels Graphics Controller per second Model 104-1 8 Planes, 1024 x 1024 The drawing processor is the Addressable Resolution, 2 Overlay Video Output Hitachi Advanced CAT Controller Planes. 256 of 4096 Colors. (ACRTC). The OMNI 1400 GDC oc- Video scan rate is 40 KHz to 64 cupies 16 bytes of I/O address. The KHz. Suitable monitors are available Model 108 8 Planes, 2048 x 1024 base address is switch selectable. from Omnicomp Graphics Corporation. Addressable Resolution, 2 Overlay Planes. 256 of 16.7 Million Colors. BUS 110 Model 108-1 8 Planes, 1024 x 1024 Images from PC Memory to Addressable Resolution, 2 Overlay Display Memory - 1.3 MBytes per Planes. 256 of 16.7 Million Colors. second using 16 bit I/O.

'I OMNI 1!i00 DL?

Extended GKS Display The OMNI 1500 DLP's OMNI*GKS PCIAT Bus Interface List Processing firmware provides application soft- The PC/AT memory is mapped as ware compatibility with the OMNI High performance GKS display list local memory to the OMNI 1500 DLP 1000 GDC, OMNI 1200 GDC and processing is the primary function of processor. The OMNI 1500 DLP is a OMNI 2000 GDM. the OMNI 1500 DLP. Utilizing the DMA device to the PC/AT. most recent advances in micro- Models processor and memory technologies, OMNI 1400 GDC Interface the OMNI 1500 DLP alleviates the Model 01 - 1 Megabyte of 0 Wait A single 50 line ribbon cable allows volume of bus traffic and host com- State Dynamic RAM. connection of multiple OMNI 1400 putation associated with graphics Model 02 - 2 Megabytes of 0 Wait GDCs to one OMNI 1500 DLP. Each display list processing by providing State Dynamic RAM. GDC is individually addressed via extended GKS functionality on a Model 04 - 4 Megabytes of 0 Wait select lines. single PC/AT add-in circuit card. State Dynamic RAM. The OMNI 1500 DLP can be configured to have one or more compa- Processor Peripheral Interfaces nion OMNI 1400 GDCs in an IBM 80386 microprocessor (16 MHz) A total of 4 RS 232-C serial inter- PC/AT or compatible. 80387 numeric coprocessor (16 MHz) faces are provided on the OMNI 1500 The 4 MIP 80386/80387 compute DLP. They may be configured, as engine of the OMNI 1500 DLP is Memory needed, for keyboard(s), graphic dedicated to executing Omnicomp's locator device(s) or host interface. firmware resident GKS commands. 512 Kilobytes of EPROM (A portion There are 2 DEC User Peripheral Up to four megabytes of on-board, of EPROM space is reserved for compatible interfaces on the OMNI high density dynamic RAM are avail- customer developed firmware.) 1500 DLP. One supports DMA via able for storage of a display list for 1, 2 or 4 Megabytes of DRAM (0 DR1 1-W/DRV1 1-WA. The second pro- the co-resident OMNI 1400 GDCs wait state access). vides Programmed I/O via which may be concurrently driven by DR11-C/DRV11. They may be used for the OMNI 1500 DLP via a ribbon communications with an external cable interconnect. host.

1 OMNI IriDl GDS

The Graphics Subsytem for via an AT-like backplane) and com- The OMNI 1500 GDS is a very High Performance municates with the host via the powerful and flexible graphics solu- Applications DR11-W (DMA), DRV11 (P1/0) or serial tion for the OEM. It is designed to (RS 232-C) interfaces present on the support multiple screen applications, The OMNI 1500 GDS is configured OMNI 1500 DLP. Inter-module com- including Process Control/Industrial as one 0MM 1500 UP and one or munication is via a bi-directional 16 Automation, Computer Aided Map- more companion 0MM 1400 GDCs bit interface located at the top edge ping or CAE. that reside in a stand-alone desktop of each circuit board. or deskside package (taking power

OMNI 1400 GDC 2048 x 1024 x 10

OMNI 1500 DIP L1I 18O387 4MBYTE LIU DISPLAY LIST 4-RS 232C SERIAL PORTS 80386 ii I

TDv1 WA(DM A)1 T52 ' L'J L 1 !!'9LJ

Multiple OMNI 1400 GDC's may be attached to a single OMNI 1500 UP. OMNI*GKS firmware provides full multichannel workstation display list support.

OMNI 1500 DLP Display List Processor OMNI 1400 GDC Graphics Display Controller Li Single Board Li Single Board IIJ OMNIGKS Firmware Li 2048 x 1024 x 8 Resolution Li 80386/80387 Processor Li Plus 2 Overlay Planes Li DMA and Programmed I/O Parallel Interfaces Li Hardware Cursor, Zoom and Pan IJ 4 Serial Interfaces for Keyboards, Mice, etc. Li 60 Hz Non-interlaced Li PC/AT Compatible Li PC/AT Compatible PARALLEl. INTER! MO.,DULES

Parallel Interface Modules for the IBM PC and PSI2 Families Omnicomp Graphics Corporation manufactures a series of parallel interface products, for IBM PC/XT/AT and PS/2, which emulate the DEC User Peripheral Interfaces (DR11-W/DRV11-WA and DR11- C/DRV11). These parallel interface products, when installed in an IBM PC compatible or PS/2 host, provide communication with DEC compatible peripherals such as graphics display controllers. Omnicomp also supplies similar parallel interface products for MULTIBUS iSBX and VME. pc11 The PC11 is compatible with the IBM PC/XTIATIRT. The PC11 emulates !J_Ii [J- LI I IiS} 1PE1 ) either the DRV11-WA (DMA) or the i DRV11 (P1/0) host interface. An IBM PC/XT/AT/RT with a PC11 installed NJ II - If may host a peripheral which is compatible with either of these interfaces. All DRV11-WA (DMA) modes are sup- ,if ported through the use of host buf- . j'' fers. PC/AT operation is supported via on-board switching. psil The PS11 is compatible with the IBM PS/2 Micro Channel based com- puters. The PS11 emulates either the DAV11-WA (DMA) or the DAV11 (P1/0) host interface. An IBM PS/2 with a PS11 installed may host a peripheral which is compatible with either of these interfaces. All DRV11-WA (DMA) modes are supported through the use of host buffers. Omnicor'. Graphics Corporation

Optimizing Computer Graphics. .. by Design. 1734 West Belt North, Houston, Texas 77043 713/464-2990 • Telex 285801 OMNICO UP Fax 713/827-7540 DEC. DR11-W DAli-C. DRV11-WA and DRV11 are trademarks of Digital Equipment Corporation IBM, CGA, PC, PCIXT, PC/AT and PC/AT are trademarks of IBM Corporation 80386 80387, MULTIBUS and iSBX are trademarks of Intel Corporation MS-DOS is a trademark of Microsoft Corporation ACRIC is a trademark of Hitachi Corporation OMNI 1400 GDC, OMNI 1500 DLP. OMNI 1500 GDS. OMNrGK$. PC1I. and PSI1 are trademarks of Omnicomp Graphics Corporation

All specifications contained herein are subject to change without notice

TM OMNI 2000 GDS The High Performance OEM GraPhics System

The OMNI 2000 GDS incorporates high performance vector and raster graphics as well as image processing in a single system.

The OMNI 2000 GDS is available as a traditional packaged system with DEC compatible parallel interfaces or as a board level system with an Intel MULTIBUS II system bus interface. By combining sophisticated graphics system design techniques with a high performance public bus two planes of structure, the OMNI 2000 GDS provides an 1280 by 1024 opportunity for system developers to integrate display memory, a high performance vector and image graphics hardware cursor, and with powerful computing platforms on the same a 60 Hz non-interlaced system bus. (112 MHz) video output The OMNI 2000 GDS is a modular, multiple channel. board system which conforms to the System functionality EUROBOARD form factor. Two system interfaces can be enhanced through the are provided: P1 - the standard iPSB interface addition of other complementary using the message passing protocol, and P3 - modules including multiple Graphics the interface to the GBX bus, passing control and Memory System (GMS) boards and data signals unique to the OMNI 2000 GDS. a Graphics Data Base Manager (GDM). At a minimum, the OMNI 2000 GDS system Each GMS provides an additional four consists of two modules, the Graphics Control planes of display memory. Processor (GCP) and the Graphics Output The GDM provides the user with high System (GOS). This configuration provides a six speed display list processing and level mips bit slice geometry processor, an optional six 2C+ GKS functionality, via Omnicomp's mflops floating point coprocessor, a proprietary vector proprietary OMNI*KERNEL System (OKS) coprocessor, a graphic input device controller, firmware.

Omnicomp Graphics Corporation OMNI 2000 IG-D-STM

Graphics Control Processor through the iPSB interface. Efficient which are specified in the world data transmission is maintained with coordinate system are first converted to The Graphics Control Processor both data channels by using buffered screen coordinates by the floating point (GCP) is a graphic drawing engine and fifo's. Also included within the GOP coprocessor. The conversion process a geometry processor. All GOP module is a peripheral coprocessor consists of a general geometric functions are controlled by a six mips which supports four RS-232 serial data transformation, followed by a clipping AMD 29116 based bit slice processor ports. This Intel 80188 based coprocessor operation and finally a window to which uses an 88 bit wide micro-word provides a direct link between a locator viewport mapping. The bit slice instruction. An optional six mflops device, such as a mouse or digitizer, processor converts screen coordinate floating point coprocessor, the AMD and the cursor hardware. This offloads drawing primitives and raster image 29325 floating point ALU, communicates the cursor positioning responsibilities data into a series of data words and with the bit slice processor through a from the drawing engine. control signals used by the vector dual ported 8 KByte scratch RAM. For applications which require a coprocessor. The bit slice processor provides variety of rapidly generated bit The 12 MHz vector coprocessor significant flexibility in the application mapped text fonts, the GOP contains utilizes proprietary logic developed by functionality of the OMNI 2000 GDS. 10 KBytes of high speed memory Omnicomp Graphics Corporation. This This processing power is easily applied which may be downloaded with custom coprocessor is capable of generating to both geometry processing and digital text fonts. A typical 15 pixel wide by 20 vectors of any orientation at the rate of filtering. The design of the microcode pixel high bit mapped text character is one pixel per 80 ns as well as initiating the takes full advantage of this resource by drawn in less than ten microseconds. frame buffer write operation in parallel providing commands for two and three Bit mapped text may be clipped, pixel with the geometry processor. dimensional vector, two dimensional by pixel, to an arbitrary screen viewport In order to decouple the vector polygon oriented functions, and image with no performance penalty. coprocessor from the system frame buffer, analysis and processing operations. In The primary function of the GOP a 20 pixel cache is employed. The pixel addition to vector and polygon draw, is to execute drawing and image cache is organized as a 5 pixel by 4 pixel transform, and zoom operations, a manipulation commands which are array. The entire contents of the pixel convolution function provides digital passed to it either by the GDM or by cache can be written to an arbitrary image filters including Laplace, high, the host CPU. The GOP is capable of location within the frame buffer in a single and low pass. The GOP communicates processing drawing primitives specified frame buffer memory cycle of 500 ns. with the host CPU through DEC in both screen and world coordinate Because of the 5 by 4 pixel cache and compatible parallel interfaces or systems. Those drawing primitives the proprietary vector coprocessor, the

Figure 1: The OMNI 2000 GDS system consists of a PSB minimum of two modules: the graphics control processor (GCP) and the graphics output system (GOS) module. Added functionality can be ob- tained by using a graphics memory system (GMS) module and a graphics database manager (GDM).

DEC MOUSE ROB MONOCHROME COMPATIBLE KEYBOARD ANALOG ECL DIGITAL PARALLEL VIDEO VIDEO INTERFACE

OMNI 2000 GDS can the data bits it receives from the GMS sustain a throughput of into 112 MHz video signal. The video over 200,000 random UI 1114 data stream is then routed to the color forty pixel vectors per JJJJp pallettes, which provide the second. This unique I color look up and digital to architecture minimizes as analog signal conversion the number of frame J' functions. When buffer accesses required configured with two for typical drawing GMS boards, the OMNI operations and facilitates 2000 GDS provides 256 highly efficient execution displayable colors from of all graphic primitives. a palette of 16.7 million Fat lines, patterned fills, colors. A separate patterned lines, irregular overlay color look up fills, polymarkers, bit table is used to control mapped text and paint how the overlay video brush style strokes are data and the hardware examples of operations cursor from the GOS which benefit from this affect the primary video drawing efficiency. signal. Systems configured without a GMS module use the Graphics Output GOS frame buffer to System provide either a double The GOS module contair buffered monochrome or frame buffer control hardw four color display. In as two planes of frame but addition, the GOS memory. Video data generaiu uy provides a digital ECL these planes can overlay the video data received from video interface for use with monochrome monitors. the optional GMS modules or be used as a two plane frame In order to simplify the use of the graphic cursor, the GOS buffer in a stand-alone configuration. The GOS multiplexes provides both hardware generated matrix and crosshair

Figure 2: All GCP Figure 3: If each pixel in functions are con- the vector represented in trolled by an (A) were drawn indi- AMD 29116-based vidually, 15 memory cycles bit-slice processor. would be required. By The GCP com- allowing simultaneous municates with access of the two-dimen- the host through sional regions of the frame either a DEC-com- buffer, only three memory patible interface cycles are required. If the or the MUI.TIBUS text character represented Ii's iPSB. in (B) were drawn using a pixel block transfer, a frame buffer that allows only scan-line access would require 12 memory cycles to complete the transfer, the GDS requires only six memory cycles. cursors. By generating the graphic memory significantly reduces the Each pixel within the frame buffer cell cursor on the fly rather than by frame buffer bandwidth. is individually addressable. A drawing it into a frame buffer plane, The frame buffer implementation, used two-dimensional barrel shifter is used any interference between frame buffer by the OMNI 2000 GDS maximizes to compensate for misalignment data and the cursor is removed. The the frame buffer input bandwidth and between the contents of the pixel iOn cursor video signal is routed through allows multiple scan lines to be accessed cache and the fixed cell boundaries the overlay look up table to allow the simultaneously. Most drawing of the frame buffer. cursor display characteristics to be operations execute with fewer frame adjusted. buffer accesses when small two Serial Versus Parallel dimensional regions of the frame buffer are accessed at once rather Another form of block pixel transfer Graphics Memory System than by a single scan line. The OMNI is used by the GMS to transfer data The Graphic Memory System (GMS) 2000 GDS frame buffer memory is from one set of frame buffer planes to modules provide up to 1280 x 1024 x 8 organized as 256 rows by 256 another, thus providing a serial double frame buffer memory (double columns of 5 pixel by 4 pixel blocks. buffering capability. Double buffering buffered) in multiple configurations. By This memory organization is possible is used to delay the visual effects of employing dual ported video RAM in due to the dual ported video RAM's drawing operations until the drawing the GMS design rather than high serial output port bandwidth, is complete. Serial double buffering, conventional DRAM, a more efficient which allows a narrow frame buffer as it is employed by the OMNI 2000 frame buffer memory organization is block to provide the required frame GDS, is often significantly more made possible. Traditional frame buffer output bandwidth. efficient than the traditional parallel buffer designs force the frame buffer Physically, each 5 by 4 pixel block double buffering method. The parallel word to be a one dimensional group consists of 20 pixels which share a double buffer employs two identical of pixels which fall on a single scan common memory address. In order to buffers. As one buffer is accessed by IN line. Because the video output data is further reduce the number of frame the drawing processor, the other read from the frame buffer one scan buffer accesses, the frame buffer buffer is displayed. When the drawing line at a time, this organization design allows the contents of the pixel is complete the original drawing buffer maximizes the video output cache to be written to any location becomes the display buffer, and the bandwidth of the frame buffer within the frame buffer in a single original display buffer becomes the memory. However, scan line memory cycle, without regard to the current drawing buffer. The parallel organization of the frame buffer physical frame buffer boundaries. double buffer is convenient if the

A in Figure 4: Serial double :Ec VIDEO ed in buffering is often more efficient than the traditional i cycles parallel double buffering By method. The parallel us double buffer uses two men- identical buffers—as one frame buffer is accessed by the emory drawing processor, the If the other buffer is displayed. sented A serial double buffer sing a dedicates one buffer as a a drawing buffer and Ilows another as a display is buffer. emory the equires PARALLEL DOUBLE BUFFER SERIAL DOUBLE BUFFER 'des.

entice buffer content is regenerated frame time of 16.667 milliseconds. MHz with no wait states. A large before each buffer swap. If, on the Each pixel is moved from the drawing display list store, consisting of up to 16 other hand, only a portion of the buffer to the display buffer just after Mbytes of memory, is connected directly buffer content is modified, such as in the display pixel is sent to the screen. to the 32 bit wide memory cache. a multiple window display, the parallel This results in an apparently instant The display list operations executed double buffer is much less convenient. change in the display. By employing a by the GDM correspond directly to Because the most recent modifications dedicated drawing buffer, the standard host based GKS subroutine to the display buffer are not reflected inefficiencies of the traditional double calls. By using the same OMNI*KERNEL in the current drawing buffer, they buffering method are removed. System firmware as other Omnicomp must be duplicated in the drawing products, the philosophy of providing buffer before the current drawing upward compatibility throughout its Graphics Database Manager activity may proceed. This redundant family of graphics systems has been activity significantly affects both The GDM module is an Intel retained. Thus, the systems integrator system performance and operating 80386/80387 based CPU and memory has a price/performance range of overhead. board and is configured as a back-end software compatible graphics devices A serial double buffer on the other processor. This allows the bit slice with which to address his marketplace hand dedicates one buffer as a drawing processor to scan the requirements. This firmware is written drawing buffer and another as a incoming command stream and entirely in 80386 assembly language display buffer. As a drawing is execute any commands targeted for it. and executes in a stand alone fashion, completed the contents of the drawing The GDM connects to other system with no intervening operating system. buffer are transferred into the display modules via the iPSB bus interface. The responsibilities of the GDM are to buffer. The OMNI 2000 GDS performs A 64 Kbyte memory cache is used to manage the data base and graphic this block transfer in a single video allow the 80386/80387 to run at 20 attribute control functions.

PIXEL DATA if Figure 5: The graphics output system (GOS) module PIXEL MASK I VIDE contains two planes of EXTERNAL S I1 PIXEL ADDRESS VIDEO FOS frame buffer memory, an MEMORY overlay look-up table and a digital Ed. video inter- T-1 I face. Systems configured F PANE BUFFER MEMORy IS without a graphics ,TO '280 1024 PLANES memory system (GMS) module use the GOS CURSOR _____ ADDRESS R VIDEO frame buffer to provide BLINK . IDEO either a double buffered r.. SIFIr T 0 VIDEO monochrome or four-color I I ______REDS AREA OF I I FOP DOUBLE OV. display. INTEREST ,J 4 SOR OVEP . PLANE COLOR BUFFER i MEMOR AA 2ASK ENABLE ::° PLANE I E Designed for the OEM grators. Modular flexibility allows those will be designed out in favor of parts requirements to be met without the cus- providing denser integration, more The modular nature of the OMNI 2000 tomer purchasing more features than performance and better economics. GDS allows system expansion and necessary. A modular design also What will remain is the concept of what enhancement to occur in an incremental enables the manufacturing company to its functionality must be, the algorithms manner. The overall design philosophy evolve the subsystem; incorporating new used to provide that functionality and behind the OMNI 2000 GDS is to semiconductor innovations, keeping it the buses and pathways linking all of its provide a family of board level price/performance competitive. The OM NI parts internally and externally. components which may be combined to 2000 GDS was designed to meet the provide a standard set of high needs of a broad spectrum of appli- performance graphic display functions. cations. As such, it will remain both a Graphics display subsystems must be physical product and a design concept. designed to meet the widely varying As it evolves over the coming years, requirements of OEM's and system inte- most of the currently used components

Features Specifications: Display Characteristics: Modular Configurations 1280 x 1024 Display Resolution 60 Hz Non-interlaced or 30 Hz Interlaced MULTIBUS II iPSB and DR11-W Interfaces RS-343 RGB High Speed 2D and 3D Geometry Processing Pixel Clock: 112 MHz Non-Interlaced 56 MHz interlaced U Display List Processor via GDM and OMNI*KERNEL Display Memory Configurations: System 2 Planes 4 Planes + 2 Overlays Parallel, Pipelined Architecture U 8 Planes + 2 Overlays Non-destructive Overlay Planes 4 Planes Double Buffered + 2 Overlays U 8 Planes Double Buffered + 2 Overlays U Serial Double Buffering Multiple Processors: Image Processing Commands GCP: Geometry Processor - AMD 29116 Bit Slice U Optional Floating Point Coprocessor - AMD 29325 FPP U Monochrome to 8 Bit Color Planes, Double Buffered Vector Coprocessor - Proprietary Logic Peripheral Coprocessor - Intel 80188 Fast Pixel Draws: U GDM: Display List Processor - Intel 80386 Vectors: Up to 10 Megapixels per Second Floating Point Coprocessor - Intel 80387 Fills: Up to 40 Megapixels per Second Display List Memory: 1, 4, 8 or 16 Mbytes BLT: 20 Megapixels per Second Power Requirements: ...J High Speed Bit-Mapped Characters (lOOK Characters 250 Watts Cq 110 VAC - Typical per Second) Host Interfaces: Hardware Screen Clipping MULTIBUS II iPSB 11111] 16-Bit Parallel DMA or P1/0 Hardware Matrix and Crosshair Cursors (DRV11-WA/DR11-W or DRV11/DR11-C)

DEC. Dfl11.W. DPv11.WA. DR11.0 and DRV11 are trademarks of Digital Equipment Corporation. 80386, 80387. 80188, MULTIBUS ii. Intel, iPSB are trademarks of Intel Omnicomp Omnicomp Corporation AMD, 29116 and 29325 are trademarks of Advanced Micro Devices ACRTC is a trademark of Hitachi Corporation. 0MM 2000 GOS, OMN1 2000 GDS. Graphics Corporation Graphics (UK) Ltd. OMN1 2000 GMS, OMNI 2000 GCP. OMN1 2000 GDM. OMNIKERNEL and GBX are trademarks of Omnicomp Graphics Corporation. Optimizing Computer Graphics. . . by Design. Specifications subject to change without notice 1734 West Belt North, Houston, Texas 77043 713/464-2990 • Telex 285801 OMNICO UR • Fax 713/827-7540

Rev 042088 Copy'gh! Orco'rp G'aphcs Corroat or 1988 Printed in the USA