(12) United States Patent (10) Patent No.: US 6,262,749 B1 Finger Et Al

USOO6262749B1 (12) United States Patent (10) Patent No.: US 6,262,749 B1 Finger et al. (45) Date of Patent: Jul. 17, 2001 (54) ULTRASONIC SYSTEM AND METHOD FOR FOREIGN PATENT DOCUMENTS DATA TRANSFER, STORAGE AND/OR PROCESSING O 829 735 A2 3/1998 (EP). OTHER PUBLICATIONS (75) Inventors: David J. Finger, San Jose; Ismayil M. Guracar, Redwood City; D. Grant Basoglu et al; “A Programmable Ultrasound Subsystem for Fash, III, Saratoga; Shahrokh Native Image Processing"; SPIE vol. 2707; pp. 378-388 Shakouri, San Jose, all of CA (US) (1996). Apollo VP3; VIA WWW page print out; Nov. 10, 1997. (73) Assignee: Acuson Corporation, Mountain View, Accelerated Graphics Port; AGP; tutorial and AGP benefits; CA (US) WWW page print out; Nov. 14, 1997. (*) Notice: Subject to any disclaimer, the term of this Intel 440LX; AGP set and product brief; Intel WWW page patent is extended or adjusted under 35 print out; Nov. 4, 1997. U.S.C. 154(b) by 0 days. Primary Examiner Ulka J. Chauhan (74) Attorney, Agent, or Firm-Craig A. Summerfield, (21) Appl. No.: 09/001,268 Esq.; Brinks Hofer Gilson & Lione (22) Filed: Dec. 31, 1997 (57) ABSTRACT (51) Int. Cl. ............................. G06F 13/16; G06F 15/76 An apparatus and method for processing ultrasound data is (52) U.S. Cl. .......................... 345/521; 34.5/516; 600/437; provided. The apparatus includes an interface operatively 128/916 connected to a memory, a programmable Single instruction (58) Field of Search ..................................... 34.5/501-506, multiple data processor (or two Symmetric processors), a 345/520,521,526, 507, 512, 516; 600/437, Source of acoustic data (Such as a data bus) and a system bus. 443, 447; 128/915, 916, 922 The memory Stores data from the processor, ultrasound data from the Source, and data from the System bus. The proces (56) References Cited Sor has direct access to the memory. Alternatively, the System buS has direct access to the memory. The interface U.S. PATENT DOCUMENTS device translates logically addressed ultrasound data to 4,271,842 6/1981 Specht et al. ........................ 600/443 physically addressed ultrasound data for Storage in a 4,662.222 5/1987 Johnson ................................. 73/602 memory. The translation is the same for data from both the 4,694,680 9/1987 Takeuchi et al. ... ... 73/1.82 processor and the Source for at least a portion of a range of 5,156,152 10/1992 Yamazaki et al. ... 600/454 5,322,066 6/1994 Miyataka et al... ... 600/440 addresses. The memory Stores both ultrasound data and 5,396,890 3/1995 Weng ................ ... 600/443 various of beam former control data, instruction data for the 5,461,921 * 10/1995 Papadakis et al...................... 73/628 processor, display text plane information, control plane data, 5,474,073 12/1995 Schwartz et al. .. ... 600/456 and a table of memory addresses. One peripheral connects to 5,477,858 12/1995 Norris et al. ... ... 600/441 the ultrasound apparatus. An interface adapter, powered 5,483,963 1/1996 Butler et al. ... ... 600/437 from the ultrasound apparatus, translates information trans 5,485,842 1/1996 Quistgaard ..... ... 600/443 ferred between the peripheral and the ultrasound apparatus. 5,492,125 2/1996 Kim et al. ...... ... 600/443 The adapter connects non-standard peripherals to various 5,588,032 12/1996 Johnson et al. .......................... 378/8 Standard interfaces on the ultrasound apparatus. 5,645,066 7/1997 Gandini et al. ...................... 600/443 (List continued on next page.) 39 Claims, 8 Drawing Sheets FERPHERAL NTERFACES JRASCUN WEAFO 64 ASTCN CIGITA RENSirict PROCESSING, WIDEO/ADO AND OCNNERSON 38 BEAMFORRER AMALS WIDEAOO SLAY NAOT SPEAKERS 54 (s US 6,262,749 B1 Page 2 U.S. PATENT DOCUMENTS 5,795.297 8/1998 Daigle .................................. 600/447 5,810,747 9/1998 Brudny et al. ....................... 600/595 5,709,206 1/1998 Teboul ................................. 600/437 5,892,964 * 4/1999 Horan et al. ........................... 71.2/33 5,709.209 1/1998 Friemel et al. ... 600/447 5,909,559 * 6/1999 So ............... 710/127 5,715,823 2/1998 Wood et al. ... ... 600/437 5,911,051 * 6/1999 Carson et al. 710/107 5,787889 8/1998 Edwards et al. ... 600/443 5,795,296 8/1998 Pathak et al. ........................ 600/443 * cited by examiner U.S. Patent Jul. 17, 2001 Sheet 2 of 8 US 6,262,749 B1 FIG.2 28 32 EXTERNAL HARD DSK REMONABLE USER INTERFACE) 38 44 PERPHERALS, DRIVE /MEDIA DEMCE F so l'E CC- EP SES of PHYSIO 52 ("N A map or - mm - we w ari ru - - ---T- CPU Nu 14 78 CPUPORT MEMORY DATA 68 PORTNPORT C SYSTEM 50 82 PORT SYSTEM BUS 58 ULTRASOUND DATA BUS : 36 BEAMFORMER ANALOG C / VIDEO/AUDIO DISPLAY MICROPHONE N/OUT SPEAKERS 24 4O 54 U.S. Patent Jul. 17, 2001 Sheet 3 of 8 US 6,262,749 B1 CPU PORT MEMORY BLOCK 9 SYSTEM PORT (E) 24 (A) (e) 126 l/Q BASEBOND (Q RANSE/Q DETECTION/ BEAMFORMER FILTER( . ) NESTONLTER LOG ( ) m 22A 122B LOG(MAGNITUDE) (N 122D POS-DETECTION FILTER ( ) VIDEO FILTER 22C U.S. Patent Jul. 17, 2001 Sheet 4 of 8 US 6,262,749 B1 UTRASOUND DATA BUS DIGITAL VIDEO DATA 58 ULTRASOUND DATA BUS U.S. Patent Jul. 17, 2001 Sheet 5 of 8 US 6,262,749 B1 FIG.8 AGPDATA AGP AGPSB BUS HANDSHAKE COMMAND ------1--------------- 8 312 AGP COMMAND DATA OO GENERATOR 3O FFO FIFO AGP ADDRESS 256 256 RANSAON x32 x35 TABLE 32K x 26 3. -3O2 s a DATA TRANSFER BUS 58 U.S. Patent Jul. 17, 2001 Sheet 6 of 8 US 6,262,749 B1 NTIALIZATION 4OO 42 4-O MEMORY USER DATA APPLICATION MANAGEMENT INTERFACE PROCESSING PROCESSING PROCESSING CENTRAL PROCESSING FG.O 4 GB BIOS 4 GB MB RESERVED ------------ 4 GB 2OMB SYSTEM BUS (PC) RESOURCES 2 GB SE SYSTEM BUS (PC) (RESERVED) EXPANSION .256 GB GRAPHCS APERTURE BASE GB MS SYSTEM BUS (PC) EMORY (RESERVED) EXPANSION 96 MB MAN MEMORY HOLE MEMORY 52K M BASE BIOS AND SA BUS OMB U.S. Patent Jul. 17, 2001 Sheet 7 of 8 US 6,262,749 B1 SIZE4(BLOCKS FIG. -BUKSIZESLQ (2Ol (50) RETEs Ey-ID (30) READ=O WRITE=O R NVAD EVENT D GENERATE PT INVAL ID ERROR INTERRUPT D-INT FLUSH AND INTERRUPT AT END OF TRANSFER SEGMENT SZE FROM SEGMENT 4K TOG BYTE, LIMIT 4KGRANULARITY 29.2 ID TABLE O (ILA) 29.4) SEGOVERFLOW, GE SATURATE ADDRESS AT GENERATES ERROR 29.O /URRENT ADDRESS IF "O" y (NEXT ADRs) LIMIT) 294) BLKSIZE 94) deal. CL (2.12) GE 29.12) 3O) 1.4 2.É. GLOGICAL ADDRESS SPACE EVENT D INDEX 29.12 FIG.2 TRANSFER CONTROL Kx6 UNUSED SINGLE 32Kx32 SRAM TRANSFER SEQUENCE U.S. Patent Jul. 17, 2001 Sheet 8 of 8 US 6,262,749 B1 FIG. 3 394 SERIAL FIREWIRE AGP CHAN. USB g f RQ PHY.334 BQSIGPROM ADR SEATPCMECHANINT. Mx.8 GEN COUNER SABUS BAIIERY SH - - - - - - - - - - - PANEL RESET BRIDGE RESET RO 394 DIREC OVER PC JTAG DV PORT TEMP(OD) BUS BUS ON BACKPLANE FG.4 4 GB BOS-UPPER 28K ALASED Isasis { 4 GB-MB SYSTEM BUS (PC) RESOURCES 2 GB GRAPHICS APERTURE GB MAN MEMORY UPPER BIOS MB ISA BUS ISA RESOURCES 384 KB 512 KB OMB US 6,262,749 B1 1 2 ULTRASONIC SYSTEM AND METHOD FOR processor receives acoustic data and partially processes the DATA TRANSFER, STORAGE AND/OR data. The partially processed data is Stored in the shared PROCESSING memory. The other multi-processor obtains the partially processed data and completes the processing. BACKGROUND Multi-processors are used in Systems other than ultra This invention relates to an ultrasound System and method Sound Systems. For example, multi-processors are used in for processing data. In particular, the method and System personal computing. Various multi-processors are known, provide for processing, transferring, and Storing ultrasound Such as Pentium Pro(E), Pentium II(E), and other 686 class data, control data, and other information. microprocessors that Support multi-processing, and that use Ultrasound Systems acquire, process, and Store acoustic Single instruction multiple data processing. For use with information. The acoustic information is used to generate graphics intensive computers, interface devices Such as the various types of images and other data. Typically, ultrasound Intel(R) Accelerated Graphics Port chip set are used to imaging Systems include Several dedicated data processing provide high Speed interactions between graphic Structures, including one or more digital signal processors accelerators, multi-processors and memories. (DSP) for processing the acoustic data and one or more 15 microprocessors for System control. The control micropro SUMMARY ceSSorS provide control instructions to the data processing The present invention is defined by the following claims, Structures. The control instructions are generated in response and nothing in this Section should be taken as a limitation on to operating System Software, user interface input, and other those claims. By way of introduction, the preferred embodi communication and control Software. One or more Separate ment described below includes an apparatus and method for memory blocks provide bulk storage for CINE operations, processing ultrasound data. The apparatus includes an inter Storing acoustic data generated by the various data proceSS face operatively connected to a memory, a processor, a ing Structures. The memory blocks are designed to Support Source of acoustic data (Such as a data bus) and a system bus. the specific volume and bandwidth of the real time data 25 In one embodiment, an interface device translates logical Stored in and retrieved from them. A separate memory is addresses associated with ultrasound data to physical used for Storing the microprocessor Software.

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