Based on syyg,gygmbolic logic, designed by George Boole Boolean variables take values as 0 or 1. Boolean expressions created from: Boolean logic NOT, AND, OR
Introduction to Computer Yung-Yu Chuang
with slides by Sedgewick & Wayne (introcs.cs.princeton.edu), Nisan & Schocken (www.nand2tetris.org) and Harris & Harris (DDCA) 2
NOT AND
XY XY X X’
Digital gate diagram for NOT: Digital gate diagram for AND:
NOT AND
3 4 OR Operator Precedence
Examples showing the order of operations: X+Y NOT > AND > OR
Digit a l ga te diagram for OR:
OR
Use parentheses to avoid ambiguity
5 6
Defining a function Defining a function
Description: square of x minus 1 Description: number of days of the x-th month of a Algebraic form : x2-1 non-leappy year x f(x) Enumeration: Algebraic form: ? xf(x) 131 Enumeration: 228 1 0 331 23 430 38 531 415 630 731 524 831 : : 930 10 31 11 30 12 31 7 8 Truth Table Proving the equivalence of two functions
Truth table. Prove that x2-1=(x+1)(x-1)
Systematic method to describe Boolean function. One row for each possible input combination. Using algebra: (you need to follow some rules) N N inputs 2 rows. (x+1)(x-1) = x2+x-x-1= x2-1
2 Using enumeration: x (x+1)(x-1) x -1 x y x y 1 0 0 0 0 0 23 3 0 1 0 1 0 0 38 8 1 1 1 4 15 15 AND truth table 52424 : : :
9 10
Important laws Simplifying Boolean Equations x + 1 = 1 x + y = y + x Example 1: x + 0 = x x + (y+z))( = (x+y) + z x + x = 1 • Y = AB + AB x.1 = x x.y = y.x x.0 = 0 x.(y.z) = (x.y).z x.x = 0 x.(y+z) = xy + xz DMDeMorgan Law
x.y = x + y
Chapter 2 <12> 11 Simplifying Boolean Equations Simplifying Boolean Equations Example 1: Example 2: • Y = AB + AB • Y = A(AB + ABC) = B(A + A) = B(1) = B
Chapter 2 <13> Chapter 2 <14>
Simplifying Boolean Equations DeMorgan’s Theorem
A Example 2: • Y = AB = A + B Y B • Y = A(AB + ABC) A Y = A(AB(1 + C)) B = A(AB(1)) = A(AB) A (AA)B Y = (AA)B • Y = A + B = AB B
= AB A Y B
Chapter 2 <15> Chapter 2 <16> Bubble Pushing Bubble Pushing
• Backward: • What is the Boolean expression for this – Body changes circuit? – Adds bubbles to inputs A A Y Y A B B B Y • Forward: C – Body changes D – Adds bubble to output
A A Y Y B B
Chapter 2 <17> Chapter 2 <18>
Bubble Pushing Bubble Pushing Rules
• What is the Boolean expression for this • Begin at output, then work toward inputs circuit? • Push bubbles on final output back • Draw gates in a form so bubbles cancel A B A Y B C D C Y D Y = AB + CD
Chapter 2 <19> Chapter 2 <20> Bubble Pushing Example Bubble Pushing Example
no output A A bubble B B
C Y C Y D D
Chapter 2 <21> Chapter 2 <22>
Bubble Pushing Example Bubble Pushing Example
no output no output A bubble A bubble B B
C Y C Y D D
bubble on bubble on A input and output A input and output B B
C Y C Y D D no bubble on input and output A B
C Y D Y = ABC + D
Chapter 2 <23> Chapter 2 <24> Truth Tables (1 of 3) Truth Tables (2 of 3)
A Boolean function has one or more Boolean Example: X Y inputs, and returns a single Boolean output. A truth table shows all the inputs and outputs of a Boolean function
Example: X Y
25 26
Truth Tables (3 of 3) S Truth Table for Functions of 2 Variables
When s=0, return x; otherwise, X mux Z Truth table. Y every 4-bit value represents one return y. 16 Boolean functions of 2 variables.
Example: (Y S) (X S) Two-input multiplexer
x y ZERO AND x y XOR OR 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 1 1 1 1 1 0 0 0 1 1 0 0 1 1 1 1 0 1 0 1 0 1 0 1
Truth table for all Boolean functions of 2 variables
x y NOR EQ y' x' NAND ONE 0 0 1 1 1 1 1 1 1 1 0 1 0 0 0 0 1 1 1 1 1 0 0 0 1 1 0 0 1 1 1 1 0 1 0 1 0 1 0 1
Truth table for all Boolean functions of 2 variables
27 28 All Boolean functions of 2 variables Truth Table for Functions of 3 Variables
Truth table. every 4-bit value represents one 16 Boolean functions of 2 variables. every 8-bit value represents one 256 Boolean functions of 3 variables. every 2n-bit value represents one 2^(2^n) Boolean functions of n variables!
x y z AND OR MAJ ODD 0 0 0 0 0 0 0 0 0 1 0 1 0 1 0 1 0 0 1 0 1 0 1 1 0 1 1 0 1 0 0 0 1 0 1 1 0 1 0 1 1 0 1 1 0 0 1 1 0 1 1 1 1 1 1 1
some functions of 3 variables
Elements of Computing Systems, Nisan & Schocken, MIT Press, www.nand2tetris.org , Chapter 1: Boolean Logic slide 29 30
Sum-of-Products Universality of AND, OR, NOT
Sum-of-products. Systematic procedure for Fact. Any Boolean function can be expressed reppgresenting a Boolean function using g, AND, usingg,, AND, OR, NOT. proves that { AND, OR, NOT } Notation Meaning OR, NOT. are universal { AND, OR, NOT } are universal. x' NOT x Form AND term for each 1 in Boolean function. Ex: XOR(x,y) = xy' + x'y. xyx y x AND y OR terms together. x + y x OR y x y z MAJ x'yz xy'z xyz' xyz x'yz + xy'z + xyz' + xyz Expressing XOR Using AND, OR, NOT 0 0 0 0 0 0 0 0 0 x y x' y' x'y xy' x'''y + xy' x XOR y 0 0 1 0 0 0 0 0 0 0 0 1 1 0 0 0 0 0 1 0 0 0 0 0 0 0 0 1 1 0 1 0 1 1 0 1 1 1 1 0 0 0 1 1 0 0 1 0 1 1 1 1 0 0 0 0 0 0 0 0 1 1 0 0 0 0 0 0 1 0 1 1 0 1 0 0 1 Exercise. Show {AND, NOT}, {OR, NOT}, {NAND}, 1 1 0 1 0 0 1 0 1 1 1 1 1 0 0 0 1 1 {NOR} are universal.
expressing MAJ using sum-of-products HH.int. DDMeMorg an's law w(: (x'y y)')' = x + y.
31 32 From Math to Real-World implementation Implementation of gates
We can implement any Boolean function using Fluid switch (http://www.cs.princeton.edu/introcs/lectures/fluid-computer.swf NAND ggyates only.
We talk about abstract Boolean algebra (logic) so far.
Is it possible to realize it in real world?
The tech nol ogy need s to permit swit c hing an d conducting. It can be built using magnetic, optica l, bio log ica l, hy drau lic an d pneuma tic mechanism.
33
Digital Circuits Wires
What is a digital system? Wires.
Analoggg: signals vary continuously . On (1): connected to power.
Digital: signals are 0 or 1. 0 1 0 Off (0): not connected to power.
3.3V If a wire is connected to a wire that is on, that 2.8V wire is also on. 0.5V Typical drawing convention: "flow" from top, left 0.0V Whyyg digital sy stems? to bottom, ri ght.
Accuracy and reliability. 1 Staggeringly fast and cheap. power connection 1 Basic abstractions. 1
On, off.
Wire: propagates on/off value. 0 Swwppgf/ffuitch: controls propagation of on/off values through wires.
35 36 Controlled Switch Relay
Controlled switch. [relay implementation]
3 connections: inppput, output, control.
Magnetic force pulls on a contact that cuts electrical flow.
Control wire affects output wire, but output does not affect control; establishes forward flow of informati on over ti me.
X X
37 38
Circuit Anatomy Logic Gates: Fundamental Building Blocks
39 40 NOT NOT
0
1
1
0
41 42
OR Series relays = NOR
0 0 0 1
1 0
1 0 1 1
0 0
43 44 OR AND
45 46
AND Logic Gates: Fundamental Building Blocks
47 48 What about parallel relays? =NAND Can we implement AND/OR using parallel relays? Now we know how to implement AND,OR and 0 0 NOT. We can just use them as black boxes without knowing how they were implemented. Princippgle of information hiding.
1 1 0 1
49 50
Multiway Gates Multiway Gates
Multiway gates. Multiway gates.
OR: 1 if anyyp input is 1; 0 otherwise. OR: 1 if anyyp input is 1; 0 otherwise.
AND: 1 if all inputs are 1; 0 otherwise. AND: 1 if all inputs are 1; 0 otherwise.
Generalized: negate some inputs. Generalized: negate some inputs.
51 52 Multiway Gates Translate Boolean Formula to Boolean Circuit
Multiway gates. Sum-of-products. XOR.
Can also be built from 2-wayyg gates (less efficient but implementation independent)
Example: build 4-way OR from 2-way ORs
53 54
Translate Boolean Formula to Boolean Circuit Translate Boolean Formula to Boolean Circuit
Sum-of-products. XOR. Sum-of-products. XOR.
55 56 Gate logic ODD Parity Circuit Interface ODD(x, y, z). a 1 if odd number of inputs are 1. Xor out b 0 otherwise.
a btb out
0 0 0 0 1 1 101 0 1 IlImplemen ttitation 1 1 0 a And Not
Or out
Not And b
Xor(a, b) = Or (An d(a, Not (b)),An d(Not (a ), b)))
ODD Parity Circuit ODD Parity Circuit
ODD(x, y, z). ODD(x, y, z).
1 if odd number of inputs are 1. 1 if odd number of inputs are 1.
0 otherwise. 0 otherwise.
x y z ODD x'y'z x'yz' xy'z' xyz x'y'z+x'yz' + xyy'z' + xyyz 0 0 0 0 0 0 0 0 0 0 0 1 1 1 0 0 0 1 0 1 0 1 0 1 0 0 1 0 1 1 0 0 0 0 0 0 1 0 0 1 0 0 1 0 1 1 0 1 0 0 0 0 0 0 1 1 0 0 0 0 0 0 0 1 1 1 1 0 0 0 1 1
Expressing ODD using sum-of-products
59 60 ODD Parity Circuit Expressing a Boolean Function Using AND, OR, NOT
ODD(x, y, z). Ingredients.
1 if odd number of inputs are 1. AND gates.
0 otherwise. OR gates.
NOT gates.
Wire.
Instructions.
Step 1: represent input and output signals with Boolean variables.
Step 2: construct truth table to carry out computation.
Step 3: derive (simplified) Boolean expression using sum-of products.
Steppp 4: transform Boolean expression into circuit.
61 62
Translate Boolean Formula to Boolean Circuit Translate Boolean Formula to Boolean Circuit
Sum-of-products. Majority. Sum-of-products. Majority.
63 64 Translate Boolean Formula to Boolean Circuit Translate Boolean Formula to Boolean Circuit
Sum-of-products. Majority. Sum-of-products. Majority.
65 66
Simplification Using Boolean Algebra Boolean expression simplification
Every function can be written as sum-of-product Karnaugh map
Many possible circuits for each Boolean function.
Sum-of-products not necessarily optimal in: – number of switches (space) – depth of circuit (time)
67 68 Karnaugh Maps (K‐Maps) K‐Map
• Boolean expressions can be minimized by • Circle 1’s in adjjqacent squares combining terms • In Boolean expression, include only • K‐maps minimize equations graphically literals whose true and complement form • PA + PA = P are not in the circle Y A BCY AB 0 001 00 01 11 10 C A BCY Y Y 0 011 AB AB 0 1 0 0 0 0 0 1 00 01 11 10 00 01 11 10 0 1 0 0 0 0 011 C C 0 110 0 100 1 000 0 1 000 0 ABC ABC ABC ABC 0 110 1 010 1 000 1 1 0 0 1 1 0 0 0 1 010 1 1 000 1 ABC ABC ABC ABC 1 110 1 100 1 110 Y = AB
Chapter 2 <69> Chapter 2 <70>
3‐Input K‐Map 3‐Input K‐Map
Y Y AB AB C 00 01 11 10 C 00 01 11 10
0 ABC ABC ABC ABC 0 ABC ABC ABC ABC
1 ABC ABC ABC ABC 1 ABC ABC ABC ABC
Truth Table K-Map Truth Table K-Map Y Y A BCY AB A BCY AB 0 0 0 0 C 00 01 11 10 0 0 0 0 C 00 01 11 10 0 010 0 010 0 101 0 0 101 0 0 110 0 111 0 111 1 0 0 0 1 0 0 0 1 010 1 1 010 1 0 1 00 1 100 1 100 1 111 1 111 Y = AB + BC Chapter 2 <71> Chapter 2 <72> K‐Map Rules 4‐Input K‐Map
• Every 1 must be circled at least once A B C D Y Y • Each circle must span a power of 2 (i.e. 1, 2, 0 0 001 AB 0 0 010 CD 00 01 11 10 4) squares in each direction 0 0 1 0 1 0 0 111 00 0 1 000 • Each circle must be as large as possible 0 1 011 0 1 1 0 1 01 0 1 111 • A circle may wrap around the edges 1 0 001 1 0 011 11 • A “don' t care” (X) is circled only if it helps 1 0 1 0 1 1 0 110 1 1 000 10 minimize the equation 1 1 010 1 1 1 0 0 1 1 110
Chapter 2 <73> Chapter 2 <74>
4‐Input K‐Map 4‐Input K‐Map
A B C D Y Y A B C D Y Y 0 0 001 AB 0 0 001 AB 0 0 010 CD 00 01 11 10 0 0 010 CD 00 01 11 10 0 0 1 0 1 0 0 1 0 1 0 0 111 00 1 0 0 1 0 0 111 00 1 0 0 1 0 1 000 0 1 000 0 1 011 0 1 011 0 1 1 0 1 01 0 1 0 1 0 1 1 0 1 01 0 1 0 1 0 1 111 0 1 111 1 0 001 1 0 001 1 0 011 11 1100 1 0 011 11 1100 1 0 1 0 1 1 0 1 0 1 1 0 110 1 0 110 1 1 000 10 1101 1 1 000 10 1101 1 1 010 1 1 010 1 1 1 0 0 1 1 1 0 0 1 1 110 1 1 110 Y = AC + ABD + ABC + BD
Chapter 2 <75> Chapter 2 <76> K‐Maps with Don’t Cares K‐Maps with Don’t Cares
A B C D Y Y A B C D Y Y 0 0 001 AB 0 0 001 AB 0 0 010 CD 00 01 11 10 0 0 010 CD 00 01 11 10 0 0 1 0 1 0 0 1 0 1 0 0 111 00 0 0 111 00 1 0 X 1 0 1 000 0 1 000 0 1 01X 0 1 01X 0 1 1 0 1 01 0 1 1 0 1 01 0 X X 1 0 1 111 0 1 111 1 0 001 1 0 001 110 01 11 110 01 11 11XX 1 0 10X 1 0 10X 1 0 11X 1 0 11X 10 10 11XX 1 1 00X 1 1 00X 1 1 01X 1 1 01X 1 1 10X 1 1 10X 1 1 11X 1 1 11X
Chapter 2 <77> Chapter 2 <78>
K‐Maps with Don’t Cares Example
A B C D Y Y 0 0 001 AB CD 00 01 11 10 z 0 0 010 xy 0 0 1 0 1 0 0 111 00 1 0 X 1 0 1 000 0 1 01X 0 1 1 0 1 01 0 X X 1 0 1 111 1 0 001 110 01 11 11XX 1 0 10X 1 0 11X 1 1 00X 10 11XX 1 1 01X 1 1 10X 1 1 11X Y = A + BD + C
80 Chapter 2 <79> Simplification Using Boolean Algebra Layers of Abstraction
Many possible circuits for each Boolean function. Layers of abstraction.
Sum-of-ppyproducts not necessarily optimal in: Build a circuit from wires and switches. – number of switches (space) [implementation] – depth of circuit (time) Define a circuit by its inputs and outputs. [API]
MAJ(x, y, z) = x'yz + xy'z + xyz' + xyz = xy + yz + xz. To control complexity, encapsulate circuits. [ADT]
81 82
Layers of Abstraction Specification
Layers of abstraction.
Build a circuit from wires and switches. [implementation]
Define a circuit by its inputs and outputs. [API]
To control complexity, encapsulate circuits. Step 1: iden tify input and out pu t
[ADT] Step 2: construct truth table
Step 3: derive (simplified) Boolean expression using sum-of products.
Step 4: transform Boolean expression into circuit/l/implement it using HDL.
Yo u wo uld like to test the gate before packagin g.
83 HDL Example: Building an And gate
Contract: And.cmp a b out When running your a 0 0 0 .hdl on our .tst, 0 1 0 And out your .out should b 1 0 0 1 1 1 be the same as our .cmp.
And.hdl And.tst
CHIP And load And.hdl, { IN a, b; output-file And.out, OUT out; compare-to And.cmp, // implementation missing output-list a b out; } seta0,set b 0,,,peval,output; set a 0,set b 1,eval,output; set a 1,set b 0,eval,output; seta1,setb1,eval,output;
Elements of Computing Systems, Nisan & Schocken, MIT Press, www.nand2tetris.org , Chapter 1: Boolean Logic slide 86
Building an And gate Building an And gate
Interface: And(a,b) = 1 exactly when a=b=1 Implementation: And(a,b) = Not(Nand(a,b))
a a And out out b b
And.hdl And.hdl
CHIP And CHIP And { IN a, b; { IN a, b; OUT out; OUT out; // implementation missing // implementation missing } }
Elements of Computing Systems, Nisan & Schocken, MIT Press, www.nand2tetris.org , Chapter 1: Boolean Logic slide 87 Elements of Computing Systems, Nisan & Schocken, MIT Press, www.nand2tetris.org , Chapter 1: Boolean Logic slide 88 Building an And gate Building an And gate
Implementation: And(a,b) = Not(Nand(a,b)) Implementation: And(a,b) = Not(Nand(a,b))
a a a out in out a out in out Nand x Not out NAND x NOT out b b b b
And.hdl And.hdl
CHIP And CHIP And { IN a, b; { IN a, b; OUT out; OUT out; // implementation missing Nand(a = a, } b = b, out = x); Not(in = x, out = out) }
Elements of Computing Systems, Nisan & Schocken, MIT Press, www.nand2tetris.org , Chapter 1: Boolean Logic slide 89 Elements of Computing Systems, Nisan & Schocken, MIT Press, www.nand2tetris.org , Chapter 1: Boolean Logic slide 90
Hardware simulator (demonstrating Xor gate construction) Hardware simulator
test HDL HDL script program program
Elements of Computing Systems, Nisan & Schocken, MIT Press, www.nand2tetris.org , Chapter 1: Boolean Logic slide 91 Elements of Computing Systems, Nisan & Schocken, MIT Press, www.nand2tetris.org , Chapter 1: Boolean Logic slide 92 Hardware simulator Project materials: www.nand2tetris.org
Project 1 web site
HDL program
output file
And. hdl , And.tst , And.cmp files
Elements of Computing Systems, Nisan & Schocken, MIT Press, www.nand2tetris.org , Chapter 1: Boolean Logic slide 93 Elements of Computing Systems, Nisan & Schocken, MIT Press, www.nand2tetris.org , Chapter 1: Boolean Logic slide 94
Project 1 tips Gates for project #1 (Basic Gates)
Read the Introduction + Chapter 1 of the book Download the book’s software suite Go through the hardware simulator tutorial Do Project 0 (optional) You’re in business.
Elements of Computing Systems, Nisan & Schocken, MIT Press, www.nand2tetris.org , Chapter 1: Boolean Logic slide 95 Elements of Computing Systems, Nisan & Schocken, MIT Press, www.nand2tetris.org , Chapter 1: Boolean Logic slide 96 Gates for project #1 Gates for project #1 (Multi-bit version)
Elements of Computing Systems, Nisan & Schocken, MIT Press, www.nand2tetris.org , Chapter 1: Boolean Logic slide 97 Elements of Computing Systems, Nisan & Schocken, MIT Press, www.nand2tetris.org , Chapter 1: Boolean Logic slide 98
Gates for project #1 (Multi-way version) Gates for project #1 (Multi-way version)
Elements of Computing Systems, Nisan & Schocken, MIT Press, www.nand2tetris.org , Chapter 1: Boolean Logic slide Elements of Computing Systems, Nisan & Schocken, MIT Press, www.nand2tetris.org , Chapter 1: Boolean Logic slide 99 100 Gates for project #1 (Multi-way version) Gates for project #1 (Multi-way version)
Elements of Computing Systems, Nisan & Schocken, MIT Press, www.nand2tetris.org , Chapter 1: Boolean Logic slide Elements of Computing Systems, Nisan & Schocken, MIT Press, www.nand2tetris.org , Chapter 1: Boolean Logic slide 101 102
Perspective End notes: Canonical representation
Each Boolean function has a canonical representation Whodunit story: Each suspect may or may not have an alibi (a), a motivation to commit the crime (m), and a relationship to the weapon found in the scene of the crime (w). The pppolice decides to focus attention only on suspects The canonical representation is expressed in terms of And, Not, Or for whom the proposition Not(a) And (m Or w) is true.
And, Not, Or can be expressed in terms of Nand alone Truth table of the "suspect" function s(a,m, w) a (m w) Ergo, every Boolean function can be realized by a standard PLD consisting of Nand gates only
a
Mass production b and c
. f(a,b,c) or Universal building blocks, . unique topology
and Gates, neurons, atoms, … Canonical form: s(a, m, w) am w amw amw
Elements of Computing Systems, Nisan & Schocken, MIT Press, www.nand2tetris.org , Chapter 1: Boolean Logic slide Elements of Computing Systems, Nisan & Schocken, MIT Press, www.nand2tetris.org , Chapter 1: Boolean Logic slide 103 104 End notes: Canonical representation (cont.) End notes: Programmable Logic Device for 3-way functions
a s(a, m, w) a (m w) legend: active fuse b and blown fuse a s c or m and 8 and terms . f(a,b,c) w connected to the . or s(a,m, w) am w amw amw same 3 inputs .
a m and w single or term connected to the and outputs of 8 and terms s and or
_ _ _ PLD implementation of f(a,b,c)= a b c + a b c and (the on/off states of the fuses determine which gates participate in the computation)
Elements of Computing Systems, Nisan & Schocken, MIT Press, www.nand2tetris.org , Chapter 1: Boolean Logic slide Elements of Computing Systems, Nisan & Schocken, MIT Press, www.nand2tetris.org , Chapter 1: Boolean Logic slide 105 106
End notes: Programmable Logic Device for 3-way functions
Two-level logic: ANDs followed by ORs Example: Y = ABC + ABC + ABC A B C
ABC minterm: ABC
minterm: ABC
minterm: ABC
Y
Elements of Computing Systems, Nisan & Schocken, MIT Press, www.nand2tetris.org , Chapter 1: Boolean Logic slide 107