Week 2: PN Junction Diode

ELE 2110A Electronic Circuits

z Reading Assignment: Chap 3.1-3.7, 3.10-3.13 of Jaeger & Blalock

ELE2110A © 2008 Lecture 02 - 2 Why diodes? z R, C, L are linear circuit elements z Many signal processing functions need nonlinear elements, like signal rectification (to convert negative signal to be positive).

Nonlinear signal processing An AC-DC converter

ELE2110A © 2008 Lecture 02 - 3 Why diodes? z Basic function of diode: to allow current to flow only in one direction. Diode symbol z Applications: – Rectifiers – Waveform clipping and clamping circuits – DC-DC converters

Waveform clipping Waveform clamping

Metal Diode symbol Contact p-type n-type

Note: both p and n regions are charge neutral.

ELE2110A © 2008 Lecture 02 - 5 Diffusion of Electrons and Holes z Electrons tend to diffuse from n side to p side z Holes tend to diffuse from p side to n side z The resulted current is diffuse current. It is due to the movement of majority carriers. z Q: What are the directions of electron and hole diffusion currents?

ELE2110A © 2008 Lecture 02 - 6 Diffusion of Electrons and Holes z If diffusion processes were to continue unabated, there would eventually be a uniform distribution of electrons and holes. z But there is a counter force…

Holes and electrons are depleted from the dopant atoms

ρ ∇⋅E = built-in potential εs E(x)=-∇φ(x) (Gauss’ Law) φ = − E(x)dx 1 j ∫ E(x) = ∫ ρ(x)dx εs (1 dimension) kT ⎛ N N ⎞ Solid-state physics tells us that: φ = ln⎜ A D ⎟ j ⎜ 2 ⎟ q ⎝ ni ⎠ The resulting potential gives rise to drift currents.

Charge Density Electric Field Potential

built-in potential Direction of drift current:

Drift current is due to the movement of minorities.

For a diode with no external connections, the total current through it must be zero. Therefore, under thermal equilibrium (no external voltage), drift and diffusion currents have the same magnitude but opposite direction.

Charge Density Electric Field Potential

built-in 1 potential E(x) = ρ(x)dx φ j = − E(x)dx ∫ ∫ kT ⎛ N N ⎞ εs φ = ln⎜ A D ⎟ j ⎜ 2 ⎟ q ⎝ ni ⎠ Depletion width is an important device parameter. It can be shown that: ⎛ ⎞ 2εs 1 1 wd0 = (xn + xp) = ⎜ + ⎟φ j q ⎝ NA ND ⎠

Forward biasing means applying an external voltage vD > 0: z Built-in potential drops (barrier lowers) z Majority electrons and holes easily cross the junction z Balance between diffusion and drift breaks z Current appears at the terminals:

iD = Idiffusion –Idrift > 0

In fact, Idiffusion increases exponentially with VD.

Reverse biasing means applying an external voltage vD < 0: z Built-in potential increases/barrier increases; z Majority electrons and holes can hardly cross the junction – Diffusion decreases z Drift current almost unchanged as there are little supply of carriers (minorities).

∴ iD = Idiffusion –Idrift < 0 and tends to –Idrift.

⎡ ⎛ v ⎞ ⎤ i = I ⎢exp⎜ D ⎟ −1⎥ D S ⎜ V ⎟ ⎣⎢ ⎝ T ⎠ ⎦⎥

where IS = reverse saturation current [A] vD = voltage applied to diode [V] VT = kT/q = thermal voltage [V] (25 mV at room temp.) q = electronic charge [1.60 x 10-19 C] k = Boltzmann’s constant [1.38 x 10-23 J/K] T = absolute temperature [K] ELE2110A © 2008 Lecture 02 - 15 Diode Current for Reverse, Zero, and Forward Bias z Reverse bias: ⎡ ⎛ v ⎞ ⎤ ⎜ D ⎟ for v < −4V iD = I S ⎢exp⎜ ⎟ −1⎥ ≈ I S []0 −1 ≈ −I S D T ⎣ ⎝ VT ⎠ ⎦ z Zero bias: ⎡ ⎛ v ⎞ ⎤ ⎜ D ⎟ iD = I S ⎢exp⎜ ⎟ −1⎥ = I S []1−1 = 0 ⎣ ⎝ VT ⎠ ⎦ z Forward bias: ⎡ ⎛ v ⎞ ⎤ ⎛ v ⎞ ⎜ D ⎟ ⎜ D ⎟ for v 4V iD = I S ⎢exp⎜ ⎟ −1⎥ ≈ I S exp⎜ ⎟ D > T ⎣ ⎝ VT ⎠ ⎦ ⎝ VT ⎠

Problem: Find diode voltage for diode with given specifications

Given data: IS=0.1 fA, ID= 300 µA/ 1mA

Assumptions: Room-temperature dc operation with VT =25mV Analysis:

With IS=0.1 fA, ID= 300 µA

⎛ ⎞ ⎜ I ⎟ 3×10-4A V =V ln⎜1+ D ⎟ =(0.025V)ln(1+ )=0.718V ⎜ ⎟ D T ⎜ I ⎟ -16 ⎝ S ⎠ 10 A

With I = 1 mA, I =0.1 fA V =0.748V D S D

Turn-on voltage marks point of significant current flow.

Is : reverse saturation current

⎛ v ⎞ ⎜ D ⎟ iD = I S exp⎜ ⎟ ⎝ VT ⎠

iD1 ⎛ vD1 − vD 2 ⎞ Let = exp⎜ ⎟ = 10 iD 2 ⎝ VT ⎠

vD1 − vD2 = VT ln10

= 2.3VT ≈ 60 mV

I SA =10I SB =100I SC

⎛ v ⎞ ⎜ D ⎟ iD = I S exp⎜ ⎟ ⎝ VT ⎠

Let iDA=iDB

iSA ⎛ vDB − vDA ⎞ = exp⎜ ⎟ = 10 iSB ⎝ VT ⎠

vDB − vDA = VT ln10 ≈ 60 mV

Breakdown region:

Rapid increase in ID when reverse bias voltage exceeds a break down voltage VZ

Typical value of Vz: 2 V < VZ < 2000 V

Temp. Coeff.

z Carriers in the SCR are accelerated by the internal electric field and collide with fixed atoms z As the reverse bias increases, the energy of the accelerated carriers increases, eventually breaking covalent bonds and generating electron-hole pairs z The newly created carriers also accelerate, collide with atoms, and generate other electron-hole pairs. This process feeds on itself and leads to avalanche breakdown z Si diodes with VZ > 5.6 V enter breakdown through this mechanism

z Zener breakdown: occurs when the electric field in the depletion region increases to the point where it can break covalent bonds and generate electron-hole pairs.

z VZ < 5.6 V for diodes entering breakdown through this mechanism

z In avalanche breakdown, VZ increases with temperature z In Zener breakdown, VZ decreases with temperature z Breakdown is not a destructive process provided that the maximum specified power dissipation is not exceeded

ELE2110A © 2008 Lecture 02 - 24 pn Junction Capacitance: Reverse Bias z External reverse bias leads to: – Increases of the built-in potential – Increases of the SCR, and thus fixed space charges z This behaviors like a capacitor, and is referred to as depletion capacitance.

Forward bias minority distribution in neutral regions

Excess charge stored in neutral region near edges of space charge region is

QD = iDτT Coulombs

tT is called diode transit time and depends on size and type of diode.

The Q depends on iD and in turn on vD. This capacitance behavior is referred to as diffusion capacitance and given by:

dQ D dQ D diD iDτ T C j = = ≅ [F] dv D diD dv D VT ⎡ ⎛ v ⎞ ⎤ ⎛ v ⎞ ⎜ D ⎟ ⎜ D ⎟ iD = I S ⎢exp⎜ ⎟ −1⎥ ≈ I S exp⎜ ⎟ ⎣ ⎝ VT ⎠ ⎦ ⎝ VT ⎠

Diffusion capacitance is proportional to current and becomes quite large at high currents.

Objective: to find the DC current (ID) and voltage (VD), or quiescent operating point (Q-point) of the diode.

Full set of equations: 1. Diode equation: ⎡ ⎛V ⎞ ⎤ ⎜ D ⎟ I D = I S ⎢exp⎜ ⎟ −1⎥ ⎣ ⎝ VT ⎠ ⎦ 2. KVL along the loop: nonlinear V and R may represent V = I R + V Thevenin equivalent of a D D more complex 2-terminal This is also called the load line network. equation of the diode, as if the V-source and R were the load of the diode.

ELE2110A © 2008 Lecture 02 - 29 Diode Circuit Analysis Approaches z Graphical analysis (load-line method) z Numerical Analysis with diode’s mathematical model z Simplified analysis with ideal diode model. z Simplified analysis using constant voltage drop model.

Problem: Find Q-point Given data: V=10 V, R=10kΩ. Diode I-V curve.

Analysis: 4 10 = I D10 +VD To define the load line we use,

VD = 0, I D = (10V /10kΩ) =1 mA

VD = 5, I D = 0.5 mA These points and the resulting load line are plotted. Q-point is given by intersection of load line and diode characteristic:

Q-point = (0.95 mA, 0.6 V)

Problem: Find Q-point for given diode characteristics. -13 Given data: IS =10 A,VT =25 mV, V = 10 V, R = 10kΩ. Analysis: −13 ⎧I D = IS [exp(VD /VT )−1]=10 [exp(40VD )−1] ⎨ 4 ⎩ 10 = I D10 +VD 4 −13 ⇒10 =10 10 []exp()40VD −1 +VD This is a transcendental equation and does not have analytical solutions. A numerical answer can be found by using Newton’s iterative method.

Let: −9 f = 10 −10 [exp(40VD )−1]−VD

We desire to find VD for which f=0.

0 1. Make initial guess VD

2. Evaluate f and its derivative f ’ for this value of VD 0 3. Calculate new guess for V using D 1 0 f (VD ) VD = VD − 0 f '(VD ) 4. Repeat steps 2 and 3 till convergence

0 0 f (VD )− 0 f '()VD = 0 1 VD −VD

ELE2110A © 2008 Lecture 02 - 33 Solution from a Spreadsheet Iteration # V_D [V] f f' I_D [A] 0 0.8000 -7.895E+04 -3.159E+06 7.896E+00 1 0.7750 -2.904E+04 -1.162E+06 2.905E+00 2 0.7500 -1.068E+04 -4.276E+05 1.069E+00 3 0.7250 -3.927E+03 -1.575E+05 3.936E-01 4 0.7001 -1.442E+03 -5.806E+04 1.452E-01 5 0.6753 -5.281E+02 -2.150E+04 5.374E-02 6 0.6507 -1.918E+02 -8.048E+03 2.012E-02 7 0.6269 -6.817E+01 -3.103E+03 7.754E-03 8 0.6049 -2.281E+01 -1.289E+03 3.220E-03 9 0.5872 -6.455E+00 -6.357E+02 1.587E-03 10 0.5770 -1.148E+00 -4.238E+02 1.057E-03 11 0.5743 -5.989E-02 -3.804E+02 9.486E-04 12 0.5742 -1.876E-04 -3.780E+02 9.426E-04 13 0.5742 -1.858E-09 -3.780E+02 9.426E-04 Q-point

Forward-biased: voltage = zero, iD >0 Reverse-biased: current = zero, vD <0 Diode is assumed to be either on or off. I-V curve is linear in both regions.

Analysis steps: 1. Identify anode and cathode of diode

and label vD and iD. 2. Guess diode’s region of operation from circuit. 3. Analyze circuit using diode model appropriate for assumed operation region. 4. Check results to check consistency with assumptions.

Since source is forcing positive current through diode, assume

diode is on. So VD=0.

(10 − 0)V I = = 1 mA D 10kΩ

Since ID > 0, our assumption is correct. Q-point is (1 mA, 0V).

Since source is forcing current backward through diode,

assume diode is off. Hence ID =0.

4 10 +VD + 10 I D = 0

∴VD = −10V

Since VD < 0, our assumption is right. Q-point is (0, -10 V)

Forward-bias: vD = Von, iD >0

Reverse-bias: iD = 0, vD < Von

Analysis: Since 10V source is forcing positive current through diode, we assume diode is on. (10 −V )V I = on D 10kΩ (10 − 0.6)V = = 0.94mA 10kΩ

Since ID > 0, our assumption is correct. Q-point is (0.94 mA, 0.6V).

Analysis: Choose ideal diode model. Assume both diodes are on.

Since VD1=0, (15 − 0)V I = = 1.50mA 1 10kΩ 0 − (−10) V I = = 2.00 mA D2 5 kΩ I = I −I =1.5−2=−0.5 mA D1 1 D2 Q-points are (-0.5mA, 0V) and (2.0mA, 0V)

But, ID1 <0 is not consistent with the assumption of D1 is ON, so try again.

The second guess is D1 off and D2 on:

Since ID2 = I1,

15−(−10) I = =1.67mA V =15−10,000I =−1.67V 1 10kΩ+5kΩ D1 1

Q-points are D1 : (0 mA, -1.67 V): off

D2 : (1.67 mA, 0 V) : on

This is consistent with our assumptions and analysis is finished.

In breakdown, the diode is modeled with a DC voltage source, VZ, and a series resistance, RZ. RZ models the slope of the i-v characteristic.

Diodes designed to operate in reverse breakdown are called Zener diodes and use the indicated symbol

Load-line equation : (KVL along the loop) V +5000I +20=0 D D Using graphic analysis:

Choose 2 points (0V, -4mA) and (-5V, -3mA) to draw the load line. It intersects with i-v characteristic at Q-point (-2.9 mA, -5.2 V).

Using piecewise linear model:

Assume in breakdown region −20+5100I +5=0 Z (20−5)V I = =2.94mA Z 5100Ω Since I >0 (I <0), solution is consistent I = −I >0 Z D Z D with Zener breakdown assumption.

V −V (20−5)V I = S Z = =3mA S R 5kΩ V 5V I = Z = =1mA L R 5kΩ L I = I − I =2mA Z S L

For proper regulation, IZ >0 . If IZ < 0, Zener diode no longer controls voltage across load resistor and the regulator is said to have “dropped out of Zener diode keeps voltage regulation”. across load resistor constant V ⎛ ⎞ S ⎜ 1 1 ⎟ R > R = R ∴I = −V ⎜ + ⎟ >0 ⎛ ⎞ Z Z ⎜ R R ⎟ L ⎜V ⎟ min R ⎝ L ⎠ ⎜ S −1⎟ ⎜V ⎟ ⎝ Z ⎠ ELE2110A © 2008 Lecture 02 - 46 Example 10 Zener diode model Analysis: KCL at output node:

V − 20 V − 5 V L + L + L = 0 5000 100 5000 ∴ V =5.19V L Problem: Find VL and IZ using the piece-wise linear model. V −5 Given data: I = L = 5.19−5 =1.9mA>0 VS=20 V, R=5 kΩ, Z 100 100 RZ=0.1 kΩ, VZ=5 V Diode is actually operating in breakdown region as assumed.

Load is modeled as an I-source

R Rz By superposition: VL = VZ + VS − (Rz // R)I L R + Rz R + Rz ∂V R Line regulation ≡ L = z (characterizes how sensitive output ∂VS R + Rz voltage is to input voltage changes)

∂VL (characterizes how sensitive output Load regulation ≡ = −(Rz // R) [Ω] ∂I L voltage is to load current changes)