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Dynamic Voltage Scaling Techniques for Energy Efficient Synchronized Dynamic Voltage Scaling Techniques for Energy Efficient Synchronized Sensor Network Design Parya Moinzadeh, Kirill Mechitov, Reza Shiftehfar, Tarek Abdelzaher, Gul Agha and B.F. Spencer, Jr. University of Illinois at Urbana-Champaign fmoinzad1, mechitov, sshifte2, zaher, agha, [email protected] Abstract event-driven systems when low-power sleep is not an option Building energy-efficient systems is one of the principal due to application and/or environmental constraints. DVS is challenges in wireless sensor networks. Dynamic voltage especially important for high-performance applications that scaling (DVS), a technique to reduce energy consumption need significant in-network processing and have varied per- by varying the CPU frequency on the fly, has been widely formance and energy consumption characteristics, such as used in other settings to accomplish this goal. In this paper, audio- and video-streaming and structural health monitor- we show that changing the CPU frequency can affect time- ing (SHM). Extended durations of network wakefulness and keeping functionality of some sensor platforms. This phe- continuous monitoring requirement of these applications fur- nomenon can cause an unacceptable loss of time synchro- ther underscore the utility of DVS for energy conservation. nization in networks that require tight synchrony over ex- Consider structural health monitoring, an important tended periods, thus preventing all existing DVS techniques emerging application in sensor networks [3, 2]. Smart from being applied. We present a method for reducing en- sensor-enabled SHM is a promising technology for identi- ergy consumption in sensor networks via DVS, while mini- fying and locating damaged elements within structures and mizing the impact of CPU frequency switching on time syn- for monitoring the changes in the health condition of civil chronization. infrastructure over time. SHM algorithms evaluate the con- The system is implemented and evaluated on a network dition of structures by continuously measuring strain values of 11 Imote2 sensors mounted on a truss bridge and run- or vibration characteristics at different points. SHM appli- ning a high-fidelity continuous structural health monitoring cations typically involve high-performance data processing application. Experimental measurements confirm that the al- and have diverse processor and network requirements during gorithm significantly reduces network energy consumption different stages of operation. They usually consist of certain over the same network that does not use DVS, while re- number of phases forming a cycle. Such a cycle is usually quiring significantly fewer re-synchronization actions than repeated for many times during the execution of the applica- a classic DVS algorithm. tion. Taking advantage of DVS in this application necessi- tates different policies for each phase, as the computational 1 Introduction requirements vary significantly. Finally, SHM algorithms re- quire tightly synchronized data, in the order of tens of mi- Energy efficient design has been the focus of many re- croseconds, to produce accurate results, with distributed sen- search studies in sensor networks, as battery lifetime is be- sor readings correlated in a global time scale [13]. coming a limiting factor for the realization of many appli- Motivated by the synchronization requirements of SHM cations. Enabled by recent advances in power supply and applications, we examined the factors affecting the growth circuit design, voltage scaling techniques provide a mecha- of synchronization error over time. In the course of this re- nism to trade-off processor speed against power consump- search, we have uncovered a timekeeping anomaly related tion. Dynamic Voltage Scaling (DVS) and Dynamic Volt- to DVS and CPU frequency switching. For embedded ar- age and Frequency Scaling (DVFS) techniques have been chitectures with variable-frequency CPUs that also use the widely used to reduce energy consumption of real-time and processor tick counter as a clock source, the act of changing the frequency can momentarily disrupt the local clock and even cause minute changes in the rate at which it ticks. In this paper, we show that the disruption has a significant im- pact on the accuracy of local clocks and greatly increases the frequency of resynchronization in applications that need to maintain network synchrony within a maximum error bound. Permission to make digital or hard copies of all or part of this work for personal or classroom use is granted without fee provided that copies are not made or distributed Since the magnitude of the clock errors varies from node to for profit or commercial advantage and that copies bear this notice and the full citation node and also depends on the CPU frequencies, calibration on the first page. To copy otherwise, to republish, to post on servers or to redistribute alone cannot counter such a problem. to lists, requires prior specific permission and/or a fee. We propose a method for enabling energy-saving DVS Current Draw (mA) 180 2 Motivation Adjusting the frequency of the processor and peripheral 160 systems is one of the most effective methods of optimiz- 140 ing power consumption for an application’s performance re- 120 quirements. Recent advances in power supply and embedded 100 processor design have enabled the emergence of this tech- 80 nique in sensor networks. 60 2.1 DVS in Sensor Networks 40 PXA271, the processor on Imote2, supports switching between four CPU frequencies to balance performance and 20 power efficiency. Figure 1 shows the measured average cur- 0 rent draw of the system while performing a computational 13 104 208 416 CPU Frequency task at each of these frequencies. Figure 1. Measured average current draw for Imote2 compu- By reducing energy consumed during active operation, tational tasks running at different CPU frequencies DVS is an enabling technique for wireless sensor network applications that require long durations of wakefulness or continuous monitoring of the environment. For example, ef- fective SHM systems should have the ability to capture tran- in time-sensitive applications in the presence of this phe- sient events such as earthquakes or bridge overloads [18]. nomenon. By taking time synchronization constraints into The time needed to wake up the sensor network from deep account, we transform the DVS algorithm into an optimiza- sleep is one of the primary limitations to the realization of tion problem. We can trade off increased frequency of net- these applications using wireless sensors. In a large net- work resynchronization against reduced energy consumption work, such as the continuous SHM system deployed on the due to dynamic CPU frequency and voltage changes. Exper- Jindo Bridge [11], it can take over a minute to fully wake imental results confirm the efficacy of the solution in sav- up the network and start acquiring data [16]. In the event ing energy while maintaining synchrony. These findings are of an earthquake, the entire event could be missed while the significant for all sensor network applications that require network is initiating [18]. Also, some applications require precise network-wide time synchronization, and can benefit short-term (days to weeks) of exhaustive data collection for from energy savings due to dynamic voltage scaling. investigative studies [12]. Continuous monitoring coupled with proper energy management techniques during the run- We have selected the Imote2 as the target platform for time of the sensor network can enable such scenarios even evaluating the relationship between time synchronization when sensors are operating on a limited power budget. and CPU frequency and voltage changes for two reasons: 1) DVS can offer the greatest benefit in high performance its wide range of available CPU frequencies, and 2) the capa- applications with computationally intensive tasks, since they bilities for handling high-throughput communication and in- typically involve different phases of operation with varied tensive data processing found in SHM applications. The em- timing and processing demands. Specific requirements such pirical measurements and experimental evaluation presented as high sampling rates, prompt data collection and analysis, in this paper are conducted on an SHM network of 9 Imote2 vast amounts of data to be collected, and precise internodal sensors deployed on a pedestrian truss bridge. synchronization, result in a situation where both shorter run The principal contributions of our work are as follows: times and low energy consumption are desirable. In these applications, DVS can significantly reduce the energy con- • Documenting and quantifying the effect of CPU fre- sumption of the entire network by setting the optimal CPU quency changes on time synchronization error speed to match the requirements of each phase. • A method for integrating synchronization error consid- However, we have observed that changing processor fre- erations into DVS algorithms quency can have negative effects on time synchronization. More specifically, a change in frequency can change both the • Evaluation of the proposed optimization algorithm in a offset between the clocks of two nodes and the relative drift. real-world SHM application According to Intel PXA27x Developer’s Manual [5], chang- The remainder of this paper is organized as follows. Sec- ing a clock frequency causes the CPU clock to stop, which tion 2 motivates our research into the relationship between impacts a sensor node’s timekeeping and thus the time syn- DVS
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