Lab manual as of 11/2/2014. The manual is only complete through Lab C. I am working on introducing a new lab D and have put a fairly complete description of it in the manual. The software for schematic entry has separate on-line instructions. The simulation software op- eration is also a separate handout on the class website. wrp ENGN1630 Lab Manual Fall 2014 1 Brown University School of Engineering Engineering 1630 - Digital Electronics System Design Semester I - 2014-15 The Student Lab Manual Wm. R. Patterson ENGN1630 Lab Manual Fall 2014 2 Table of Contents 1. GENERAL INTRODUCTION .................................................................................................................................. 5 2. EVALUATION ........................................................................................................................................................... 8 2.1. GRADES .................................................................................................................................................................. 9 2.2. PARTIAL CREDIT ................................................................................................................................................... 10 2.3. INCOMPLETES ........................................................................................................................................................ 10 2.4. THE FAULT TOLERANCE QUESTION (FTQ) ........................................................................................................... 10 2.5. DOCUMENTATION ................................................................................................................................................. 13 2.6. DEADLINES ........................................................................................................................................................... 13 2.7. THE ENGN1630 EXCLUSION PRINCIPLE ............................................................................................................... 14 2.8. LAB SCHEDULE ..................................................................................................................................................... 15 2.9. TEACHER EVALUATION ......................................................................................................................................... 15 2.10. COLLABORATION ................................................................................................................................................ 15 3. GETTING STARTED .............................................................................................................................................. 16 4. CIRCUIT CONSTRUCTION GUIDELINES ........................................................................................................ 17 4.1. GENERAL HINTS .................................................................................................................................................... 17 4.2. THE 163 LAB ENVIRONMENT ................................................................................................................................ 18 4.3. LOGIC PROBES ...................................................................................................................................................... 19 4.4. POWER SUPPLIES ................................................................................................................................................... 19 4.5. BYPASSING ............................................................................................................................................................ 20 4.6. DEBOUNCING ........................................................................................................................................................ 20 5. DESIGN AND TROUBLESHOOTING ................................................................................................................. 22 5.1. DESIGN ................................................................................................................................................................. 22 5.2. TROUBLESHOOTING .............................................................................................................................................. 23 6. HOMEWORK, LECTURES, AND TEXTBOOKS ............................................................................................... 25 6.1. HOMEWORK .......................................................................................................................................................... 25 6.2. LECTURES ............................................................................................................................................................. 26 6.3. TEXTBOOKS .......................................................................................................................................................... 26 9. THE LAB CHALLENGES ...................................................................................................................................... 30 9.1. DISPLAYS AND LIGHT EMITTING DIODES ................................................................................................ 30 9.2. THE NUMBERED LABS ..................................................................................................................................... 34 9.2.1. LAB ZERO .......................................................................................................................................................... 34 9.2.2. LAB ONE ............................................................................................................................................................ 36 9.2.3. LAB TWO ........................................................................................................................................................... 38 9.2.4. LAB THREE ........................................................................................................................................................ 48 9.2.5. LAB FOUR .......................................................................................................................................................... 51 9.2.6. LAB FIVE ............................................................................................................................................................ 53 9.2.6.1. Verilog Implementation of a Counter – An Example ................................................................................. 56 9.2.6.2. Assigning Pin Numbers to Programmable Devices ................................................................................... 58 9.2.6.3. Editing and Compiling Verilog Files for Xilinx Parts ................................................................................ 59 9.2.6.4. Alternative Tutorial for Xilinx CPLD Programming with Verilog ............................................................. 61 STAGE 1, SETTING UP YOUR PROJECT............................................................................................................................ 61 STAGE 2, PROGRAMMING VERILOG: THE VERY, VERY BASICS. ..................................................................................... 62 STAGE 3, COMPILING YOUR CODE AND LOADING IT ONTO A CPLD ............................................................................. 62 9.2.7. LAB SIX .............................................................................................................................................................. 63 ENGN1630 Lab Manual Fall 2014 3 9.2.8. LAB SEVEN ........................................................................................................................................................ 72 9.2.9. LAB EIGHT ......................................................................................................................................................... 79 9.2.10. LAB NINE ......................................................................................................................................................... 85 9.3. THE LETTERED LABS ................................................................................................................................... 87 9.3.1. LAB A: ............................................................................................................................................................... 87 9.3.3. LAB C: ............................................................................................................................................................... 94 9.3.4. LAB D: THIS IS FIRST DRAFT OF A LAB STILL IN DEVELOPMENT. NOT INCLUDED IN INITIAL PRINTING OF THE MANUAL. .................................................................................................................................................................... 100 9.3.5. LAB E: .............................................................................................................................................................. 114 9.3.6. LAB F: .............................................................................................................................................................. 115 9.4. THE LOGIC ANALYZER TOOL ..................................................................................................................... 116 9.5. REQUIREMENTS