Macro Assembler AS V1.42 User's Manual

Macro Assembler AS V1.42 User's Manual

Alfred Arnold, Stefan Hilse, Stephan Kanthak, Oliver Sellke, Vittorio De Tomasi Macro Assembler AS V1.42 User’s Manual Edition Januar 2002 IBM, PPC403Gx, OS/2, and PowerPC are registered trademarks of IBM Corporation. Intel, MCS-48, MCS-51, MCS-251, MCS-96, MCS-196 und MCS-296 are registered trademarks of Intel Corp. Motorola and ColdFire are registered trademarks of Motorola Inc. UNIX is a registered trademark of X/Open Company. Linux is a registered trademark of Linus Thorvalds. Microsoft, Windows, and MS-DOS are registered trademarks of Microsoft Corporation. All other trademarks not explicitly mentioned in this section and used in this manual are properties of their respective owners. 3 This document has been processed with the LaTeX typesetting system using Digital Unix, Linux, and OS/2 operating systems running on AMD K6 and DEC Alpha processors. Contents 1 Introduction 11 1.1 License Agreement . 11 1.2 General Capabilities of the Assembler . 13 1.3 Supported Platforms . 19 2 Assembler Usage 21 2.1 Hardware Requirements . 21 2.2 Delivery . 22 2.3 Installation . 27 2.4 Start-Up Command, Parameters . 28 2.5 Format of the Input Files . 38 2.6 Format of the Listing . 40 2.7 Symbol Conventions . 42 2.8 Temporary Symbols . 44 2.9 Formula Expressions . 46 2.9.1 Integer Constants . 46 2.9.2 Floating Point Constants . 48 2.9.3 String Constants . 48 2.9.4 Evaluation . 50 2.9.5 Operators . 50 2.9.6 Functions . 50 2.10 Forward References and Other Disasters . 54 2.11 Register Symbols . 58 2.12 Sharefile . 59 2.13 Processor Aliases . 60 4 CONTENTS 5 3 Pseudo Instructions 61 3.1 Definitions . 61 3.1.1 SET and EQU . 61 3.1.2 SFR and SFRB . 63 3.1.3 XSFR and YSFR . 63 3.1.4 LABEL . 64 3.1.5 BIT . 64 3.1.6 DBIT . 65 3.1.7 PORT . 66 3.1.8 REG . 66 3.1.9 LIV and RIV . 66 3.1.10 CHARSET . 67 3.1.11 CODEPAGE . 68 3.1.12 ENUM . 68 3.1.13 STRUCT and ENDSTRUCT . 69 3.1.14 PUSHV and POPV . 70 3.2 Code Modification . 71 3.2.1 ORG . 71 3.2.2 CPU . 75 3.2.3 SUPMODE, FPU, PMMU . 87 3.2.4 FULLPMMU . 88 3.2.5 PADDING . 89 3.2.6 PACKING . 89 3.2.7 MAXMODE . 90 3.2.8 EXTMODE and LWORDMODE . 90 3.2.9 SRCMODE . 90 3.2.10 BIGENDIAN . 91 3.2.11 WRAPMODE . 91 3.2.12 SEGMENT . 92 3.2.13 PHASE and DEPHASE . 93 3.2.14 SAVE and RESTORE . 94 3.2.15 ASSUME . 95 3.2.16 EMULATED . 103 3.2.17 BRANCHEXT . 103 3.3 Data Definitions . 104 3.3.1 DC[.Size] . 104 3.3.2 DS[.Size] . 105 6 CONTENTS 3.3.3 DB,DW,DD,DQ, and DT . 106 3.3.4 DS, DS8 . 108 3.3.5 BYT or FCB . 108 3.3.6 BYTE . 108 3.3.7 DC8 . 109 3.3.8 ADR or FDB . 109 3.3.9 WORD . 109 3.3.10 DW16 . 109 3.3.11 LONG . 110 3.3.12 SINGLE and EXTENDED . 110 3.3.13 FLOAT and DOUBLE . 110 3.3.14 EFLOAT, BFLOAT, and TFLOAT . 110 3.3.15 Qxx and LQxx . 111 3.3.16 DATA . 111 3.3.17 ZERO . 112 3.3.18 FB and FW . 112 3.3.19 ASCII and ASCIZ . 112 3.3.20 STRING and RSTRING . 113 3.3.21 FCC . 113 3.3.22 DFS or RMB . 113 3.3.23 BLOCK . 113 3.3.24 SPACE . 114 3.3.25 RES . 114 3.3.26 BSS . 114 3.3.27 DSB and DSW . 114 3.3.28 DS16 . 114 3.3.29 ALIGN . 115 3.3.30 LTORG . 115 3.4 Macro Instructions . 115 3.4.1 MACRO . 116 3.4.2 IRP . 122 3.4.3 IRPC . 122 3.4.4 REPT . 123 3.4.5 WHILE . 123 3.4.6 EXITM . 124 3.4.7 SHIFT . 124 3.4.8 MAXNEST . 125 CONTENTS 7 3.4.9 FUNCTION . 125 3.5 Conditional Assembly . 127 3.5.1 IF / ELSEIF / ENDIF . 127 3.5.2 SWITCH / CASE / ELSECASE / ENDCASE . 129 3.6 Listing Control . 130 3.6.1 PAGE . 130 3.6.2 NEWPAGE . 131 3.6.3 MACEXP . 132 3.6.4 LISTING . 132 3.6.5 PRTINIT and PRTEXIT . 133 3.6.6 TITLE . 134 3.6.7 RADIX . 134 3.6.8 OUTRADIX . 134 3.7 Local Symbols . 135 3.7.1 Basic Definition (SECTION/ENDSECTION) . 136 3.7.2 Nesting and Scope Rules . 137 3.7.3 PUBLIC and GLOBAL . 140 3.7.4 FORWARD . 141 3.7.5 Performance Aspects . 143 3.8 Miscellaneous . 143 3.8.1 SHARED . 143 3.8.2 INCLUDE . 143 3.8.3 BINCLUDE . 144 3.8.4 MESSAGE, WARNING, ERROR, and FATAL . 145 3.8.5 READ . 146 3.8.6 RELAXED . 147 3.8.7 END . 147 4 Processor-specific Hints 149 4.1 6811 . 149 4.2 PowerPC . 151 4.3 DSP56xxx . 151 4.4 H8/300 . 152 4.5 SH7000/7600/7700 . ..

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