2008.01 Renesas MCU M16C Family (R32C/M32C/M16C/R8C) www.renesas.com World’s No. 1* Flash MCUs !! index Roadmap Total shipments of Rewriting possible during operation, and CPU Architecture World’s No. 1 1,000,000,000 units!! World’s No. 1 program/erase cycles increased to 100,000! E2dataFlash substantially improves the functionality and performance of data Flash MCUs Thanks to strong demand, total flash MCU Flash MCUs flash, allowing data to be rewritten independently while the MCU is operating. Concepts Proof No. 1 shipments reached the 1 billion mark in March 2007. Proof No. 4 Guaranteed program/erase cycles have been increased to 100,000, and data Renesas flash MCUs are used in a wide range of save times are two orders of magnitude faster than external E2PROM. consumer, industrial and automotive applications. (E2dataFlash: E2PROM emulation data flash memory) Product Lineup Development Tools No. 1 lineup of flash MCUs with 40µsec./byte high-speed flash World’s No. 1 over 300 products in 30 series!! World’s No. 1 programming!! Development Flash MCUs Flash MCUs Tools from Divided into high-end, middle, and low-end classes, Flash MCU technology supports high-speed Renesas Partners Proof No. 2 the flash MCU lineup is built on the most advanced Proof No. 5 programming at a rate of 512KB every 20 seconds technology. Flexible support is provided for (total time required for reprogramming, including Middleware/ increasingly large and complex software. erasing and programming). Demo Sets Functions/ Application Fields Memory Capacity High-speed flash memory supporting Comprehensive support and World’s No. 1 World’s No. 1 service to assist developers!! Flash MCUs up to 100MHz operation!! Flash MCUs Renesas delivers seamless integrated development Product No. Proof No. 3 Renesas flash technology provides direct memory Proof No. 6 environments and up-to-date technical information Table access and no-wait-state operation at up to 100MHz for 8-bit to 32-bit MCUs alongside a quick and to bring out the full capabilities of the MCU. responsive support system. Support System Exceeding expectations for flash MCUs— FLASH & FLEXIBLE. MCUs with embedded flash memory are now the main focus of MCU system development. Since its introduction, Flash MCUs from Renesas has been the industry leader in this product category. Over 300 individual products in 30 series are available, with processors ranging from 8 to 32 bits. Total shipments reached 1,000 million units in March 2007, making Renesas MCU the world’s No. 1 flash MCU. With a wide selection of development tools from Renesas and our partner companies as well as comprehensive Web based support, it is now easier than ever to develop products around Flash MCU, and new advances are being made continuously. *No,1 in total units shipped as of June 2007 (Renesas statistics) 1 2 Enhanced Security Functions Excellent Low Power Reliability Consumption Low EMI/ High-Speed Excellent EMS Processing Common Powerful Development Peripheral Environment Functions 3 4 Roadmap Overall Roadmap Series Overview Under Development • 4G space Increased Functionality • 100MHz Better Performance R32C/100 • 32-bit multiplier • 32-bit barrel shifter • On-chip FPU • 16M space M32C/90 • Up to 64MHz • 16M space • Up to 32MHz • Enhanced 32-bit M32C/80 operation instructions • Barrel shifter • 4-channel DMA + DMA II • 16M space • Up to 20MHz M16C/80 • 16-bit multiplier Upward Compatibility at • High-speed interrupts Assembly Language Level • 2 to 4-channel DMA • 1M space • 16 to 32MHz M16C/60 • 16-bit multiplier • 2 to 4-channel DMA • Small package (42 to 85 pins) M16C/Tiny • 10 to 24MHz • Single chip only • Small package Same CPU for (20 to 80 pins) Binary Compatibility R8C/Tiny • 16 to 20MHz Reduced • Single chip only Functionality, Lower Pin Count Note: Series names beginning with R were developed following the establishment of Renesas Technology Corp. 5 Series Comparison CPU Core R8C M16C/60 M16C/80 M32C/80 R32C/100 Address Space 1MB 16MB 4GB DMA No 2 to 4ch 4ch DMA II No Ye s Operation Instructions 16-Bit Operation Instructions 32-Bit Operation Instructions Barrel Shifter No Ye s Series R8C/Tiny M16C/Tiny M16C/6X M16C/80 M32C/8X M32C/9X R32C/1XX Max. Operating Frequency 20MHz 24MHz 24 to 32MHz 20MHz 32MHz 64MHz 64MHz Max. On-Chip Memory 128KB 128KB 512KB 256KB 1MB 512KB 1MB External Bus Extension No Ye s Other 8bit I/O 8bit + 16bit I/O Intelligent I/O FPU Family Evolution High-speed R32C/100 (Automotive) M32C/84, 85 Full-32-bit Higher speed R32C/111 R32C/116, 117, 118 M32C/87 Compatibility and continuity, higher speed [48MHz] Enhanced peripheral functions (SIO × 9 channels) Compatibility and continuity with earlier models Enhanced lineup of memory options (max. 1MB) Numerous peripheral functions (enhanced communication functions: on-chip CAN) Toward flash-only Standard M16C/62P Compatibility and continuity with earlier models M16C/64, 65 Enhanced lineup of memory options Numerous peripheral functions Compatibility and continuity Higher speed [25MHz to 32MHz] Faster A/D converter, enhanced peripheral functions M16C/30P Higher System Integration Optimized peripheral functions, enhanced cost effectiveness Many flash versions for various applications Flash versions and one time flash versions M16C/26B, Compact 28B, 29 Higher speed [24MHz]: M16C/26B, M16C/28B On-chip CAN: M16C/29 R8C/3x R8C/2x R8C/ASSP DTC, BGO High-speed on-chip oscillator Application Specific Products : New product 20 to 80 pin choices Motor Control, Lighting Under development In planning stage 6 CPU Architecture The register layout and addressing of the M16C Family are optimized for embedded applications. Naturally, development using high-level languages (C, C++) is supported. R32C/M32C Register Model [M32C/80 Series][R32C/100 Series] : Added in R32C/100 b15 b0 b31 b0 • Basic registers R2 FLG FLG Flag register b31 R2 R0H R0L R2H R2L R0H R0L R3 R1H R1L R3H R3L R1H R1L Data registers R2 R6 R4 b23 R3 R7 R5 A0 A0 A1 A1 Address registers A2 A3 SB SB Static base register FB FB Frame base register USP USP User stack pointer ISP ISP Interrupt stack pointer INTB INTB Interrupt table register PC PC Program counter b15b0 b31 b0 • High-speed interrupt registers b23 SVF SVF Vector register SVP SVP PC save register VCT VCT Flag save register R32C/M32C Register Model (DMA Related) : Added in R32C/100 [M32C/80 Series] [R32C/100 Series] 2 dedicated DMA registers 4 dedicated DMA registers b7 b0 b31 b0 DMD0 DMD0 DMA mode register b15 DCT0 DCT0 DMA terminal count register DRC0 DCR0 DMA terminal count reload register b23 DSA0 DSA0 DMA source address register DRA0 DSR0 DMA source address reload register DMA0 DDA0 DMA destination address register DDR0 DMA destination address reload register DMA Function DMA, which transfers data without DMA Applications DMAII/DTC Applications CPU intervention, supports up to • Automatic serial I/O transfers Memory Memory four channels • Motor drive using microsteps EVENT The DMAII/DTC function provides • Multichannel PWM output (max. 64) many other memory transfer capabilities, such as transfer of • Transfer of multiple multiple bytes by a single event and bytes by a single transfer of data to multiple addresses (Example using UART) event by a single event (M32C/80 core, R32C/100 core). RAM UART Port0 RAM EVENT • Transfer of data to Port1 RAM multiple addresses CPU by a single event Port2 RAM 7 Basic Instructions Frequently used instructions List of Instructions with 1-Cycle Execution Addressing (36 of 108 Total Instructions in the M32C/80) are executed in one cycle. Type Instruction Function Type Instruction Function ABS Absolute value BCLR Clear bit ADC Add with carry BNOT Invert bit Bit ADCF Add carry flag BNTST Test inverted bit manipulation ADD Add without carry BSET Set bit CMP Compare BTST Test bit Arithmetic DEC Decrement ROLC Rotate left with carry EXTS Extend sign Shift RORC Rotate right with carry EXTZ Extend zero ROT Rotate INC Increment SHA Shift arithmetic 1-bit shift NEG Two’s complement SHL Shift logical SBB Subtract with borrow FCLR Clear flag register bit SBU Subtract without borrow FSET Set flag register bit AND Logical AND INDEX Index NOT Invert all bits INTO Interrupt on overflow Logic OR Logical OR Other Jcnd Jump on condition TST Test LDC Transfer to control register XOR Exclusive OR NOP No operation MOV Transfer PUSHC Save control register Transfer PUSH Save SCcnd Store on condition PUSHM Save multiple registers Advanced Instructions (Enhanced 32-Bit Instructions - R32C/100) The R32C/100 CPU core features Category Instruction Description enhanced 32-bit instructions and ADSF Sign flag add ÷ → many instructions with advanced EDIV Signed divide (64 32 32-bit) EDIVU Unsigned divide (64 ÷ 32 → 32-bit) functionality. Arithmetic instructions EDIVX Signed divide (32 ÷ 32 → 32-bit) EMUL Signed multiply (32 ÷ 32 → 64-bit) MULX Multiply with rounding EMULU Unsigned multiply (32 ÷ 32 → 64-bit) ADDF Floating point add CMPF Floating point compare CNVIF Convert integer → floating point number Floating point operation instructions DIVF Floating point divide MULF Floating point multiply ROUND Convert floating point number → integer SUBF Floating point subtract Search until data matching search string SUNTIL found Search until data not matching search SWHILE string found High-level language support instructions EXITI Release interrupt stack frame Other STOP Stop Enhanced Multiply and Accumulate Instruction The multiply and accumulate instruction has been further enhanced. RAM ROM D1 D2 C1 C2 D3 D4 C3 C4 D5 D6 C5 C6 D7 D8 C7 C8 M32C/80 (2 cycles) 64 bits Data bus 16bits × 16bits + 48bits → 48bits D1 C1 D2 C2 D3 D4 R32C/100 (1 cycle) 32bits × 32bits + 64bits → 64bits Hardware multiplier 64 bits 64 bits Answer 8 Concepts Security Functions The M16C Family incorporates a number of security functions to prevent unauthorized access to its internal ROM contents.