Instruction Selection by Graph Transformation Sebastian Buchwald Andreas Zwinkau Karlsruhe Institute of Technology (KIT) Karlsruhe Institute of Technology (KIT) 76128 Karlsruhe, Germany 76128 Karlsruhe, Germany [email protected] [email protected] ABSTRACT pattern with equal semantics. A cost model weighs the pat- Common generated instruction selections are based on tree terns against each other, considering e.g. code size, execu- pattern matching, but modern and custom architectures fea- tion time or energy use. In the IR the patterns have to be ture instructions, which cannot be covered by trees. To identified and a subset with minimal cost has to be selected overcome this limitation, we are the first to employ graph that covers the whole program. transformation, the natural generalization of tree rewriting. Modern compilers use an IR in static single assignment Currently, the only approach allowing us to pair graph- (SSA) form [6, 27] allowing a graph-based representation based instruction selection with linear time complexity is called program graph or \sea of nodes" [4]. Thus, instruction the mapping to the Partitioned Boolean Quadratic Problem selection can be considered as graph transformation. (PBQP). We present formal foundations to verify this ap- Contrary to classical algorithms for generated instruction proach and therewith identify two problems of the common selection, PBQP can model program and pattern graphs. method and resolve them. We confirm the capabilities of With this increased flexibility instruction selection can sup- PBQP-based instruction selection by a comparison with a port more complex operations (vector operations, custom finely-tuned hand-written instruction selection. instructions, etc.), which cannot be processed by tree rewrit- ing, to achieve higher code quality. A PBQP-based instruc- tion selection can therefore combine the code quality of man- Categories and Subject Descriptors ually fine-tuned compilers with the short compiler develop- D.2.4 [Software Engineering]: Software/Program Veri- ment times desired in embedded systems. fication|Correctness proofs; D.3.4 [Programming Lan- Least-cost instruction selection on directed acyclic pro- guages]: Processors|Compilers,Retargetable Compilers gram graphs is NP-complete [26]. Therefore, a graph-based linear-time instruction selector must sometimes make heuris- tic decisions to be efficient. The PBQP is a modelling of the General Terms instruction selection problem that reduces the problem to Algorithms, Theory, Verification its core before heuristic decisions are made. However, finding any PBQP solution is NP-complete [19] in general. This seems to contradict the empirical observa- 1. INTRODUCTION tion that a linear algorithm always finds a solution. So the Adapting a compiler to new hardware architectures is a question arises, whether PBQP instances, which are con- common task, especially in embedded systems. Generating structed during instruction selection, form a special subclass a compiler from an architecture description is an appealing of the PBQP that can be solved in linear time. Previous improvement to manual programming. Yet popular compil- work ignored this question, but not finding a solution is no ers do not employ this technique as it results in poorer code alternative, because a fallback instruction selection would quality. New approaches like those based on solving the Par- be required, which invalidates the argument of reduced de- titioned Boolean Quadratic Problem (PBQP) suggest that velopment time. Our contributions are as follows: this trade-off may not be necessary [7,8, 19]. • We provide a new formal representation for instruction The most architecture-specific part of code generation is selection based on graph transformation. instruction selection, where the intermediate representation (IR) gets transformed to architecture-specific instructions. • We show that the PBQP-based approach can indeed For every machine instruction there is a corresponding IR fail and provide a rectification for the PBQP solving algorithm. Additionally, we identify sufficient precon- ditions for the rule sets of architecture descriptions to guarantee that a solution is found. Permission to make digital or hard copies of all or part of this work for • We derive a method for automatic completion of in- personal or classroom use is granted without fee provided that copies are sufficient rule sets, which simplifies the specification of not made or distributed for profit or commercial advantage and that copies bear this notice and the full citation on the first page. To copy otherwise, to architecture descriptions. republish, to post on servers or to redistribute to lists, requires prior specific • An evaluation of PBQP-based instruction selection on permission and/or a fee. CASES’10, October 24–29, 2010, Scottsdale, Arizona, USA. the IA32 architecture confirms the competitive perfor- Copyright 2010 ACM 978-1-60558-903-9/10/10 ...$10.00. mance of this approach. The paper is organized as follows: In Section 2, we describe Definition 2 (Morphisms on IR graphs). A morph- 0 our formal model of graph-based instruction selection. Sec- ism f : G ! G is a pair (fV ; fE ) of mappings fV : VG ! VG0 tion 3 explains the PBQP and how it is used for instruc- and fE : EG ! EG0 , where tion selection. Section 4 depicts two problems of the known f (src(e)) = src(f (e)) approach and shows how to solve them. Our prototype is V E evaluated in Section 5. We summarize related and future fV (tgt(e)) = tgt(fE (e)) work in Section 6 and Section 7, respectively. Finally, we pos(e) = pos(fE (e)) conclude in Section 8. type(v) 6= ?) type(v) = type(fV (v)): Definition 3 (Isomorphic IR graphs). IR graphs G 2. GRAPH-BASED INSTRUCTION SELEC- and G0 are called isomorphic G =∼ G0, if there are two mor- TION phism f : G ! G0 and g : G0 ! G with Instruction selection can be divided into three phases: f ◦ g = idG0 Pattern matching: Find all occurrences of the given pat- g ◦ f = idG: tern set in the current program graph. Definition 4 (Program graph). A program graph G is an acyclic IR graph with type(v) 6= ? for each node v 2 Selection: Select an appropriate subset of the matches that VG. covers the whole program graph. Usual program representations are cyclic due to control Replace: Replace the selected patterns with their corre- flow cycles and only acyclic within a basic block. If the IR sponding instruction. is in SSA form, the restriction to acyclic graphs in Defini- tion 4 still allows instruction selection for whole functions, PBQP solving can only account for the selection phase, because each loop contains at least one φ-node, which we which means the pattern matching and replace phases are assume is not modified by instruction selection. Thus, for not considered so far. Since PBQP-based selection can even formal1 considerations we split a φ-node into two nodes. handle DAG-shaped patterns, we replace the usual tree re- One node has no incoming edges and the k outgoing edges writing system [14, 23, 24] with a more general graph rewrit- of the original node, so let us call it φk. The other node has ing system [11, 18, 28]. More precisely, we use the algebraic all the incoming edges of the original node and no outgoing single-pushout approach [22], which is based on category edges, effectively it is a φ0-node. To keep the number of the theory [12]. resulting φk-types finite we employ the limitations provided by the language specifications. 2.1 Formal graph-foundations Definition 5 (Pattern graph). A pattern graph P A category consists of objects and morphisms. We embed is a rooted, acyclic IR graph with root rt(P ), where program graphs and pattern graphs into a joint category with IR graphs as objects. type(rt(P )) 6= ? type(v) = ?) deg(v) = 0 Definition 1 (IR graph). Let Σ be a finite set of node types. An IR graph G is a 6-tuple (VG;EG; src; tgt; pos; type), for all nodes v 2 VP . where In contrast to program graphs, the leaf nodes of pattern graphs can be untyped. According to Definition 2, untyped • V is a finite set of nodes G nodes can be mapped to nodes of arbitrary type. Intuitively, • E is a finite set of edges an untyped node represents a value stored in a register. The G mapping of a pattern into the program graph is called a match. To find such matches is called pattern matching and • src : EG ! VG assigns each edge its source node describes the first phase of instruction selection. • tgt : EG ! VG assigns each edge its target node Definition 6 (Match). A match (P; ι) of an IR graph G consists of a pattern graph P and an injective morphism • pos : EG ! N0 assigns each edge its position ι : P,! G. The simplest kind of a pattern graph consists of a typed root • type : VG ! Σ is a partial typing of nodes with only untyped operands, if any. For an untyped node v we denote type(v) = ?. Every type ? ? t 2 Σ has a static out-degree deg(t) 2 N0. Likewise, we as- sign each node v an out-degree deg(v) = jfe 2 EG j src(e) = vgj, which equals the out-degree of the assigned type: type(v) 6= ?) deg(v) = deg(type(v)): type Furthermore, we impose two additional conditions for the Definition 7 (Atomic pattern graph). A pattern position of an edge e 2 EG: graph P is called atomic, if type(v) = ? holds for all nodes v 2 VP n frt(P )g. 0 ≤ pos(e) < deg(src(e)) 1 0 0 0 0 In praxis, the split has the same effect as allowing exactly 8e 2 EG : src(e) = src(e ) ^ pos(e) = pos(e ) ) e = e : one alternative at a φ-node: an atomic φ-pattern.