RECONFIGURABLE COMPUTING Reconfigurable Computing Accelerating Computation with Field-Programmable Gate Arrays by MAYA GOKHALE Los Alamos National Laboratory, NM, U.S.A. and PAUL S. GRAHAM Los Alamos, NM, U.S.A. A C.I.P. Catalogue record for this book is available from the Library of Congress. ISBN-10 0-387-26105-2 (HB) ISBN-13 978-0-387-26105-8 (HB) ISBN-10 0-387-26106-0 (e-book) ISBN-13 978-0-387-26106-5 (e-book) Published by Springer, P.O. Box 17, 3300 AA Dordrecht, The Netherlands. www.springeronline.com Printed on acid-free paper All Rights Reserved © 2005 Springer No part of this work may be reproduced, stored in a retrieval system, or transmitted in any form or by any means, electronic, mechanical, photocopying, microfilming, recording or otherwise, without written permission from the Publisher, with the exception of any material supplied specifically for the purpose of being entered and executed on a computer system, for exclusive use by the purchaser of the work. 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Contents 1 An Introduction to Reconfigurable Computing ............ 1 1.1 WhatisRC?............................................ 1 1.2 RCArchitectures........................................ 3 1.3 HowdidRCoriginate?................................... 4 1.4 InsidetheFPGA........................................ 6 1.5 Mapping Algorithms to Hardware . 7 1.6 RC Applications. 8 1.7 Example:DotProduct................................... 9 1.8 FurtherReading......................................... 10 2 Reconfigurable Logic Devices ............................. 11 2.1 Field-Programmable Gate Arrays . 12 2.1.1 Basic Architecture . 12 2.1.2 SpecializedFunctionBlocks......................... 22 2.1.3 ProgrammingArchitecture ......................... 26 2.2 Coarse-Grained Reconfigurable Arrays . 28 2.2.1 Raw............................................. 29 2.2.2 PipeRench........................................ 30 2.2.3 RaPiD........................................... 32 2.2.4 PACTXPP ...................................... 33 2.2.5 MathStar. 35 2.3 Summary............................................... 36 3 Reconfigurable Computing Systems ....................... 37 3.1 Parallel Processing on Reconfigurable Computers . 37 3.1.1 Instruction Level Parallelism . 37 3.1.2 TaskLevelParallelism............................. 39 3.2 ASurveyofReconfigurableComputingSystems............. 41 3.2.1 I/O Bus Accelerator . 43 3.2.2 Massively Parallel FPGA array . 45 3.2.3 Reconfigurable Supercomputer . 45 VI Contents 3.2.4 Reconfigurable Logic Co-processor . 47 3.3 Summary............................................... 49 4 Languages and Compilation ............................... 51 4.1 DesignCycle............................................ 51 4.2 Languages.............................................. 54 4.2.1 Algorithmic RC Languages . 55 4.2.2 Hardware Description Languages (HDL) . 57 4.3 High Level Compilation . 60 4.3.1 Compiler Phases . 65 4.3.2 Analysis and Optimizations . 66 4.3.3 Scheduling........................................ 67 4.4 LowLevelDesignFlow................................... 68 4.4.1 LogicSynthesis ................................... 69 4.4.2 TechnologyMapping............................... 70 4.4.3 Logic Placement . 71 4.4.4 Signal Routing . 72 4.4.5 ConfigurationBitstreams........................... 73 4.5 Debugging Reconfigurable Computing Applications . 74 4.5.1 BasicNeedsforDebugging ......................... 74 4.5.2 Debugging Facilities . 75 4.5.3 Challenges for RC Application Debugging . 84 4.6 Summary............................................... 85 5 Signal Processing Applications ............................. 87 5.1 What is Digital Signal Processing? . 87 5.2 Why Use Reconfigurable Computing for DSP? . 89 5.2.1 Reconfigurable Computing’s Suitability for DSP . 89 5.2.2 Comparing DSP Implementation Technologies . 92 5.3 DSP Application Building Blocks . 96 5.3.1 BasicOperationsandElements ..................... 97 5.3.2 Filtering . 102 5.3.3 Transforms.......................................103 5.4 Example DSP Applications . 108 5.4.1 Beamforming.....................................108 5.4.2 SoftwareRadio....................................112 5.5 Summary...............................................117 6 Image Processing ........................................119 6.1 RC for Image and Video Processing . 119 6.2 LocalNeighborhoodFunctions............................121 6.2.1 Cellular Arrays for Pixel Parallelism . 123 6.2.2 Image Pipelines for Instruction-Level Parallelism . 123 6.3 Convolution ............................................124 6.4 Morphology . 125 Contents VII 6.5 Feature Extraction . 127 6.6 Automatic Target Recognition . 129 6.7 Image Matching . 131 6.8 Evolutionary Image Processing . 134 6.9 Summary...............................................139 7 Network Security ..........................................141 7.1 CryptographicApplications...............................141 7.1.1 CryptographyBasics...............................142 7.1.2 RC Cryptographic Algorithm Implementations . 146 7.2 NetworkProtocolSecurity ...............................148 7.2.1 RC Network Interface . 148 7.2.2 SecurityProtocols.................................151 7.2.3 Network Defense . 152 7.3 Summary...............................................155 8 Bioinformatics Applications................................157 8.1 Introduction............................................157 8.2 Applications . 159 8.2.1 Genome Assembly . 159 8.2.2 Content-BasedSearch..............................160 8.2.3 GenomeComparison...............................160 8.2.4 MolecularPhylogeny...............................161 8.2.5 PatternMatching .................................161 8.2.6 Protein Domain Databases . 162 8.3 Dynamic Programming Algorithms . 163 8.3.1 Alignments.......................................163 8.3.2 Dynamic Programming Equations . 164 8.3.3 GapFunctions....................................166 8.3.4 Systolic DP Computation . 166 8.3.5 Backtracking . 167 8.3.6 ModuloEncoding .................................169 8.3.7 FPGAImplementations............................170 8.4 Seed-BasedHeuristics....................................170 8.4.1 Filtering, Heuristics, and Quality Values . 171 8.4.2 BLAST:a3-StagesHeuristic.......................171 8.4.3 SeedIndexing.....................................172 8.4.4 FPGAImplementations............................174 8.5 Profiles, HMMs and Language Models. 174 8.5.1 Position-Dependent Profiles . 174 8.5.2 Hidden Markov Models . 175 8.5.3 LanguageModels..................................176 8.6 Bioinformatics FPGA Accelerators . 177 8.6.1 Splash . 178 8.6.2 Perle ............................................178 VIII Contents 8.6.3 GenStorm........................................178 8.6.4 RDisk ...........................................178 8.6.5 BioXL/H . 181 8.6.6 DeCypher........................................181 8.7 Summary...............................................181 9 Supercomputing Applications ..............................183 9.1 Introduction............................................183 9.2 Monte Carlo Simulation of Radiative Heat Transfer . 184 9.2.1 Algorithm Description . 185 9.2.2 HardwareImplementation..........................187 9.2.3 Performance......................................188 9.3 UrbanRoadTrafficSimulation............................192 9.3.1 CA Traffic Modeling . 193 9.3.2 IntersectionsandGlobalBehavior...................194 9.3.3 ConstructiveApproach.............................196 9.3.4 StreamingApproach...............................198 9.4 Summary...............................................202 References .....................................................205 Index ..........................................................233 Acknowledgments We would like to recognize the International, Space, and Response (ISR) Tech- nologies Division and the Laboratory-Directed Research and Development (LDRD) Program at Los Alamos National Laboratory for their invaluable support during the writing and editing of this book. We would like to acknowledge the contributions of two invited chapter au- thors. Reid B. Porter from Los Alamos National Laboratory wrote Chapter 6, Image Processing, providing an excellent discussion of how reconfigurable com- puting has been employed in the broad field of image processing. Dominique Lavenier and Mathieu Giraud from IRISA, Rennes France wrote Chapter 8, Bioinformatics Applications, drawing on their extensive background in bioin- formatics to describe several applications from the field and the role of recon- figurable computing in these applications. The material in Chapter 9, Supercomputing Applications, is derived from two papers written by researchers at Los Alamos National Laboratory. The first paper, “Accelerating Monte Carlo Radiative Heat Transfer Simulation on a Reconfigurable Computer: An Evaluation”, was written by Maya Gokhale, Janette Frigo, Christine Ahrens, Justin L. Tripp and Ronald G. Minnich and was published in the Proceedings of the 2004 International Conference on Field-Programmable Logic and Applications. The second paper,“Acceleration of Traffic Simulation on Reconfigurable Hardware”, was written by Justin L. Tripp, Henning S. Mortveit, Matthew S. Nassr, Anders A. Hansson, and Maya Gokhale and was presented at the 2004 International Conference on Military and Aerospace Programmable Logic Devices. Thanks are due to Janette Frigo for the phase modulation sorter example and to Kris Gaj and Peter Bellows for very helpful discussions on cryptography