Doc. No.: NGMP-SPEC-0001 Issue: 1 Rev.: 4 Date: 2010-02-22 Page: 1 of 57 NGMP Specification Next Generation Multi-Purpose Microprocessor Contract: 22279/09/NL/JK © Aeroflex Gaisler AB ESA contract: 22279/09/NL/JK Deliverable: D2 Doc. No.: NGMP-SPEC-0001 Issue: 1 Rev.: 4 Date: 2010-02-22 Page: 2 of 57 TABLE OF CONTENTS 1 INTRODUCTION ............................................................................................................................ 6 1.1 Scope of the Document ........................................................................................................ 6 1.2 Functional Requirements ...................................................................................................... 6 1.3 Applicable Documents .......................................................................................................... 6 1.4 Reference Documents .......................................................................................................... 7 1.5 Acronyms .............................................................................................................................. 8 2 ARCHITECTURE ......................................................................................................................... 10 2.1 Architectural Overview ........................................................................................................ 10 2.2 LEON4FT SPARC V8 Processor Cores ............................................................................. 13 2.2.1 Description ............................................................................................................. 13 2.2.1.1 Overview ............................................................................................... 13 2.2.1.2 Integer Unit ............................................................................................ 13 2.2.1.3 Floating Point Unit ................................................................................. 13 2.2.1.4 Timer Unit .............................................................................................. 14 2.2.1.5 Interrupt controller ................................................................................. 14 2.2.1.6 Memory Management Unit .................................................................... 14 2.2.1.7 L1 Cache ............................................................................................... 15 2.2.2 Performance counters ............................................................................................ 15 2.2.3 Block moves ........................................................................................................... 15 2.2.4 Configuration .......................................................................................................... 15 2.3 L2 Cache ............................................................................................................................ 16 2.3.1 Description ............................................................................................................. 16 2.3.2 Configuration .......................................................................................................... 17 2.4 DDR2 Memory Interface ..................................................................................................... 17 2.4.1 Description ............................................................................................................. 17 2.4.2 Reed-Solomon Codecs .......................................................................................... 17 2.4.3 Configuration .......................................................................................................... 18 2.5 SDRAM Controller .............................................................................................................. 18 2.5.1 Description ............................................................................................................. 18 2.5.2 Configuration .......................................................................................................... 19 2.6 On-chip SDRAM ................................................................................................................. 19 2.6.1 Description ............................................................................................................. 19 2.6.2 Configuration .......................................................................................................... 19 2.7 Memory Scrubber ............................................................................................................... 19 2.7.1 Description ............................................................................................................. 19 2.7.2 Modes of Operation ................................................................................................ 20 2.7.3 Scrubber Bandwidth ............................................................................................... 20 2.7.4 Memory Initialisation ............................................................................................... 20 2.7.5 Memory Scrubbing and Re-generation ................................................................... 21 2.7.6 Configuration .......................................................................................................... 22 2.8 AHB/AHB Bridge Connecting Debug AHB Bus .................................................................. 22 2.8.1 Description ............................................................................................................. 22 2.8.2 Configuration .......................................................................................................... 22 2.9 DSU4 – LEON4 Hardware Debug Support Unit ................................................................. 22 © Aeroflex Gaisler AB ESA contract: 22279/09/NL/JK Deliverable: D2 Doc. No.: NGMP-SPEC-0001 Issue: 1 Rev.: 4 Date: 2010-02-22 Page: 3 of 57 2.9.1 Description ............................................................................................................. 22 2.9.1.1 Overview ............................................................................................... 22 2.9.1.2 Operation ............................................................................................... 23 2.9.1.3 AHB Trace Buffer .................................................................................. 23 2.9.1.4 Instruction Trace Buffer ......................................................................... 24 2.9.1.5 Data Watchpoints .................................................................................. 24 2.9.1.6 Data Area Monitoring ............................................................................ 24 2.9.1.7 AHB Performance Monitoring ................................................................ 24 2.9.2 Configuration .......................................................................................................... 25 2.10 JTAG Debug Link Controller ............................................................................................. 25 2.10.1 Description ........................................................................................................... 25 2.10.2 Configuration ........................................................................................................ 25 2.11 USB Debug Link Controller ............................................................................................... 25 2.11.1 Description ........................................................................................................... 25 2.11.2 Configuration ........................................................................................................ 26 2.12 SpaceWire RMAP Target Debug Link Controller .............................................................. 26 2.12.1 Description ........................................................................................................... 26 2.12.2 Configuration ........................................................................................................ 26 2.13 Uni-directional AHB Bridge with Protection Functionality .................................................. 26 2.13.1 Description ........................................................................................................... 26 2.13.2 Configuration ........................................................................................................ 27 2.14 Ethernet Controllers .......................................................................................................... 27 2.14.1 Description ........................................................................................................... 27 2.14.2 Configuration ........................................................................................................ 28 2.15 SpaceWire Controllers ...................................................................................................... 29 2.15.1 Description ........................................................................................................... 29 2.15.2 Configuration ........................................................................................................ 29 2.16 High Speed Serial Link Controller ..................................................................................... 29 2.16.1 Description ..........................................................................................................