VLSI Planarization Mathematics and Its Applications Managing Editor: M. HAZEWINKEL Centre/or Mathematics and Computer Science, Amsterdam, The Netherlands Volume 399 VLSI Planarization Methods, Models, Implementation by V. Feinberg SILVACO InternatioMI, Santa Clara, California, U.S.A. A. Levin Intel Corporation, Santa Clara, California, U.S.A. and E. Rabinovich Gorizont, Minsk, Belarus SPRINGER SCIENCE+BUSINESS MEDIA, B.V. A C.I.P. Catalogue record for this book is available from the Library of Congress. ISBN 978-94-010-6421-7 ISBN 978-94-011-5740-7 (eBook) DOI 10.1007/978-94-011-5740-7 Printed on acid-jree paper All Rights Reserved @1997 Springer Science+Business Media Dordrecht Originally published by Kluwer Academic Publishers in 1997 Softcover reprint of the hardcover 1st edition 1997 No part of the material protected by this copyright notice may be reproduced or utilized in any form or by any means, electronic or mechanical, including photocopying, recording or by any information storage and retrieval system, without written permission from the copyright owner Table of Contents Introduction 1 1 Discrete Mathematics Fundamentals 7 1.1 Graphs And Hypergraphs . 7 1.2 Algorithms And Their Complexity 17 1.3 Algorithms In Graphs . 19 1.3.1 Depth-first search ... 19 1.3.2 Breadth-first search .. 20 1.3.3 Minimum spanning tree 21 1.3.4 The shortest chain 22 1.4 Intractable Problems. 23 2 Graph Planarization 27 2.1 Planar Graphs. Graph Planarity Criteria .... 27 2.2 Graph Planarity Testing Algorithms ....... 31 2.3 Approximation Algorithm for Graph Planarization 39 3 Hypergraph Planarization 45 3.1 The Concept of Planar Hypergraph . .. 45 3.2 Planarity of Different Hypergraph Classes . .. 68 3.3 Hypergraph Nonplanarity Measures. Statement of Hypergraph Planarization Problem . 78 3.4 Decomposition Methods of Hypergraph Planarization .. 82 4 Mathematical Models for VLSI Planarization Problem 87 4.1 Graph versus Hypergraph VLSI Models . 87 4.2 VLSI Models with Specified Element Mo~els 89 v Vl 4.3 Dynamic VLSI Models . .. 96 5 Extracting a Maximum Planar VLSI Part 99 5.1 Extracting a Maximum Planar VLSI Part as a Hypergraph Planarization Problem . 99 5.2 Iteration Algorithm for Hypergraph Planarization. 102 5.3 Hypergraph Planarization by Konig Representation . 108 5.4 Operations of Local Embedding Optimization . 115 6 Constructing Nonplanar Connections 121 6.1 Graph Model for Nonplanar Connections. 121 6.2 Constructing a Nonplanar Connection as a Steiner Problem in a Weighted Graph .. 127 6.3 Ordering Nonplanar Connections to be Constructed 129 7 Planarization System Structure 133 7.1 Purpose and FUnctions of the System. 133 7.2 Planarization System Structure. Logic Diagram . 136 7.3 Data Organization in Planarization System . 140 7.4 Some Aspects of the Practical Use of the Planarization System 154 References 173 Index 181 .