Florida State University Libraries Electronic Theses, Treatises and Dissertations The Graduate School 2008 Historical Study of the Development of Branch Predictors Yuval Peress Follow this and additional works at the FSU Digital Library. For more information, please contact [email protected] FLORIDA STATE UNIVERSITY COLLEGE OF ARTS AND SCIENCES HISTORICAL STUDY OF THE DEVELOPMENT OF BRANCH PREDICTORS By YUVAL PERESS A Thesis submitted to the Computer Science Department in partial fulfillment of the requirements for the degree of Master of Science. Degree Awarded: Fall Semester, 2008 The members of the Committee approve the Thesis of Yuval Peress defended on September 29, 2008. Gary Tyson Professor Directing Thesis David Whalley Committee Member Piyush Kumar Committee Member The Office of Graduate Studies has verified and approved the above named committee members. ii TABLE OF CONTENTS List of Tables ...................................... v List of Figures ..................................... vii Abstract ........................................ viii 1. INTRODUCTION ................................. 1 1.1 Simulation Environment ........................... 3 1.2 Benchmarks .................................. 3 2. THE PERIPHERALS OF THE BRANCH PREDICTOR ........... 4 2.1 The BTB ................................... 4 2.2 The 2-Bit State Machine ........................... 5 3. CHANGING THE TABLE SIZE ......................... 7 3.1 Bimodal Predictor .............................. 7 3.2 GAg and Gshare ............................... 10 3.3 Local Branch Predictor ............................ 16 3.4 Tournament Predictor ............................ 18 4. MOVING TO A BETTER PREDICTOR .................... 24 4.1 Bimodal to GAg ............................... 24 4.2 GAg to Gshare ................................ 25 4.3 Gshare to Local ................................ 26 4.4 Components to Tournament ......................... 27 5. RELATED WORK ................................. 31 5.1 Capacity Based Development ........................ 31 5.2 Access Pattern Based Development ..................... 34 6. CONCLUSION ................................... 39 REFERENCES ..................................... 43 Appendices ....................................... 44 A. ALTERNATE REPRESENTATION OF BASE PREDICTOR RESULTS ... 45 iii B. DESTRUCTIVE INTERFERENCE ....................... 47 C. CONSTRUCTIVE INTERFERENCE ...................... 49 D. BRANCH DEPENDENCY IN ADPCM CODER ................ 51 BIOGRAPHICAL SKETCH ............................. 55 iv LIST OF TABLES 3.1 Bimodal Miss Rates ................................ 9 3.2 Bimodal Miss Rates for the shifted PC indexing scheme. ........... 10 3.3 Gag Miss Rates .................................. 11 3.4 Gshare Miss Rates ................................ 12 3.5 Local Predictor Miss Rates ............................ 17 3.6 Tournament predictor miss rates in Normal and Deviant categorizations. .. 20 3.7 Number of phase switches in the Meta predictor of the 1k/1k/1k tournament predictor configuration from adpcm. ....................... 21 3.8 Tournament Predictor Miss Rates with 4 bit Meta table entries. ....... 22 3.9 Local/Gshare Tournament predictor miss rates with 2 bit meta table saturat- ing counters. .................................... 23 3.10 Local/Gshare Tournament predictor miss rates with 4 bit meta table saturat- ing counters. .................................... 23 4.1 Some examples of branches which perform worse with the local predictor vs. the gshare predictor. ............................... 26 A.1 Alternative representation of the bimodal predictor results. ......... 45 A.2 Alternative representation of the GAg predictor results. ........... 45 A.3 Alternative representation of the gshare predictor results. .......... 46 A.4 Alternative representation of the local predictor results. ........... 46 B.1 Table entries containing branch PC 120002de0 for g721 encode. miss Rate is for PC 120002de0 only. .............................. 47 C.1 Entry 584 containing branch at PC 120008920 for g721 decode. miss Rate is for PC 120002920 only. .............................. 49 v D.1 Adpcm miss rates using the coder function ................... 52 D.2 Adpcm in depth view of the miss rate for each of the top missed branches in the coder function ................................. 53 D.3 Differences in prediction pattern of a data driven branch in adpcm’s coder function ...................................... 54 vi LIST OF FIGURES 2.1 The average working set size within the BTB. The last column (33) is the overflow, meaning any working set size > 32 is placed in column 33. ..... 5 2.2 Transition diagram for 2bit predictor. ...................... 6 3.1 Average Bimodal Predictor Table Usage .................... 8 3.2 Branch predictor usage patterns in 1k bimodal predictor. ........... 9 3.3 Distribution of occurrences and misses of fetched PCs in gshare’s global history register. ...................................... 13 3.4 Code from susan.c ................................ 14 3.5 Average miss rate of gshare predictor with variable history register width. .. 15 3.6 Average miss rate of gshare predictor with variable PC bits used for indexing. 15 3.7 The 2 Level predictor configuration ....................... 16 3.8 Tournament predictor configuration ....................... 18 D.1 Code from adpcm.c ................................ 51 vii ABSTRACT In all areas of research, finding the correct limiting factor able to provide the largest gains can often be the critical path of the research itself. In our work, focusing on branch prediction, we attempt to discover in what ways did previous prediction research improve branch prediction, what key aspects of the program execution were used as leverage for achieving better branch prediction, and thus which trends are more likely to provide more substantial gains. Several “standard” branch predictors were implemented and tested with a wide variety of parameter permutations. These predictors include the bimodal, GAg, gshare, local, and tournament predictors. Later, other predictors were studied and briefly described with a short analysis using information gathered from the “standard” predictors. These more complex predictors include the caching, cascading look-ahead, overriding, pipelined, bi- mode, correlation-based, data correlation based, address correlation based, agree, and neural predictors. Each of these predictors have their own unique approach on which elements of the branch predictor are key to improving the prediction rate of a running benchmark. Finally, in our conclusion, we will clearly state our perspective on which elements in branch prediction have the most potential and which of the more advanced predictors covered in the related work chapter have been following our predicted trend in branch prediction development. viii CHAPTER 1 INTRODUCTION Branch predictors have come a long way over the years; from a single table indexed by a current PC, to multiple layers of tables indexed by the PC, global history, local history, and more. The final goal is the use of past events to predict the future execution path of a running program. At each step in the evolution of branch predictors we have seen new improvements in the prediction accuracy, generally at the cost of power and some space. In recent designs, such as the Alpha EV8[9]1, the miss rate of the branch predictor could indeed be the limiting factor of the processor’s performance. The EV8 was designed to allow up to 16 instructions to be fetched per cycle, with the capability of making 16 branch predictions per cycle. With increasing penalties for misprediction (minimum of 14 cycles in the EV8) and a high clock frequency limiting the number of table accesses of the predictor, the EV8 processors was designed with 352 Kbits allocated for its branch predictor. While we have been seeing improvements in prediction accuracy over the years, no research has gone into finding exactly what elements of the branch predictor design are used as leverage to generate the increased performance and finally: what has yet to be used for leverage. The immediate goal of this study is to show how different predictors leverage different features of a program’s execution to achieve better prediction rates. Further, we will describe how these features can be used to classify branches and benchmarks according to their behavior with varying styles and sizes of branch predictors. The ultimate goal of the research is to create a standard in branch prediction research providing a new method to present the data collected as well as show relevance of using new statistics beyond a simple miss rate to analyze individual branch predictors. Other studies, comparing different branch predictors, have been published[6][8][7]. In his 1The EV8’s wide-issue deeply pipelined design is used here as an example of modern processor trends. 1 paper[6], J. E. Smith compares the prediction rate of early branch prediction schemes from “predict taken” to the bimodal branch predictor. The research done for this paper begins with the bimodal predictor and will conclude with a review of modern complex branch predictors. Lee and Smith published a similar paper[8] where different Branch Target Buffer designs along with prediction schemes are compared for an IBM architecture. Like our paper and many others, Lee and Smith subdivided their benchmarks into categories. Unlike our research, these categories are created by the type of application the benchmark falls under, whereas