Low-temperature tunable radio-frequency resonator for sensitive dispersive readout of nanoelectronic devices David J. Ibberson,1, 2, a) Lisa A. Ibberson,2 Geoff Smithson,3 James A. Haigh,2 Sylvain Barraud,4 and M. Fernando Gonzalez-Zalba2, b) 1)Quantum Engineering Technology Labs, University of Bristol, Tyndall Avenue, Bristol BS8 1FD, UK 2)Hitachi Cambridge Laboratory, J.J. Thomson Avenue, Cambridge CB3 0HE, UK 3)Cambridge Consultants Ltd., Cambridge Science Park, Milton Road, Cambridge CB4 0DW, UK 4)CEA/LETI-MINATEC, CEA-Grenoble, 38000 Grenoble, France S1. CIRCUIT SCHEMATIC TABLE SI. Specification of the components used in the tun- able matching circuit. The full circuit schematic of the resonator used in the measurements reported in the main paper is shown in Label in Fig. S1 Specification Fig. S1. The component specifications are detailed in R3 1 kΩ 0603 thin film resistor, Table SI. TE-Connectivity The circuit is required to perform three functions: RP73D1J1K0BTDG match the NWFET impedance to the dilution refrig- R1, R2, R4, R8 10 kΩ 0603 thin film resistor, erator RF system, enable biases to be applied to the TE-Connectivity RP73D1J10KBTDG NWFET, and enable voltage control of the varicap diodes. The varicap diodes allow electronic tuning of R5, R6, R7 100 kΩ 0603 thin film resistor, TE-Connectivity both the resonant frequency of the circuit, and the RP73D1J100KBTDG impedance mismatch between the circuit and the refrig- C6 1 pF 0603 NPO COG erator RF system. capacitor, KEMET The source and drain bias for the NWFET are applied CBR06C109BAGAC via two DC lines containing a combination of series re- C1, C4, C8, C9, C11 100 pF 0603 NPO COG sistors (R1 and R2) and shunt capacitors (C1, C2 and capacitor, Murata C3, C4) that provide low-pass filtering. These attenuate GRM1885C1H101JA01 noise pickup and provide static protection for the device. C7 1 nF 0603 NPO COG The RC time constant of both lines is 1 ms. The capaci- capacitor, Murata tors C1 and C4 ensure that we have an RF short circuit GRM1885C1H102JA01 on the source and drain of the NWFET. The bias for C2, C3, C5, C10 10 nF 0603 NPO COG capacitor, KEMET VD VTG Vm C0603C103J3GACTU L1 270 nH ±5% 0805 TDK B82498F3271J001 inductor L2 560 nH ±5% 0805 TDK B82498F3561J001 inductor VD1 MA46H200 MACOM varicap diode VD2, VD3 MA46H204 MACOM varicap diode the top-gate of the NWFET is applied through a much VS Vt smaller RC time constant of 1 µs (R3, C7) which enables modulation of the top-gate voltage up to ≈ 30 kHz with- FIG. S1. Full schematic of the circuit. `NWFET' refers to out significant attenuation. Resistor R4 is included to the silicon nanowire field effect transistor measured. prevent the bias line and associated filtering from load- ing the RF signal. Additional DC lines provide the varicap biases through series resistors (R6 and R7) and shunt capacitors (C5 and a)[email protected] C10) so that each line has an RC time constant of 1 ms b)[email protected] to attenuate noise pickup. Additional series resistors are S2 used to isolate the RF circuitry and associated filtering Z0 from the varicap bias lines. Resistor R8 provides iso- L lation for VD2 and VD3 and R5 provides isolation for VD1. The isolating resistors (R4, R5, R8) must be suf- C C m ficiently large to minimize loading of the RF circuitry tot (which would result in the attenuation of the RF signal Rd Cd Cp Ct and hence reduced sensitivity) but small enough to mini- mize the voltage drop across them due to gate current or varicap reverse leakage current, and to minimize Johnson noise. FIG. S2. Schematic of the simplified circuit used to model the resonator and device. Note Z0 denotes the impedance of In addition to the requirements outlined above, it is the external line. also necessary to ensure that there is sufficient isolation between the top-gate modulation waveform, applied dur- ing the sensitivity measurements discussed in the main S2. SIMPLIFIED MODEL OF THE RESONATOR paper, and the varicaps. This isolation is important to CIRCUIT - DERIVATION OF SENSITIVITY ensure that the sidebands measured in the frequency do- main result from single electron tunneling events rather The circuit model used to obtain Eqs. 1 and 2, and the than from modulation of the varicap biases. Also, the fit in Fig. 4(b) in the main paper, is shown in Fig. S2. At isolation circuitry must not attenuate the top-gate mod- the frequencies used in the manuscript, the complexity of ulation signal amplitude. Isolation between the top-gate the circuit can be reduced down to the pi-match design modulating signal and the two parallel varicaps is pro- formed by the inductor, L, and the variable capacitances vided by the reactive potential divider C8 and L2, which Ctot and Cm. We model the device by a variable capac- has low loss at RF frequencies and high attenuation at itor Cd in parallel with a resistance. Cd corresponds to the top-gate modulating frequency ∼100 Hz. The high 1 the tunneling capacitance . Rd represents the dielectric impedance of C8 at the frequency used to modulate the losses in the device gate oxide and buried oxide, plus the top-gate ensures that the shunt inductor L2 does not at- dielectric losses in the PCB and the tuning varicap Ct. tenuate the top-gate waveform amplitude. We select the Finally, Cp is the combined parasitic capacitance of the value of L2 to be self-resonant at the RF frequency to device and PCB. The three parallel capacitances can be ensure negligible loss of RF signal. Similarly, isolation lumped together as Ctot = Ct + Cp + Cd. We name the between the top-gate modulating signal and the single total impedance of the circuit Z. varicap diode is provided by a reactive potential divider We calculate the resonant frequency of the circuit and formed by C6, R5, C5, R6. The high impedance of C6 at 2 find that for Rd aL=Ctot, where a = Cm=Ctot, the the top-gate modulating frequency prevents the attenu- system resonates at ation of the top-gate waveform. r 1 The circuit is fabricated on low-loss Rogers RO4003C !0 ≈ : (S1) LCtot material which has a low dielectric constant (r = 3:55, tan δ = 0:0021). The transmission lines are implemented The equivalent impedance at the resonance, Zeq = in microstrip. The RF system of the dilution refrigerator Z(!0), is has a characteristic impedance of 50 Ω and the circuitry on the low impedance side of the inductor L1 is imple- C2 LR Z = tot d ; (S2) mented with 50 Ω tracks. The high impedance side of eq C2 L − 2C C L + C2 (L + C R2) the inductor L1 has a characteristic impedance that is m m tot tot tot d significantly greater than 50 Ω, so the tracking here is 2 CtotLRd which, in the case Cm Ctot, simplifies to 2 3 2 . focused on the minimization of parasitic capacitance by CmL+CtotRd using the minimum track width possible. Regarding sensitivity to capacitance changes, we con- sider the figure of merit j∆Γj which corresponds to the absolute change in the reflection coefficient Γ with a given Thin film resistors and NPO COG capacitors have change in device capacitance ∆Cd, been found to perform well at low temperatures. The two inductors were required to be physically small in order to be compatible with a range of dilution refrig- @Γ j∆Γj = ∆Cd : (S3) erators. High-Q 0805 chip inductors are a compromise @Cd between performance and size; potentially a sensitivity improvement could be achieved by using a larger air core The signal-to-noise voltage ratio (SNR) is directly pro- inductor in location L1. portional to this figure of merit S3 104 103 102 101 10-1 100 101 102 ∗ FIG. S3. Position in β of the maximum j∆Γj, β , as the FIG. S4. Voltage drop at the device as Vt is varied for 250 mK circuit losses Rd and matching varicap capacitance Cm are and 1.1 K. The dashed vertical lines intersecting each set of ∗ varied. We observe that as either Rd or Cm are increased, β points indicate the bias voltage corresponding to impedance ∗ also increases. Given a value for β , there are a range of Rd matching. Vm = 0 V for all data points except one starred and Cm combinations that can produce this value. Data are point at 1.1 K for which Vm = 15 V. calculated by performing a numerical analysis of the simplified circuit model shown in Fig. S2. S3. VOLTAGE DROP AT THE DEVICE GATE In this section we explain the dependence of j∆Γj on the voltage drop at the device gate, vdrop. For a total p 2 SNR = j∆Γj × Pc=PN; (S4) applied power, Pc = v0 =2Z0 where v0 is the RF voltage at the input of the resonator, a fraction of the power, 2 where Pc corresponds to the power applied to the res- K = 1 − jΓj , is dissipated in Rd, such that onator and PN to the noise power of the measurement. 2 2 We calculate j∆Γj for the case Rd a L=Ctot and obtain v2 v2 K 0 = drop : (S7) 2Z 2R r 0 d 2ZeqZ0 Ctot ∆Cd j∆Γj ≈ Rd : (S5) Hence, the voltage drop at the device is directly pro- (Z + Z )2 L C eq 0 tot portional to the applied voltage, given by p Here, Rd Ctot=L corresponds to the internal qual- ity factor of the resonator, Q0. Eq.