Magnetoresistive Random Access Memory Michael C. Gaidis IBM T.J. Watson Research Center Abstract Magnetoresistive Random Access Memory (MRAM) offers the potential of a universal memory – it can be simultaneously fast, nonvolatile, dense, and high-endurance. MRAM differs from earlier incarnations of magnetic memory in that MRAM tightly couples electronic readout with magnetic storage in a compact device structure competitive with state-of-the-art semiconductor memories. Small-scale demonstrations have realized much of the potential of MRAM, but shrinking the cell size or embedding the memory with logic circuitry creates difficult challenges. This chapter provides an overview of the basic MRAM magnetic structure, including an explanation of the functions of various elements in the complex multilayer magnetic film stack. Principles of MRAM circuit design and operation are covered, with a detailed look at the design of a single-bit cell. Also included is a discussion of the techniques developed to fabricate large arrays of MRAM devices with high yield. MRAM reliability issues and the potential for scaling MRAM for future device generations concludes the chapter. Contents 1. Magnetoresistive Random Access Memory (MRAM) 2. Basic MRAM 3. MTJ MRAM 3.1 Antiferromagnet 3.2 Reference Layer 3.3 Tunnel Barrier 3.4 Free Layer 3.5 Substrate 3.6 Seed Layer 3.7 Cap Layer 3.8 Hard Mask 4. MRAM Cell Structure and Circuit Design 4.1 Writing the Bits Toggle MRAM 4.2 Reading the Bits 4.3 MRAM Processing Technology and Integration Process Steps 5. MRAM Reliability 5.1 Electromigration 5.2 Tunnel Barrier Dielectrics 5.3 BEOL Thermal Budget 5.4 Film Adhesion 6. The Future of MRAM 7. Acknowledgements Page 1 of 27 1. Magnetoresistive Random Access Memory (MRAM) Through the merging of magnetics (spin) and electronics, the burgeoning field of “spintronics” has created MRAM memory with characteristics of non-volatility, high density, high endurance, radiation hardness, high speed operation, and inexpensive CMOS integration. MRAM is unique in combining all the above qualities, but is not necessarily the best memory technology for any single characteristic. For example, SRAM is faster, flash is more dense, and DRAM is less expensive. Stand-alone memories are generally valued for one particular characteristic: speed, density, or economy. MRAM therefore faces difficult odds in competing against the aforementioned memories in a stand-alone application. However, embedded memory for application- specific integrated circuits or microprocessor caching often demands flexibility over narrow performance optimization. This is where MRAM excels. It can be called the “handyman of memories” for its ability to flexibly perform a variety of tasks for a relatively low cost.[1] While one may hire a specialist to rewire an entire house’s electrical circuitry or install entirely new plumbing, a handyman with a flexible toolbox is a much more reasonable option for repairing a single electrical outlet or leaky sink. And, the handyman may be able to repair a defective electrical circuit discovered while in the process of repairing leaky plumbing. A semiconductor fabrication facility that has MRAM in its toolbox is more likely to tailor circuit designs to a customer’s individual needs for optimal performance at reasonable cost. Table 1 shows how the characteristics of MRAM compare to other embedded memory technologies at the relatively conservative 180nm node. The remainder of the present chapter will review the state of the art in MRAM technology: how it works, how its memory circuits are designed, how it is fabricated, potential pitfalls, and an outlook for future use of MRAM as devices scale smaller. eSRAM eDRAM eFlash eMRAM Size Cell Area ( µm2) 3.7 0.6 0.5 1.2 Size Array Effic. 65% 40% 30% 40% Cost Add’l Process 0 20% (4 msk) 25% (8 msk) 20% (3 msk) Speed Read Access 3.3 nsec 13 nsec 13 nsec 15 nsec Speed Write Cycle 3.4 nsec 20 nsec 5000 nsec 15 nsec Power Data Retention 400 µA 5000 µA 0 0 Power Active Read 15 pC/b 5.4 pC/b 28 pC/b 6.3 pC/b Power Active Write 15 pC/b 5.4 pC/b 31,000 pC/b 44 pC/b Endur. Write Unlimited Unlimited 1e5 cycles Unlimited Rad Hard Average Poor Average Excellent Table 1: Embedded memory comparison at the 180nm node. Shaded cells indicate where MRAM has a distinct advantage. Relative comparisons should hold through scaling to the 65nm node.[2] Page 2 of 27 2. Basic MRAM MRAM (magnetoresistive RAM) differs from earlier incarnations of magnetic memory (magnetic RAM) in that MRAM tightly couples electronic readout with magnetic storage in a compact device structure. In the early second half of the 20 th century, the most widely used RAM was a type of magnetic RAM called ferrite core memory. These memories utilized tiny ferrite rings threaded by multiple wires used to generate fields to write or to sense the switching of the magnetic polarity in the rings.[3] Highly valued for its speed, reliability, and radiation hardness, approximately 400kB of this core memory was used in early IBM model AP-101B computers on the space shuttle. With the advent of compact, reliable, and inexpensive semiconductor memory, the 1mm 2 cell size of the core memory could no longer compete – and, in 1990, the space shuttle converted to battery-backed semiconductor memory with around 1MB capacity.[4] For magnetic memory to compete again in the RAM arena, miniaturization on the scale of semiconductor integrated circuitry had to be implemented. This was stimulated by the discovery in 1988 of giant magnetoresistance (GMR) structures which provided an elegant means of coupling a magnetic storage (spin) state with an electronic readout, and created the field of spintronics.[5] It relies on the phenomenon wherein electrons in certain ferromagnetic materials will align their spins with the magnetization in the ferromagnet. In essence, this is a result of a greater electron density of states at the Fermi level for electrons with spin aligned parallel to the magnetization in the ferromagnet. While passing current along two ferromagnetic films in close proximity, one can influence the transport of the electrons by adjusting the relative orientation of the two films’ magnetization. As illustrated in Figure 1, for parallel orientation, electrons are less likely to suffer resistive spin-flip scattering events, but for antiparallel orientation, electrons will exhibit a stronger preference for scattering and thus an increase in resistance will be apparent. The different resistance values for the high resistance state (R high ) and the low resistance state (R low ) can be used to define a magnetoresistance ratio (MR) as in equation 1: ( − ) Rhigh Rlow MR = . (1) Rlow MR values for GMR devices are in the 5 – 10% range for room temperature operation. Figure 1: Illustration of the GMR principle. For parallel alignment (a), electron flow is subject to fewer resistive spin-flip scattering events than for antiparallel alignment (b). Page 3 of 27 By choosing different coercive fields for the two ferromagnets, one can create a so-called spin-valve MRAM structure with configuration similar to that shown in Figure 1. For example, ferromagnet 1 can be chosen to have a high coercivity, thus fixing its magnetization in a certain direction. Ferromagnet 2 can be chosen with a lower coercivity, allowing its magnetization direction to fluctuate. For a magnetic field sensor such as used in disk drive read heads, small changes in the magnetization angle of ferromagnet 2 induced by an external magnetic field can be sensed as changes in resistance of the spin valve. Because the spin-valve sensitivity to external fields can be substantially better than inductive pickup, such devices have enabled dramatic shrinkage of the bit size in modern hard drives. An alternative use for the spin-valve structure is found if one designs it to utilize just two well-defined magnetization states of ferromagnet 2 (e.g., parallel or antiparallel to ferromagnet 1). Such spin-valve designs serve as a binary memory device, and have found application in rad-hard nonvolatile memories as large as 1Mb.[6] Drawbacks of this type of memory are • relatively low magnetoresistance, providing only low signal amplitudes and thus longer read times, • low device resistance, making for difficult integration with resistive CMOS transistor channels, • in-plane device formation which is more difficult to scale to small dimensions than devices formed perpendicular to the plane. Solutions to these problems can all be found in the magnetic tunnel junction (MTJ) MRAM. The MTJ structure is similar to the GMR spin-valve in that it uses the property of electron spins aligning with the magnetic moment inside a ferromagnet. Instead of passing current in-plane through a normal metal between ferromagnets, however, the MTJ passes current perpendicular to the plane, through an insulating barrier separating two ferromagnets. Figure 2 shows an MTJ structure in its simplest form where one can envision the electric current impinging first on a ferromagnet which acts as a spin polarizer, then passing through the tunnel barrier and into a second ferromagnet which acts as a spin filter. The separation of polarizing and filtering functions is enabled by the physical thickness of the tunnel barrier, noting that the tunneling process preserves electron spin. The tunneling conductance will be proportional to the product of electron densities of states on each side of the barrier, and in general for ferromagnets there will be a larger density of states near the Fermi level for electrons polarized parallel to the magnetization of the ferromagnet as opposed to electrons polarized antiparallel to the magnetization of the ferromagnet. For polarizer and filter magnetizations aligned in the same direction, the density of states for spin-polarized electrons is large on both sides of the barrier, and the conductance of the structure is relatively high.