THAT Corporation InGeniusâ High-CMRR Balanced Input Line Receiver THAT 1200, 1203, 1206 FEATURES APPLICATIONS · High common-mode rejection · Balanced input stages (typical 90 dB at 60 Hz) maintained under real-world conditions · Summing amplifiers · Excellent solution for hum and · Transformer front-end groundloop suppression replacements · Transformer-like noise rejection in · ADC front-ends an 8-pin IC, at fraction of transformer cost and size Description The THAT 1200 series of InGenius balanced Developed by Bill Whitlock of Jensen Trans- line receivers are designed to overcome a serious formers, the patented InGenius input stage uses a limitation of conventional balanced input stages unique bootstrap circuit to raise its common- — notoriously poor common mode rejection in mode input impedance into the megohm range, real world applications. While conventional input but without the noise penalty that comes from stages may exhibit good rejection characteristics high-valued resistors. InGenius line receivers in the lab and on paper, they perform poorly maintain their high CMRR over a wide range of when fed from even slightly unbalanced source source impedance imbalances — even when fed impedances — a common situation in almost any from single-ended sources. pro sound environment. Pin Name DIP Pin SO Pin Ref 1 3 OA1 R1 R2 In- 2 4 IN- +1 Vcc In+ 3 5 Ra Rc Vee OA4 OA3 Vee 4 6 CM In 5 11 +1 - Vout + Vout 6 12 Rb OA2 Rd Vcc 7 13 R3 R4 CM Out 8 14 IN+ +1 R5 REF Table 1. 1200-series pin assignments CM IN CM OUT Gain Plastic DIP Plastic SO 0 dB 1200P 1200S Cb -3 dB 1203P 1203S -6 dB 1206P 1206S Figure 1. THAT1200-series equivalent circuit diagram Table 2. Ordering information Protected under U.S. Patent No. 5,568,561 and other patents pending. InGeniusâ is a trademark of THAT Corporation. THAT Corporation; 45 Sumner Street; Milford, Massachusetts 01757-1656; USA 600033 Rev 0A Tel: +1 (508) 478-9200; Fax: +1 (508) 478-0990; Web: www.thatcorp.com Page 2 InGenius Balanced Line Receiver Preliminary Information SPECIFICATIONS1 Absolute Maximum Ratings (TA = 25°C) Positive Supply Voltage (VCC) +18 V Power Dissipation (PD)(TA = 75°C) TBD mW Negative Supply Voltage (VEE) -18 V Operating Temperature Range (TOP) 0 to +70°C Positive Input Voltage (VIN+) +18 V Storage Temperature Range (TST) -40 to +125°C Negative Input Voltage (VIN-) -18 V Junction Temperature (TJ) 150°C Output Short-Circuit Duration (tSH) Continuous Lead Temperature (Soldering 60 seconds) TBD °C Recommended Operating Conditions Parameter Symbol Conditions Min Typ Max Units Positive Supply Voltage VCC +3 +18 V Negative Supply Voltage VEE -3 -18 V Electrical Characteristics2 Parameter Symbol Conditions Min Typ Max Units Supply Current ICC No signal — 4.7 8.0 mA Input Bias Current IB No signal; Either input — 700 1,400 nA connected to GND Input Offset Current IB-OFF No signal — — ±140 nA Input Offset Voltage VOFF No signal — — 10 mV Input Voltage Range VIN-CM Common mode ±12.5 ±13.0 — V VIN-DIFF Differential (equal and opposite swing) THAT 1200 21.0 21.5 — dBu THAT 1203 24.0 24.5 — dBu THAT 1206 24.0 24.5 — dBu W Input Impedance ZIN-DIFF Differential 48.0 k ZIN-CM Common mode with bootstrap 60 Hz 10.0 MW 20 kHz 3.2 MW no bootstrap 60 Hz 36.0 kW 20 kHz 36.0 kW 1. All specifications are subject to change without notice. 2. Unless otherwise noted, TA=25°C, VCC = +15V, VEE = -15V 3. 0 dBu = 0.775Vrms. THAT Corporation; 45 Sumner Street; Milford, Massachusetts 01757-1656; USA Tel: +1 (508) 478-9200; Fax: +1 (508) 478-0990; Web: www.thatcorp.com 600033 Rev 0A Page 3 Preliminary Information Electrical Characteristics (Cont’d) Parameter Symbol Conditions Min Typ Max Units Common Mode Rejection CMR1 Matched source impedances; VCM = ±10V DC 70 90 — dB 60 Hz 70 90 — dB 20 kHz — 85 — dB W 4 Common Mode Rejection CMR2 600 unmatched source impedances ;VCM = ±10V 60 Hz — 70 — dB 20 kHz — 65 — dB 5 Power Supply Rejection PSR At 60 Hz, with VCC =-VEE THAT1200 — 82 — dB THAT1203 — 80 — dB THAT1206 — 80 — dB 6 Power Supply Rejection PSRCM At CM output, at 60 Hz — 63 — dB Total Harmonic Distortion THD VIN-DIFF =10dBV;BW=20kHz;f=1kHz RL =2 kW — 0.0005 — % Output Noise en(OUT) BW=20kHz THAT1200 — -106 — dBu THAT1203 — -105 — dBu THAT1206 — -107 — dBu Output Noise enCM(OUT) At CM output — -106 — dBu W Slew Rate SR RL =10k ;CL = 300 pF 7* 12 — V/µs Slew Rate SRCM With CM input signal 12.5* 21 — V/µs W RLcm =10k ;CLcm =50pF W Small Signal Bandwidth BW-3dB RL =10k ;CL =10pF THAT1200 — 22 — MHz THAT1203 — 27 — MHz THAT1206 — 34 — MHz W RL =2k ;CL = 300 pF THAT1200 — 17 — MHz THAT1203 — 18 — MHz THAT1206 — 20 — MHz W Small Signal Bandwidth BWCM-3dB At CM output; RLcm =10k CLcm = 10 pF — 20 — MHz CLcm = 50 pF — 18 — MHz W Output Gain Error GER(OUT) f = 1 kHz; RL =2k — 0 ±0.05 dB Output Voltage Swing VO At max differential input THAT1200 21 21.5 — dBu THAT1203 21 21.5 — dBu THAT1206 18 18.5 — dBu 4. See test circuit in Figure 2. 5. Defined with respect to the differential gain. 6. Defined with respect to the common mode gain between any input and common mode output. * Guaranteed by design THAT Corporation; 45 Sumner Street; Milford, Massachusetts 01757-1656; USA Tel: +1 (508) 478-9200; Fax: +1 (508) 478-0990; Web: www.thatcorp.com Page 4 InGenius Balanced Line Receiver Preliminary Information Electrical Characteristics (Cont’d) Parameter Symbol Conditions Min Typ Max Units W Output Short Circuit Current ISC RL =RLcm =0 — ±25 — mA ICMSC At CM output — ±10 — mA W Minimum Resistive Load RLmin 2—— k W RLCMmin At CM output 10 — — k Maximum Capacitive Load CLmax — — 300 pF CLCMmax At CM output — — 50 pF Cb R5 CM Out 100R 100u C1 Gnd In- R3 56p 600R Vcc C4 In+ 8 2 In- 7 100n CMout 5 Vcc R6 Main Out CMin Out Ref 6 100R 3 Vee Gnd R1 R2 R4 200k In+ 1 200k 4 U1 2k THAT120x C3 C2 300p 100n Ext. DC Source Vee Gnd Figure 2. THAT1200-series test circuit Applications RFI Protection the low end of the audio spectrum. Its voltage rating is dependent on the topology of the surrounding cir- Figure 3 shows the THAT 1200 configured with cuitry, as described in the following paragraphs. robust RFI input protection. In applications where RFI rejection is of less concern, the circuit shown Fig- AC signals presented to the input stage cause the ure 4 provides a less aggressive approach. two ends of capacitor Cb to swing in tandem so that virtually no voltage appears across the capacitor. Bootstrap coupling capacitor Consequently, capacitors with small DC working volt- Referring to Figure 3, electrolytic capacitor Cb ages may be used when the previous stage is AC cou- provides the feedback path for the boostrap circuit. pled to the input of the THAT 1200. The capacitor value is chosen to be high enough to present a sufficiently small impedance to signals at THAT Corporation; 45 Sumner Street; Milford, Massachusetts 01757-1656; USA Tel: +1 (508) 478-9200; Fax: +1 (508) 478-0990; Web: www.thatcorp.com 600033 Rev 0A Page 5 Preliminary Information Cb Vcc 220uF J1 + 2 1 XLR-F D1 3 12V (see text) Vcc D3 D4 5 42 3 1 R1 2 8 IN- 100R 7 U1 C2 CM 470pF OUT VCC OUT R3 5 6 CM OUT IN 4k7 VEE C3 C4 REF R2 470pF 100pF 3 IN+ 4 100R 1 D5 D6 D2 Vee 12V Vee optional RFI protection Figure 3. THAT1200P typical application circuit If, however, there is the possibility of a DC voltage capacitor’s voltage rating so that it is capable of han- appearing across the inputs of the line receiver, a dling the expected level of DC voltage. If the polarity portion of that voltage will appear directly across the of the DC voltage is unknown, or may swing to either terminals of capacitor Cb. In that case, choose the polarity, the use of a non-polarized electolytic is highly recommended. Vcc Cb J1 + 2 1 XLR-F D1 3 12V 220uF Vcc D3 D4 542 3 1 2 8 IN- 7 U1 CM OUT VCC OUT 5 CM 6 C1 100pF NPO IN OUT VEE C2 100pF NPO REF 3 IN+ 4 1 D5 D6 D2 Vee 12V Vee Figure 4. THAT1200P showing simplified RFI protection scheme THAT Corporation; 45 Sumner Street; Milford, Massachusetts 01757-1656; USA Tel: +1 (508) 478-9200; Fax: +1 (508) 478-0990; Web: www.thatcorp.com Page 6 InGenius Balanced Line Receiver Preliminary Information THAT1206 Vcc THAT1206 or THAT1246 Vcc THAT1246 Gnd CM Out + Ref CM out or N/C + Ref N/C Cb Gnd Cb In- Vcc Vcc In- Vcc In- In- In+ Connect Vout Connect In+ Vout Vout for In+ for In+ Vee CM in THAT1246 Vee CM in or Sense THAT1246 Vee Sense Vee Vee Figure 5. Dual PCB layout for THAT 1206 and THAT 1246 Figure 6. Dual PCB layout for THAT 1206 and THAT 1246 DIP version Surface mount versions tionally, proper ESD handling precautions must be Dual Layout Option observed until the IC is properly affixed to the PCB. The THAT 1246 is a conventional balanced line-receiver that is pin-for-pin compatible with the Vcc Analog Devices SSM2143 and Burr-Brown INA137. Though the THAT 1200 series is not pin-compatible R with the THAT 1246, the PCB layouts shown in Fig- IN+ ures 5 and 6 provide manufacturers with the option R' to stuff a PCB with any of these input stages.