1 Network Processors: Challenges and Trends Mahmood Ahmadi and Stephan Wong Computer Engineering Laboratory Electrical Engineering, Mathematics and Computer Science Department Delft University of Technology Mekelweg 4, 2628 CD, Delft, The Netherlands Tel: +31 15 27 85021, Fax: +31-15-27-84898 {mahmadi, stephan}@ce.et.tudelft.nl Abstract— The aim of this paper is to provide a survey of net- recent and possible future developments in the field. work processors (NPs), which are a new type of special micropro- cessors intended for networking equipment, mainly switches and This paper is organized as follows. Section II gives routers. We will describe many aspects in the network processor a description of what constitute a network processor area. First, we introduce network processors together with their and present the requirements that such a processor functionalities and requirements. Subsequently, we describe the ba- sic definitions and concepts involved in the network processing area. must meet. Furthermore, several design approaches Second, we describe the architectural specification and implementa- will be highlighted followed by a survey of existing tion of NPs and present comparison between different commercial network processors. Section III presents the software NPs. Third, we describe network processors software tools includ- tools used in the design of network processors that ing network processor simulators, benchmarks, and other related tools. Fourth, we highlight several challenges and trends in net- include benchmarks and simulators. Section IV de- work processing area. scribes possible future challenges and trends in the Keywords: Network processor, network processor sim- field of network processing. Section V presents the ulator, benchmark, grid computing conclusions of this paper. I. Introduction II. Network processors The bandwidth growth of networks increased al- In this section, we first present a short description most exponentially in the past couple of years and of what constitute a network processor. Subsequently, is expected to continue to do so for years to come. we present the general, functional, and implementa- This has been fueled by emerging new technologies tion requirements of such processors. Finally, several that are capable of achieving higher bandwidths. Con- design approaches are highlighted and several commer- sequently, new applications are being developed that cial architectures are presented. take advantage of the new capabilities. In turn, move consumers are starting to use these applications A. Description and thereby increasing the demand for higher band- A network processor is an application-specific in- width. The technological advances must also be ac- struction processor (ASIP) for the networking applica- companied by improved network processing capabili- tion domain with architectural features and/or special ties within routers and switches that connect the net- circuitry for packet processing at wire speed [1][2][3]. works. Therefore, network processors have been in- The network processor differs from traditional micro- corporated within these devices to cope with the con- processors in three ways: tinued increasing demand for higher performance. In addition, the multitude of applications and services • The instruction set of many network processors is that require support lead to the introduction of many based on existing RISC processor instruction sets. different protocols that govern the transmission, for- • The network processor’s instruction set contain spe- warding, and communication of data (in the form of cial instructions intended for, e.g., bit manipulation, packets). Therefore, improved flexibility is needed to CRC calculation, and search and lookup operations. cope with the many existing and future protocols. • Special hardware function blocks are present to ac- celerate specific packet processing tasks. Consequently, the design of network processors remains an ongoing research and development effort. Besides a functional description of a network processor The aim of this paper is to present the recent state-of- (given by its instruction set architecture), it is equally the-art of network processors (requirements, software important to understand at what levels of the network tools, existing architectures) and to discuss the future (similar to a protocol stack) the network processor can challenges and trends that we are facing in this field. be utilized: depicted in Figure 1. By no means we intend to be complete as the field in • The core level includes high-speed components to still in movement, but we intend to describe the main carry and transfer large amounts of data. The nodes 2 protocols, and advanced features without becoming a Access performance bottleneck. • Flexibility and programmability: Having software as Edge a major part of the system allows network equipment to easily adapt to changing standards and applications. Core The network processor should be easily programmable in order to support customization of feature sets and the rapid integration of new and existing technolo- Fig. 1. Simple model of operational levels in network processor. gies. In order to meet this demand, network proces- sor manufacturers must strive to supply programming and testing tools that are as simple as possible to use. linking up to form the core implement rudimentary These programming tools should be based on a simple services as routing, tag-switching, and access control. programming language that allows for reuse of code • The edge level of the network forms the ingress and wherever possible. In addition, programming tools egress to the core. Services at the edge are complex must provide extensive testing capabilities that pro- and run at medium to high speeds, services at this vide intelligent debugging features, such as descriptive point include routing, switching, net-flow, access con- codes and definitions, as well as code level statistics for trol, and QoS features. optimization. Testing tools must be able to simulate • The access level of the network covers all the delivery real world conditions and provide accurate measure- points of the Internet. The end-user accesses the Inter- ments of throughput and other performance measure- net through campus networks, broadband connections ments [4]. and dial-up lines. At this level, there are several dif- • Fast time to market (TTM): Time to market has be- ferent protocols and technologies inter-operating with come a critical factor in achieving success with network one another at relatively low speeds. equipment, it is the time required for system vendor Finally, a network processor can be utilized in two to bring a product from demand to commercial avail- different planes that that differ in the speed and man- ability and has known as a factor that determined the ner they handle incoming packets; namely data plane success or failure of the product in the market [1]. and control plane. • Serviceability: Users are demanding services such as real-time video, secure private networks and voice over In the data plane simple tasks are performed, and IP, these will require lot of serviceability at the access most packets follow the fast path through the NP that and edge network elements [5]. required very little processing. In the control plane exceptional packets and complex routines are handled. In this plane some packets we sent over to follow slow C. Functional requirements path [3]. This structure is depicted in Figure 2. Typical functions performed by network proces- sors are summarized below: Low Speed Control Plane • Lookup and pattern matching: This function com- pares packet header fields with specific patterns to classify the type of packets, for example perform a table lookup to return the relevant table entry or de- High Speed Data Plane termining type of incoming packets are an IPv4 or an IPv6 packet. • Forwarding: This function is defined as determin- Physical Interface ing the output path for incoming packets. It is im- plemented using hardware prefix tree structure and Fig. 2. Packet processing model in network processor special hardware [5]. • Access control and queue management: Once pack- ets have been identified, they are placed in appropriate B. General requirements queues for further processing. Packets are also checked against security access policy rules to see if they should In this section, we describe the general require- be forwarded or discarded. ments of network processor. • Traffic shaping and control: Some protocols or ap- • Performance: By executing key computational ker- plications require that, as traffic is released to the out- nels in hardware, NPs are able to perform many ap- going wire or fiber, it is shaped to ensure that it meets plications at wire speed. Network processors must be delay or delay variation requirements. Other require- able to support high bandwidth connections, multiple ments specify the priority of traffic between different 3 channels or message types [2]. in memory references and processing engines, i.e, if • Data Manipulation: This is where the packet is mod- a thread waits for the memory it is stalled and then ified in some way, this could be decrementing the Time another thread is started. To Live (TTL) field in a IP packet, recalculating the • NP memory architecture: A critical resource in NPs CRC check, performing packet segmentation and re- is the memory architecture. There are three types assembly and encryption or decryption of packets. of memories in NPs including: instruction memory,