♣ IsLab 9&|hrÛ¼7% ½¨´z Ä» © @/ Analog Integrated Circuit Design OSC-41 ' $ Oversampling Converters _ × õ Áþ ÉÙ «כ <¦ Kyungpook National University & Integrated Systems Lab, Kyungpook National University % ♣ IsLab 9&|hrÛ¼7% ½¨´z Ä» © @/ Analog Integrated Circuit Design OSC-1 ' $ Oversampling Converters ❏ Recently popular for high-resolution medium-to-low-speed applications such as high-quality digital audio. ❏ Reduced requirements on the analog circuitry at the expense of more complicated high-speed digital circuitry. ❏ Only a first-order antialiasing filter is required for A/D converters. ❏ A S/H is usually not required at the input of an oversampling A/D converter with a SC modulator. ❏ Extra resolution by sampling much faster than the Nyquist rate. ❏ Extra resolution in lower oversampling rates by spectrally shaping the quantization noise (∆Σ modulation). & Integrated Systems Lab, Kyungpook National University % ♣ IsLab 9&|hrÛ¼7% ½¨´z Ä» © @/ Analog Integrated Circuit Design OSC-2 ' Oversampling without Noise Shaping $ ❏ A linear model of quantizers. e(n) y x(n) y(n) x(n) Σ y(n) x ⇔ y(n)= x(n)+ e(n) ❏ Quantization noise (error) modeling: white noise approximation for very active x(n) a random number uniformly distributed between → V /2 (V ∆), normalized noise power of V 2 /12 S2df, ± LSB LSB ≡ LSB ≡ n root spectral density S (f)= V /√12f for f f /2 (two-sidedR n LSB s | |≤ s definition of noise power) or 0 f f (one-sided definition). ≤ ≤ s & Integrated Systems Lab, Kyungpook National University % ♣ IsLab 9&|hrÛ¼7% ½¨´z Ä» © @/ Analog Integrated Circuit Design OSC-3 ' Oversampling Advantage $ ❏ Oversampling ratio: Nyquist rate = 2f , OSR f /2f . 0 ≡ s 0 ❏ Maximum SNR: ratio of maximum sinusoidal power to quantization N noise, signal amplitude = Vref /2 =∆2 /2. N 2 2 2N fs/2 2 ∆2 ∆ 2 2 2 1 ∆ Ps = = , Pn = Sn(f) H(f) df = 2√2 8 Z−fs/2 | | OSR 12 SNRmax = 10log(Ps/Pn)=6.02N+1.76 + 10log(OSR) ∴ SNR improvement 3 dB/octave 0.5 bit/octave ≃ ≃ 1.0 H(f) x(n) y (n) y(n) | | 1 H(f) f /2 f f f /2 − s − 0 0 s & Integrated Systems Lab, Kyungpook National University % ♣ IsLab 9&|hrÛ¼7% ½¨´z Ä» © @/ Analog Integrated Circuit Design OSC-4 '❏ If eight samples of a signal are averaged, this low-pass filtering results $ in the OSR being approximately equal to 8. ∴ SNR improvement = 10 log(8) = 9 dB ❏ For a 1-bit A/D converter with 6-dB SNR, what is fs required using oversampling to obtain a 96-dB SNR if f0 = 25 kHz? f 2(96−6)/3 2f 54, 000 GHz (33, 187 GHz) s ≃ × 0 ≃ ∴ Noise shaping is needed to improve the SNR more faster. ❏ Oversampling does not improve linearity. If a 16-bit ADC is designed using a 12-bit converter with oversampling, the 12-bit converter must have an integral nonlinearity error better than 16-bit accuracy (1/216 = 0.0015 %). 1-bit D/A converters with only two values which define a straight line have inherent linearity. realization of 16 to 20-bit → linear ADCs using noise shaping without trimming & Integrated Systems Lab, Kyungpook National University % ♣ IsLab 9&|hrÛ¼7% ½¨´z Ä» © @/ Analog Integrated Circuit Design OSC-5 ' Oversampling with Noise Shaping $ ❏ The system architecture of a ∆Σ oversampling A/D converter. ❏ Antialiasing filter: f f /2, a simple RC LPF for large OSR. c ≤ s ❏ Delta-sigma modulator: converts the analog signal into a noise-shaped low-resolution digital signal. For a SC ∆Σ modulator, a separate S/H is not required. ❏ Decimator: converts the oversampled low-resolution digital signal into a high-resolution digital signal at a lower sampling rate. Anti- Sample Digital Down xi(t) xc(t) xs(t) ∆Σ xd(n) xl(n) xo(n) aliasing and low-pass sampler fc fs mod fs fs 2f0 filter hold filter (OSR) Decimation filter Analog Digital & Integrated Systems Lab, Kyungpook National University % ♣ IsLab 9&|hrÛ¼7% ½¨´z Ä» © @/ Analog Integrated Circuit Design OSC-6 ' Noise-Shaped Delta-Sigma Modulator $ ❏ Transfer function of a delta-sigma modulator: For noise shaping, the magnitude of H(z) is large from 0 to f0, but that of N(z) is small. H(z)U(z) E(z) Y (z)= + S(z)U(z)+ N(z)E(z) 1+ H(z) 1+ H(z) ≡ delta u(n) x(n) y(n) Σ H(z) − sigma Quantizer e(n) u(n) x(n) y(n) Σ H(z) Σ Linear model − & Integrated Systems Lab, Kyungpook National University % ♣ IsLab 9&|hrÛ¼7% ½¨´z Ä» © @/ Analog Integrated Circuit Design OSC-7 ' First-Order Noise Shaping $ sT ❏ The z-transform and the Laplace transform: two-sided definitions (z ≡ e ) ∞ ∞ −n −st X(z) ≡ x(n)z , X(s) ≡ x(t)e dt Z n=X−∞ −∞ ❏ Unit delay H(z) = z−1: k = 1. ∞ ∞ −n −m −k −k x(n − k)z = x(m)z z = X(z)z n=X−∞ n=X−∞ ❏ The noise transfer function N(z) should have a zero (a pole of H(z)) at dc sT (z = e = 1) → high-pass filtering for noise. ❏ A discrete-time integrator: low-pass filter, accumulator. 1 z−1 H(z) = = ↔ y(n) = y(n − 1) + x(n − 1) z − 1 1 − z−1 & Integrated Systems Lab, Kyungpook National University % ♣ IsLab 9&|hrÛ¼7% ½¨´z Ä» © @/ Analog Integrated Circuit Design OSC-8 ' Time Domain View $ ❏ Since the integrator has infinite dc gain, the average value of u(n) y(n) equals zero. y(n)= u(n 1) + e(n) e(n 1) − − − − ❏ Example: x(0) = 0.1, 1.0 quantizer with threshold at zero. ± n u(n) x(n) y(n) e(n) x(n + 1) 0 1/3 0.1 1.0 0.9 −0.5667 1 1/3 −0.5667 −1.0 −0.4333 0.7667 2 1/3 0.7667 1.0 0.2333 0.1 x(n + 1) x(n) u(n) Σ Σ z−1 y(n) − Delay Quantizer & Integrated Systems Lab, Kyungpook National University % ♣ IsLab 9&|hrÛ¼7% ½¨´z Ä» © @/ Analog Integrated Circuit Design OSC-9 ' Frequency Domain View $ ❏ Signal and noise transfer functions: delay, differentiator (HPF). H(z) 1 S(z)= = z−1, N(z)= =1 z−1 1+ H(z) 1+ H(z) − ❏ Frequency response for noise: z = ejωT = ej2πf/fs . πf N(f)=1 e−j2πf/fs =2je−jπf/fs sin − fs ❏ Maximum SNR: sin(πf/f ) πf/f for f f . s ≃ s 0 ≪ s f0 2 2 3 2 2 ∆ π 1 Pn = Sn(f) N(f) df Z−f0 | | ≃ 36 OSR ∴ SNR =6.02N+1.76 5.17 + 30log(OSR) 1.5 bits/octave max − → & Integrated Systems Lab, Kyungpook National University % ♣ IsLab 9&|hrÛ¼7% ½¨´z Ä» © @/ Analog Integrated Circuit Design OSC-10 ' Realization of A First-Order ∆Σ Modulator $ ❏ First-order ∆Σ modulator and SC implementation. Quantizer u(n) Σ Σ z−1 + y(n) − − 1-bit D/A φ φ 1 C 2 C Comparator vi − + φ2 φ1 + vx vo − vd −VR VR Latch on φ2 falling 2 2 & Integrated Systems Lab, Kyungpook National University % ♣ IsLab 9&|hrÛ¼7% ½¨´z Ä» © @/ Analog Integrated Circuit Design OSC-11 ' Second-Order Noise Shaping $ ❏ Transfer function: linear quantizer model. U Y + Vz−1 = V, (V Y + W )z−1 = W − − Y (z)= W + E = z−1U(z)+(1 z−1)2E(z) − ∴ S(z)= z−1, N(z)=(1 z−1)2 − ❏ Second-order ∆Σ modulator. u(n) v w y(n) Σ Σ Σ Σ z−1 − − z 1 − Quantizer & Integrated Systems Lab, Kyungpook National University % ♣ IsLab 9&|hrÛ¼7% ½¨´z Ä» © @/ Analog Integrated Circuit Design OSC-12 ' $ ❏ Maximum SNR: z = ejωT = ej2πf/fs , sin(πf/f ) πf/f for f f . s ≃ s 0 ≪ s πf 2 ∆2π4 1 5 N(f) = 2 sin , Pn | | fs ≃ 60 OSR ∴ SNR =6.02N+1.76 12.9 + 50 log(OSR) 2.5 bits/octave max − → ❏ Noise transfer-function curves: Pn in the signal band (0 to f0). N(f) second order | | first order no noise shaping f 0 f0 fs/2 fs & Integrated Systems Lab, Kyungpook National University % ♣ IsLab 9&|hrÛ¼7% ½¨´z Ä» © @/ Analog Integrated Circuit Design OSC-13 ' $ Error-Feedback Structure ❏ Error-feedback structure of a general ∆Σ modulator. x(n) u(n) Σ y(n) − Σ e(n) G(z) 1 − ❏ Transfer function for a first-order modulator. Y (z)= U(z)+ G(z)E(z), S(z)=1, N(z)= G(z)=1 z−1 − & Integrated Systems Lab, Kyungpook National University % ♣ IsLab 9&|hrÛ¼7% ½¨´z Ä» © @/ Analog Integrated Circuit Design OSC-14 '❏ Mismatches of the analog subtracters significant noise-shaping $ → degradation. For example, if the subtraction becomes e = y 0.99x − rather than e = y x, then N(z)=1 0.99z−1, and the zero is − − moved off dc. The noise is not fully nulled at dc. Well suited to → → digital implementations where no coefficient mismatches occur. ❏ Error-feedback structure of a 2nd-order ∆Σ: G(z)=(1 z−1)2. − x(n) u(n) Σ y(n) − z−1 2 − Σ e(n) z−1 & Integrated Systems Lab, Kyungpook National University % ♣ IsLab 9&|hrÛ¼7% ½¨´z Ä» © @/ Analog Integrated Circuit Design OSC-15 ' $ System Architecture of Delta-Sigma ADCs ❏ System architecture for a typical ∆Σ oversampling ADC. Anti- Sample Digital Down xi(t) xc(t) xs(t) ∆Σ xd(n) xl(n) xo(n) aliasing and low-pass sampler fc fs mod fs fs 2f0 filter hold filter (OSR) Decimation filter Analog Digital ❏ Antialiasing filter having cutoff frequency f f /2, S/H having c ≤ s sin x/x response, 1-bit ∆Σ modulator having output levels of 1, ± digital LPF having cutoff frequency fc =2f0 (to remove out-of-band quantization noise), decimation process by resampling at 2f0.