Emerging Technologies and Moore’s Law: Prospects for the Future Mike Mayberry Director of Components Research VP, Technology and Manufacturing Group Intel Corporation March, 2010 Economics, Technology, & Innovation “No exponential is forever … but we can delay ‘forever’.” Technologies on Deck Opportunities for Future Products Visible Horizon and Beyond 2 Moore’s Law - 1965 “Reduced cost is one of the big attractions of integrated electronics, and the cost advantage continues to increase as the technology evolves toward the production of larger and larger circuit functions on a single semiconductor substrate.” Electronics, Volume 38, Number 8, April 19 , 1965 Integrated circuits = Parallel fabrication Parallel fabrication = Lower cost per function 3 Enabling Innovation and Cost Reductions 250nm 180nm 130nm 90nm 65nm 45nm 200mm 200mm 200mm 300mm 300mm 300mm Twice the Same circuitry circuitry in the Option to design half the space OR same space = for optimal (cost reduction) (architectural performance/cost innovation) Source: Intel 4 Key Economics: Scaling is Better under almos t all circums tances Revenues drive R&D y If you can scale then which enables you should further scaling Create compelling – Compelling products command products higher prices – Leading technology delivers lower costs Business – Enables necessary investment Affordable size in R&D R&D matters y If you can’t scale then hope your competitors can’t either Lower cost and Scaling gives lower better capability cost per function enables new and improved capability products Ability to make it work 5 Economics, Technology, & Innovation “No exponential is forever … but we can delay ‘forever’.” Technologies on Deck Opportunities for Future Products Visible Horizon and Beyond 6 “We’re limited by the wavelength of light” Resolved Rayleigh criteria Feature >> Unresolved Feature << Wavelength Wavelength Feature = 0.6 x Wavelength / numerical aperture Lithography Scaling Limitations From Broers [1] IEDM Plenary Session 1980 7 Breaking through the Wall 1000 New lens materials enabled shorter wavelengths Optical 365nm in mid 80s Wavelength 193nm immersi on (145nm eqv) tod ay New mask techniques enabled 100 smaller features nm Feature size π 0 EUV 13.5nm 10 Conventional Alternate 1980 1990 2000 2010 2020 Mask Structure Phase Shift 8 “We’ re hitting the power wall” R. Schmidt, IBM 14 IBM ES9000 CMOS Prescott 12 Jayhawk(dual) y Bipolar ) tt 2 10 T-Rex Mckinley nsi Squadrons Fujitsu VP2000 atts/cm 8 ee IBM GP ww IBM 3090S NTT IBM RY5 6 Fujitsu M-780 IBM RY7 Pentium 4 eat Flux( Pulsar er D HH 4 IBM 3090 IBM RY6 Start of CDC Cyber 205 Water Cooling IBM 4381 IBM RY4 2 IBM 3081 Apache Fujitsu M380 IBM 370 Merced Module Pow IBM 360 IBM 3033 Vacuum Pentium II(DSIP) 0 1950 1960 1970 1980 1990 2000 2010 Year of Announcement Source: IBM 2004 9 Energy p er Transistor Continues to Dro p 1010 10 As the number 109 rr 100 oooo of transistors 10-1 goes UP 108 -2 r transistr transist 10 107 Energy per 10-3 transistor goes 106 -4 DOWN nergy penergy pe 10 EEEE 105 10-5 10-6 104 -7 10 103 ’70 ’80 ’90 ’00 Source: WSTS/DWSTS/Dtt/Itlataquest/Intel ~ 1 Million Factor Reduction In Energy/Transistor Over 30+ Years 10 Energy Consumption is about System Optimization 5 years 1015 938 Estimated Annual Energy Consumption YearYear )))) 655 Going med permed per is is betterbetter uuuu r rrr MbilMobile (lowe(lowe 229 Wh ConsWh Cons K KKK >26x Reduction 38 Unmanaged Pentium® D Unmanaged Pentium® D Unmanaged Core™2 Duo Managed Core™2 Duo Processor Managed Core™2 Duo Processor Processor 945 with CRT display Processor 945 with LCD display Processor E6550 with LCD E6550 with LCD display T9400 mobile platform display Energy savings comes from combination of transistor scaling and architectural innovations Performance tests/ratings are provided assuming specific computcomputerer systems and/or components and reflect the approximate perfoperformrmanceance of Intel products as measured by those tests. Any difference in system hardware or software design or configuration may affect actual performanperformancece.. This data may vary from 11 other material generated for specific marketing requests. “We’re running out of atoms”atoms Polysilicon Gate Electrode 1.2 nm SiO2 3-4 atoms thick Silicon Substrate 12 New Materials and New Fabrication 100 SiON/Poly 65nm 45nm node e g 10 1 SiON/Poly 65nm te Leaka te 0.1 0.01 liz e d G a aa 00010.001 HiK+MG 45nm HiK+MG 45nm 0.0001 Norm PMOS NMOS 0. 00001 -1.2 -1 -0.8 -0.6 -0.4 -0.2 0 0.2 0.4 0.6 0.8 1 1.2 VGS (V) 3.0nm HighHigh--kk 45 nm HK+MG provides >25x gate leakage reduction 13 The Timing of Research Is Not Always Predictable But a Commitment to Research is Required 90’s 1999 2001 2003 2005 2007 Strained Development Silicon ‘0101-’02 1st gen ’03 2nd gen ‘05 3rd gen ‘07 Gat Materials Metal e HighHigh--kk Metal selected gates Development High-k ‘05- ’06 Gate 2000 research Silicon 2001 Demo ‘03 Prod ‘07 Intel 45nm Highh--kk Metal Gate Ten Years, Millions of Hours Dead Ends, Failures Unwavering Focus Source: Intel 14 Meanwhile despite these worries ItiInnovations contitidnued on proddtuct side y Personal computing replacing shared computers y Portable computing y Connected computers, sharing data, Internet y Wireless connectivity y Smaller form factors, pocket computers y Sppppecial purpose devices … 15 Economics, Technology, & Innovation “No exponential is forever … but we can delay ‘forever’.” Technologies on Deck Opportunities for Future Products Visible Horizon and Beyond 16 Steady Technology Cadence TECHNOLOGY GENERATION 130nm 90nm 65nm 45nm 32nm 2001 2003 2005 2007 2009 MANUFACTURING 17 Product Cadence for Sustained Leadership TICK Pentium® D, Xeon™, Core™ processor RSRS 65nm 2 YEA2 YEA TOCK Core 2 processor, Xeon processor SS TICK PENRYN Family RRRR 45nm 2 YEA2 YEA TOCK NEHALEM SSSS TICK WESTMERE 32nm YEAR YEAR 2 222 TOCK SANDY BRIDGE All product information and dates are preliminary and subject to change without notice 18 So What ? Generational benefits don’t just add, they multiply 19 Energy Efficiency Improvement (Same Perf ormance Footpri nt) 184 single core servers 21 Intel® Xeon® 5500 2005 2009 bdbased servers Up to Up to Annual Energy Costs 8 month 9X 92% Return on Investment Server Reduction Estimated Reduction Source: Intel estimates as of Nov 2008. Performance comparison using SPECjbb2005 bops (business operations per second). Results have been estimated based on internal Intel analysis and are provided for informational purposes only. Any difference in system hardware or software design or configuration may affect actual performance. For detailed calculations, configurations and assumptions refer to the legal information slide in backup. 20 New Fabrication enables New Product Opportunities L3 Core L3 Core L3 Core Core and Uncore Core Power Gates OFF Both Core and Uncore Power Gates are ON And Uncoreretention Power Gates are OFF Westmere 6 cores, Infrared imaging showing advanced power management 21 The Opportunity for Data Center Efficiency Projected Data Center Energy Use Under Five Scenarios 2.9% Of Projected 140 Total U.S. Electricity Use Historical 120 Trends 1.5% Of Total US. Current 100 Electricity Usage Efficiency year) year) Trends //// Improved 80 0.8% Of Total US Operation Electricity Usage 60 ns (kWh ns (kWh BtBest PtiPractice 40 BillioBillio StateState--ofof--thethe-- 20 Art 0 2000 2001 2002 2003 2004 2005 2006 2007 2008 2009 2010 2011 Forecast Source: EPA Report to Congress on Server and Data Center Energy Efficiency; August 2, 2007 22 Technology Advances Enable Both Better Prod ucts and a Wider Range 65nm 45nm +25% 10X Power yy 8 Core Stand-b Quad Core Log Dual Core Single Core Transistor Performance (switching speed) 23 Technology Advances Enable Both Better Prod ucts and a Wider Range 65nm 45nm LkLeakage Server +25% 1x Desktop Intel®10X Atom™ 0.1x LtLaptop 0.01x Netbook 0.001x Transistor Performance (switching speed) 24 Extending Transistor Advantage to SoC’s FtFaster Transi itstors and BttBetter Power PPferformance 65nm 45nm 32nm LkLeakage +25% 1x +22% 10X 10X 0.1x 0.01x IA 32nm SoC 0.001x Transistor Performance (switching speed) 25 Implementing a Platform on a Chip High Speed Memory Interface High Perf /Low Power SRAM/RF Cache Logic Transistors Memory IA Core ed Media nterface rface I ee Gfx/Security/ Analog/ HV I/O Transistors rial Inte Inductors sic I/O Video/Audio High Sp a a ee B S Display Interface CE Embedded Handhelds SodavillePrecision Linear Capacitors Jasper Forest LincroftDecap Port 1 E E Port 2 Vbias= Vgate Vbias= 0 V Diodes B B n+ n+ n+ n+ n+ Vertical BJT Single EndedVaractor n-well C C Varactors 26 Economics, Technology, & Innovation “No exponential is forever … but we can delay ‘forever’.” Technologies on Deck Opportunities for Future Products Visible Horizon and Beyond 27 Industry R & D is Increasing – in dollars and as a percent of revenues 40 Industry R & D $ Billion 30 20 10 How to fabricate 0 Forecast Process Product Software R & D Hardware Other Source: IBS, Intel 28 Possible Product Possibilities y Cloud computing – Solving grand challenge problems – Enable access anyyytime anywhere y LifeLife--likelike computing – Immersive experiences ––ContextContext aware y Heterogenous networks – Computing in network – Integration with bio and sensors 29 Potential Energy Savings Outside of Information and Communications Technology Figure ES-1. Future Electricity Scenarios for the U.S. 7,000 6,000 Frozen Efficiency Case 1.896 Billion kWh 5,000 Reference Case illion kWh BB 1.242 4,000 Billion Semiconductor Enabled Efficiency Scenario