SCHOOL OF ELECTRICAL AND ELECTRONICS DEPARTMENT OF ELECTRONICS AND COMMMUNICATION ENGINEERING UNIT - 1 ADVANCED MICROPROCESSORS – SEC1601 UNIT 1-ADVANCED MICROPROCESSOR ARCHITECTURE Internal Microprocessor Architecture, Real mode memory addressing, Protected mode memory addressing, Memory pagingData addressing modes - Program memory addressing modes - Stack memory addressing modes - Data movement instructions - Program control instructions Arithmetic and Logic Instructions. Intel 80186 – Architecture UNIT 1 –INTERNAL MICROPROCESSOR ARCHITECTURE On the basis of programming Microprocessor core SINGLE CORE 1.Single task at any time 2.Access whole memory at the same time by any program DUAL CORE 1.Multiple task at any time 2.Access specific memory by any task PROGRAMMING MODEL Program visible: 8086,8088-registers are used directly during programming Program invisible: 80286 and above 1.Registers are not accessible directly during programming 2.Can be used indirectly Fig 1.1 :Programming model Fig 1.2: 64 bit registers 64 bit cannot be accessed with the instruction used to access general purpose register AX,BX Etc., To Access Low Order Byte Of R8 is used To Access Low Order Word Of R10 is used R8-R15- these registers are found only in Pentium 4 and core 2 if 64 bit extensions are enables, used as general purpose register In most applications these registers remain unused Fig 1.3: Register size with example SEGMENT REGISTER THERE ARE 6 SEGMENT REGISTERS Stack segment(SS)- pointer to stack CS Code segment(CS)-pointer to code Data segment (DS)-pointer to data DS Extra segment(ES)-pointer to extra data (‘E’ stands for extra) F segment (FS)-pointer to more extra data(‘F’ comes after ‘E’) G segment (GS)- pointer to still more extra data(‘G’ comes after ‘F’) ES CS(code segment) – area of memory that hold the executable program used by microprocessor, Have the starting address of the memory that hold code SS CS:IP used to access the whole 64K memory of code segment FS SS(stack segment): area of memory used for the stack, stack is used to store data, memory 64K can access by SS:SP GS DS(data segment): area of memory that hold all data refer by general purpose register(AX,BX etc), 64K memory accessed by using DS and offset address register ES(extra segment)- Additional data segment that is used by some of the string instructions to hold destination data FS and GS- supplemental register used as most extra segment in 64 bit MP, Window use these segments for internal operation , but no definition for their usage is available POINTER AND INDEX REGISTERS Stack pointer : Pointing the top of the stack in stack segment Base Pointer: contain the offset address within data segment Source Index: used as a pointer to a source in stream operations Destination index: used as a pointer to destination in a stream operations All these registers also used for based indexed, register indirect addressing MULTIPURPOSE OR GENERAL PURPOSE REGISTER Accumulator (RAX)- used for I/O operation, rotate, shift, multiplication and division Base index(RBX)- hold the offset address of a memory location in a memory system and also address the memory data Count register (CX)- Used as default counter for various instruction like repeated STRING, SHIFT,ROTATE(CL),LOOP etc., Hold the offset address of memory data and also address memory data Data register (DX) hold the part of the result from a multiplication or division and also address memory data SPECIAL PURPOSE REGISTERS Instruction pointer (IP) :Point to the next instruction in a program located within the code segment Stack pointer: pointing to the top of the stack in stack segment to store data Flag Register: Determine the current status of the process modified after executing the instruction Fig 1.4: Pentium Flag registers FLAG register for the entire 8086 and Pentium microprocessor family FLAG REGISTERS The FLAG register is the status register in Intel x86 microprocessors that contains the current state of the processor. This register is 16 bits wide. Its successors, the EFLAGS and RFLAGS registers, are 32 bits and 64 bits wide, respectively. Conditional Flag Carryflag: indication of overflow condition for unsigned integer and hold carry Auxiliaryflag: indication of carry/borrow from lower nibble to higher nibble (D3 to D4) Parity flag: indication of parity of the result, 0-ODD, 1-EVEN Zero flag: set if the result is zero, Z-1 result is 0, Z-0 result is non zero Sign flag: in signed magnitude format if the result of the operation is negative sign flag is set, S-1 result is NEGATIVE, S-0 result is POSITIVE CONTROL FLAGS- CONTROL THE OPERATION OF THE EXECUTION UNIT Trap flag: if set, then debugging operation is allowed ▪ Interrupt flag: control the operation of interrupt request ▪ [INTR PIN-1 Enabled,0-Disabled] ▪ STI- set by this instruction, CLI- cleared by this instruction ▪ Direction flag: used in string operation-if set the string byte is accessed from higher memory address to lower memory address ▪ Flags for 32,64 bit ▪ IOPL(I/O privilege level): ▪ Used to select the privilege level for I/O devices ▪ If the current privilege level is 00 , I/O execute without hindrance ▪ If 11 then an interrupt occur and suspended the execution ▪ Nested task(NT)- indicate whether the task is nested with other or not ▪ RF(resume): resume flag is used with debugging to control the resumption of execution after the next instruction FLAG REGISTERS • VM(virtual mode)- allow the system program to execute multiple DOS operation • AC(alignment check)- if the word or double word is addressed on a non-word or non-double word boundary • VIF(virtual interrupt flag)-copy the interrupt flag bit (used in Pentium 4) • VIP(virtual interrupt pending)-give the information about virtual mode interrupt. Set if interrupt if pending • ID(identification)- The ID flag indicate that Pentium 4 microprocessor support the CPUID or not- CPUID instruction provides the system with information about the microprocessor such as its version number and manufacturer REAL MODE ADDRESSING The only mode available on the 8086-8088 • 20 bit address bus- 1MB, 16 bit data bus, 16 bit registers • 80286 and above operate in either real or protected mode • Real mode operation : allows addressing of only the first 1M byte of memory space-even in Pentium 4 or core 2 microprocessor • The first 1M byte of memory is called the real memory, conventional memory or DOS memory system. • Segment registers (CS,DS,SS,ES) holds the base address of where a particular segment begins in memory SEGMENTS AND OFFSETS All real mode memory addresses must consist of a segment address plus an offset address • Segment address defines the beginning address of any 64K byte memory segment • Offset address: Selects any location within the 64K byte memory segment Fig 1.5: Segment and offset Fig 1.6: Segment and offset with displacement • Once the starting address is known the ending address is found by adding FFFFH • Because a real mode segment of memory is 64K in length • The Offset address is always added to the segment starting address to locate the data • [1000:2000H] • A segment address of 1000H: an offset address of 2000H EFFECTIVE ADDRESS CALCULATION • EA= Segment register (SR) x 10H + Offset • 1. SR:1000H • 10000+0023=10023H • 2.SR:AAF0H • AAF00 + 0134 = AB034H • 3.SR:1200H • 12000 + FFF0 =21FF0H Fig 1.7: Effective address calculation • segment and offset register combination [CS:IP] • The code segment register defines the start of the code segment • The instruction pointer locates the next instruction within the code segment • Another default combination is SS:SP or SS:BP Fig 1.8: Default 16 bit segment and offset combinations Fig 1.9 Default 32-bit segment and offset combinationREAL MODE MEMORY ADDRESSING The only mode available on the 8086-8088 20 bit address bus- 1MB, 16 bit data bus, 16 bit registers 80286 and above operate in either real or protected mode Real mode operation : allows addressing of only the first 1M byte of memory space-even in Pentium 4 or core 2 microprocessor The first 1M byte of memory is called the real memory, conventional memory or DOS memory system. Segment registers (CS,DS,SS,ES) holds the base address of where a particular segment begins in memory Memory segmentation Memory segmentation is nothing which is the methods where whole memory is divided into the smaller parts. In 8086 microprocessor memory are divided into four parts which is known as the segments. These segments are data segment, code segment, stack segment and extra segment. The total memory size is divided into segments of various sizes. A segment is just an area in memory. The process of dividing memory this way is called Segmentation. In memory, data is stored as bytes Each byte has a specific address. Intel 8086 has 20 lines address bus. With 20 address lines, the memory that can be addressed is 2 power20 bytes. 2power20= 1,048,576 bytes (1 MB). 8086 access memory with address ranging from 00000 H to FFFFF H. SEGMENTS In 8086, memory has four different types of segments. They are: Code Segment Data Segment Stack Segment Extra Segment SEGMENT REGISTERS Each of these segments are addressed by an address stored in corresponding segment register. These registers are 16-bit in size. Each register stores the base address (starting address) of the corresponding segment. The segment registers cannot store 20 bits, they only store the upper 16 bits. Fig1.10: segment registers PHYSICAL ADDRESS TRANSLATION MECHANISM Fig 1.11Physical address translation mechanism Fig1.12: Example of address formation Example The value of Data Segment Register (DS) is 2222H. ▪ To convert this 16-bit address into 20 b it the BIU appends 0H to the LSBs of the address by address translation mechanism.