© 1979 IEEE. Personal use of this material is permitted. However, permission to reprint/republish this material for advertising or promotional purposes or for creating new collective works for resale or redistribution to servers or lists, or to reuse any copyrighted component of this work in other works must be obtained from the IEEE. mx ~ransac~lonson Nuclearmence, Vol. NS-26,No. 3, June 1979 THE ADDITION OF L$CAL INTELLIGENCE TO THE ISR CONTROLSYSTEM C.R.C.B. Parker Abstract The control system of the CERN Intersecting Storage Rings (ISR) has been gradually modified over the last few years to become almost entirely based on CAMAC, giving the computer independence and flexibility which that system provides. It has recently become de- sirable to add local intelligence to various parts of the system, i.e. a processing capability closely asso- ciated with the equipment being controlled or monitored. This local intelligence has been provided by processors which are able to run autonomously and are transparent: they simply give the main control center the illusion that the equipment is more elaborate than it really is. It has proved possible to incorporate two types of such processor quite elegantly into the CAMACsystem even though CAMACwas not designed with these applications in mind. This paper describes the design philosophy of these two types of processor, and the areas of applica- tion in which they have so far been used, The develop- ment aids at all levels which are available are also described. Finally, extensions to the CAMACspecifica- tions are suggested which would allow it to be used more easily for such projects. 1. Introduction Fig. 1 Area of Control of Intelligent Devices Until. recently, the ISR computer control system is lowered and the system is more tolerant of failures was centrally organized with a single controlling com- at higher levels. puter (a Ferranti Argus 500). E uipment interfacing was done centrally (mostly by CAMAC9 ); several crates were The present ISR control system contains examples provided in the central area, and cables were brought of intelligence at all three levels, but this paper from the remote equipment to these crates. will not deal with the equipment level, since the way in which intelligence is added at this level, and the 2. The Evolution of the Control System benefits of doing so, depend so much on the particular equipment. Nevertheless, it is the author’s view that In about 1975, the control system became saturated it is the equipment level that offers the most possibil- The single Argus computer was being over-utilized. It ities for the addition of local intelligence. did not have sufficient disk file storage, memory, or computational capacity for all the tasks it was re- 3. Local Intelligence at the Module Level quired to perform. Moreover, the number of tasks which could be run simultaneously was too low. The foreseen As part of the process of rationalizing and expand- limit for the maximum number of CAMACcrates (7) had ing the control system, it was necessary to interface been reached, and these crates were virtually full. To much old instrumentation to CAEIAC. It was desired to have added more crates would have required considerable retain as much as possible of this old instrumentation development effort. and its cabling; this meant that the peculiarities of each instrument would have to be “mapped” onto the It was becoming increasingly evident that the con- CAMACcommand structure, trol system had to be re-structured to allow for expan- sion. A hierarchical system was adopted. CAMACcrates Rather than develop special modules for each in- were installed in the remote buildings so that the in- s trument , a general-purpose module, known as the Master terconnection length between the crates and the equip- Sequencing Unit, was designed and constructed. A block ment would be short. These crates were interconnected diagram of this unit is shown in Fig. 2. It contains a using the CAMAC Serial Highway system and driven by CAMACinterface, a Signetics 2650 micro-processor, parent computerswhich were added in the central area. lkbyte of Random Access Memory, and up to 2kbytes of The parent computers were dedicated to particular ap- PROM. In effect, the module simply provides translation plication areas (magnet power supply control, vacuum between the CAMACDataway and the micro-computer bus. status monitoring) and were attached to a data network The interface to the CAMACDataway is via two registers, allowing communication between themselves and to the an B-bit operation register and a l&bit data register. Argus. This allows complete programmability of the CAMACfunc- tions which can be accepted by the module. A connector It was at the time of this re-structuring that it on the front panel of the module carries a buffered became feasible, due to the availability of low-cost version of the micro-computer bus; this provides com- processing and memory chips, to incorporate intelli- munication with a second module containing circuits gence at lower level of the control system than the top. specific to the particular application. The intention The three levels at which intelligence could be incor- is that most of the complexity of the interface (timing, porated are the equipment level, the CAMACmodule level, synchronization, sequencing, simple data manipulations, and the CAMACcrate level. This is illustrated graphi- etc.) are handled by the micro-computer program, so the cally in Fig. 1, with an indication of the “area of second module is trivial. control” of devices at each level. Incorporation of local intelligence at any level reduces the dependence There is provision in the module for the CAMAC on higher levels, i.e. the data rate to higher levels Look-At-Me (to the parent computer) to be set by pro- ISR Division, CERN, CH-1211 Geneva- 23 ml&9499/79/0600-3392$00.750 1979IEEE 3392 This also means that testing can be more thorough. Finally, modification of the system is much simpler than for purpose-built units. Nearly 30 Master Sequency Units have been in- stalled at the TSR for-four different projects. A typi- cal example is its application to an analog data acqui- sition system monitoring many inputs at low speed. The MSU is connected to an adaption unit (via the front panel micro-computer bus) which drives a dual channel 160 way relay scanner and two digital voltmeters. It is programmed to accept CAMACrequests for blocks of up to 160 (double) readings starting at a particular address. The readings are then taken, converted from BCD to two’s complement form, and the controlling computer in- terrupted. The results can then be read out as a block. In general then, intelligence has been added at the module level to deal with the peculiarities of par- ticular instrumentation, presenting the user (i.e. the control center) with a more straightforward, rational interface. The programs at this level are closely re- lated to the hardware; once written they change rarely- COMNECTOR the requirement is well-defined and static. 4. Local Intelligence at the Crate Level Fig. 2 Block Diagram of MSU Intelligent devices at this level, able to control gram, and two hard-wired functions are implemented for the whole of the instrumentation attached to a crate, testing and clearing this LAM. A third hard-wired CAMAC are much closer in function to the main control com- function causes a master reset. All other CAMACfunc- puters. They effectively run applications programs, tions must be interpreted by the micro-computer program. and since the requirements change frequently, so do the Provided the micro-computer is ready (indicated by a programs. They can henefit from the same facilities programmable status bit), then the first CAMAC“write” that the main control computers use for flexibility and or “control” function to the module can be accepted convenience; multi-programming, multi-processing, real- (acceptance is signalled to the CAMACsystem by giving time operating systems, and even comprehensive filing the Q = 1 response; this technique precludes the use of systems all have their place here. Q for any other purpose). Acceptance of further com- mands is then inhibited whilst interpretation of the To satisfy an ever-growing requirement for intel- current command proceeds. At an appropriate time, the ligent processors at this level, the ISR have developed micro-computer indicates its readiness to accept an- an Auxiliary Crate Controller for CAMAC, known as the other CAMACcommand by setting the status bit once more. ACCTOO. This Ts a single-board controller capable of This technique overcomes the difficulties caused hy the generating full 24-bit CAMACcommands. It contains a disparity between micro-computer instruction times and Ferranti FlOO-L 16-bit microprocessor, together with a CAMACdata rates. Signetics microsequencer, a fast arithmetic-logical unit, and a scratchpad register file. A block diagram CAMAC“read” commands are dealt with in a slightly of the ACClOO is given in Fig. 3. It uses the CAMAC different way. The micro-computer sets up in advance Dataway for all access to its associated memory. To the code for the next expected command and the appro- priate read data, and then sets the “ready” bit. The Q = 1 response is only given if the micro-computer was ready AND the actual command was the one it was expect- __L_ HICAO. PROM ing. In any event, the micro-computer is informed which SEQUENCER. CAMACcommand actually took place. 1 The module has three limitations, which are not serious in practical situations. Firstly, the irfter- pretive process is necessarily slow - typically 50 ~.ls e per CAMAC instruction - although the host computer’s REG1STE.R 23 operating system often imposes greater overheads than (rW c this time.