APPENDIX A The ARM Instruction Set This appendix lists the core ARM 32-bit instruction set, with a brief description of each instruction. Instruction Description ADC, ADD Add with Carry, Add ADR Load program or register-relative address (short range) AND Logical AND ASR Arithmetic Shift Right B Branch BFC, BFI Bit Field Clear and Insert BIC Bit Clear BKPT Software breakpoint BL Branch with Link BLX Branch with Link, change instruction set BLXNS Branch with Link and Exchange (Non-secure) BX Branch, change instruction set BXNS Branch and Exchange (Non-secure) (continued) © Stephen Smith 2019 317 S. Smith, Raspberry Pi Assembly Language Programming, https://doi.org/10.1007/978-1-4842-5287-1 APPENDIX A The ARM InstrUction Set Instruction Description CBZ, CBNZ Compare and Branch if {Non}Zero CDP Coprocessor Data Processing operation CDP2 Coprocessor Data Processing operation CLREX Clear Exclusive CLZ Count leading zeros CMN, CMP Compare Negative, Compare CPS Change Processor State CRC32 Cyclic Redundancy Check 32 CRC32C Cyclic Redundancy Check 32C CSDB Consumption of Speculative Data Barrier DBG Debug DCPS1 Debug switch to exception level 1 DCPS2 Debug switch to exception level 2 DCPS3 Debug switch to exception level 3 DMB, DSB Data Memory Barrier, Data Synchronization Barrier DSB Data Synchronization Barrier EOR Exclusive OR ERET Exception Return ESB Error Synchronization Barrier HLT Halting breakpoint HVC Hypervisor Call ISB Instruction Synchronization Barrier IT If-Then (continued) 318 APPENDIX A The ARM InstrUction Set Instruction Description LDAEX, LDAEXB Load-Acquire Register Exclusive Word, Byte LDAEXH Load-Acquire Register Exclusive Halfword LDAEXD Load-Acquire Register Exclusive Doubleword LDC, LDC2 Load Coprocessor LDM Load Multiple registers LDR Load Register with word LDA, LDAB Load-Acquire Register Word, Byte LDAH Load-Acquire Register Halfword LDRB Load Register with Byte LDRBT Load Register with Byte, user mode LDRD Load Registers with two words LDREX, LDREXB Load Register Exclusive Word, Byte LDREXH Load Register Exclusive Halfword LDREXD Load Register Exclusive Doubleword LDRH Load Register with Halfword LDRHT Load Register with Halfword, user mode LDRSB Load Register with Signed Byte LDRSBT Load Register with Signed Byte, user mode LDRSH Load Register with Signed Halfword LDRSHT Load Register with Signed Halfword, user mode LDRT Load Register with word, user mode LSL, LSR Logical Shift Left, Logical Shift Right MCR Move to Coprocessor from Register (continued) 319 APPENDIX A The ARM InstrUction Set Instruction Description MCRR Move to Coprocessor from Registers MLA Multiply Accumulate MLS Multiply and Subtract MOV Move MOVT Move Top MRC Move from Coprocessor to Register MRRC Move from Coprocessor to Registers MRS Move from PSR to Register MSR Move from Register to PSR MUL Multiply MVN Move Not NOP No Operation ORN Logical OR NOT ORR Logical OR PKHBT, PKHTB Pack Halfwords PLD Preload Data PLDW Preload Data with intent to Write PLI Preload Instruction PUSH, POP PUSH registers to stack, POP registers from stack QADD, QDADD Saturating arithmetic QDSUB, QSUB Saturating arithmetic QADD8 Parallel signed saturating arithmetic QADD16, QASX Parallel signed saturating arithmetic (continued) 320 APPENDIX A The ARM InstrUction Set Instruction Description QSUB8 Parallel signed saturating arithmetic QSUB16 Parallel signed saturating arithmetic QSAX Parallel signed saturating arithmetic RBIT Reverse Bits REV, REV16 Reverse byte order REVSH Reverse byte order RFE Return from Exception ROR Rotate Right Register RRX Rotate Right with Extend RSB Reverse Subtract RSC Reverse Subtract with Carry SADD8, SADD16 Parallel Signed arithmetic SASX Parallel Signed arithmetic SBC Subtract with Carry SBFX, UBFX Signed, Unsigned Bit Field eXtract SDIV Signed Divide SEL Select bytes according to APSR GE flags SETEND Set Endianness for memory accesses SETPAN Set Privileged Access Never SEV Set Event SEVL Set Event Locally SG Secure Gateway SHADD8 Parallel Signed Halving arithmetic (continued) 321 APPENDIX A The ARM InstrUction Set Instruction Description SHADD16 Parallel Signed Halving arithmetic SHASX, SHSUB8 Parallel Signed Halving arithmetic SHSUB16 Parallel Signed Halving arithmetic SHSAX Parallel Signed Halving arithmetic SMC Secure Monitor Call SMLAxy Signed Multiply with Accumulate SMLAD Dual Signed Multiply Accumulate SMLAWy Signed Multiply with Accumulate SMLSD Dual Signed Multiply Subtract Accumulate SMLSLD Dual Signed Multiply Subtract Accumulate Long SMMLA Signed top word Multiply with Accumulate SMMLS Signed top word Multiply with Subtract SMMUL Signed top word Multiply SMUAD Dual Signed Multiply, and Add products SMUSD Dual Signed Multiply, and Subtract products SMULxy Signed Multiply SMULL Signed Multiply SMULWy Signed Multiply SRS Store Return State SSAT Signed Saturate SSAT16 Signed Saturate, parallel halfwords SSUB8, SSUB16 Parallel Signed arithmetic SSAX Parallel Signed arithmetic (continued) 322 APPENDIX A The ARM InstrUction Set Instruction Description STC Store Coprocessor STM Store Multiple registers STR Store Register with word STRB Store Register with Byte STRBT Store Register with Byte, user mode STRD Store Registers with two words STREX, STREXB Store Register Exclusive Word, Byte STREXH,STREXD Store Register Exclusive Halfword, Doubleword STRH Store Register with Halfword STRHT Store Register with Halfword, user mode STL, STLB, STLH Store-Release Word, Byte, Halfword STLEX, STLEXB Store-Release Exclusive Word, Byte STLEXH, STLEXD Store-Release Exclusive Halfword, Doubleword STRT Store Register with word, user mode SUB Subtract SUBS pc, lr Exception return, no stack SVC Supervisor Call SXTAB Signed extend, with Addition SXTAB16 Signed extend, with Addition SXTAH Signed extend, with Addition SXTB, SXTH Signed extend SXTB16 Signed extend SYS Execute System coprocessor instruction (continued) 323 APPENDIX A The ARM InstrUction Set Instruction Description TBB, TBH Table Branch Byte, Halfword TEQ Test Equivalence TST Test TT, TTT, TTA Test Target (Alternate Domain, Unprivileged) TTAT Test Target (Alternate Domain, Unprivileged) UADD8 Parallel Unsigned arithmetic UADD16, UASX Parallel Unsigned arithmetic UDF Permanently Undefined UDIV Unsigned Divide UHADD8 Parallel Unsigned Halving arithmetic UHADD16 Parallel Unsigned Halving arithmetic UHASX Parallel Unsigned Halving arithmetic UHSUB8 Parallel Unsigned Halving arithmetic UHSUB16 Parallel Unsigned Halving arithmetic UHSAX Parallel Unsigned Halving arithmetic UMAAL Unsigned Multiply Accumulate Long UMLAL, UMULL Unsigned Multiply Accumulate, Unsigned Multiply UQADD8 Parallel Unsigned Saturating arithmetic UQADD16 Parallel Unsigned Saturating arithmetic UQASX Parallel Unsigned Saturating arithmetic UQSUB8 Parallel Unsigned Saturating arithmetic UQSUB16 Parallel Unsigned Saturating arithmetic UQSAX Parallel Unsigned Saturating arithmetic (continued) 324 APPENDIX A The ARM InstrUction Set Instruction Description USAD8 Unsigned Sum of Absolute Differences USADA8 Accumulate Unsigned Sum of Absolute Differences USAT Unsigned Saturate USAT16 Unsigned Saturate, parallel halfwords USUB8 Parallel Unsigned arithmetic USUB16, USAX Parallel Unsigned arithmetic UXTAB Unsigned extend with Addition UXTAB16 Unsigned extend with Addition UXTAH Unsigned extend with Addition UXTB, UXTH Unsigned extend UXTB16 Unsigned extend V∗ Advanced FPU or SIMD Instructions WFE, WFI Wait For Event, Wait For Interrupt YIELD Yield 325 APPENDIX B Linux System Calls This appendix lists the system call numbers for all Raspbian’s Linux system services and the error codes that they could return. This is a listing of unistd.s from the source code that accompanies this book. Linux System Call Numbers @ @ Defines for the Linux system calls. @ This list is from Raspbian Buster @ .EQU sys_restart_syscall, 0 @ restart a system call .EQU sys_exit, 1 @ cause normal process termination .EQU sys_fork, 2 @ create a child process .EQU sys_read, 3 @ read from a file descriptor .EQU sys_write, 4 @ write to a file descriptor .EQU sys_open, 5 @ open and possibly create a file .EQU sys_close, 6 @ close a file descriptor .EQU sys_creat, 8 @ create a new file .EQU sys_link, 9 @ make a new name for a file .EQU sys_unlink, 10 @ delete a name and the file it refers to .EQU sys_execve, 11 @ execute program © Stephen Smith 2019 327 S. Smith, Raspberry Pi Assembly Language Programming, https://doi.org/10.1007/978-1-4842-5287-1 APPENDIX B LinUx SYsTeM Calls .EQU sys_chdir, 12 @ change working directory .EQU sys_mknod, 14 @ create a special or ordinary file .EQU sys_chmod, 15 @ change file mode bits .EQU sys_lchown, 16 @ change the owner/group of a symbolic link .EQU sys_lseek, 19 @ reposition read/write file offset .EQU sys_getpid, 20 @ get process identification .EQU sys_mount, 21 @ mount filesystem .EQU sys_setuid, 23 @ set user identity .EQU sys_getuid, 24 @ get user identity .EQU sys_ptrace, 26 @ process trace .EQU sys_pause, 29 @ wait for signal .EQU sys_access, 33 @ check user's permissions for a file .EQU sys_nice, 34 @ change process priority .EQU sys_sync, 36 @ commit filesystem caches to disk .EQU sys_kill, 37 @ send signal to a process .EQU sys_rename, 38 @ change the name or location of a file .EQU sys_mkdir, 39 @ create a directory .EQU sys_rmdir, 40 @ delete a directory .EQU sys_dup, 41 @ duplicate a file descriptor .EQU sys_pipe, 42 @ create pipe .EQU sys_times, 43 @ get process times .EQU sys_brk, 45 @ change data segment size .EQU sys_setgid, 46 @ set group identity .EQU sys_getgid, 47 @ get group identity .EQU sys_geteuid,