VAX 6000 Model 400 System Digital Technical Journal Digital Equipment Corporation Volume 2 Number 2 Spring 1990 Editorial Jane C. Blake. Editor Rarhara Lindmark, Associate Ediwr Richard W. Hcane, Managing Editor Circulation Catherine M. Phillips, Administrator Suzanne ,I. Babineau. Secretary Production Hden L. l'allcrson. Production Editor Nancr Jones. Typographer Rebecca A. Barker, Typographer l'ct<:r Woodhury, Illustrator �nd Designer Advisory Board S:unud H. Fuller. Chairman Robert M. Glorioso John W. M cCredie Mahendra R. Patel F (;rant Saviers Robt:rt K. Spitz William D. Strecker Victor A. Vyssotsky The Ui!iila/Tecbnica/joumal is puhlished quarterly by Digi tal Equipment Corporation, J46 M:tin Street MLOI-5JB68. Maymrd. Massachusetts 01754-2571. Subsc riptions 10 the Journal are S·iO.OO for four issues and must he prepaid in li.S. funds. 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ISSN 0898-90 I X Documentation Number EY-<:1971:-0P The following are trademarks of Digital Equipment Corpora­ CoverDesign tion: CJ, OECnet, DECst:uion .'1100, OH:wimlows, Digital, the Our cover depicts some of the common equations and terminology Digital logo, HSC. MicroVAX , llZ'i'), ThinWire, VAX, VAX-11/780. used in vector processing, which is one of the featured topics in VAX 6000, VAX 8700, VAX HHOO, VAX 9000, VAXBJ, VAXcluster, this issue. The v.-IXl'ector processor extends the VAX 6000 family to VAX FORTRAN, VAXveclOr(J000, V.\1S, !ILTRtX, XMI. address the compul ing need� (ifnumerically intensiue applications. !IN IX is a registe red trademark of American Telt:phone & Telegraph Company. The VAX 6000 Model •iOO systern isa brightstar in Digital's family dbx is a registered trademark of dbx, Inc of midrange multiprocessors and this issue's main product thenU!. ,\Ill'S is a trademark of MIPS Computer Systems. I nc. The couer was des(rt,ned by David Comberg and Randy Zieglerof the Book production was done by Digital 's Educational Services C01porate Design Group. Media Communications Group in Hedfortl, MA. I Contents 9 Foreword Pauline A. Nist VAX 6000 Model400 System 11 Vector Processing on the VAXvector 6000 Model400 Debra L. Slater, David M. Fenwick, D. John Shakshober, and Douglas D. Williams 27 The VAX6000 Model400 Scalar Processor Module Patrick Sullivan, Michael A. Callander, Sr. ,James R. Lundberg, Rebecca L. Stamm, and William). Bowhill 36 An Overview of the VAX6000 Model400 Chip Set W. Hugh Durdan, William). Bowhiii,John F Brown, William V. Herrick, Richard C. Marcello, Sridhar Samudrala, G. Michael Uhler, and Nicholas Wade 52 VAX6000 Model400 Physical Technology john T. Bartoszek, Robert). Hannemann, Stephen P. Hansen, Robert]. McCarty, and john C. Sweeney 64 VAX6000 Model 400 CPU Chip Set Functional Design Verification Richard E. Calcagni and Will Sherwood 73 Test and Qualification ofthe VAX6000 Model400 System John W Croll, Larry T. Camilli, and Anthony]. Vaccaro 84 Development of the DECstation 3100 Thomas C. Furlong, Michael). K. Nielsen, and Neil C. Wilhelm 89 Compiler Optimization in RISCSyst ems Larry B. Weber I Editor's Introduction Bill Bowhill discuss the module design and give particulars on how difficult signal integrity prob­ lems were resolved. The five system chips that reside on the module are the topic of our next paper by Hugh Durdan, Bill Bowhill , John Brown, Bill Hl:rrick, Rich Marcello, Sri Samudrala, Mike Uhler, and Nick Wade. From their discussions of the chip designs, we learn how the best features of the VAX 8700 ECL-based, pipelined system and of previous VLSJ designs were incorporatedin the chip set, which achieves a cycle tinle of 28 nanoseconds. jane C. Blake This fast cycle time was one of several require­ Editor ments that drove a significant design effort for the physical technology. John Bartoszek, Rob Hannemann, Steve Hansen, Bob McCarty, and John Sweeney describe the technological advances This Spring 1990 issue marks the second issue to achieved in a number of areas, including tape­ be published on the new quarterly schedule of the automated bonding, semicustomized ceramic Digital Te chnicaljournal. This is also the ft rst year single-chip package design, and testability. that the Journal is available by subscription- a The two papers that close this collection of papers service our readers have asked fo r and which we are on the VAX 6000 Model 400 address chip design glad to be able to offer. verification and system test. Rick Calcagni and The journal will continue to fo cus each issue on a Will Sherwood explain the engineers' multipronged product theme. In fact, two products are featured in approach to design verification, an approach neces­ this issue. The main theme is the latest addition to sitated by the complexity of the chip set. Then, the V�'l: 6000 fam ily, the Model400. With its multi­ John Croll, larry Camilli, and To ny Va ccaro present processing capabilities, this midrange fa mily of a paper on the methods and tools designed to com­ systems provides a highly conf igurable and expand­ pletely test the interaction of VAX 6000 Model 400 able computing environment. Because the same system's hardware and software. cabinet, buses, and power systems are used by aU In the last rwo papers, the topic turns to work­ family members, systems can easily be upgraded to stations. To m Furlong, Mike Nielsen, and Neil achieve higher levels of performance. Papers in this Wi.lhelm provide an overview of the successful issue describe VAX 6000 Model 400 innovations and project undertaken to bui.ld a fast, competitively additions, including a new vector processor and a priced, RJSC-based, ULTRIX workstation, called the higher performance scalar processor module, chip DECstation 3100. The Journal is fo rtunate also to set design and verification, physical technology have a related paper on compiler optimization in advances, and system test. The second theme com­ RISC systems by Larry Weber, vice president, MIPS prises two papers related to Digital's workstation Systems, Inc. MIPS Systems built the RJSC chip set development, specifically the DECstation 3100, and incorporated in the DECstation 3100 workstation. compiler optin1ization in RISC systems. I thank Steve Holmes of the Midrange Systems Opening this issue is a paper on one of Digital's Business Group for his help in selecting topics on first vector processors. Dave Fenwick, john the Model 400, and Gillian Scholes of Digital and Shakshober, Debra Slater, and Doug Williams joanne Hasegawa of MIPS Systems, Inc., fo r their review the design alternatives for the VAXvector help in obtaining the workstation and RISC papers in 6000 Model400 processor and describe its function this issue. units. They then give examples of how the units combine to deliver high performance fo r computa­ tionally intensive applications. The Model 400 also has a new scalar processor, with nearly twice the performance of its prede­ cessor, the Model 300. In their paper, Pat Sullivan, Mike Callander, Jim Lundberg, Rebecca Stamm, and 2 Biographies I John T. Bartoszek john Bartoszek currently manages the Physical Technology Group within the SDE that is responsible for physical technology applications and product designs. John previously managed the PTG physical technology pro­ gram that spawned the physical technology used on the VAX 6000 Model 400 CPU module. He joined Digital in 1981 and has a B.S. in nuclear engineering from Lowell Technological Institute. He holds two patents for thermal control devices. john has authored several papers on spacecraft thermal control, solar energy, and electronics cooling and interconnect technologies. William). Bowhill As a principal engineer with the Semiconductor Engineer­ ing Group, William Bowhill is project leader for an engineering team that is designing an execution unit section of a large CMOS-based microprocessor. He has applied for two patents for his design work on the vector interface and backup control chip on the VAX 6000 Model 400 system. Bill also holds a patent for his work in relation to the Model 400's floating poinr accelerator chip. He joined Digital in 1985. Bill was educated in Great Britain and received a B.Eng.