March 28, 1967 w. F. LANDELL 3,31 1,893 MEMORY ORGANIZATION WHEREIN ONLY NEW DATA BITS WHICH ARE DIFFERENT FROM THE OLD ARE RECORDED Filed Aug. 29, 1965 3 Sheets-Sheet 1 rill/1g:|||||IL u_,.rzwzwdiii‘- 1 £3052%“a ‘ /"_,NM.\\2A\|:2 Ina“$6;$9;_6E \\“mm_1.:a IlI.| _\E052_; -; a_g_czézsizazzé_a 5A1.m_.a m._.m__mm>»_mmn__,_oaun+ \N.UEE,a L.ll_._\\||||IIEE _|»\:_so:i2 /_:23_a .n\s/v_Sago2255 & m5 I\mmzmo_W ??wwm _ _nmQ2 uJy:uEs/||||||||||||||| _ 35556mmu52 has_| a Mfr.||__IilI‘III.||lI'IIII an\\:“$212525zo_._.<s_oh_z_ an“n+owl \@umtm;\T.@258; nwuaM 2%WW@2222Oz a__ E ATTORNEY March 28, 1967 w. F. LANDELL 3,311,893 MEMORY ORGANIZATION WHEHEIN ONLY NEW DATA BITS WHICH ARE DIFFERENT FROM THE OLD ARE RECORDED Filed Aug. 29, 1963 3 Sheets-Sheet 2 FIG. 3 INTTTATE TTMING 111T CURRENT FOR SEL WO INFO STORED 1N BlTn OF SEL WO T / \\ ["1 .10.. ———————————— ——GROUND INTO FR BlTn, POS OUTPUT a) OF RO REG 22 __T1T “g: \ —V )uuwscm 0R BINARY “1" STATE ..0.. , /- —————————— ——GROUND 81Tn OF NEW W0 TO BE WRITTEN, / C) ____"_"_ __ l ___V P05 OUTPUT OF INFO WR REG 24 1 WE CLOCIHTP) AT COMPARATOR r1 (GATES 18 81201 "1" r ---- ——?,~-BLOCKED BY mm WR REG 24 OUTPUT OF WR OR'S 14,16 g) 1/, \\ \ / “01- \_ ____ __/\~-BLOCKED BY RD REG 22 March 28, 1967 w_ F, LANDELL 3,311,893 MEMORY DRGANIZATION WHEREIN ONLY NEW DATA BITS WHICH ARE DIFFERENT FROM THE OLD ARE RECORDED Filed Aug. 29, 1963 3 Sheets-Sheet 5 FIG. 4 WR COMMAND 71 a\ 12\ LOGICAL MEMORY CIRCUIT ELEMENT BITI I3 81\ I21\ LOGICAL MEMQRY CIRCUIT ELEMENT BIT 2 T x . , ’5 i B i : ,2 n n I \ I L \ LOGICAL MEMORY CIRCUIT ELEMENT BIT n 3,311,893 United States Patent 0 " Patented Mar. 28, 1967 1 2 ways preceded by a READ function. Accordingly, the 3,311,893 WRITE operation of the memory is contingent upon the MEMORY ORGANIZATION WHEREIN ONLY NEW results obtained during the READ function. As a con DATA BITS WHICH ARE DIFFERENT FROM sequence, prior to writing any word into a memory lo THE OLD ARE RECORDED cation or address, the contents of the memory word in the William F. Landell, Ardsley, Pa., assignor to Sperry Rand same location is ?rst read out of the memory and then Corporation, New York, N.Y., a corporation of compared bit by bit with the new word to be written. Delaware Filed Aug. 29, 1963, Ser. No. 305,461 Any of the binary bits of the new word that agree with 15 Claims. (Cl. 340-1725) the binary bits of the previously stored word are not re ll) recorded. On the other hand, those bits of the new word This invention relates in general to the recording of that differ from those of the previously stored word are information. It relates in particular to a technique recorded. wherein new information is not recorded unless it is dif In accordance with the above feature of this invention, ferent from the information already recorded. the phenomenon of creep in magnetic thin ?lm is ma Known mechanical prior art techniques to minimize terially reduced. The presence of creep in magnetic thin creep (i.e., the increase in length of a magnetized section films. explained in more detail hereinafter, is reduced by on a recording medium due to repeated pulsing) have not avoiding the re-recording of information already present been entirely satisfactory. The mechanical schemes for in a memory location. lt has been ‘found that the un mitigating creep, such as removing the magnetic material necessary re-recording of binary bits of information that between adjacent bits along a plated wire, have short are already present in the recording medium causes a comings in that they require elaborate manufacturing magnetized bit to grow in length and eventually interfere techniques which are expensive and difficult to employ. with and alter the contents of an adjacent bit position. By Another of the di?iculties encountered in the use of means of the READ-WRITE cycle provided by the in plated magnetic wires as a recording medium has been stant invention, no magnetized bit position is re-magne that history effects are readily developed therein. His tized unless it is necessary to do so. tory effects may be de?ned as a permanent set which is In accordance with another feature of this invention, developed in a plated magnetic Wire by remagnetizing a a memory device of high packing density is obtained. By certain bit location thereon many times in succession in means of the READ-WRITE cycle provided by the im one direction. As a result of successive recording in the proved logical circuitry of this invention, it is now pos same direction, the following effect has been observed; sible to arrange the magnetized bits along a thin ?lm if a certain bit position along the plated wire is succes plated wire memory much closer together, thereby pro sively magnetized as a binary “one” and afterwards it viding a memory device of high packing density and over is required to read out this “one” information, a certain all compact design. magnitude voltage will be detected by an appropriate elec The novel features that are considered characteristic tronic device. On the other hand, after remagnetizing a of this invention are set forth with particularity in the certain bit position as a binary “one” over many cycles appended claims. The invention itself, however, both as and afterward the same bit position is magnetized as a bi to its organization and method of operation, as well as nary “zero,” then the voltage detected by the above additional objects and features thereof, will best be un mentioned circuitry during a read out will not have the derstood ‘from the following description when considered same amplitude (opposite polarity) as the read out of the 1!!! in conjunction with the accompanying drawings, wherein: binary “one.” FIGURE 1 is the logical circuitry used in conjunction The history effect problem as discussed above is par with a conventional memory element to provide the novel ticularly serious in the operation of a digital computer, READ-WRITE cycle of the instant invention; since the latter functions by using discrete voltage pulses. FIGURE 2 is a detailed view of a memory element In the event that these voltage pulses lose amplitude or comprising a magnetic thin film plated on a wire sub are not well de?ned, there is a tendency for the computer strate; to produce spurious results and hence lose accuracy. FIGURE 3 is a timing diagram of various voltage It is therefore an object of this invention to provide an pulses occurring during the operation of the logical cir improved data memory device. cuitry of FIGURE 1', It is a further object of this invention to provide a 50 FIGURE 4 is a block diagram of an embodiment de‘ memory system having an improved organization. picting a plurality of memory elements each of which is It is a further object of this invention to provide im used in conjunction with a logical circuit provided by the proved logical circuitry which will minimize the elfect of instant invention. creep in magnetic thin ?lms. The logical circuitry of this invention comprises com It is still further an object of this invention to provide ponents all of which are well known in the digital com improved logical circuitry which will enable a thin ?lm puter art and therefore the details of these components memory to achieve high packing density. will neither be described in the speci?cation or shown It is still a further object of this invention to provide in the drawings. In addition, certain explanatory matter improved logical circuitry which incorporates a READ will be set forth which will make the description of the WRITE cycle. (it) present invention easier to follow. In the logical circuitry It is another object of this invention to provide a of the present invention, three gate devices are employed. memory device which is relatively efficient to operate These gate devices in the preferred embodiment a re nega It is yet another object of this invention to provide a tive AND gates, and it should be understood that these memory device wherein information is not written into AND gates perform an AND function in response to the same memory location where such information, at having their input circuits simultaneously receiving nega such write times, is already stored. tive signals. In addition, these AND gates perform an It is also another object of this invention to overcome inversion function, and in response to having all their history effects in recording on a continuous magnetic input circuits subjected to negative signals, provide a medium. positive output sgnal. Such a device can properly be In accordance with a feature of this invention, there labeled a negative NAND gate, but in the speci?cation, is provided logical circuitry for use with a memory de will be referred to as an AND gate. The logical circuitry vice wherein the WRITE function of the memory is al of this invention also utilizes an information register and 3,311,893 3 4. a read register, both of which can be flip-?op type de tion present on the write bus, comprise the respective vices. The information register is set in response to a ‘input signals to the ?rst AND gate. The output signal positive input signal while negative input signals have of the ?rst AND gate is transmitted to the input line of no effect.