Instruction Sets and Beyond: Computers, Complexity, and Controversy Robert P. Colwell, Charles Y. Hitchcock m, E. Douglas Jensen, H. M. Brinkley Sprunt, and Charles P. Kollar Carnegie-Mellon University t alanc o tyreceived Instruction set design is important, but lt1Mthi it should not be driven solely by adher- ence to convictions about design style, ,,tl ica' ch m e n RISC or CISC. The focus ofdiscussion o09 Fy ipt issues. RISC should be on the more general question of the assignment of system function- have guided ality to implementation levels within years. A study of an architecture. This point of view en- d yield a deeper un- compasses the instruction set-CISCs f hardware/software tend to install functionality at lower mputer performance, the system levels than RISCs-but also JOCUS on rne assignment iluence of VLSI on processor design, takes into account other design fea- ofsystem functionality to and many other topics. Articles on tures such as register sets, coproces- RISC research, however, often fail to sors, and caches. implementation levels explore these topics properly and can While the implications of RISC re- within an architecture, be misleading. Further, the few papers search extend beyond the instruction and not be guided by that present comparisons with com- set, even within the instruction set do- whether it is a RISC plex instruction set computer design main, there are limitations that have or CISC design. often do not address the same issues. not been identified. Typical RISC As a result, even careful study of the papers give few clues about where the literature is likely to give a distorted RISC approach might break down. view of this area ofresearch. This arti- Claims are made for faster machines cle offers a useful perspective of that are cheaper and easier to design RISC/Complex Instruction Set Com- and that "map" particularly well onto puter research, one that is supported VLSI technology. It has been said, by recent work at Carnegie-Mellon however, that "Every complex prob- University. lem has a simple solution. and it is Much RISC literature is devoted to wrong." RISC ideas are not "wrong," discussions of the size and complexity but a simple-minded view of them of computer instruction sets. These would be. RISC theory has many im- discussions are extremely misleading. plications that are not obvious. Re- 8 0018-9162/85/0900-0008$01.00 1985 IEEE COMPUTER search in this area has helped focus at- This progression from small and complexity of large architectures. tention on some important issues in simple to large and complex instruc- Current CAD tools and microcod- computer architecture whose resolu- tion sets is striking in the development ing support programs are ex- tions have too often been determined of single-chip processors within the amples. by defaults; yet RISC proponents past decade. Motorola's 68020, for ex- Microcode is an interesting example often fail to discuss the application, ar- ample, carries 11 more addressing of a technique that encourages com- chitecture, and implementation con- modes than the 6800, more than twice plex designs in two ways. First, it pro- texts in which their assertions seem as many instructions, and support for vides a structured means of effectively justified. an instruction cache and coprocessors. creating and altering the algorithms While RISC advocates have been Again, not only has the number of ad- that control execution of numerous vocal concerning their design methods dressing modes and instructions in- operations and complex instructions in and theories, CISC advocates have creased, but so has their complexity. a computer. Second, the proliferation been disturbingly mute. This is not a This general trend toward CISC ma- of CISC features is encouraged by the healthy state of affairs. Without chines was fueled by many things, in- quantum nature of microcode memor- substantive, reported CISC research, cluding the following: ies; it is relatively easy to add another arguments are left un- many RISC * New models are often required to addressing mode or obscure instruc- countered and, hence, out of per- with exist- tion to a machine which has not yet is be upward-compatible spective. The lack of such reports ing models in the same computer used all of its microcode space. nature due partially to the proprietary family, resulting in the superset- Instruction traces from CISC ma- and of most commercial CISC designs ting and proliferation of features. chines consistently show that few of partially to the fact that industry de- the available instructions are used in signers do not generally publish as * Many computer designers tried to reduce the "semantic gap" be- most computing environments. This much as academics. Also, the CISC situation led IBM's John Cocke, in the design style has no coherent statement tween programs and computer in- struction sets. By adding instruc- early 70's, to contemplate a departure of design principles, and CISC design- from traditional computer styles. The ers do not appear to be actively work- tions semantically closer to those used by programmers, these de- result was a research project based on ing on one. This lack of a manifesto an ECL rnachine that used a very ad- differentiates the CISC and RISC de- signers hoped to reduce software costs by creating a more easily vanced compiler, creatively named sign styles and is the result of their dif- "801" for the research group's build- ferent historical developments. programmed machine. Such in- structions tend to be more com- ing number. Little has been published plex because of their higher se- about that project, but what has been Towards defining a RISC mantic level. (It is often the case, released speaks for a principled and however, that instructions with coherent research effort. The 801's instruction set was based Since the earliest digital electronic high semantic content do not ex- on three design principles. According computers, instruction sets have tended actly match those required for the to Radin, 2 the instruction set was to be to grow larger and more complex. The language at hand.) that set of run-time operations that 1948 MARK-1 had only seven instruc- * In striving to develop faster ma- tions of minimal complexity, such as chines, designers constantly moved * could not be moved to compile adds and simple jumps, but a contem- functions from software to micro- time, porary machine like the VAX has hun- code and from microcode to hard- * could not be more efficiently exe- dreds of instructions. Furthermore, its ware, often without concern for cuted by object code produced by instructions can be rather compli- the adverse effects that an added a compiler that understood the cated, like atomically inserting an ele- architectural feature can have on high-level intent of the program, ment into a doubly linked list or an implementation. For example, and evaluating a floating point polynomial addition of an instruction requir- * could be implemented in random of arbitrary degree. Any high perfor- ing an extra level of decoding logic logic more effectively than the mance implementation of the VAX, as can slow a machine's entire in- equivalent sequence of software a result, has to rely on complex im- struction set. (This is called the instructions. plementation techniques such as pipe- "n + 1" phenomenon.1 ) The machine relied on a compiler that lining, prefetching, and multi-cycle in- * Tools and methodologies aid de- used many optimization strategies for struction execution. signers in handling the inherent much of its effectiveness, including a September 1985 9 powerful scheme of register alloca- formed at run-time by special hard- Pyramid's machine is not a load/store tion. The hardware implementation ware). By trading hardware for com- computer, however, and both Ridge was guided by a desire for leanness and pile-time software, the Stanford and Pyramid machines have variable featured hardwired control and single- researchers were able to expose and use length instructions and use multiple- cycle instruction execution. The archi- the inherent internal parallelism of cycle interpretation and microcoded tecture was a 32-bit load/store ma- their fast computing engine. control engines. Further, while their chine (only load and store instructions These three machines, the 801, instruction counts might seem reduced accessed memory) with 32 registers RISCI, and MIPS, form the core of when compared to a VAX, the Pyra- and single-cycle instructions. It had RISC research machines, and share a mid has almost 90 instructions and the separate instruction and data caches to set of common features. We propose Ridge has over 100. The use of micro- allow simultaneous access to code and the following elements as a working coding in these machines is for price operands. definition of a RISC: and performance reasons. The Pyra- Some of the basic ideas from the 801 mid machine also has a system of mul- research reached the West Coast in the (1) Single-cycle operation facilitates tiple register sets derived from the mid 70's. At the University of Califor- the rapid execution of simple Berkeley RISC I, but this feature is or- nia at Berkeley, these ideas grew into a functions that dominate a com- thogonal to RISC theory. These may series of graduate courses that prod- puter's instruction stream and be successful machines, from both uced the RISC I * (followed later by the promotes a low interpretive technological and marketing stand- RISC II) and the numerous CAD tools overhead. points, but they are not RISCs. that facilitated its design. These (2) Loadlstore design follows from The six RISC features enumerated courses laid the foundation for related a desire for single-cycle opera- above can be used to weed out mis- research efforts in performance eval- tion.