Outline Circuit complexity K. Subramani1 1Lane Department of Computer Science and Electrical Engineering West Virginia University April 1, 2009 Subramani Complexity Classes Outline Outline 1 Circuit Complexity Circuits Circuit complexity of Reachability 2 The Probabilistic Method 3 The Chernoff Bound 4 Circuits and BPP Subramani Complexity Classes Outline Outline 1 Circuit Complexity Circuits Circuit complexity of Reachability 2 The Probabilistic Method 3 The Chernoff Bound 4 Circuits and BPP Subramani Complexity Classes Outline Outline 1 Circuit Complexity Circuits Circuit complexity of Reachability 2 The Probabilistic Method 3 The Chernoff Bound 4 Circuits and BPP Subramani Complexity Classes Outline Outline 1 Circuit Complexity Circuits Circuit complexity of Reachability 2 The Probabilistic Method 3 The Chernoff Bound 4 Circuits and BPP Subramani Complexity Classes Circuit Complexity The Probabilistic Method Circuits The Chernoff Bound Circuit complexity of Reachability Circuits and BPP Outline 1 Circuit Complexity Circuits Circuit complexity of Reachability 2 The Probabilistic Method 3 The Chernoff Bound 4 Circuits and BPP Subramani Complexity Classes Circuit Complexity The Probabilistic Method Circuits The Chernoff Bound Circuit complexity of Reachability Circuits and BPP Circuit Refresher Definition A boolean circuit is a directed acyclic graph G = hV ; Ei, where the nodes in V = f1; 2;:::; ng are called gates and the edges are of the form (i; j), i < j. Observation A circuit with n variable inputs can compute any boolean function with n variables. Observation n Alternatively, a circuit accepts some subset of strings in x = x1x2 ::: xn 2 f0; 1g , th where the i input is true if and only if xi = 1. Subramani Complexity Classes Circuit Complexity The Probabilistic Method Circuits The Chernoff Bound Circuit complexity of Reachability Circuits and BPP Circuit Refresher Definition A boolean circuit is a directed acyclic graph G = hV ; Ei, where the nodes in V = f1; 2;:::; ng are called gates and the edges are of the form (i; j), i < j. Observation A circuit with n variable inputs can compute any boolean function with n variables. Observation n Alternatively, a circuit accepts some subset of strings in x = x1x2 ::: xn 2 f0; 1g , th where the i input is true if and only if xi = 1. Subramani Complexity Classes Circuit Complexity The Probabilistic Method Circuits The Chernoff Bound Circuit complexity of Reachability Circuits and BPP Circuit Refresher Definition A boolean circuit is a directed acyclic graph G = hV ; Ei, where the nodes in V = f1; 2;:::; ng are called gates and the edges are of the form (i; j), i < j. Observation A circuit with n variable inputs can compute any boolean function with n variables. Observation n Alternatively, a circuit accepts some subset of strings in x = x1x2 ::: xn 2 f0; 1g , th where the i input is true if and only if xi = 1. Subramani Complexity Classes Circuit Complexity The Probabilistic Method Circuits The Chernoff Bound Circuit complexity of Reachability Circuits and BPP Circuits as Language acceptors Definition The size of a circuit is the number of gates in it. Definition A family of circuits is an infinite sequence C = (C0; C1;:::) of boolean circuits, where ∗ Cn has n input variables. We say that language L ⊆ f0; 1g has polynomial circuits, if there exists a family of circuits C = (C0; C1;:::) such that (i) jCnj ≤ p(n), where p is some fixed polynomial, and ∗ (ii) 8x 2 f0; 1g x 2 L $ the output of Cjxj is true under the assignment that forces th the i input variable to be true when xi = 1 and 0 otherwise. Subramani Complexity Classes Circuit Complexity The Probabilistic Method Circuits The Chernoff Bound Circuit complexity of Reachability Circuits and BPP Circuits as Language acceptors Definition The size of a circuit is the number of gates in it. Definition A family of circuits is an infinite sequence C = (C0; C1;:::) of boolean circuits, where ∗ Cn has n input variables. We say that language L ⊆ f0; 1g has polynomial circuits, if there exists a family of circuits C = (C0; C1;:::) such that (i) jCnj ≤ p(n), where p is some fixed polynomial, and ∗ (ii) 8x 2 f0; 1g x 2 L $ the output of Cjxj is true under the assignment that forces th the i input variable to be true when xi = 1 and 0 otherwise. Subramani Complexity Classes Circuit Complexity The Probabilistic Method Circuits The Chernoff Bound Circuit complexity of Reachability Circuits and BPP Circuits as Language acceptors Definition The size of a circuit is the number of gates in it. Definition A family of circuits is an infinite sequence C = (C0; C1;:::) of boolean circuits, where ∗ Cn has n input variables. We say that language L ⊆ f0; 1g has polynomial circuits, if there exists a family of circuits C = (C0; C1;:::) such that (i) jCnj ≤ p(n), where p is some fixed polynomial, and ∗ (ii) 8x 2 f0; 1g x 2 L $ the output of Cjxj is true under the assignment that forces th the i input variable to be true when xi = 1 and 0 otherwise. Subramani Complexity Classes Circuit Complexity The Probabilistic Method Circuits The Chernoff Bound Circuit complexity of Reachability Circuits and BPP Circuits as Language acceptors Definition The size of a circuit is the number of gates in it. Definition A family of circuits is an infinite sequence C = (C0; C1;:::) of boolean circuits, where ∗ Cn has n input variables. We say that language L ⊆ f0; 1g has polynomial circuits, if there exists a family of circuits C = (C0; C1;:::) such that (i) jCnj ≤ p(n), where p is some fixed polynomial, and ∗ (ii) 8x 2 f0; 1g x 2 L $ the output of Cjxj is true under the assignment that forces th the i input variable to be true when xi = 1 and 0 otherwise. Subramani Complexity Classes Circuit Complexity The Probabilistic Method Circuits The Chernoff Bound Circuit complexity of Reachability Circuits and BPP Outline 1 Circuit Complexity Circuits Circuit complexity of Reachability 2 The Probabilistic Method 3 The Chernoff Bound 4 Circuits and BPP Subramani Complexity Classes Circuit Complexity The Probabilistic Method Circuits The Chernoff Bound Circuit complexity of Reachability Circuits and BPP Reduction We reduce Reachability to the Circuit Value problem. Let G = hV ; Ei be a graph and let (1; n) denote the source and target of the reachability problem respectively. Steps (i) Construct gates gijk with 1 ≤ i; j ≤ n and 0 ≤ k ≤ n; intuitively, gijk is true if and only if there is a path in G from i to j using all intermediate nodes in the set Sk = f1; 2;:::; kg. (ii) Construct gates hijk with 1 ≤ i; j; k ≤ n; intuitively, hijk is true if and only if there is a path in G from i to j with all intermediate nodes in Sk and k is an intermediate node. (iii) gij0 (input gate) is true if i = j or there is an edge from i to j; it is false otherwise. (iv) For k = 1; 2;:::; n, hijk is an AND gate with predecessors gi;k;k−1 and gk;j;k−1. (v) For k = 1; 2;::: n, gijk is an OR gate with predecessors gi;j;k−1 and hijk . Note The circuit is merely a hardware representation of the Floyd-Warshall algorithm discussed in Homework I! Subramani Complexity Classes Circuit Complexity The Probabilistic Method Circuits The Chernoff Bound Circuit complexity of Reachability Circuits and BPP Reduction We reduce Reachability to the Circuit Value problem. Let G = hV ; Ei be a graph and let (1; n) denote the source and target of the reachability problem respectively. Steps (i) Construct gates gijk with 1 ≤ i; j ≤ n and 0 ≤ k ≤ n; intuitively, gijk is true if and only if there is a path in G from i to j using all intermediate nodes in the set Sk = f1; 2;:::; kg. (ii) Construct gates hijk with 1 ≤ i; j; k ≤ n; intuitively, hijk is true if and only if there is a path in G from i to j with all intermediate nodes in Sk and k is an intermediate node. (iii) gij0 (input gate) is true if i = j or there is an edge from i to j; it is false otherwise. (iv) For k = 1; 2;:::; n, hijk is an AND gate with predecessors gi;k;k−1 and gk;j;k−1. (v) For k = 1; 2;::: n, gijk is an OR gate with predecessors gi;j;k−1 and hijk . Note The circuit is merely a hardware representation of the Floyd-Warshall algorithm discussed in Homework I! Subramani Complexity Classes Circuit Complexity The Probabilistic Method Circuits The Chernoff Bound Circuit complexity of Reachability Circuits and BPP Reduction We reduce Reachability to the Circuit Value problem. Let G = hV ; Ei be a graph and let (1; n) denote the source and target of the reachability problem respectively. Steps (i) Construct gates gijk with 1 ≤ i; j ≤ n and 0 ≤ k ≤ n; intuitively, gijk is true if and only if there is a path in G from i to j using all intermediate nodes in the set Sk = f1; 2;:::; kg. (ii) Construct gates hijk with 1 ≤ i; j; k ≤ n; intuitively, hijk is true if and only if there is a path in G from i to j with all intermediate nodes in Sk and k is an intermediate node. (iii) gij0 (input gate) is true if i = j or there is an edge from i to j; it is false otherwise. (iv) For k = 1; 2;:::; n, hijk is an AND gate with predecessors gi;k;k−1 and gk;j;k−1. (v) For k = 1; 2;::: n, gijk is an OR gate with predecessors gi;j;k−1 and hijk .